Symmetric cipher optimization method and system based on chaotic mapping

Abstract

The invention provides a symmetric cipher optimization method and system based on chaotic mapping, and the method comprises the steps: initializing a chaotic mapping parameter, and determining an initial value and a control parameter of a chaotic system; based on the initial value and the control parameter, utilizing enhanced Logistic chaotic mapping to generate a high-randomness chaotic sequence; constructing an initial S box based on the generated enhanced Logistic chaotic sequence; and carrying out optimization and structural weakness correction on the generated initial S box. According to the method, the security of the symmetric cryptographic algorithm can be remarkably improved, the anti-attack capability of the S box is greatly enhanced, the cryptographic index of the S box is ensured, and the security guarantee in a wider application scene is realized by adjusting the size of the S box through fine granularity.

Description

Technical Field

[0001] The present invention belongs to the technical field of information security and cryptography, and in particular relates to a symmetric cryptography optimization method and system based on chaotic mapping. Background Art

[0002] In the field of symmetric cryptographic algorithms, S-boxes, as a key nonlinear transformation component, are crucial to the algorithm's security and performance. Traditional S-box designs typically employ algebraic structures or heuristic methods, such as lookup tables or algebraic operations, to achieve obfuscation and nonlinearity. However, with advances in cryptanalysis techniques such as differential and linear attacks, the security of traditional S-boxes has been increasingly challenged. These attacks exploit the input-output relationship of the S-box, potentially leaking critical information and compromising the security of the entire encryption system.

[0003] While existing S-box designs have undergone extensive testing and evaluation, their ability to resist emerging cryptanalysis techniques is gradually becoming limited. In particular, against advanced threat models, traditional S-box designs may not provide adequate security. This poses a potential risk to demanding security scenarios, such as financial transactions and cloud data transmission. Summary of the Invention

[0004] The purpose of the present invention is to provide a symmetric cryptographic optimization method and system based on chaotic mapping to solve the above problems.

[0005] To achieve the above object, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a symmetric cryptographic optimization method based on chaotic mapping, comprising: Initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Based on the initial value and control parameters, the enhanced Logistic chaotic map is used to generate a highly random chaotic sequence. Construct the initial S-box based on the generated enhanced Logistic chaotic sequence; The generated initial S-box is optimized and its structural weaknesses are corrected.

[0006] Furthermore, the initialization of the chaotic mapping parameters and determination of the initial values and control parameters of the chaotic system include: Set the initial value of the chaos map ; Set the chaotic mapping control parameter r' under the premise of the generation of chaotic state and the randomness of the sequence. Furthermore, the method of generating a highly random chaotic sequence based on the initial value and the control parameter by using the enhanced Logistic chaotic map includes: Based on the determined initial values and control parameters, the formula , iteratively generates enhanced Logistic chaotic sequences.

[0007] Furthermore, constructing an initial S-box based on the generated enhanced Logistic chaotic sequence includes: For the set S-box size, initialize the current length n to 0; Repeat the setting operation until the current length n reaches .

[0008] Furthermore, the setting operation includes: (1) Take out the values from the chaotic sequence in sequence ; (2) Extraction Specify a number of digits in the decimal part to generate a temporary value temp; (3) Modulo operation of temp Get the S-box candidate elements; (4) Determine whether the candidate element does not appear in the S-box and is not equal to the current length n. If so, insert the element into the S-box and add 1 to the length n. After completion, output the initial S-box. .

[0009] Furthermore, the optimization and structural weakness correction of the generated initial S-box includes: Set the initial temperature T, cooling rate alpha, counter ctr to 0, and set the upper limit of iteration number t; Repeat the simulated annealing optimization process until the number of iterations t is reached; Perform structural weakness detection on the S-box optimized by simulated annealing, including fixed point, anti-fixed point and short cycle detection; For the detected fixed points and anti-fixed points, traverse and exchange their positions with other elements, and select the exchange scheme with the highest nonlinearity NL after exchange; For the detected short-cycle phenomenon, the elements in the cycle are reconnected and the connection method with the highest nonlinearity NL is selected for implementation. After completion, the optimized and corrected S-box is output. , as the final safe S-box.

[0010] Furthermore, simulated annealing optimization includes: (1) Use the enhanced Logistic chaotic sequence to randomly select two positions a and b in the S-box and exchange the elements of these two positions in the S-box to obtain a new S-box ; (2) Calculate the nonlinearity of the new S-box S_ini' ; (3) According to probability Decide whether to accept the new S-box. If accepted, Update to the current S-box; (4) Update the temperature T to T×alpha, and increase the counter ctr by 1; (5) After the iteration is completed, the S-box optimized by simulated annealing is obtained .

[0011] In a second aspect, the present invention provides a symmetric cryptographic optimization system based on chaotic mapping, comprising: Initialization module, used to initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Chaotic map generation module, used to generate highly random chaotic sequences using enhanced Logistic chaotic map based on initial values and control parameters; An initial S-box construction module is used to construct an initial S-box based on the generated enhanced Logistic chaotic sequence; The optimization output module is used to optimize the generated initial S-box and correct its structural weaknesses.

[0012] In a third aspect, the present invention provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the symmetric cryptographic optimization method based on chaotic mapping when executing the computer program.

[0013] In a fourth aspect, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the symmetric cryptographic optimization method based on chaotic mapping are implemented.

[0014] Compared with the prior art, the present invention has the following technical effects: The present invention first initializes the chaotic mapping parameters to ensure that the generated chaotic sequence is highly random and complex, making the subsequent S-box design more difficult to solve. Subsequently, the initial S-box is constructed using an enhanced logistic chaotic sequence to enhance its nonlinear characteristics and attack resistance. Next, the initial S-box is optimized using a simulated annealing algorithm, including random position swapping and temperature control, to find a more optimal S-box design. Finally, the optimized S-box is tested and corrected for structural weaknesses, eliminating potential fixed points, anti-fixed points, and short cycles, thereby improving the security and reliability of the overall cryptographic algorithm.

[0015] Furthermore, the purpose of using the enhanced logistic chaotic map is to exploit its highly nonlinear dynamic properties to generate sequences with strong randomness and complexity. This unpredictable nature of the sequence is crucial for protecting the keys and data of cryptographic algorithms, especially against modern cryptanalysis techniques such as differential and linear attacks. The introduction of the pi constant, π, further increases the complexity of the chaotic map, making it difficult for attackers to decipher the next state of the sequence.

[0016] Furthermore, depending on the size of the S-box, the present invention fine-tunes the generation method of the temporary value temp to optimize and enhance the randomness and complexity of the S-box. For large-sized S-boxes, a longer fractional part is extracted to enhance the nonlinear characteristics of the S-box, effectively improving the cryptographic algorithm's resistance to differential attacks and linear attacks. For small-sized S-boxes, although the number of extracted bits is smaller, sufficient randomness and complexity are still guaranteed to meet basic security requirements. Through this strategy, the present invention achieves a good balance between security and efficiency, significantly improving the applicability and security of symmetric cryptographic algorithms in various application scenarios.

[0017] Furthermore, the present invention aims to enhance the security and stability of symmetric cryptographic algorithms by identifying and correcting fixed points, anti-fixed points, and short-cycle phenomena in S-boxes. These corrections effectively disrupt any input-output correlations and periodic structures, thereby improving the algorithm's ability to resist differential and linear attacks. This correction process goes beyond simply fixing vulnerabilities; it involves a thorough optimization of the algorithm's design, ensuring it exhibits sufficient randomness and complexity in a variety of application scenarios, thereby enhancing overall security.

[0018] In summary, the present invention can significantly improve the security of symmetric cryptographic algorithms, greatly enhance the anti-attack capability of the S-box and ensure its cryptographic indicators. By fine-grained adjustment of the S-box size, security protection is achieved in a wider range of application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the overall flow chart of the present invention.

[0020] Figure 2 Comparison chart of S-box test results of different schemes of the present invention, a SAC index comparison between different schemes, b NL index comparison between different schemes, c LAP index comparison between different schemes, d DAP index comparison between different schemes, e BIC-NL index comparison, f BIC-SAC index comparison. DETAILED DESCRIPTION

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0022] In the description of the present invention, it is to be understood that the terms “include” and “comprise” indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0023] It should also be understood that the terms used in the present specification are only for the purpose of describing particular embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0024] It should be further understood that the term "and / or" as used in the present specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0025] It should be understood that although the terms "first," "second," and "third" may be used to describe preset ranges in embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are merely used to distinguish one preset range from another. For example, without departing from the scope of embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0026] The word "if," as used herein, may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to the determination" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)," depending on the context.

[0027] The accompanying drawings illustrate various schematic diagrams of structures according to embodiments disclosed herein. These figures are not drawn to scale; for clarity, some details are exaggerated and some details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0028] This paper provides an improved symmetric encryption method based on chaotic mapping and optimization algorithms. Compared to existing technologies, this method primarily introduces an enhanced logistic chaotic mapping to generate highly random sequences, combines simulated annealing to optimize the S-box structure, and addresses fixed point, anti-fixed point, and short-cycle phenomena. These optimization measures enhance the nonlinearity of the S-box and strengthen its resistance to differential and linear attacks, significantly improving the security of the encryption algorithm.

[0029] In embodiment 1, the present invention provides a symmetric cryptographic optimization method based on chaotic mapping, comprising: Initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Based on the initial value and control parameters, the enhanced Logistic chaotic map is used to generate a highly random chaotic sequence. Construct the initial S-box based on the generated enhanced Logistic chaotic sequence; The generated initial S-box is optimized and its structural weaknesses are corrected.

[0030] In embodiment 2, the present invention provides a symmetric cryptographic optimization method based on chaotic mapping, comprising the following steps: S1. Initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Set the initial value of the chaos map Set to 0.972. Set the chaotic mapping control parameter r' to 4 to ensure the generation of chaotic state and the randomness of the sequence; S2, using enhanced Logistic chaotic mapping to generate highly random chaotic sequences; Based on the initial values and control parameters determined in step S1, the formula , iteratively generate enhanced Logistic chaotic sequences; S3, construct the initial S-box based on the generated enhanced Logistic chaotic sequence; For the set S-box size, initialize the current length n to 0. Repeat the following steps until the current length n reaches :(1)Take out the values from the chaotic sequence in sequence ; (2) Extraction Specify a number of digits in the decimal part to generate a temporary value temp; (3) modulus operation (mod ) Get the candidate element of the S box; (4) Determine whether the candidate element does not appear in the S box and is not equal to the current length n. If it is satisfied, insert the element into the S box and add 1 to the length n; (After completion, output the initial S box , used for optimization and weakness correction of step S4.) When the S-box size is greater than 6, the temporary value temp is obtained by extracting the value in the chaotic sequence The 3rd, 4th and 5th decimal digits are obtained; when the S-box size is less than or equal to 6, the temporary value temp is obtained by extracting the value in the chaotic sequence. The 3rd and 4th decimal places are obtained.

[0031] S4, the initial S box generated in step S3 Carry out optimization and correction of structural weaknesses; Set the initial temperature T = 1000, the cooling rate alpha = 0.99, the counter ctr to 0, and set the upper limit of the number of iterations t. Repeat the following simulated annealing optimization process until the number of iterations t is reached: (1) Use the enhanced Logistic chaotic sequence to randomly select two positions a and b in the S-box and exchange the elements of these two positions in the S-box to obtain a new S-box ; (2) Calculate the new S-box Nonlinearity ; The nonlinearity calculation formula is: in, is the S-box transformation function based on Walsh spectrum calculation, and α is the input mask. (3) According to the probability Decide whether to accept the new S-box. If accepted, Update to the current S-box; (4) Update the temperature T to T×alpha, and increase the counter ctr by 1; (5) After the iteration is completed, the S-box optimized by simulated annealing is obtained . Perform structural weakness detection on the S-box after simulated annealing optimization, including fixed point, anti-fixed point and short cycle detection. The specific weakness detection is: scan the optimized S-box element by element, if it is found that S(x)=x, it is recorded as a fixed point, if it satisfies S(x)=~x, it is recorded as an anti-fixed point; if there is an element that returns to itself after multiple S-box iterations, forming a short cycle, then the element set of the short cycle phenomenon is recorded. For the detected fixed points and anti-fixed points, traverse and exchange their positions with other elements, and select the exchange scheme with the highest nonlinearity NL after the exchange to implement. For the detected short cycle phenomenon, reconnect the elements in the cycle, and select the connection method with the highest nonlinearity NL for implementation; (After completion, output the S-box after optimization and correction of weaknesses , as the final secure S-box for actual cryptographic algorithm construction.) To verify the security of the proposed S-box design method, this experiment compared and analyzed the performance of an S-box generated and optimized based on an enhanced logistic chaotic map with other common 8-bit S-boxes across multiple security metrics. Key evaluation metrics include nonlinearity, differential probability, and linear probability. Nonlinearity reflects the complexity of the S-box; higher values indicate greater resistance to differential and linear attacks. Differential probability measures the probability that an input differential maps to the same output differential; lower values indicate greater resistance to differential attacks. Linear probability assesses the strength of the linear relationship between input and output; lower values indicate greater resistance to linear attacks. Furthermore, metrics such as the strict avalanche criterion (SAC), bit-independent nonlinearity (BIC-NL), and bit-independent avalanche effect criterion (BIC-SAC) were used for a more comprehensive security analysis.

[0032] See also Figure 2 The present invention performs well in two key metrics, SAC and NL. In terms of SAC, its value is close to the theoretical optimal value of 0.5, indicating that the impact of input bit changes on output bits is more uniform, with stronger diffusion and randomness. In contrast, the SAC of schemes such as Khan and Zahid deviates significantly and has relatively weak diffusion. In terms of NL, the nonlinearity of the present invention's scheme reaches 112.25, significantly better than the initial scheme's 100 and other comparison schemes, indicating that it has greater advantages in resisting linear attacks and can effectively improve the security of the cryptographic algorithm.

[0033] The experimental results show that the present invention performs well in terms of security, especially in terms of the two key indicators of LP and DP, which are superior to all the comparison schemes. In terms of LP, the value of the proposed algorithm is much lower than that of other schemes, indicating that it has higher security against linear attacks, while the initial S-box scheme has the highest LP value and the weakest anti-attack capability. In terms of DP, the proposed algorithm also performs best, and the lowest DP value means stronger resistance to differential attacks. In comparison, the Initial and Khan schemes have higher DP values and lower security. Overall, the proposed algorithm shows comprehensive advantages in improving the security of the S-box.

[0034] In experimental comparisons of the two metrics, BIC-NL and BIC-SAC, the algorithm of the present invention continues to perform well, ensuring a high level of security. In terms of BIC-NL, the nonlinearity of the proposed scheme is significantly higher than that of other schemes, indicating its superiority in resisting linear attacks, particularly in optimizing the nonlinearity associated with bit independence. In terms of BIC-SAC, the results of the algorithm of the present invention are closest to the ideal value of 0.5, indicating that it can evenly affect the output bits when the input bits change, resulting in better diffusion performance and helping to resist differential attacks. Overall, the proposed scheme outperforms the comparative schemes in balancing bit independence and security, further validating its optimization effect.

[0035] In summary, the present invention, a method for improving symmetric encryption based on chaotic mapping and optimization algorithms, demonstrates significant comprehensive advantages in S-box design algorithms in experiments, with enhanced stability and attack resistance. Compared to existing solutions, this invention achieves comprehensive optimization across multiple key metrics, fully demonstrating the security of the S-box. This achievement provides stronger security for cryptographic algorithm design and serves as an important reference for subsequent research and practical applications.

[0036] In yet another embodiment of the present invention, a symmetric cryptographic optimization system based on chaotic mapping is provided, which can be used to implement the above-mentioned symmetric cryptographic optimization method based on chaotic mapping. Specifically, the system includes: Initialization module, used to initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Chaotic map generation module, used to generate highly random chaotic sequences using enhanced Logistic chaotic map based on initial values and control parameters; An initial S-box construction module is used to construct an initial S-box based on the generated enhanced Logistic chaotic sequence; The optimization output module is used to optimize the generated initial S-box and correct its structural weaknesses.

[0037] The module division in the embodiments of the present invention is illustrative and represents only one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in various embodiments of the present invention may be integrated into a single processor, exist physically as separate modules, or two or more modules may be integrated into a single module. The integrated modules may be implemented in either hardware or software functional modules.

[0038] In another embodiment of the present invention, a computer device is provided, comprising a processor and a memory, wherein the memory is used to store a computer program, the computer program including program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., which is the computing core and control core of the terminal, and is suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function; the processor described in the embodiment of the present invention can be used for the operation of a symmetric cryptographic optimization method based on a chaotic map.

[0039] In another embodiment of the present invention, a storage medium is provided, specifically a computer-readable storage medium (Memory). The computer-readable storage medium is a memory device in a computer device, used to store programs and data. It is understood that the computer-readable storage medium herein may include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides storage space, which stores the terminal's operating system. Furthermore, the storage space also stores one or more instructions suitable for being loaded and executed by a processor. These instructions may be one or more computer programs (including program code). It should be noted that the computer-readable storage medium herein may be a high-speed RAM memory or a non-volatile memory, such as at least one disk storage device. The processor may load and execute the one or more instructions stored in the computer-readable storage medium to implement the corresponding steps of the chaotic map-based symmetric cryptographic optimization method described in the above-mentioned embodiment.

[0040] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0041] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0042] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0043] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A symmetric cryptographic optimization method based on chaotic mapping, characterized in that: include: Initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Based on the initial value and control parameters, the enhanced Logistic chaotic map is used to generate a highly random chaotic sequence. Construct the initial S-box based on the generated enhanced Logistic chaotic sequence; The generated initial S-box is optimized and its structural weaknesses are corrected.

2. A symmetric cryptographic optimization method based on chaotic mapping according to claim 1, characterized in that: Initializing the chaotic mapping parameters and determining the initial values and control parameters of the chaotic system include: Set the initial value of the chaos map ; Set the chaotic mapping control parameter r' under the premise of the generation of chaotic state and the randomness of the sequence.

3. A symmetric cryptographic optimization method based on chaotic mapping according to claim 1, characterized in that: The method of generating a highly random chaotic sequence based on initial values and control parameters by using enhanced Logistic chaotic mapping includes: Based on the determined initial values and control parameters, the formula , iteratively generate enhanced Logistic chaotic sequences; in: is the chaos control parameter, is the input value of the chaotic map at the nth iteration, is the combination of the original Logistic map and the pi constant π, It is a modulo operation.

4. A symmetric cryptographic optimization method based on chaotic mapping according to claim 1, characterized in that: The initial S-box is constructed based on the generated enhanced Logistic chaotic sequence, comprising: For the set S-box size, initialize the current length n to 0; Repeat the setting operation until the current length n reaches .

5. A symmetric cryptographic optimization method based on chaotic mapping according to claim 4, characterized in that: The setup operations include: (1) Take out the values from the chaotic sequence in sequence ; (2) Extraction Specify a number of digits in the decimal part to generate a temporary value temp; (3) Modulo operation of temp Get the S-box candidate elements; (4) Determine whether the candidate element does not appear in the S-box and is not equal to the current length n. If so, insert the element into the S-box and add 1 to the length n. After completion, output the initial S-box. .

6. A symmetric cryptographic optimization method based on chaotic mapping according to claim 1, characterized in that: The optimization and structural weakness correction of the generated initial S-box include: Set the initial temperature T, cooling rate alpha, counter ctr to 0, and set the upper limit of iteration number t; Repeat the simulated annealing optimization process until the number of iterations t is reached; Perform structural weakness detection on the S-box optimized by simulated annealing, including fixed point, anti-fixed point and short cycle detection; For the detected fixed points and anti-fixed points, traverse and exchange their positions with other elements, and select the exchange scheme with the highest nonlinearity NL after exchange; For the detected short-cycle phenomenon, the elements in the cycle are reconnected and the connection method with the highest nonlinearity NL is selected for implementation. After completion, the optimized and corrected S-box is output. , as the final safe S-box.

7. A symmetric cryptographic optimization method based on chaotic mapping according to claim 6, characterized in that: Simulated annealing optimization includes: (1) Use the enhanced Logistic chaotic sequence to randomly select two positions a and b in the S-box and exchange the elements of these two positions in the S-box to obtain a new S-box ; (2) Calculate the nonlinearity of the new S-box S_ini' ; (3) According to probability Decide whether to accept the new S-box. If accepted, Update to the current S-box; (4) Update the temperature T to T×alpha, and increase the counter ctr by 1; (5) After the iteration is completed, the S-box optimized by simulated annealing is obtained ; in: is the nonlinearity of the current S-box, is the nonlinearity of the new S-box, and T is the temperature parameter.

8. A symmetric cryptographic optimization system based on chaotic mapping, characterized in that: include: Initialization module, used to initialize the chaotic mapping parameters and determine the initial values and control parameters of the chaotic system; Chaotic map generation module, used to generate highly random chaotic sequences using enhanced Logistic chaotic map based on initial values and control parameters; An initial S-box construction module is used to construct an initial S-box based on the generated enhanced Logistic chaotic sequence; The optimization output module is used to optimize the generated initial S-box and correct its structural weaknesses.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the chaotic mapping-based symmetric cryptographic optimization method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the chaotic mapping-based symmetric cryptographic optimization method according to any one of claims 1 to 7 are implemented.

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