Multi-channel CdZnTe readout circuit chip and implementation method

Abstract

The invention relates to a chip circuit technology, and discloses a multi-channel CdZnTe readout circuit chip and an implementation method thereof, and the multi-channel CdZnTe readout circuit chip comprises a data processing module, an output interface module and a plurality of front-end readout channels. Each front-end reading channel corresponds to one CdZnTe detector pixel, and each front-end reading channel is provided with a trans-impedance amplifier, a charge sensitive amplifier, a shaping filter, a gain adjustment module and a baseline recovery circuit in sequence from input to output; and the data processing module performs analog-to-digital conversion and analysis processing on the analog signals output by the front-end reading channels, and outputs analysis data obtained by processing through the output interface module. The multi-channel CdZnTe readout circuit chip is low in noise and large in dynamic range, can be suitable for radiation sources with the intensity changing in a large range, and has the high anti-noise capacity.

Description

Technical Field

[0001] The present application relates to the field of chip circuit technology, and in particular to a multi-channel CdZnTe readout circuit chip and an implementation method thereof. Background Art

[0002] As an important radiation detector, CdZnTe (cadmium zinc telluride) detectors are widely used in fields such as nuclear physics, astrophysics, medical imaging, and security inspection. In practical applications, arrays consisting of multiple CdZnTe detector pixels are often required to improve detection spatial resolution and efficiency. Each detector pixel requires an independent readout circuit to process and read out its weak output signal, thus creating a need for multi-channel readout circuit chips.

[0003] Because the signal output by a CdZnTe detector is typically very weak and susceptible to various noise interferences, and the intensity of the radiation source can vary over a wide range, the readout circuit chip must have a large dynamic range to accurately process signals of varying intensities.

[0004] However, existing multi-channel CdZnTe readout circuit chips have certain limitations in terms of dynamic range. When the input signal strength is too strong, the circuit may saturate, resulting in signal distortion; when the input signal strength is too weak, it may be overwhelmed by noise, making it impossible to accurately detect the signal.

[0005] The above content is only used to assist in understanding the technical solution of this application and does not constitute an admission that the above content is prior art. Summary of the Invention

[0006] The main purpose of this application is to provide a multi-channel CdZnTe readout circuit chip and its implementation method, aiming to provide a low-noise, large dynamic range multi-channel CdZnTe readout circuit chip that can be applied to radiation sources with a wide range of intensity variations and has strong noise immunity.

[0007] To achieve the above objectives, the present application provides a multi-channel CdZnTe readout circuit chip, comprising a data processing module, an output interface module, and multiple front-end readout channels; each front-end readout channel corresponds to a CdZnTe detector pixel, and each front-end readout channel is provided with a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module, and a baseline restoration circuit in sequence from input to output; the data processing module performs analog-to-digital conversion and analysis on the analog signals output by each front-end readout channel, and outputs the processed analysis data through the output interface module; The transimpedance amplifier is used to convert the current signal output by the CdZnTe detector into a voltage signal and amplify it to reduce input current noise; The charge-sensitive amplifier is used to further amplify and reduce noise of the voltage signal output by the transimpedance amplifier; The shaping filter is used to filter and shape the voltage signal processed by the charge sensitive amplifier; The gain adjustment module is used to monitor the signal amplitude after being processed by the shaping filter and adjust the signal gain according to the signal amplitude; The baseline restoration circuit is used to restore the baseline level of the output signal of the gain adjustment module.

[0008] To achieve the above objectives, the present application provides a method for implementing a multi-channel CdZnTe readout circuit chip, wherein the multi-channel CdZnTe readout circuit chip is the multi-channel CdZnTe readout circuit chip described above; the implementation method comprises: In each front-end readout channel, the current signal output by the CdZnTe detector is converted into a voltage signal and amplified based on a transimpedance amplifier to reduce input current noise; the voltage signal output by the transimpedance amplifier is further amplified and noise-reduced based on a charge-sensitive amplifier; the voltage signal processed by the charge-sensitive amplifier is filtered and shaped based on a shaping filter; the amplitude of the signal processed by the shaping filter is monitored based on a gain adjustment module, and the signal gain is adjusted according to the signal amplitude; and the baseline level of the output signal of the gain adjustment module is restored based on a baseline restoration circuit to form a final analog signal for output; Based on the data processing module, the analog signals output by each front-end readout channel are converted into digital signals, and the digital signals are analyzed and processed to generate analysis data; Based on the output interface module, the analysis data is output to the device connected to the multi-channel CdZnTe readout circuit chip.

[0009] The present application provides a multi-channel CdZnTe readout circuit chip and its implementation method. By providing modules such as a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module, and a baseline restoration circuit in each front-end readout channel, the chip can effectively reduce input current noise and improve the signal-to-noise ratio of the signal. The gain adjustment module can adjust the signal gain according to the signal amplitude, thereby expanding the dynamic range of the circuit. The baseline restoration circuit can restore the baseline level of the output signal to ensure signal accuracy and stability, thereby realizing a low-noise, large-dynamic-range multi-channel CdZnTe readout circuit chip. The chip is applicable to radiation sources with a wide range of intensity variations and has strong noise immunity. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a schematic structural diagram of a multi-channel CdZnTe readout circuit chip in one embodiment of the present application; Figure 2 Schematic diagram of the steps of a method for implementing a multi-channel CdZnTe readout circuit chip in one embodiment of the present application.

[0011] The realization of the objectives, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0012] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application without making any creative efforts shall fall within the scope of protection of the present application.

[0013] In addition, any descriptions of "first," "second," etc., in this application are for descriptive purposes only (e.g., to distinguish identical or similar features) and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include at least one such feature. Furthermore, the technical solutions of various embodiments may be combined with each other, but this must be based on the ability of a person of ordinary skill in the art to implement them. If the combination of technical solutions contradicts or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0014] In one embodiment, a multi-channel CdZnTe readout circuit chip is provided. Figure 1 The multi-channel CdZnTe readout circuit chip includes a data processing module, an output interface module, and multiple front-end readout channels; each front-end readout channel corresponds to a CdZnTe detector pixel, and each front-end readout channel is provided with a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module, and a baseline recovery circuit from input to output; the data processing module performs analog-to-digital conversion and analysis on the analog signals output by each front-end readout channel, and outputs the processed analysis data through the output interface module; The transimpedance amplifier is used to convert the current signal output by the CdZnTe detector into a voltage signal and amplify it to reduce input current noise; The charge-sensitive amplifier is used to further amplify and reduce noise of the voltage signal output by the transimpedance amplifier; The shaping filter is used to filter and shape the voltage signal processed by the charge sensitive amplifier; The gain adjustment module is used to monitor the signal amplitude after being processed by the shaping filter and adjust the signal gain according to the signal amplitude; The baseline restoration circuit is used to restore the baseline level of the output signal of the gain adjustment module.

[0015] In this embodiment, the readout circuit chip primarily processes signals from CdZnTe detectors. It features a multi-channel design capable of simultaneously processing signals output from multiple CdZnTe detector pixels. Its notable features include low noise and a wide dynamic range, enabling the chip to excel in processing both weak and widely varying signals. This makes it suitable for a wide range of applications requiring high-precision signal detection and processing, such as X-ray imaging and nuclear radiation detection. The chip primarily consists of a data processing module, an output interface module, and multiple front-end readout channels.

[0016] The front-end readout channel is the core component of the chip. Each channel corresponds to a CdZnTe detector pixel and is used to perform preliminary processing of the pixel's output signal. The chip contains multiple such channels, enabling parallel processing of multi-pixel signals. Each front-end readout channel is equipped with a transimpedance amplifier (TIA), a charge-sensitive amplifier (CSA), a shaping filter, a gain adjustment module, and a baseline restoration circuit, in order from input to output.

[0017] The detector outputs a current signal, and the transimpedance amplifier's primary function is to convert this current signal into a voltage signal and amplify it. Simultaneously, it reduces input current noise, which is crucial for subsequent signal processing. Low-noise processing improves signal quality, reduces interference, and enables subsequent modules to process the signal more accurately. The transimpedance amplifier converts the current signal into a voltage signal by multiplying the input current by a feedback resistor. Its internal circuit design utilizes a low-noise amplifier structure and an optimized feedback network to achieve low-noise current-to-voltage conversion.

[0018] Charge-sensitive amplifiers are used to further amplify and reduce noise in the voltage signal output by a transimpedance amplifier. During signal transmission and initial conversion, some additional noise may be introduced. Through specialized circuit design and amplification mechanisms, charge-sensitive amplifiers effectively suppress this noise while amplifying the signal, improving the signal-to-noise ratio. Charge-sensitive amplifiers utilize capacitive feedback to convert the input charge signal into an output voltage signal. Low-noise amplification is achieved through optimized amplifier parameters and structure.

[0019] Shaping filters are used to filter and shape the voltage signal after processing by a charge-sensitive amplifier. Filtering removes high-frequency noise and clutter from the signal, making it smoother. Shaping adjusts the signal to a shape suitable for subsequent processing, such as converting it into a pulse signal with a specific width and amplitude to facilitate subsequent data acquisition and analysis. Shaping filters can be a combination of active or passive filters. Parameters such as the filter's cutoff frequency and passband characteristics are designed based on the signal's characteristics and processing requirements to achieve effective filtering and shaping.

[0020] The gain adjustment module monitors the amplitude of the signal after processing by the shaping filter and adjusts the signal gain accordingly. In practical applications, the signal amplitude output by the CdZnTe detector can vary significantly. To ensure that subsequent processing modules can effectively process these signals, dynamic signal gain adjustment is required. The gain adjustment module automatically adjusts the amplification factor based on the actual signal amplitude to maintain the signal amplitude within an appropriate range. The shaping filter dynamically adjusts the signal gain by comparing the signal amplitude with a preset threshold and using a variable gain amplifier or a digitally controlled gain adjustment circuit.

[0021] The baseline restoration circuit is used to restore the baseline level of the gain adjustment module's output signal. During signal processing, the signal's baseline may drift due to various factors, affecting the accuracy of subsequent data processing. The baseline restoration circuit restores the signal's baseline level to a normal level, ensuring signal accuracy and stability. The baseline restoration circuit detects the signal's DC component or average level and uses feedback circuits or integration circuits to adjust and restore the signal's baseline.

[0022] The data processing module is responsible for further processing the analog signals output by each front-end readout channel. It first performs analog-to-digital conversion, converting the continuous analog signal into a discrete digital signal for processing and analysis by digital circuits. The converted digital signal is then analyzed and processed, performing operations such as amplitude measurement, energy calculation, and pulse counting to extract useful information. Finally, the resulting analysis data is stored or further processed for subsequent applications.

[0023] The output interface module's primary function is to output the analyzed data generated by the data processing module to external devices. It provides an interface with external devices, enabling the chip to communicate and exchange data with them. Output interfaces can take various forms, such as USB and SPI, depending on specific application requirements and system architecture.

[0024] A transimpedance amplifier reduces input current noise, while a charge-sensitive amplifier further reduces noise, enabling the chip to process weak signals and improving the sensitivity and accuracy of signal detection. A gain adjustment module dynamically adjusts gain based on signal amplitude, enabling the chip to adapt to widely varying signals and expanding its application range. Multiple front-end readout channels can simultaneously process signals from multiple CdZnTe detector pixels, enabling parallel processing of multi-pixel signals and improving data acquisition efficiency.

[0025] In one embodiment, by providing a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module, and a baseline restoration circuit in each front-end readout channel, the input current noise can be effectively reduced and the signal-to-noise ratio of the signal can be improved. The gain adjustment module can adjust the signal gain according to the signal amplitude, thereby expanding the dynamic range of the circuit. The baseline restoration circuit can restore the baseline level of the output signal to ensure the accuracy and stability of the signal, thereby realizing a low-noise, large-dynamic-range multi-channel CdZnTe readout circuit chip, which is applicable to radiation sources with a wide range of intensity variations and has strong noise immunity.

[0026] In summary, this multi-channel CdZnTe readout circuit chip achieves low-noise and wide dynamic range signal processing through reasonable module design and optimized signal processing flow, providing strong support for the high-performance operation of CdZnTe detectors in various applications.

[0027] In one embodiment, based on the above embodiment, the gain adjustment module includes an amplitude detection circuit, a gain control unit and a variable gain amplifier; The amplitude detection circuit is used to monitor the amplitude of the signal after being processed by the shaping filter and feed back the detection result to the gain control unit; The gain control unit is configured to generate a control signal according to the signal amplitude to dynamically adjust the gain of the variable gain amplifier; The variable gain amplifier is used to adjust the gain of the amplifier in real time according to the control signal to process the output signal of the shaping filter.

[0028] In this embodiment, the gain adjustment module plays a key role in the multi-channel CdZnTe readout circuit chip. It dynamically adjusts the signal gain based on the input signal amplitude, maintaining the output signal amplitude within an appropriate range. This enhances the chip's adaptability to signals of varying amplitudes and expands the chip's dynamic range. This module primarily consists of an amplitude detection circuit, a gain control unit, and a variable gain amplifier, which work together to achieve precise control of signal gain.

[0029] The core function of the amplitude detection circuit is to monitor the amplitude of the signal after processing by the shaping filter in real time. The signal output by the shaping filter has already been filtered and shaped, but the signal amplitude may vary significantly depending on the radiation intensity received by the CdZnTe detector. The amplitude detection circuit accurately measures the signal amplitude and feeds the result as an electrical signal to the gain control unit, providing a basis for subsequent gain adjustments.

[0030] Optionally, the amplitude detection circuit uses peak detection or root mean square detection to measure the signal amplitude. In the peak detection method, the circuit tracks the maximum value of the signal and maintains it for a period of time for subsequent processing. This method is suitable for amplitude detection of pulse signals and can quickly and accurately obtain the peak amplitude of the signal. Root mean square detection, on the other hand, integrates the square of the signal and then takes the square root to obtain the effective amplitude of the signal. It is suitable for amplitude measurement of continuous signals or signals with complex waveforms. The amplitude detection circuit can use a signal amplitude detection circuit composed of conventional components such as diodes, capacitors, and operational amplifiers, and utilizes the unidirectional conductivity of the diode and the charge storage characteristics of the capacitor to achieve signal amplitude detection.

[0031] The gain control unit generates a corresponding control signal based on the signal amplitude information fed back by the amplitude detection circuit, which is used to dynamically adjust the gain of the variable gain amplifier. Its function is to automatically adjust the amplifier's amplification factor based on the input signal amplitude, so that the output signal amplitude remains stable within a preset range to meet the requirements of the subsequent data processing module.

[0032] Optionally, the gain control unit internally includes a comparator and a control algorithm module. The comparator compares the signal amplitude fed back by the amplitude detection circuit with a preset reference threshold to determine whether the signal amplitude is too large or too small. Based on the comparison result, the control algorithm module calculates the gain value that needs to be adjusted according to a pre-designed algorithm and generates a corresponding control signal. This control signal can be an analog voltage signal or a digital coded signal, depending on the control method of the variable gain amplifier. For example, when the signal amplitude is higher than the reference threshold range, the control unit will reduce the gain of the variable gain amplifier; when the signal amplitude is lower than the reference threshold range, the control unit will increase the gain of the variable gain amplifier.

[0033] The variable gain amplifier (VGA) is the executive component of the gain adjustment module. It adjusts the amplifier's gain in real time based on the control signal generated by the gain control unit, amplifying the shaping filter's output signal. By dynamically adjusting the gain, the VGA can amplify input signals of varying amplitudes to the appropriate amplitude range, improving signal quality and processability.

[0034] Variable-gain amplifiers can be implemented in a variety of ways, such as field-effect transistor (FET)-based and digitally controlled. Field-effect transistor (FET)-based variable-gain amplifiers adjust the amplifier's gain by varying the FET's bias voltage. The FET's on-resistance changes with the bias voltage, affecting the amplifier's gain. Digitally controlled variable-gain amplifiers use digital signals to control switches or resistor networks within the amplifier, achieving digital gain adjustment. This approach offers high precision and stability and is easily integrated with digital circuits.

[0035] The workflow of the gain adjustment module is as follows: The signal output from the shaping filter first enters the amplitude detection circuit, which monitors the signal amplitude in real time and feeds the result back to the gain control unit. Upon receiving the amplitude detection result, the gain control unit compares it with a preset reference threshold. Based on the comparison result, a control algorithm calculates the gain value to be adjusted and generates a corresponding control signal. Upon receiving the control signal from the gain control unit, the variable gain amplifier adjusts its gain in real time to amplify the shaping filter's output signal, maintaining the output signal amplitude within an appropriate range.

[0036] In one embodiment, a multi-channel CdZnTe readout circuit chip is implemented that can adapt to radiation signals of varying intensities, improving the chip's dynamic range and signal processing capabilities. In practical applications, such as X-ray imaging and nuclear radiation detection, varying radiation sources and detection environments can lead to significant variations in the signal amplitude output by the CdZnTe detector. Through dynamic gain adjustment in the gain adjustment module, the chip can effectively process signals of varying amplitudes, ensuring accurate and reliable signal detection and thus improving the performance of the entire detection system.

[0037] In one embodiment, based on the above embodiment, the baseline restoration circuit includes a low-pass filter, a comparator and a feedback circuit; The low-pass filter is used to extract the actual baseline of the output signal of the gain adjustment module; The comparator is used to compare the actual baseline with the reference baseline to generate an error signal; The feedback circuit is used to adjust the output signal of the baseline restoration circuit according to the error signal so that the baseline of the output signal is restored to be above the reference baseline.

[0038] In this embodiment, in a multi-channel CdZnTe readout circuit chip, the baseline of the gain adjustment module's output signal can drift during signal processing due to factors such as power supply fluctuations, device noise, and external interference. The core task of the baseline restoration circuit is to correct this drift, restoring the signal's baseline to a stable and accurate reference baseline level, thereby ensuring the accuracy and reliability of subsequent data processing. This baseline restoration circuit primarily consists of a low-pass filter, a comparator, and a feedback circuit.

[0039] The main function of a low-pass filter is to extract the actual baseline from the output signal of the gain adjustment module. During signal transmission and processing, the signal typically contains high-frequency useful information and low-frequency baseline components. The low-pass filter extracts the baseline component by allowing low-frequency signals to pass while blocking high-frequency signals. This allows the actual baseline level of the signal to be determined, providing an accurate basis for subsequent comparisons and adjustments.

[0040] Optionally, the low-pass filter may be an RC low-pass filter or an active low-pass filter.

[0041] An RC low-pass filter consists of a resistor (R) and a capacitor (C). When a signal is input to the filter, the capacitor presents a low impedance to high-frequency signals, bypassing them to ground. However, the capacitor presents a high impedance to low-frequency signals, allowing them to pass smoothly through the resistor to the output. By properly selecting the values of the resistor and capacitor, the filter's cutoff frequency can be adjusted, thereby determining the range of low-frequency signals that can pass through.

[0042] Active low-pass filters incorporate an operational amplifier (OPA) into an RC low-pass filter. The operational amplifier's high gain, high input impedance, and low output impedance enhance the filter's performance. Active low-pass filters offer a steeper cutoff and better frequency selectivity, enabling more accurate extraction of the signal's baseline component.

[0043] The comparator compares the actual baseline extracted by the low-pass filter with a preset reference baseline. The reference baseline is a stable voltage value that represents the normal baseline level of the signal. By comparing the actual baseline and the reference baseline, the comparator generates an error signal. This error signal reflects the difference between the actual and reference baselines and provides a basis for the feedback circuit to adjust the output signal.

[0044] A comparator can be constructed using an operational amplifier. When the actual baseline voltage is higher than the reference baseline voltage, the comparator outputs a high signal; when the actual baseline voltage is lower than the reference baseline voltage, the comparator outputs a low signal. The amplitude and polarity of the output signal depend on the voltage difference between the actual and reference baselines.

[0045] The feedback circuit adjusts the output signal of the baseline restoration circuit based on the error signal generated by the comparator, restoring the output signal's baseline to the reference baseline level. This circuit continuously monitors the error signal and dynamically adjusts the output signal's baseline based on the magnitude and direction of the error, achieving real-time correction for baseline drift.

[0046] The feedback circuit can use voltage feedback or current feedback.

[0047] Voltage feedback modifies the baseline level by adjusting the voltage of the output signal. The feedback circuit controls a variable voltage source based on the error signal, superimposing the variable voltage source's output on the gain adjustment module's output signal, thereby adjusting the output signal's baseline. When the error signal is positive, the feedback circuit increases the output signal's voltage; when the error signal is negative, the feedback circuit decreases the output signal's voltage.

[0048] Current feedback modifies the baseline level by adjusting the current value of the output signal. The feedback circuit controls a variable current source based on the error signal, injecting the variable current source's output into the output signal circuit, thereby adjusting the output signal's baseline. Current feedback offers the advantages of fast response and excellent stability, making it suitable for applications requiring rapid baseline recovery.

[0049] The working process of the baseline restoration circuit is as follows: The output signal of the gain adjustment module first enters a low-pass filter, which extracts the actual baseline. A comparator compares the extracted actual baseline with the reference baseline and generates an error signal based on the comparison result. The feedback circuit receives the error signal and, based on its magnitude and direction, adjusts the output signal of the baseline restoration circuit, gradually restoring the output signal's baseline to the reference baseline level. During this adjustment process, the feedback circuit continuously monitors the error signal until it approaches zero, at which point the output signal's baseline stabilizes near the reference baseline.

[0050] In one embodiment, the problem of baseline drift during signal processing is effectively resolved, improving signal quality and stability. In applications of multi-channel CdZnTe readout circuit chips, such as X-ray imaging and nuclear radiation detection, accurate baseline recovery is crucial for precisely measuring signal amplitude and energy. Restoring the signal baseline to a stable reference level reduces measurement errors and improves the sensitivity and resolution of the detection system, providing more reliable data support for scientific research and practical applications.

[0051] In one embodiment, based on the above embodiment, the data processing module includes an analog-to-digital converter and a digital signal processor; The analog-to-digital converter is used to convert the analog signal output by each front-end readout channel into a digital signal; The digital signal processor is used to analyze and process the digital signal to generate analysis data.

[0052] In this embodiment, the data processing module primarily converts and analyzes the analog signals output by the front-end readout channel. The module converts the analog signals into digital signals using an analog-to-digital converter (ADC). The digital signal processor then performs in-depth analysis of the digital signals, ultimately generating analytical data for subsequent applications.

[0053] The core function of the analog-to-digital converter is to convert the continuous analog signal output by each front-end readout channel into a discrete digital signal. The analog signal output by the front-end readout channel is a voltage or current signal that varies continuously over time. Its amplitude and phase information contain information about the physical quantities detected by the detector, such as radiation energy and signal strength.

[0054] An analog-to-digital converter samples an analog signal at regular intervals, converting the continuous analog signal into discrete sampled values. The sampling frequency must satisfy the Nyquist sampling theorem—that is, it must be at least twice the analog signal's highest frequency—to accurately recover the original analog signal. The sampled analog values are then converted into a finite number of discrete quantization levels. The quantization process introduces a certain amount of quantization error, but increasing the number of quantization bits can reduce this error and improve conversion accuracy. Finally, the quantized levels are represented using binary code to form a digital signal.

[0055] Optionally, multiple analog-to-digital converters can be configured within the data processing module to operate simultaneously, converting analog signals from multiple front-end readout channels in parallel. To ensure consistency and synchronization between channels, the performance parameters of the analog-to-digital converters (such as sampling frequency, resolution, and conversion accuracy) must be strictly matched. Furthermore, appropriate channel selection and control circuitry is required to ensure that the analog signal from each channel is accurately input into the corresponding analog-to-digital converter.

[0056] Digital signal processors (DSPs) analyze and process the digital signals output by analog-to-digital converters (ADCs) to generate analytical data. DSPs can perform a variety of complex algorithms and operations, such as filtering, spectrum analysis, peak detection, and energy calculation, to extract useful information from digital signals. By analyzing and processing digital signals, the specific values and characteristics of physical quantities detected by the detector, such as radiation energy, signal strength, and event occurrence time, can be obtained, providing accurate data support for subsequent applications.

[0057] A digital signal processor (DSP) can be a high-speed microprocessor chip, which contains multiple functional modules such as an arithmetic logic unit (ALU), multiplier, registers, and memory. DSPs process input digital signals by executing pre-programmed code. This code contains various algorithms and computational instructions, such as addition, multiplication, convolution, and Fourier transform. The DSP executes these instructions sequentially according to the program sequence, processing and calculating the input digital signals and ultimately generating analysis results.

[0058] Examples of processing algorithms and application scenarios used by digital signal processors are as follows: (1) Spectrum analysis algorithm: used to analyze the spectrum characteristics of digital signals and determine the frequency components and energy distribution contained in the signal. Common spectrum analysis algorithms include fast Fourier transform (FFT).

[0059] (2) Peak detection algorithm: used to detect the peak value in the digital signal and determine the amplitude and position of the signal. Peak detection algorithm is often used in radiation detection to determine the energy and occurrence time of radiation events.

[0060] (3) Energy calculation algorithm: Calculates the radiation energy detected by the detector based on the amplitude and waveform characteristics of the digital signal. Energy calculation algorithms have important applications in fields such as radiation dose measurement and imaging.

[0061] The workflow of the data processing module is as follows: The analog signals output by each front-end readout channel are first input into an analog-to-digital converter (ADC), which samples, quantizes, and encodes the analog signals, converting them into digital signals. A digital signal processor (DSP) receives the digital signals from the ADC and analyzes and processes them according to pre-programmed code. The DSP executes various algorithms and operations to extract useful information from the digital signals. The DSP outputs the processing results as analyzed data, which can be displayed, stored, transmitted, or further processed.

[0062] In one embodiment, the data processing module converts the analog signal into a digital signal and performs in-depth analysis on the digital signal, thereby achieving accurate measurement and analysis of the physical quantity detected by the detector.

[0063] In one embodiment, based on the above embodiment, the output interface module uses a low voltage differential signal interface to convert the analysis data into a differential signal and output it to a device connected to the multi-channel CdZnTe readout circuit chip.

[0064] In this embodiment, in a multi-channel CdZnTe readout circuit chip system, the output interface module serves as a bridge between the chip and external devices, accurately and efficiently transmitting the analysis data generated by the data processing module. This utilizes a low-voltage differential signaling (LVDS) interface, leveraging the advantages of differential signaling to reliably transmit data in complex electromagnetic environments, ensuring data integrity and accuracy. This meets the requirements of multi-channel CdZnTe readout circuit chips in demanding data transmission scenarios, such as nuclear radiation detection and X-ray imaging.

[0065] The low-voltage differential signaling interface (LVDS) is based on the principle of differential signaling, transmitting data via a pair of complementary signal lines (positive and negative). The rapid change of differential signals allows for rapid data transmission, meeting the high-speed transmission requirements of multi-channel CdZnTe readout circuit chips when processing large amounts of data. For example, in applications requiring real-time processing and transmission of large amounts of radiation detection data, the LVDS interface can quickly transmit analyzed data to external devices, ensuring timely delivery.

[0066] Low-voltage differential signaling interfaces utilize low voltage swings (typically a few hundred millivolts) to transmit signals, significantly reducing power consumption compared to traditional single-ended signaling interfaces. This is crucial for multi-channel CdZnTe readout circuit chips, as multiple channels operate simultaneously within the chip, consuming a certain amount of power. Using a low-power low-voltage differential signaling interface reduces overall system power consumption, extending device battery life, while also helping to reduce chip heat generation and improve system stability and reliability.

[0067] Differential signal transmission offers strong interference immunity. Since positive and negative signals experience essentially the same interference during transmission, a differential amplifier at the receiving end subtracts the positive and negative signals, effectively canceling out common-mode interference. The multi-channel CdZnTe readout circuit chip's operating environment may be subject to various electromagnetic interferences, such as power supply noise and radio frequency interference. The low-voltage differential signaling interface's interference immunity ensures that analytical data is protected from external interference during transmission, ensuring data accuracy and reliability.

[0068] The output interface module connects to the external device connected to the multi-channel CdZnTe readout circuit chip through a physical interface (e.g., pins, connectors, etc.). The external device is typically equipped with a corresponding LVDS receiver to receive and process the differential signal. This connection allows the analysis data to be smoothly transferred from the chip to an external device, such as a computer or data acquisition card, for further processing, storage, or display.

[0069] In one embodiment, the output interface module utilizes a low-voltage differential signaling interface, enabling efficient and reliable data transmission between the chip and various external devices, ensuring the normal operation of the entire system. For example, in a nuclear radiation detection system, the low-voltage differential signaling interface can quickly and accurately transmit radiation data collected by the detector to a computer for analysis and processing, thereby enabling real-time radiation monitoring and early warning. In an X-ray imaging system, the low-voltage differential signaling interface can transmit imaging data to an image processor for reconstruction and display, providing clear and accurate image information for medical diagnosis and industrial testing.

[0070] In one embodiment, based on the above embodiment, the transimpedance amplifier is a transimpedance amplifier with a high dynamic range.

[0071] In this embodiment, dynamic range is generally defined as the ratio of the maximum signal to the minimum signal a system can process, typically expressed in decibels (dB). For a transimpedance amplifier with a high dynamic range, this means it can maintain good performance over a wide range of input current amplitudes, processing both very weak current signals and larger current signals without causing signal distortion or saturation.

[0072] In practical applications of multi-channel CdZnTe readout circuit chips, the amplitude of the current signal output by the detector can vary significantly. For example, during radiation detection, when the radiation intensity is low, the current signal output by the detector is very weak; however, when the radiation intensity is high, the output current increases significantly. If the dynamic range of the transimpedance amplifier is not large enough, it may not provide sufficient gain when processing weak signals, making the signal difficult to detect. When processing large signals, saturation may occur, causing the output signal to be distorted and unable to accurately reflect the true input current. Therefore, a transimpedance amplifier with a high dynamic range is crucial to ensure the accurate and reliable operation of the entire system.

[0073] In one embodiment, a high dynamic range transimpedance amplifier enables the chip to adapt to radiation signals of different intensities and accurately convert the current signal output by the detector into a voltage signal, providing a reliable basis for subsequent data processing and analysis.

[0074] In one embodiment, based on the above embodiment, a method for realizing a multi-channel CdZnTe readout circuit chip is proposed, wherein the multi-channel CdZnTe readout circuit chip is the multi-channel CdZnTe readout circuit chip as described in the above embodiment; Figure 2 , the implementation method includes: Step S10: In each front-end readout channel, the current signal output by the CdZnTe detector is converted into a voltage signal and amplified based on a transimpedance amplifier to reduce input current noise; based on a charge-sensitive amplifier, the voltage signal output by the transimpedance amplifier is further amplified and noise-reduced; based on a shaping filter, the voltage signal processed by the charge-sensitive amplifier is filtered and shaped; based on a gain adjustment module, the signal amplitude after processing by the shaping filter is monitored, and the signal gain is adjusted according to the signal amplitude; based on a baseline restoration circuit, the baseline level of the output signal of the gain adjustment module is restored to form a final analog signal for output; Step S20: Based on the data processing module, convert the analog signals output by each front-end readout channel into digital signals, and analyze and process the digital signals to generate analysis data; Step S30: Based on the output interface module, the analysis data is output to the device connected to the multi-channel CdZnTe readout circuit chip.

[0075] Since the implementation method of the multi-channel CdZnTe readout circuit chip adopts all the technical solutions of all the above embodiments, it has at least all the technical effects brought by the technical solutions of the above embodiments, which will not be described one by one here.

[0076] In one embodiment, based on the above embodiment, the gain adjustment module includes an amplitude detection circuit, a gain control unit, and a variable gain amplifier; the step of monitoring the amplitude of the signal after being processed by the shaping filter based on the gain adjustment module and adjusting the signal gain according to the signal amplitude includes: Based on the amplitude detection circuit, monitoring the amplitude of the signal after being processed by the shaping filter, and feeding back the detection result to the gain control unit; Based on the gain control unit, a control signal is generated according to the signal amplitude to dynamically adjust the gain of the variable gain amplifier; Based on the variable gain amplifier, the gain of the amplifier is adjusted in real time according to the control signal to process the output signal of the shaping filter.

[0077] In one embodiment, based on the above embodiment, the baseline restoration circuit includes a low-pass filter, a comparator, and a feedback circuit; the step of restoring the baseline level of the output signal of the gain adjustment module based on the baseline restoration circuit to form a final analog signal for output includes: extracting an actual baseline of an output signal of the gain adjustment module based on the low-pass filter; Based on the comparator, the actual baseline is compared with the reference baseline to generate an error signal; Based on the feedback circuit, the output signal of the baseline restoration circuit is adjusted according to the error signal, so that the baseline of the output signal is restored to be above the reference baseline.

[0078] In one embodiment, based on the above embodiment, the operation of analyzing and processing the digital signal by the data processing module includes at least one of the following: spectrum analysis, peak detection, and energy calculation.

[0079] In summary, a multi-channel CdZnTe readout circuit chip and its implementation method provided in the embodiments of the present application can effectively reduce input current noise and improve the signal-to-noise ratio of the signal by setting modules such as a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module, and a baseline restoration circuit in each front-end readout channel; the gain adjustment module can adjust the signal gain according to the signal amplitude to expand the dynamic range of the circuit; the baseline restoration circuit can restore the baseline level of the output signal to ensure the accuracy and stability of the signal, thereby realizing a low-noise, large-dynamic-range multi-channel CdZnTe readout circuit chip, which can be applied to radiation sources with a wide range of intensity variations and has strong noise immunity.

[0080] Those skilled in the art will understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media provided in this application and used in the embodiments may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct RAM bus dynamic RAM (DRDRAM), and RAM bus dynamic RAM (RDRAM).

[0081] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, apparatus, article, or method comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, apparatus, article, or method. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, apparatus, article, or method comprising the element.

[0082] The above description is only a preferred embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A multi-channel CdZnTe readout circuit chip, characterized in that: The system comprises a data processing module, an output interface module and multiple front-end readout channels; each front-end readout channel corresponds to a CdZnTe detector pixel, and each front-end readout channel is provided with a transimpedance amplifier, a charge-sensitive amplifier, a shaping filter, a gain adjustment module and a baseline recovery circuit in sequence from input to output; the data processing module performs analog-to-digital conversion and analysis on the analog signals output by each front-end readout channel, and outputs the obtained analysis data through the output interface module; The transimpedance amplifier is used to convert the current signal output by the CdZnTe detector into a voltage signal and amplify it to reduce input current noise; The charge-sensitive amplifier is used to further amplify and reduce noise of the voltage signal output by the transimpedance amplifier; The shaping filter is used to filter and shape the voltage signal processed by the charge sensitive amplifier; The gain adjustment module is used to monitor the signal amplitude after being processed by the shaping filter and adjust the signal gain according to the signal amplitude; The baseline restoration circuit is used to restore the baseline level of the output signal of the gain adjustment module.

2. The multi-channel CdZnTe readout circuit chip according to claim 1, characterized in that: The gain adjustment module includes an amplitude detection circuit, a gain control unit and a variable gain amplifier; The amplitude detection circuit is used to monitor the amplitude of the signal after being processed by the shaping filter and feed back the detection result to the gain control unit; The gain control unit is configured to generate a control signal according to the signal amplitude to dynamically adjust the gain of the variable gain amplifier; The variable gain amplifier is used to adjust the gain of the amplifier in real time according to the control signal to process the output signal of the shaping filter.

3. The multi-channel CdZnTe readout circuit chip according to claim 1, characterized in that: The baseline restoration circuit includes a low-pass filter, a comparator and a feedback circuit; The low-pass filter is used to extract the actual baseline of the output signal of the gain adjustment module; The comparator is used to compare the actual baseline with the reference baseline to generate an error signal; The feedback circuit is used to adjust the output signal of the baseline restoration circuit according to the error signal so that the baseline of the output signal is restored to be above the reference baseline.

4. The multi-channel CdZnTe readout circuit chip according to claim 1, characterized in that: The data processing module includes an analog-to-digital converter and a digital signal processor; The analog-to-digital converter is used to convert the analog signal output by each front-end readout channel into a digital signal; The digital signal processor is used to analyze and process the digital signal to generate analysis data.

5. The multi-channel CdZnTe readout circuit chip according to claim 1, characterized in that: The output interface module adopts a low voltage differential signal interface for converting the analysis data into a differential signal and outputting the differential signal to a device connected to the multi-channel CdZnTe readout circuit chip.

6. The multi-channel CdZnTe readout circuit chip according to claim 1, characterized in that: The transimpedance amplifier is a transimpedance amplifier with a high dynamic range.

7. A method for realizing a multi-channel CdZnTe readout circuit chip, characterized in that: The multi-channel CdZnTe readout circuit chip is a multi-channel CdZnTe readout circuit chip according to any one of claims 1 to 6; the implementation method comprises: In each front-end readout channel, the current signal output by the CdZnTe detector is converted into a voltage signal and amplified based on a transimpedance amplifier to reduce input current noise; the voltage signal output by the transimpedance amplifier is further amplified and noise-reduced based on a charge-sensitive amplifier; the voltage signal processed by the charge-sensitive amplifier is filtered and shaped based on a shaping filter; the amplitude of the signal processed by the shaping filter is monitored based on a gain adjustment module, and the signal gain is adjusted according to the signal amplitude; and the baseline level of the output signal of the gain adjustment module is restored based on a baseline restoration circuit to form a final analog signal for output; Based on the data processing module, the analog signals output by each front-end readout channel are converted into digital signals, and the digital signals are analyzed and processed to generate analysis data; Based on the output interface module, the analysis data is output to the device connected to the multi-channel CdZnTe readout circuit chip.

8. The method for implementing the multi-channel CdZnTe readout circuit chip according to claim 7, wherein: The gain adjustment module includes an amplitude detection circuit, a gain control unit, and a variable gain amplifier; the steps of monitoring the amplitude of the signal after being processed by the shaping filter based on the gain adjustment module and adjusting the signal gain according to the signal amplitude include: Based on the amplitude detection circuit, monitoring the amplitude of the signal after being processed by the shaping filter, and feeding back the detection result to the gain control unit; Based on the gain control unit, a control signal is generated according to the signal amplitude to dynamically adjust the gain of the variable gain amplifier; Based on the variable gain amplifier, the gain of the amplifier is adjusted in real time according to the control signal to process the output signal of the shaping filter.

9. The method for implementing the multi-channel CdZnTe readout circuit chip according to claim 7, wherein: The baseline restoration circuit includes a low-pass filter, a comparator, and a feedback circuit. The steps of restoring the baseline level of the output signal of the gain adjustment module based on the baseline restoration circuit to form a final analog signal for output include: extracting an actual baseline of an output signal of the gain adjustment module based on the low-pass filter; Based on the comparator, the actual baseline is compared with the reference baseline to generate an error signal; Based on the feedback circuit, the output signal of the baseline restoration circuit is adjusted according to the error signal, so that the baseline of the output signal is restored to be above the reference baseline.

10. The method for implementing the multi-channel CdZnTe readout circuit chip according to claim 7, wherein: The operations of analyzing and processing the digital signal by the data processing module include at least one of the following: spectrum analysis, peak detection, and energy calculation.

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