Parameter configuration method and device based on memory signal

Abstract

The invention discloses a parameter configuration method and device based on a memory signal, and relates to the technical field of automatic matching of the memory signal, and the method comprises the following steps: quickly testing and quantitatively calculating the quality of the memory signal in a BIOS memory initialization stage, automatically adjusting parameters to select optimal configuration, and writing the optimal configuration into a memory MR register. According to the method, the BIOS configuration information is acquired and recorded in the BIOS configuration information, the optimal memory signal quality is provided, stable operation of the memory and the system is guaranteed, and the problems that in the related technology, hardware design and external equipment are excessively depended, parameters of optimized signals are single, and related parameters covering more dimensions are not used for cooperative adjustment, so that the system performance is poor are solved. The technical problem that dynamic adjustment and optimization are difficult to carry out aiming at compatibility adaptation of different hardware platforms and memory modules in the prior art is solved, and the technical effects that parameters can be automatically adjusted to select optimal configuration for different application scenes so as to provide optimal memory signal quality, so that the stability of memory and system operation is effectively guaranteed are achieved.

Description

Technical Field

[0001] The present application relates to the technical field of memory signal parameter configuration, and in particular to a parameter configuration method and device based on memory signals. Background Art

[0002] Currently, DDR5 memory speeds have exceeded 6400MHz, and memory speeds continue to increase. However, in system applications, memory signal integrity issues have become the biggest challenge restricting server system stability. During high-frequency signal transmission, the impact of even slight noise interference or voltage fluctuations on the signal gradually increases with increasing frequency, resulting in insufficient signal margin, closed signal eye diagrams, and increased bit error rates. Ultimately, this can cause memory ECC (Error Correcting Code) / UCE (Uncorrectable Error) errors, rendering the system unstable.

[0003] At present, solutions to memory signal integrity generally adopt two methods: hardware and software optimization, as described below:

[0004] 1. Hardware optimization

[0005] Hardware optimization primarily targets the design of DRAM (Dynamic Random Access Memory), printed circuit boards (PCBs), and motherboard PCBs. Signal performance can be optimized through continuous simulation, but this approach is costly and, once the design is fixed, it cannot be easily changed, making it unable to dynamically adapt to changes in various application environments.

[0006] 2. Software optimization

[0007] Software optimization involves pre-verifying the compatibility of memory on different motherboard platforms to find the signal interaction parameters between the memory and the CPU (Central Processing Unit), such as the optimal value of the RTT (Resistive Termination Technology) terminal resistance, and solidifying it in the BIOS code. However, this fixed parameter is effective for all memory and cannot achieve the best performance for different memory particles and PCB designs.

[0008] Due to the critical impact of memory on system stability, the routing design of memory modules and motherboards, as well as the optimization of BIOS code, cannot be easily adapted dynamically. Therefore, faced with the complex combination of different motherboard platforms (such as Intel / AMD) and designs from different memory manufacturers, a technical solution is urgently needed that can dynamically adapt to the application environment to automatically tune memory signal integrity for optimal performance.

[0009] Currently, existing technologies can be used to optimize memory chip signals. This involves obtaining the memory chip's topology to identify the partition chips and their corresponding partition chip select signals. Based on the partition chip select signals and preset selection configuration rules, a list of termination resistor combination values corresponding to each partition chip is generated. Unused partition chips are selected and, based on the list of termination resistor combination values, the termination resistors within the memory chip are configured to optimize the memory chip signal. This approach increases the number of configurable ODT (On-Die Termination) parameter values, improving ODT step accuracy. Signal quality is further optimized by adding independent configuration of read and write parameters.

[0010] However, existing technologies are overly dependent on hardware design and external devices, and the parameters for optimizing signals are single, without covering related parameters in more dimensions for coordinated adjustment. It is also difficult to dynamically adjust and optimize the compatibility and adaptation of different hardware platforms and memory modules, which urgently needs to be solved. Summary of the Invention

[0011] The present application provides a parameter configuration method and device based on memory signals to at least solve the technical problems in related technologies that are overly dependent on hardware design and external devices, the parameters of the optimized signal are single, there is no coordinated adjustment of related parameters covering more dimensions, and it is difficult to dynamically adjust and optimize the compatibility and adaptation of different hardware platforms and memory modules.

[0012] The present application provides a parameter configuration method based on a memory signal, comprising the following steps: loading initial configuration parameters of a preset mode register, and performing corresponding fast signal quality test operations according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register; determining an application scenario corresponding to the memory signal of the mode register, selecting a corresponding weight coefficient according to the application scenario, and calculating a performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data; generating a corresponding plurality of candidate parameter combinations based on the weight coefficient and the performance score, and performing parallel testing on the plurality of candidate parameter combinations to obtain a combined performance score for each candidate parameter combination, and determining a final parameter configuration of the memory signal based on the combined performance score to complete the configuration of the memory signal according to the final parameter configuration.

[0013] The present application also provides a parameter configuration device based on a memory signal, comprising: a quality testing module, configured to load the initial configuration parameters of a preset mode register, and perform corresponding fast signal quality testing operations according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register; a quantization calculation module, configured to determine the application scenario corresponding to the memory signal of the mode register, select a corresponding weight coefficient according to the application scenario, and calculate a performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data; an automatic matching module, configured to generate a corresponding plurality of candidate parameter combinations based on the weight coefficient and the performance score, and perform parallel testing on the plurality of candidate parameter combinations to obtain a combined performance score of each candidate parameter combination, and determine a final parameter configuration of the memory signal according to the combined performance score to complete the configuration of the memory signal according to the final parameter configuration.

[0014] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned parameter configuration methods based on memory signals when executing the computer program.

[0015] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned parameter configuration methods based on memory signals are implemented.

[0016] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned parameter configuration methods based on memory signals when executed by a processor.

[0017] Through the present application, the preset initial configuration parameters of the mode register can be loaded, and corresponding fast signal quality test operations can be performed based on the initial configuration parameters to generate initial memory signal quality performance data of the mode register; the application scenario corresponding to the memory signal of the mode register can be determined, and the corresponding weight coefficient can be selected based on the application scenario. The performance score corresponding to the memory signal quality can be calculated based on the weight coefficient and the initial memory signal quality performance data; based on the weight coefficient and the performance score, multiple corresponding candidate parameter combinations can be generated, and the multiple candidate parameter combinations can be tested in parallel to obtain a combined performance score for each candidate parameter combination. The final parameter configuration of the memory signal can be determined based on the combined performance score to complete the configuration of the memory signal according to the final parameter configuration. Therefore, the technical problems in the related art that are overly dependent on hardware design and external devices, the single parameter of the optimized signal, the lack of coordinated adjustment of related parameters covering more dimensions, and the difficulty in dynamic adjustment and optimization for compatibility and adaptation of different hardware platforms and memory modules can be solved. The calculation formula for quantitatively calculating the quality of the memory signal for different application scenarios can be achieved, and the parameters can be automatically adjusted to select the optimal configuration to provide the optimal memory signal quality, thereby effectively ensuring the stability of memory and system operation can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 A flowchart of a parameter configuration method based on a memory signal according to an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the execution logic of a parameter configuration method based on memory signals provided in one embodiment of the present application;

[0021] Figure 3 This is an example diagram of a parameter configuration device based on memory signals according to an embodiment of the present application.

[0022] Among them, 10-parameter configuration device based on memory signal, 100-quality testing module, 200-quantization calculation module, 300-automatic matching module. DETAILED DESCRIPTION

[0023] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0024] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0025] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0026] In conjunction with the specific application environment architecture or specific hardware architecture on which the execution of the memory signal-based parameter configuration method depends, the specific application environment architecture or specific hardware architecture is described herein.

[0027] An embodiment of the present application provides a parameter configuration method based on a memory signal.

[0028] like Figure 1 FIG. 1 is a flow chart of a parameter configuration method based on a memory signal according to an embodiment of the present application, wherein the parameter configuration method based on a memory signal includes the following steps:

[0029] In step S101 , the preset initial configuration parameters of the mode register are loaded, and a corresponding fast signal quality test operation is performed according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register.

[0030] The present application first loads the default mode register (MR) configuration parameters, such as RTT = 240Ω, AC Gain = 0dB or DC Gain = 0dB, when starting the BIOS (Basic Input Output System), and performs a fast signal quality test operation, namely a memory initialization Memory Training operation, to obtain initial memory signal quality performance data.

[0031] Those skilled in the art should understand that in high-speed memory systems such as DDR4 / DDR5, loading the default configuration and performing memory initialization operations when the BIOS starts are key steps to ensure system stability. The memory initialization MemoryTraining operation can adjust parameters such as clock synchronization, data eye diagram optimization, and impedance matching to ensure that the signal is not distorted during transmission, and can automatically adapt to memory particles from different manufacturers to solve signal delay problems caused by PCB wiring differences.

[0032] Specifically, the process of performing the memory initialization Memory Training operation in the embodiment of the present application is as follows:

[0033] 1. Load the default configuration:

[0034] The BIOS reads the basic parameters (such as frequency, timing, voltage, etc.) from the SPD (Serial Presence Detect) as the starting point for training;

[0035] 2. Phase calibration:

[0036] Through iterative testing, the clock phases of the memory controller and DRAM, such as the data strobe signal and the data signal, are aligned;

[0037] 3. Voltage and impedance adjustment:

[0038] Dynamically optimize memory voltage and ODT value to reduce reflection noise;

[0039] 4. Stability test:

[0040] Write / read test patterns (such as 0xAA, 0x55, etc.) to verify signal quality (BER < 10-12).

[0041] Therefore, the embodiment of the present application loads the default MR configuration parameters and performs memory initialization MemoryTraining, thereby providing reliable data guidance and basis for subsequent quantitative calculation of memory signal quality.

[0042] In step S102, the application scenario corresponding to the memory signal of the mode register is determined, a corresponding weight coefficient is selected according to the application scenario, and a performance score corresponding to the memory signal quality is calculated based on the weight coefficient and initial memory signal quality performance data.

[0043] Furthermore, the embodiments of the present application also need to determine the application scenarios corresponding to the mode register memory signals (i.e., application scenarios, such as AI (Artificial Intelligence) training, industrial control, etc.), and select corresponding weight coefficients according to the application scenarios, such as bit error rate weight coefficients, signal noise tolerance weight coefficients, and voltage margin weight coefficients, etc., and combine the corresponding weight coefficients to construct a memory signal quality calculation expression, thereby using the memory signal quality calculation expression and the initial memory signal quality performance data to calculate the performance score corresponding to the memory signal quality.

[0044] Therefore, the embodiments of the present application select corresponding weight coefficients according to the application scenario to construct a memory signal quality calculation expression, thereby achieving quantitative calculation of the quality of the memory signal.

[0045] Optionally, in one embodiment of the present application, an application scenario corresponding to the memory signal of the mode register is determined, and a corresponding weight coefficient is selected according to the application scenario, and a performance score corresponding to the memory signal quality is calculated based on the weight coefficient and the initial memory signal quality performance data, including: determining the bit error rate, signal noise tolerance and voltage margin corresponding to the memory signal according to the initial memory signal quality performance data, and identifying the scenario type corresponding to the application scenario according to the memory signal; when the scenario type is a reliability requirement application scenario type, selecting the bit error rate weight coefficient, when the scenario type is an electromagnetic environment application scenario type, selecting the signal noise tolerance weight coefficient, and when the scenario type is a stability requirement application scenario type, selecting the voltage margin weight coefficient; constructing a memory signal quality calculation expression through the bit error rate, signal noise tolerance, voltage margin, bit error rate weight coefficient, signal noise tolerance weight coefficient and voltage margin weight coefficient; based on the memory signal quality calculation expression, performing memory signal quality quantitative calculation on the initial memory signal quality performance data to obtain a performance score corresponding to the memory signal quality.

[0046] It should be noted that, in the actual implementation process, the embodiments of the present application can obtain relevant key indicator parameters corresponding to the memory signal based on the initial memory signal quality performance data, such as bit error rate, signal noise margin and voltage margin.

[0047] The bit error rate (BER) is an important indicator for measuring the performance of digital communication systems. It represents the ratio of the number of error bits to the total number of transmitted bits during the transmission process. Its calculation formula is:

[0048] BER = number of error bits / total number of transmitted bits

[0049] Signal-to-Noise Margin (SNM) is a key indicator for measuring the noise immunity of digital circuits or communication systems. It represents the minimum signal-to-noise ratio margin required for the system to operate reliably in a noisy environment. Its mathematical expression is:

[0050] SNM=SNRrea-SNRmin

[0051] Where SNRrea represents the actual signal-to-noise ratio; SNRmin represents the minimum signal-to-noise ratio required by the system.

[0052] Voltage margin (ΔV) is a key parameter used to measure voltage stability and reliability in electronic systems. It usually refers to the difference between the actual operating voltage and the critical voltage (such as the minimum / maximum allowable voltage).

[0053] It can be understood that in the embodiments of the present application, the lower the BER, the fewer data transmission errors; the larger the SNM, the smaller the impact of noise on the signal; the larger the ΔV, the higher the margin, and the less susceptible the signal is to voltage fluctuations.

[0054] Afterwards, the embodiment of the present application may select the weight coefficient of the memory signal quality calculation expression according to the application scenario.

[0055] For example, as shown in Table 1, when the application scenario is a scenario with high reliability requirements such as a data center or AI training, the embodiment of the present application can select the bit error rate weight coefficient α and determine its corresponding adjustment direction. That is, in this application scenario, the embodiment of the present application pays more attention to reducing the bit error rate to improve memory and system reliability;

[0056] When the application scenario is a scenario with a complex electromagnetic environment such as industrial control, the embodiment of the present application can select the signal noise tolerance weight coefficient β and determine its corresponding adjustment direction. That is, in this application scenario, the embodiment of the present application pays more attention to its anti-noise ability;

[0057] When the application scenario is an overclocking scenario or other scenario with extreme stability requirements, the embodiment of the present application can select the voltage margin weight coefficient γ and determine its corresponding adjustment direction. That is, in this application scenario, the embodiment of the present application pays more attention to the voltage margin.

[0058] Table 1

[0059]

[0060] Therefore, the embodiments of the present application can construct a memory signal quality calculation expression through bit error rate, signal noise margin, voltage margin, bit error rate weight coefficient, signal noise margin weight coefficient and voltage margin weight coefficient to perform memory signal quality quantitative calculation on the initial memory signal quality performance data, thereby quantitatively calculating the quality of the memory signal and providing solid data support for determining the optimal memory signal quality.

[0061] Optionally, in one embodiment of the present application, a memory signal quality calculation expression is constructed by using the bit error rate, signal noise margin, voltage margin, bit error rate weight coefficient, signal noise margin weight coefficient and voltage margin weight coefficient, including: calculating the inverse of the bit error rate, and calculating the bit error rate quality item based on the inverse and the bit error rate weight coefficient; calculating the signal noise margin quality item based on the signal noise margin weight coefficient and the signal noise margin; calculating the voltage margin quality item based on the voltage margin and the voltage margin weight coefficient; calculating the sum of the bit error rate quality item, the signal noise margin quality item and the voltage margin quality item to construct a memory signal quality calculation expression.

[0062] As a feasible method, after selecting the corresponding weight coefficient according to the application scenario, the embodiment of the present application can construct a memory signal quality calculation expression based on the weight coefficient and combined with the corresponding key indicator parameters such as bit error rate, signal noise tolerance and voltage margin.

[0063] Specifically, the embodiment of the present application can first calculate the inverse of the bit error rate 1 / BER, and calculate the bit error rate quality term α*(1 / BER) based on the inverse and the bit error rate weight coefficient. Secondly, the embodiment of the present application can use the signal noise margin weight coefficient and the signal noise margin to calculate the signal noise margin quality term β*SNM. Then, the embodiment of the present application can calculate the voltage margin quality term γ*(ΔV) based on the voltage margin and the voltage margin weight coefficient. Finally, the embodiment of the present application calculates the sum of the bit error rate quality term, the signal noise margin quality term, and the voltage margin quality term to construct a memory signal quality calculation expression, as shown in the following formula:

[0064] Q=α*(1 / BER)+β*SNM+γ*(ΔV)

[0065] Where Q represents the memory signal quality; BER represents the bit error rate; SNM represents the signal-to-noise margin; ΔV represents the voltage margin; β represents the signal-to-noise margin weight coefficient; γ represents the voltage margin weight coefficient; and α represents the bit error rate weight coefficient.

[0066] Therefore, the embodiments of the present application construct a compatible adaptation for different hardware platforms and memory modules, as well as a calculation expression for quantitatively calculating the quality of memory signals for different application scenarios, thereby effectively ensuring the smooth implementation of automatic matching of memory signals.

[0067] In step S103, based on the weight coefficient and the performance score, a corresponding plurality of candidate parameter combinations are generated, and the plurality of candidate parameter combinations are tested in parallel to obtain a combined performance score of each candidate parameter combination, and a final parameter configuration of the memory signal is determined according to the combined performance score to complete the configuration of the memory signal according to the final parameter configuration.

[0068] Afterwards, the embodiments of the present application can generate multiple candidate parameter combinations corresponding to the default MR configuration parameters based on the calculation results of the memory signal quality (i.e., the performance score) and combined with the corresponding weight coefficients, and test the multiple candidate parameter combinations in parallel to obtain the combined performance score of each candidate parameter combination, and then determine the final parameter configuration corresponding to the memory signal.

[0069] Therefore, the embodiments of the present application ensure stable operation of the memory and the system by quickly testing and quantifying the quality of the memory signal during the BIOS memory initialization phase, and automatically adjusting the parameters to select the optimal configuration (i.e., the final parameter configuration).

[0070] Optionally, in one embodiment of the present application, based on the weight coefficient and the performance score, a corresponding plurality of candidate parameter combinations are generated, and the plurality of candidate parameter combinations are tested in parallel to obtain a combined performance score of each candidate parameter combination, including: analyzing the weaknesses of the initial memory signal quality performance data based on the performance score corresponding to the memory signal quality; determining the adjustment targets and adjustment ranges corresponding to the initial configuration parameters according to the weaknesses and the weight coefficients, and generating corresponding plurality of candidate parameter combinations through the adjustment targets; and testing the plurality of candidate parameter combinations in parallel based on a pre-built multi-parameter collaborative adjustment linkage model and adjustment range to obtain a combined performance score of each candidate parameter combination.

[0071] It should be noted that after obtaining the calculation results of the memory signal quality (performance score), the embodiments of the present application can analyze the weaknesses of the initial signal data based on the performance score corresponding to the memory signal quality, and combine the weaknesses and weight coefficients to determine the adjustment targets and adjustment ranges corresponding to the default MR configuration parameters to generate corresponding multiple candidate parameter combinations.

[0072] Subsequently, the embodiment of the present application can construct a multi-parameter collaborative adjustment linkage model based on the adjustment target, so as to test multiple candidate parameter combinations in parallel through the multi-parameter collaborative adjustment linkage model and the adjustment range, adjust each candidate parameter combination to obtain the combination performance score of each candidate parameter combination, and thus obtain the optimal configuration corresponding to the memory signal.

[0073] In actual implementation, when diagnosing signal quality weaknesses, the embodiments of the present application may first perform a key indicator analysis operation as follows:

[0074] 1. Abnormal bit error rate:

[0075] (1) When BER>10-10, it indicates that there is a signal integrity risk;

[0076] (2) Typical causes: timing deviation (tCL / tRCD mismatch) and impedance mismatch (ODT setting error).

[0077] 2. Insufficient signal noise tolerance:

[0078] (1) Eye opening < 0.4UI or noise margin < 50mV;

[0079] (2) High-frequency signals (>4000MHz) are more susceptible to power supply noise (PSRR<-40dB).

[0080] 3. Voltage margin (ΔV) warning:

[0081] (1) The operating voltage is close to the critical value (such as VDDQ ± 3%);

[0082] (2) For every 10°C increase in temperature, an additional 0.02V margin must be retained.

[0083] Secondly, the embodiments of the present application can determine the root cause location information based on the key indicator analysis results. For example, when a sudden high BER fault occurs, the embodiments of the present application can use the error distribution pattern analysis method to detect and analyze the main influencing factors such as clock jitter or crosstalk; when an eye diagram vertical collapse fault occurs, the embodiments of the present application can use the amplitude histogram statistics method to detect and analyze the main influencing factors such as VREF calibration deviation; when a temperature-sensitive error fault occurs, the embodiments of the present application can detect and analyze the main influencing factors such as the voltage regulator response speed according to the high and low temperature cycle test method, thereby obtaining the corresponding weak points.

[0084] In addition, in the process of generating corresponding multiple candidate parameter combinations, the embodiments of the present application can first construct a parameter space based on the physical model, which parameter space includes timing parameters (such as core timing and auxiliary timing), voltage parameters and impedance parameters, etc.; secondly, the embodiments of the present application can also combine intelligent optimization algorithms such as genetic algorithms or gradient descent methods to generate multiple candidate parameter combinations.

[0085] Specifically, the embodiment of the present application can adjust each candidate parameter combination according to the step size within the adjustment range.

[0086] For example, as shown in Table 2, for the RTT_WR parameter, the embodiment of the present application can adjust the RTT_WR parameter within the adjustment range of the minimum resistance value to the maximum resistance value during the write operation timing phase to achieve the adjustment goal of suppressing write data reflection noise;

[0087] Regarding the RTT_NOM_RD parameter, the embodiment of the present application can adjust the RTT_NOM_RD parameter within the adjustment range of the minimum resistance value to the maximum resistance value during the second pulse period of the read command to achieve the adjustment goal of balanced read signal impedance matching;

[0088] For the RTT_NOM_WR parameter, the embodiment of the present application can adjust the RTT_NOM_WR parameter within the adjustment range of the minimum resistance value to the maximum resistance value during the write command activation window to achieve the adjustment goal of reducing the synchronous switching noise of the write operation;

[0089] Regarding the RTT_PARK parameter, the embodiment of the present application can adjust the RTT_PARK parameter within the adjustment range of the minimum resistance value to the maximum resistance value during the read and write command inactive period to achieve the adjustment goal of maintaining the static stability of the bus;

[0090] Regarding the DQS_RTT_PARK parameter, the embodiment of the present application can adjust the DQS_RTT_PARK parameter within the adjustment range of the minimum resistance value to the maximum resistance value during the DQS signal idle period to achieve the adjustment goal of eliminating the residual DQS crosstalk;

[0091] Regarding the AC_Gain parameter, the embodiment of the present application can adjust the AC_Gain parameter within the adjustment range of minimum dB to maximum dB during the data burst transmission phase to achieve the adjustment goal of enhancing the high-frequency signal amplitude;

[0092] Regarding the DC_Gain parameter, the embodiment of the present application can adjust the DC_Gain parameter within the adjustment range of minimum dB to maximum dB during the steady-state holding phase to achieve the adjustment goal of optimizing the DC bias voltage.

[0093] Table 2

[0094]

[0095] As can be seen from Table 2, the embodiment of the present application can adjust the adjustable parameters according to the operation stage, adjustment target, step size, adjustable range, etc. corresponding to each candidate parameter combination (i.e., adjustable parameters), among which the step size can be dynamically adjusted according to the test efficiency and the tendency of the test results.

[0096] Furthermore, the embodiment of the present application can perform signal quality tests on each candidate parameter combination in parallel to obtain corresponding combination performance scores, thereby selecting the optimal parameter configuration (ie, the final parameter configuration).

[0097] During the specific implementation process, the embodiments of the present application can collect signal quality data of different hardware platforms (Intel / AMD) with different memory products in various application environments, so as to predict the optimal parameters and the optimal parameter combination through algorithms and reduce the number of test iterations.

[0098] It can be understood that the embodiments of the present application can automatically adjust the parameters of RTT (RTT_WR, RTT_RD, etc.) and AC / DC gain in the BIOS memory initialization phase according to the signal quality of the actual application environment (such as DQ, RxV, TxV signal margin) without relying on the operating system or external devices, and establish a multi-parameter collaborative adjustment linkage model to suppress the coupling effect of reflected noise and signal attenuation, so that when adapting to the compatibility of different hardware platforms and memory modules, the optimal parameter settings (i.e., the final parameter configuration) can be matched, which solves the signal quality degradation of high-frequency memory caused by fixed parameters in complex environments, provides the optimal memory signal quality, and ensures the operating stability of the memory and system.

[0099] Optionally, in one embodiment of the present application, after determining the final parameter configuration of the memory signal based on the combination performance score, it also includes: writing the final parameter configuration into a mode register, and recording it in the configuration information of the preset basic input and output system, and judging whether the application scenario has changed; if the application scenario has changed, adjusting the parameter configuration corresponding to the memory signal according to the changed application scenario to determine the new final parameter configuration corresponding to the memory signal.

[0100] It should be noted that after determining the final parameter configuration corresponding to the memory signal, the embodiment of the present application can write the final parameter configuration into the memory MR register and record it in the BIOS configuration information to achieve the optimal matching of the memory signal in a specific application scenario under the combination of the specific platform CPU and memory module.

[0101] Furthermore, when the application scenario changes, such as a sudden drop in temperature, a sudden rise in temperature, or increased noise interference, the embodiment of the present application can manually trigger the matching function.

[0102] Therefore, the embodiment of the present application provides the best memory signal quality and ensures the stable operation of the memory and the system by writing the optimal configuration into the memory MR register and recording it in the BIOS configuration information.

[0103] The following further illustrates the execution logic of the memory signal-based parameter configuration method of the present application in conjunction with the accompanying drawings.

[0104] Figure 2 This is a schematic diagram of the execution logic of the parameter configuration method based on memory signals of this application. Figure 2As shown, the execution steps of the parameter configuration method based on memory signals of this application are as follows:

[0105] S201: Start the basic input and output system;

[0106] S202: Loading initial configuration parameters of the mode register;

[0107] S203: performing a quick signal quality test to generate initial memory signal quality performance data;

[0108] S204: Select a weight coefficient according to the application scenario, and construct a memory signal quality calculation expression based on the weight coefficient;

[0109] S205: Calculating a memory signal quality performance score based on the memory signal quality calculation expression and in combination with the initial memory signal quality performance data;

[0110] S206: Generate corresponding multiple candidate parameter combinations based on the weight coefficients and the performance scores;

[0111] S207: Testing the performance scores of multiple candidate parameter combinations in parallel;

[0112] S208: Selecting the optimal parameter configuration corresponding to the memory signal according to each combination score;

[0113] S209: Write the optimal parameter configuration into the mode register and update the basic input and output system configuration record.

[0114] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0115] An embodiment of the present application also provides a parameter configuration device based on a memory signal.

[0116] like Figure 3 As shown, the parameter configuration device 10 based on memory signals includes: a quality testing module 100 , a quantization calculation module 200 and an automatic matching module 300 .

[0117] The quality test module 100 is used to load the preset initial configuration parameters of the mode register and perform corresponding fast signal quality test operations according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register.

[0118] The quantization calculation module 200 is used to determine the application scenario corresponding to the memory signal of the mode register, select the corresponding weight coefficient according to the application scenario, and calculate the performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data.

[0119] The automatic matching module 300 is used to generate a corresponding plurality of candidate parameter combinations based on the weight coefficients and the performance scores, and to perform parallel testing on the plurality of candidate parameter combinations to obtain a combined performance score for each candidate parameter combination, and to determine a final parameter configuration of the memory signal based on the combined performance score, so as to complete the configuration of the memory signal according to the final parameter configuration.

[0120] Optionally, in one embodiment of the present application, the parameter configuration device based on the memory signal of the embodiment of the present application further includes: after determining the final parameter configuration corresponding to the memory signal based on the combined performance score, the final parameter configuration is written into the mode register, and recorded in the configuration information of the preset basic input and output system, and it is determined whether the application scenario has changed, wherein, if the application scenario has changed, the target configuration parameters corresponding to the memory signal are manually adjusted.

[0121] Optionally, in one embodiment of the present application, the memory signal-based parameter configuration device 10 of the embodiment of the present application further includes: a recording module for writing the final parameter configuration into the mode register after determining the final parameter configuration of the memory signal according to the combined performance score, and recording it in the configuration information of the preset basic input and output system, and determining whether the application scenario has changed; an adjustment module for adjusting the parameter configuration corresponding to the memory signal according to the changed application scenario if the application scenario has changed, so as to determine the new final parameter configuration corresponding to the memory signal.

[0122] Optionally, in one embodiment of the present application, the quantization calculation combination module 100 includes: a determination unit, a weight analysis unit, a construction unit and an acquisition unit.

[0123] The determination unit is configured to determine the bit error rate, signal noise margin, and voltage margin corresponding to the memory signal according to the initial memory signal quality performance data, and identify the scenario type corresponding to the application scenario according to the memory signal.

[0124] The weight analysis unit is used to select the bit error rate weight coefficient when the scenario type is a reliability requirement application scenario type, select the signal noise tolerance weight coefficient when the scenario type is an electromagnetic environment application scenario type, and select the voltage margin weight coefficient when the scenario type is a stability requirement application scenario type.

[0125] The construction unit is used to construct a memory signal quality calculation expression through a bit error rate, a signal-to-noise margin, a voltage margin, a bit error rate weight coefficient, a signal-to-noise margin weight coefficient, and a voltage margin weight coefficient.

[0126] The acquisition unit is configured to perform a memory signal quality quantitative calculation on the initial memory signal quality performance data based on a memory signal quality calculation expression to obtain a performance score corresponding to the memory signal quality.

[0127] Optionally, in one embodiment of the present application, the automatic matching module 200 includes: a weakness analysis unit, a modeling unit, and a parallel testing unit.

[0128] The weak point analysis unit is configured to analyze the weak points of the initial memory signal quality performance data based on the performance score corresponding to the memory signal quality.

[0129] The modeling unit is used to determine the adjustment target and adjustment range corresponding to the initial configuration parameters according to the weak points and weight coefficients, and generate corresponding multiple candidate parameter combinations through the adjustment targets.

[0130] The parallel testing unit is used to test multiple candidate parameter combinations in parallel based on a pre-built multi-parameter collaborative adjustment linkage model and adjustment range to obtain a combination performance score for each candidate parameter combination.

[0131] Optionally, in one embodiment of the present application, a memory signal quality calculation expression is constructed by using the bit error rate, signal noise margin, voltage margin, bit error rate weight coefficient, signal noise margin weight coefficient and voltage margin weight coefficient, including: calculating the inverse of the bit error rate, and calculating the bit error rate quality item based on the inverse and the bit error rate weight coefficient; calculating the signal noise margin quality item based on the signal noise margin weight coefficient and the signal noise margin; calculating the voltage margin quality item based on the voltage margin and the voltage margin weight coefficient; calculating the sum of the bit error rate quality item, the signal noise margin quality item and the voltage margin quality item to construct a memory signal quality calculation expression.

[0132] For the description of the features in the embodiment corresponding to the parameter configuration device based on memory signals, reference can be made to the relevant description of the embodiment corresponding to the parameter configuration method based on memory signals, which will not be repeated here.

[0133] An embodiment of the present application further provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned memory signal-based parameter configuration method embodiments.

[0134] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned memory signal-based parameter configuration method embodiments when running.

[0135] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0136] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the computer program implements the steps of any of the above-mentioned memory signal-based parameter configuration method embodiments.

[0137] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, implementing the steps in any of the above-mentioned memory signal-based parameter configuration method embodiments.

[0138] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0139] The above is a detailed introduction to the parameter configuration method, device, equipment and medium based on memory signals provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A parameter configuration method based on memory signal, characterized in that: The following steps are involved: Loading preset initial configuration parameters of the mode register, and performing corresponding fast signal quality test operations according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register; determining an application scenario corresponding to the memory signal of the mode register, selecting a corresponding weight coefficient according to the application scenario, and calculating a performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data; Based on the weight coefficient and the performance score, a corresponding plurality of candidate parameter combinations are generated, and the plurality of candidate parameter combinations are tested in parallel to obtain a combined performance score of each candidate parameter combination, and a final parameter configuration of the memory signal is determined according to the combined performance score to complete the configuration of the memory signal according to the final parameter configuration.

2. The method according to claim 1, characterized in that After determining the final parameter configuration of the memory signal according to the group performance score, the method further includes: Writing the final parameter configuration into the mode register and recording it in the preset basic input and output system configuration information, and determining whether the application scenario has changed; If the application scenario changes, the parameter configuration corresponding to the memory signal is adjusted according to the changed application scenario to determine a new final parameter configuration corresponding to the memory signal.

3. The method according to claim 1, characterized in that Determining an application scenario corresponding to the memory signal of the mode register, selecting a corresponding weight coefficient according to the application scenario, and calculating a performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data, includes: determining a bit error rate, a signal noise margin, and a voltage margin corresponding to the memory signal according to the initial memory signal quality performance data, and identifying a scenario type corresponding to the application scenario according to the memory signal; When the scenario type is a reliability requirement application scenario type, the bit error rate weight coefficient is selected; when the scenario type is an electromagnetic environment application scenario type, the signal noise margin weight coefficient is selected; when the scenario type is a stability requirement application scenario type, the voltage margin weight coefficient is selected; Constructing a memory signal quality calculation expression by using the bit error rate, the signal noise margin, the voltage margin, the bit error rate weight coefficient, the signal noise margin weight coefficient, and the voltage margin weight coefficient; Based on the memory signal quality calculation expression, a memory signal quality quantitative calculation is performed on the initial memory signal quality performance data to obtain a performance score corresponding to the memory signal quality.

4. The method according to claim 3, characterized in that The generating a corresponding plurality of candidate parameter combinations based on the weight coefficients and the performance scores, and testing the plurality of candidate parameter combinations in parallel to obtain a combined performance score for each candidate parameter combination, includes: analyzing weaknesses of the initial memory signal quality performance data based on the performance score corresponding to the memory signal quality; determining an adjustment target and an adjustment range corresponding to the initial configuration parameter according to the weak point and the weight coefficient, and generating a corresponding plurality of candidate parameter combinations based on the adjustment target; Based on the pre-built multi-parameter collaborative adjustment linkage model and the adjustment range, the multiple candidate parameter combinations are tested in parallel to obtain a combination performance score of each candidate parameter combination.

5. The method according to claim 3, characterized in that The constructing of a memory signal quality calculation expression by using the bit error rate, the signal noise margin, the voltage margin, the bit error rate weight coefficient, the signal noise margin weight coefficient, and the voltage margin weight coefficient includes: Calculating the reciprocal of the bit error rate, and calculating a bit error rate quality item based on the reciprocal and the bit error rate weight coefficient; Calculating a signal noise tolerance quality item according to the signal noise tolerance weight coefficient and the signal noise tolerance; Calculating a voltage margin quality item according to the voltage margin and the voltage margin weight coefficient; The sum of the bit error rate quality item, the signal noise margin quality item, and the voltage margin quality item is calculated to construct the memory signal quality calculation expression.

6. A parameter configuration device based on memory signals, characterized in that: include: a quality testing module, configured to load preset initial configuration parameters of the mode register and perform corresponding fast signal quality testing operations according to the initial configuration parameters to generate initial memory signal quality performance data of the mode register; a quantization calculation module, configured to determine an application scenario corresponding to the memory signal of the mode register, select a corresponding weight coefficient according to the application scenario, and calculate a performance score corresponding to the memory signal quality based on the weight coefficient and the initial memory signal quality performance data; An automatic matching module is used to generate a corresponding plurality of candidate parameter combinations based on the weight coefficients and the performance scores, and to perform parallel testing on the plurality of candidate parameter combinations to obtain a combined performance score for each candidate parameter combination, and to determine a final parameter configuration of the memory signal based on the combined performance score, so as to complete the configuration of the memory signal according to the final parameter configuration.

7. The device according to claim 6, characterized in that The quantitative calculation module includes: a determination unit, configured to determine a bit error rate, a signal noise margin, and a voltage margin corresponding to the memory signal according to the initial memory signal quality performance data, and identify a scenario type corresponding to the application scenario according to the memory signal; a weight analysis unit, configured to select a bit error rate weight coefficient when the scenario type is a reliability requirement application scenario type, select a signal noise margin weight coefficient when the scenario type is an electromagnetic environment application scenario type, and select a voltage margin weight coefficient when the scenario type is a stability requirement application scenario type; a constructing unit, configured to construct a memory signal quality calculation expression by using the bit error rate, the signal noise margin, the voltage margin, the bit error rate weight coefficient, the signal noise margin weight coefficient, and the voltage margin weight coefficient; An acquiring unit is configured to perform a memory signal quality quantification calculation on the initial memory signal quality performance data based on the memory signal quality calculation expression to acquire a performance score corresponding to the memory signal quality.

8. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the parameter configuration method based on memory signals as claimed in any one of claims 1 to 5 when executing the computer program.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the parameter configuration method based on memory signals according to any one of claims 1 to 5.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the parameter configuration method based on memory signals according to any one of claims 1 to 5 are implemented.

Images