Data processing circuit, display driver of display device, and data processing method

Abstract

The invention relates to a data processing circuit, a display driver of a display device, and a data processing method. A data processing circuit includes an encoder, a memory device, and a decoder. The encoder generates an encoded bitstream by compressing an input frame including a plurality of samples forming a plurality of sample lines, determines a similarity between a plurality of samples of a current sample line to be encoded and a plurality of samples of a previously encoded previous sample line prior to the current sample line, and determining a plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity, excluding compressed data corresponding to the plurality of redundant samples from the encoded bitstream, and adding a flag indicating positions of the plurality of redundant samples to the encoded bitstream. A memory device stores an encoded bitstream. The decoder extracts a flag from the encoded bitstream provided from the memory device and generates a reconstructed frame by decompressing the encoded bitstream based on the flag.

Description

Technical Field

[0001] Example embodiments generally relate to a display device, and more particularly, to a data processing circuit, a display driver of a display device, and a data processing method. Background Art

[0002] Flat panel displays, such as liquid crystal displays (LCDs) and light emitting diode (LED) displays, are widely used due to their small size, high image quality, and low power consumption. The pixels in the display panel have a specific response time. The data fed to the pixels and allowing the pixels to display the image corresponding thereto may change faster than the pixels can react. Due to the delayed response of the pixels, undesirable effects, such as motion blur or ghosting effects, may occur. In order to improve the quality of the displayed image, image correction techniques can be used. Overdrive algorithms have been developed to compensate the image data to reduce the motion blur exhibited by the displayed image. Summary of the Invention

[0003] Some example embodiments may provide a data processing circuit and a data processing method to provide data for over-driving compensation of a display device.

[0004] Some example embodiments may provide a display driver of a display device including a data processing circuit.

[0005] According to an exemplary embodiment, a data processing circuit for providing data for overdrive compensation of a display device includes an encoder, a memory device, and a decoder. The encoder compresses an input frame including a plurality of samples forming a plurality of sample lines to generate a coded bitstream, determines a similarity between the plurality of samples of a current sample line to be coded and a plurality of samples of a previous sample line previously coded before the current sample line, wherein the plurality of samples of the current sample line and the plurality of samples of the previous sample line are included in the plurality of samples, determines the plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity, excludes compressed data corresponding to the plurality of redundant samples from the coded bitstream, and appends a flag indicating the location of the plurality of redundant samples to the coded bitstream. The memory device stores the coded bitstream. The decoder extracts the flag from the coded bitstream provided from the memory device and generates a reconstructed frame by decompressing the coded bitstream based on the flag.

[0006] In some example embodiments, the encoder may be configured to determine the similarity based on an absolute value of a difference between a current sample included in a current sample line and a comparison sample included in a previous sample line and adjacent to the current sample.

[0007] In some example embodiments, the encoder may be configured to: append a flag having a first value to the encoded bitstream at a position where compressed data corresponding to a plurality of redundant samples is excluded; and append a flag having a second value to the encoded bitstream at a position before compressed data corresponding to a plurality of non-redundant samples.

[0008] In some example embodiments, the encoder may be configured to determine all samples of a current sample line as a plurality of redundant samples when a sum value of a plurality of absolute values with respect to the current sample line is less than or equal to a threshold value, wherein each absolute value corresponds to a difference between a current sample included in the current sample line and a comparison sample included in a previous sample line and adjacent to the current sample.

[0009] In some example embodiments, the encoder may be configured to: group a plurality of samples included in a current sample line into a plurality of sample blocks such that each sample block among the plurality of sample blocks has a fixed number of samples; and determine all samples of each sample block as a plurality of redundant samples when a sum value of a plurality of absolute values with respect to each sample block is less than or equal to a threshold value, wherein each absolute value corresponds to a difference between a current sample included in the current sample line and a comparison sample included in a previous sample line and adjacent to the current sample.

[0010] In some example embodiments, the encoder may be configured to determine a current sample as a redundant sample among a plurality of redundant samples when an absolute value of a difference between a current sample included in a current sample line and a comparison sample included in a previous sample line and adjacent to the current sample is less than or equal to a threshold value.

[0011] In some example embodiments, the encoder may be configured to: append a flag having a first value to the encoded bitstream at a position where compressed data corresponding to the plurality of redundant samples is excluded; and append a redundant depth value to the encoded bitstream at a position following the flag having the first value, wherein the redundant depth value indicates the number of consecutive redundant samples among the plurality of redundant samples.

[0012] In some example embodiments, when the flag has a first value, the decoder may be configured to generate a plurality of reconstructed samples corresponding to the plurality of redundant samples of the current sample line by copying a plurality of reconstructed samples of the previous sample line. When the flag has a second value, the decoder may be configured to generate a plurality of reconstructed samples corresponding to the plurality of non-redundant samples by decompressing compressed data following the flag having the second value.

[0013] In some example embodiments, the encoder may be configured to: determine an encoding selection option among a plurality of prediction options corresponding to different combinations of a plurality of neighboring samples adjacent to a current sample to be encoded; and generate, according to the encoding selection option, a prediction sample for encoding the current sample based on a plurality of reconstructed samples corresponding to the plurality of neighboring samples.

[0014] In some example embodiments, the encoder may be configured to determine an encoding selection option based on a previously encoded parent sample included in a current sample line and preceding the current sample. The decoder may be configured to, without receiving information about the encoding selection option from the encoder, determine a decoding selection option among a plurality of prediction options based on a reconstructed sample generated by decoding compressed data corresponding to the parent sample; and generate, according to the decoding selection option, a prediction sample for decoding compressed data corresponding to the current sample based on a plurality of reconstructed samples corresponding to a plurality of neighboring samples.

[0015] In some example embodiments, the encoder may be configured to omit encoding for at least one color channel among the plurality of color channels, and the decoder may be configured to generate decoded data for the at least one color channel whose encoding is omitted based on decoded data for other color channels among the plurality of color channels whose encoding is not omitted.

[0016] In some example embodiments, the encoder may be configured to: group the plurality of sample lines into a plurality of slices; and perform encoding in parallel with respect to the plurality of slices.

[0017] In some example embodiments, the data processing circuit may further include: a sampler configured to generate the plurality of samples by: grouping a plurality of pixels of the input image data; or scaling each of the plurality of pixels to a sample having a reduced amount of bits compared to the pixel.

[0018] In some example embodiments, the encoder may include: a subtractor configured to generate a residual by subtracting a prediction sample from a current sample; a quantizer configured to generate a quantization value by quantizing the residual; an entropy encoder configured to generate an encoded bitstream based on the quantization value and a flag; a reconstructor configured to generate a reconstructed sample based on the quantization value and the prediction sample; a predictor configured to generate the prediction sample based on a plurality of reconstructed samples corresponding to a plurality of previously encoded samples; and a redundancy detector configured to generate a flag based on the reconstructed sample and the current sample.

[0019] In some example embodiments, the decoder may include: an entropy decoder configured to generate a flag and a quantization value based on an encoded bitstream; an inverse quantizer configured to generate a reconstructed residual based on the quantization value and the reconstructed sample; an adder configured to generate a reconstructed sample by summing the reconstructed residual and the predicted sample; a predictor configured to generate a predicted sample based on a plurality of previously decoded reconstructed samples; and an output circuit configured to generate a reconstructed frame based on the reconstructed sample and the flag.

[0020] According to example embodiments, a display driver for a display device includes: a sampler configured to generate an input frame by sampling input image data, the input frame including a plurality of samples forming a plurality of sample lines; an encoder configured to: generate an encoded bit stream by compressing the input frame; determine a similarity between a plurality of samples of a current sample line to be encoded and a plurality of samples of a previous sample line previously encoded before the current sample line, wherein the plurality of samples of the current sample line and the plurality of samples of the previous sample line are included in the plurality of samples; determine the plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity; exclude compressed data corresponding to the plurality of redundant samples from the encoded bit stream; and append a flag indicating positions of the plurality of redundant samples to the encoded bit stream; a memory device configured to store the encoded bit stream; a decoder configured to extract a flag from the encoded bit stream provided from the memory device and generate a reconstructed frame by decompressing the encoded bit stream based on the flag; a data compensation circuit configured to generate output image data by compensating the input image data based on the reconstructed frame; and a data driver configured to provide a plurality of data signals to a plurality of pixels of the display device based on the output image data.

[0021] In some example embodiments, the encoder may be configured to determine the similarity based on an absolute value of a difference between a current sample included in a current sample line and a comparison sample included in a previous sample line and adjacent to the current sample.

[0022] In some example embodiments, when the flag has a first value, the decoder may be configured to generate a plurality of reconstructed samples corresponding to the plurality of redundant samples of the current sample line by copying a plurality of reconstructed samples of the previous sample line. When the flag has a second value, the decoder may be configured to generate a plurality of reconstructed samples corresponding to the plurality of non-redundant samples by decompressing compressed data following the flag having the second value.

[0023] In some example embodiments, the encoder may be configured to: determine an encoding selection option among a plurality of prediction options corresponding to different combinations of a plurality of neighboring samples adjacent to a current sample to be encoded; and generate, according to the encoding selection option, a prediction sample for encoding the current sample based on a plurality of reconstructed samples corresponding to the plurality of neighboring samples.

[0024] According to an example embodiment, a data processing method for providing data for overdrive compensation of a display device includes: generating an encoded bit stream by compressing an input frame including multiple samples forming multiple sample lines; determining a similarity between multiple samples of a current sample line to be encoded and multiple samples of a previous sample line previously encoded before the current sample line, wherein the multiple samples of the current sample line and the multiple samples of the previous sample line are included in the multiple samples; determining the multiple samples of the current sample line as multiple redundant samples or multiple non-redundant samples based on the similarity; excluding compressed data corresponding to the multiple redundant samples from the encoded bit stream; appending a flag indicating positions of the multiple redundant samples to the encoded bit stream; storing the encoded bit stream in a memory device; extracting the flag from the encoded bit stream provided from the memory device; and generating a reconstructed frame by decompressing the encoded bit stream based on the flag.

[0025] In a data processing circuit, a data processing method, and a display driver according to example embodiments, by replacing redundant compressed data with a flag based on the similarity between an encoded comparison sample and a sample to be encoded, the size of a memory device storing data for overdrive compensation can be reduced while minimizing data loss. By replacing redundant compressed data with a flag, encoding time, decoding time, and bitstream size can be reduced, and the performance of a display device including the data processing circuit can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0027] Figure 1 is a flowchart illustrating a data processing method according to an example embodiment.

[0028] Figure 2 is a block diagram illustrating a data correction apparatus including a data processing circuit according to example embodiments.

[0029] Figure 3 is a block diagram illustrating an example of an encoder included in a data processing circuit according to example embodiments.

[0030] Figure 4 is a flowchart illustrating an example of encoding in a data processing method according to an example embodiment.

[0031] Figure 5 is a block diagram illustrating an example of a decoder included in a data processing circuit according to example embodiments.

[0032] Figure 6 is a flowchart illustrating an example of decoding in a data processing method according to example embodiments.

[0033] Figure 7 and Figure 8 is a diagram illustrating an example of a sample in a data processing method according to an example embodiment.

[0034] Figure 9 and Figure 10 is a diagram illustrating an example order of encoding and decoding in a data processing method according to an example embodiment.

[0035] Figure 11 and Figure 12 is a diagram illustrating an example of generating an encoded bit stream in a data processing method according to an example embodiment.

[0036] Figure 13 、 Figure 14 and Figure 15 is a diagram illustrating an example of generating an encoded bit stream in a data processing method according to an example embodiment.

[0037] Figure 16 is a diagram illustrating an example of prediction options in a data processing method according to example embodiments.

[0038] Figure 17 is a diagram illustrating an example of determining an encoding selection option in a data processing method according to an example embodiment.

[0039] Figure 18 、 Figure 19 and Figure 20 is a diagram illustrating a data processing circuit according to example embodiments.

[0040] Figure 21 and Figure 22 is a diagram illustrating an example of parallel encoding in a data processing method according to an example embodiment.

[0041] Figure 23 is a block diagram illustrating a display device according to example embodiments.

[0042] Figure 24 is a block diagram illustrating an electronic device including a display device according to example embodiments. DETAILED DESCRIPTION

[0043] Various example embodiments will be described more fully hereinafter with reference to the accompanying drawings, in which some example embodiments are shown. In the accompanying drawings, like reference numerals refer to like elements throughout. Repetitive descriptions may be omitted.

[0044] Figure 1 is a flowchart illustrating a data processing method according to an example embodiment. Figure 1 A data processing method for providing data for overdriving compensation of a display device is shown.

[0045] In the description of the data processing method in this article, the operations may be performed in a different order than shown and / or described, or may be performed in a different order or at a different time. Some operations may also be omitted from the flowchart, one or more operations may be repeated, or other operations may be added.

[0046] Reference Figure 1 The data processing method may include generating a coded bitstream by compressing an input frame including a plurality of samples forming a plurality of sample lines (process S100). According to example embodiments, one sample of the input frame may correspond to one pixel of the input image frame, or as will be referred to herein, Figure 7 As described herein, one sample of the input frame may correspond to two or more pixels of the input image frame. In some aspects, in some example embodiments, the amount of bits in each sample of the input frame may be equal to the amount of bits in each pixel of the input image frame, or as will be referred to herein Figure 8 As further described, the amount of bits in each sample of the input frame may be less than the amount of bits in each pixel of the input image frame.

[0047] The data processing method may include determining a similarity between a sample of a current sample line to be encoded and a sample of a previous sample line that was previously encoded before the current sample line (process S200). In an example embodiment, the similarity may be determined based on an absolute value of a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample. In an example embodiment, the determination of the similarity may be as described herein with reference to Figure 12 The description is performed on a sample line basis, as will be referred to herein Figure 14 The method described above is performed by further dividing the sample line on the basis of the sample block, or as will be referred to in this article Figure 15 The description is performed on a single sample basis.

[0048] The data processing method may include determining a sample of the current sample line as a redundant sample or a non-redundant sample based on similarity (process S300). The data processing method may include excluding compressed data corresponding to the redundant sample from the encoded bit stream (process S400). The data processing method may include appending a flag indicating the location of the redundant sample to the encoded bit stream (process S500). Processes S200, S300, S400, and S500 may be performed by an encoder included in a data processing circuit according to example embodiments. Figure 3 and Figure 4 Example embodiments of an encoder are described.

[0049] The data processing method may include storing the encoded bitstream in a memory device (process S600). In an example embodiment, the memory device may be a memory device dedicated to the data processing circuit. In another example embodiment, the memory device may be a general memory that stores various data used by the display device. In this case, a certain area of the general memory may be set as an area for storing the encoded bitstream.

[0050] The data processing method may include extracting a flag from a coded bit stream provided from a memory device (process S700). The data processing method may include generating a reconstructed frame by decompressing the coded bit stream based on the flag (process S800). Processes S700 and S800 may be performed by a decoder included in a data processing circuit according to an example embodiment. Figure 5 and Figure 6 Example embodiments of a decoder are described.

[0051] Figure 2 is a block diagram illustrating a data correction apparatus including a data processing circuit according to example embodiments.

[0052] Reference Figure 2 , the data correction device 10 may include a data processing circuit 20 and a data compensation circuit (DCC) 40. The data processing circuit 20 may include an encoder (ENC) 100, a memory device (MEM) 30, and a decoder (DEC) 200.

[0053] The data correction device 10 can correct the input image data IDAT to generate the output image data ODAT. The input image data IDAT can be provided in the form of a bit stream and can include a plurality of image frames in sequence..., FRn, FRn+1, .... n is a positive integer. The encoder 100 can encode (e.g., compress) the previous image frame FRn (hereinafter also referred to as the original (previous) frame FRn) to generate an encoded bit stream EBS, the memory device 30 can store the encoded bit stream EBS, and the decoder 200 can decode (e.g., decompress) the encoded bit stream EBS provided from the memory device 30 to generate a reconstructed frame FRn'. The data compensation circuit 40 can compensate the current image frame FRn+1 based on the reconstructed frame FRn' corresponding to the previous image frame FRn to generate the output image data ODAT. Therefore, for example, as described herein, the data correction device 10 can generate the output image data ODAT by correcting the input image data IDAT.

[0054] Storing any data, such as image frames for example, may consume a large amount of memory space. According to example embodiments, the encoder 100 and the decoder 200 may use a smaller storage medium (ie, the memory device 30), which may reduce space and cost.

[0055] like Figure 2 As shown in FIG, according to an example embodiment, the data processing circuit 20 may form a part of the data correction device 10, and the data compensation circuit (e.g., overdrive compensation circuit) within the data correction device 10 may use the previous image frame FRn to compensate the current image frame FRn+1 (e.g., to reduce ghosting effects or motion blur). In an example embodiment, the encoder 100 may also include circuits that perform grouping, truncation, delay, or other processing of data (e.g., Figure 3 sampler SMP), and such a sampler SMP may be included in the encoder 100.

[0056] For example, the sampler may receive an 8-bit per code (bpc) frame, truncate the frame (i.e., reduce the number of bpc of pixel values in the frame to, for example, 3 bpc), and delay the frame to generate a previous frame that has been truncated. The data processing circuit 20 may compress and store the previous frame so that the previous frame can be used by the data compensation circuit 40. Here, based on the truncation and compression, the size of the stored frame may be much smaller than the original (previous) frame FRn. For example, for an RGB input frame in which each color value is represented by 8 bpc [or 24 bits per pixel (bpp)], the result of the truncation is a frame representation of 3 bpc / 9 bpp, and for the case in which the encoder 100 performs 1.5:1 compression, the frame representation may be further reduced to 2 bpc / 6 bpp. However, the example embodiments are not limited to RGB input frames, and may use frames such as those in RGBG [for The encoder 100 may use any suitable input frame format, such as a sub-pixel array. For example, for an RGBG input frame, the frame size may be reduced from 16bpp to 6bpp by truncation, and the encoder 100 may perform 1.5:1 compression to further reduce the size to 4bpp.

[0057] In an exemplary embodiment, the encoding scheme of the data processing circuit 20 is generally optimized for mean square error (MSE) or peak signal-to-noise ratio (PSNR), which means that the polarity of the error in the reconstructed frame FRn' can be positive or negative. According to an exemplary embodiment, the reconstruction error, i.e., the error introduced by the data processing circuit 20, can be non-negative (i.e., zero or positive), in which case the performance of the data compensation circuit 40 can be improved.

[0058] The data processing circuit 20 can improve the performance of the data compensation circuit 40 by ensuring that the reconstruction error, which is defined as the difference between the reconstructed frame FRn′ and the original frame FRn and is mainly introduced by quantization, is always non-negative (i.e., equal to or greater than zero) and is limited to be less than or equal to a predetermined maximum value.

[0059] When storing compressed data, fixed-length coding (FLC) and variable-length coding (VLC) can be used to ensure minimum requirements, such as a minimum compression ratio. Coding schemes can be designed to determine the optimal compression tool between variable-length and fixed-length compression by calculating the difference between the total number of bits to be used and the number of bits already used during the compression process, and determining the appropriate level of compression to apply based on the remaining bits. In some aspects, when a residual is required, the accuracy of the reconstruction can be limited by applying a modulo operation to only allow positive residuals, and the coding technique can be limited.

[0060] Conventional compression or encoding methods are limited in data compression because they lack information about prediction methods, are designed and implemented by focusing on adding modulo functions, and do not consider various possibilities such as the use of line buffers. Conventional methods focus on compressing the image data itself and do not consider the specificity of compressing data for purposes such as overdrive compensation. Furthermore, the development of compression techniques for overdrive compensation data has not been discussed in detail, or compression has been minimized.

[0061] For conventional images, pixel-by-pixel information is important, but for compressed images used for overdrive compensation, determining the flow of changes in the entire RGB signal and determining the amount of compensation based on that flow is more important than the accuracy of the pixel-by-pixel prediction of the image. Applying conventional image compression techniques to the compensated data can be too complex and imprecise. For the purpose of determining the amount of compensation used for overdrive compensation, a simpler compression technique with a lower tolerance for accuracy is needed.

[0062] In a data processing circuit, a data processing method, and a display driver according to example embodiments, by replacing redundant compressed data with a flag based on the similarity between an encoded comparison sample and a sample to be encoded, the size of a memory device storing data for overdrive compensation can be reduced while minimizing data loss. By replacing redundant compressed data with a flag, encoding time, decoding time, and bitstream size can be reduced, and the performance of a device including the data processing circuit can be improved.

[0063] Figure 3 is a block diagram illustrating an example of an encoder included in a data processing circuit according to example embodiments.

[0064] Reference Figure 3 , the encoder 100 may include a subtractor 110, a quantizer QTZ, an entropy encoder EENC, a reconstructor RCN, a predictor EPRD, and a redundancy detector RDD. According to an example embodiment, the encoder 100 may further include a sampler SMP, a position detector PSD, and / or a rate controller ERTC.

[0065] The sampler SMP may sample the input image data IDAT. The sampler SMP may generate an input frame FR including a plurality of samples forming a plurality of sample lines by sampling the input image data IDAT. The sampler SMP may output the plurality of samples of the input frame FR on a sample-by-sample basis, and the sample currently output by the sampler SMP may be referred to as a current sample S.

[0066] The subtractor 110 may subtract the prediction sample PS from the current sample S to generate a residual RD. For example, the subtractor 110 may generate the residual RD by subtracting the prediction sample PS from the current sample S. The quantizer QTZ may quantize the residual RD to generate a quantized value QV. For example, the quantizer QTZ may generate the quantized value QV by quantizing the residual RD.

[0067] The entropy encoder EENC may generate an encoded bitstream EBS based on the quantization value QV and the flag FL. According to an example embodiment, the entropy encoder EENC may determine an encoding mode to be used for entropy encoding based on a control value RC provided from the rate controller ERTC.

[0068] The reconstructor RCN may generate a reconstructed sample RS based on the quantized value QV and the prediction sample PS. The predictor EPRD may generate a prediction sample PS based on the reconstructed sample RS corresponding to a previously encoded sample.

[0069] The redundancy detector RDD may generate a flag FL based on the reconstructed sample RS and the current sample S. In some example embodiments, the redundancy detector RDD may further generate a redundancy depth value DPT indicating the number of consecutive redundant samples.

[0070] The position detector PSD can provide the position information POS of the current sample S. Figure 3 Although not shown in the figure, the position information POS can be provided to a component of the encoder 100 that requires the position of the current sample S to be encoded within the input frame FR. For example, the position information POS can be provided to a redundancy detector RDD, and the redundancy detector RDD can determine whether the current sample line to which the current sample S belongs is the first sample line based on the position information POS. In addition, as will be referred to herein Figure 12 As described, when the redundancy detector RDD determines similarity on a sample line by sample line basis, the redundancy detector RDD may be based on the position information POS in a sample line by sample encoding EPS (see Figure 4 ) is completed. For example, the position information POS may be provided to the entropy encoder EENC, and the entropy encoder EENC may generate a line-by-line encoded bit stream EBS based on the position information POS.

[0071] Figure 4 is a flowchart illustrating an example of encoding in a data processing method according to an example embodiment. Figure 4 An example of encoding corresponding to a current sample line SLi to be encoded is shown. Figure 9 、 Figure 10 and Figure 11 As described, sample lines may be sequentially encoded, and samples included in each sample line may be sequentially encoded.

[0072] Reference Figure 3 and Figure 4 , the encoder 100 may receive a current sample line SLi (S11) and determine whether the current sample line SLi is the first sample line SL1 based on position information POS provided by a position detector PSD (S12). The position information POS may include information about the position of the current sample to be encoded within the input frame, that is, the position of the current sample line SLi to which the current sample belongs and the position of the current sample within the current sample line SLi.

[0073] When the current sample line SL1 is the first sample line SL1 (S12: Yes), the encoder 100 may perform sample-by-sample encoding EPS to sequentially encode the samples included in the current sample line SLi one by one (S13). In other words, for the first sample line SL1, the redundancy detector RDD may omit similarity determination, and the entropy encoder EENC may generate an encoded bit stream EBS corresponding to the first sample line SL1 based on the quantization value QV generated as a result of the sample-by-sample encoding EPS.

[0074] When the current sample line SL1 is not the first sample line SL1 (S12: No), the redundancy detector RDD may determine a similarity between samples of the current sample line SLi and samples of a previous sample line previously encoded before the current sample line SLi, and the redundancy detector RDD may determine the samples of the current sample line SLi as redundant samples or non-redundant samples based on the similarity (S14).

[0075] In example embodiments, the redundancy detector RDD may determine similarity based on an absolute value of a difference between a current sample included in the current sample line SLi and a comparison sample included in a previous sample line and adjacent to the current sample. For such similarity determination, the redundancy detector RDD may store samples of the previous sample line. Figures 11 to 15 An example embodiment of determining the similarity and generating the encoded bitstream EBS based on the similarity is further described.

[0076] When the sample of the current sample line SLi is determined to be a redundant sample (S14: Yes), the redundancy detector RDD may set the flag FL to a first value (e.g., "1") (S16). When the sample of the current sample line SLi is determined to be a non-redundant sample (S14: No), the redundancy detector RDD may set the flag FL to a second value (e.g., "0") (S15).

[0077] When the current sample line SLi is not the first sample line SL1 ( S12 : No), the encoder 100 may perform sample-by-sample encoding EPS ( S13 ) to sequentially encode samples included in the current sample line SLi one by one in parallel with the similarity determination.

[0078] The entropy encoder EENC can generate an encoded bit stream EBS based on the quantization value QV and the flag FL generated as a result of the sample-by-sample encoding EPS. Figures 11 to 15 As described above, the entropy encoder EENC may append a flag FL having a first value to the encoded bitstream EBS at a position where compressed data corresponding to redundant samples is excluded, and the entropy encoder EENC may append a flag FL having a second value to the encoded bitstream EBS at a position before compressed data corresponding to non-redundant samples. The entropy encoder EENC may perform entropy encoding to generate the encoded bitstream EBS (S17).

[0079] According to the unit of compression (or encoding), that is, according to the size of a predetermined slice or group of pixels, the predicted data can be set by referring to information about neighboring samples. The residual between the current sample and the corresponding predicted sample can be calculated, and the number of bits to be encoded (i.e., the number of bits) can be further reduced by quantizing the residual, and then entropy encoding can be performed to generate an encoded bitstream (EBS). In some embodiments, the reconstructed sample information generated by dequantizing the quantized value can be used as data for predicting the next sample and / or sample line. In this case, the residual information can be negative or positive, or a modulus can be applied so that the residual information can be negative or positive. In addition, based on the encoded value, the bit amount based on which the remaining samples and / or sample lines are compressed (i.e., the number of bits based on which the remaining samples and / or sample lines are compressed) can be calculated to implicitly determine the codec tool as one of a lossless codec and a lossy codec. According to example embodiments, the number of lossy codecs can be increased or decreased. Embodiments of the present disclosure support changing the determined codec mode to another codec mode with a higher or lower compression ratio based on the number of remaining bits.

[0080] Entropy coding may be applied alone or in combination by one or more entropy coding schemes such as run-length coding, arithmetic coding, exp-Golomb, Huffman, PCM, ADPCM, CAVLC, and CABAC, for example.

[0081] Figure 5 is a block diagram illustrating an example of a decoder included in a data processing circuit according to example embodiments.

[0082] Reference Figure 5 , also refer to Figure 3 and Figure 4 , the decoder 200 may include an entropy decoder EDEC, an inverse quantizer DQTZ, an adder 210, a predictor DPRD, and an output circuit OPC. According to an example embodiment, the decoder 200 may further include a position detector PSD and a rate controller DRTC.

[0083] The entropy decoder EDEC may generate a flag FL and a quantization value QV' based on the encoded bit stream EBS. According to an example embodiment, the entropy decoder EDEC may determine a decoding mode to be used for entropy decoding based on a control value RC' provided from the rate controller DRTC. In addition, according to an example embodiment, as will be referred to herein, Figure 15 As further described, the coded bitstream EBS may further include a redundant depth value DPT indicating the number of consecutive redundant samples in a line, and the entropy decoder EDEC may further extract the redundant depth value DPT from the coded bitstream EBS.

[0084] The inverse quantizer DQTZ may generate a reconstructed residual RD' based on the quantized value QV' and the reconstructed sample S'. The adder 210 may generate a reconstructed current sample S' by summing the reconstructed residual RD' and the predicted sample PS'. The predictor DPRD may generate a predicted sample PS' based on the previously decoded reconstructed sample S'. Figure 12 and Figure 14 As described, the output circuit OPC can generate a reconstructed frame FR' based on the reconstructed sample S' and the flag FL. According to an example embodiment, as will be referred to herein Figure 15 As further described, when the coded bitstream EBS comprises a redundant depth value DPT, the output circuit OPC may generate a reconstructed frame FR' based on the reconstructed samples S', the flag FL and the redundant depth value DPT.

[0085] The position detector PSD can provide position information POS for the currently decoded quantized value QV'. The position information POS may include information about the position of the current sample (the sample before being encoded) corresponding to the quantized value QV' to be decoded in the input frame (such as the position of the current sample line SLi to which the current sample belongs and the position of the current sample within the current sample line SLi). Figure 5 Not shown in FIG. 2 , but the position information POS may be provided to components of the decoder 200 that require the position in the input frame of the current sample corresponding to the quantized value QV′ currently being decoded.

[0086] Figure 6 is a flowchart illustrating an example of decoding in a data processing method according to example embodiments.

[0087] Reference Figure 5 and Figure 6 , the entropy decoder EDEC may perform entropy decoding to generate a flag FL and a quantization value QV′ ( S31 ).

[0088] When the flag FL has the second value (eg, “0”) ( S32 : No), the decoder 200 may perform sample-by-sample decoding DPS to sequentially decode the quantization value QV′ in units of samples ( S33 ) to sequentially generate reconstructed samples S′ corresponding to non-redundant samples ( S34 ).

[0089] When the flag FL has the first value (eg, “1”) ( S32 : Yes), the output circuit OPC may copy the reconstructed sample of the previous sample line ( S35 ) to generate a reconstructed sample S′ corresponding to the redundant sample in the current sample line ( S36 ).

[0090] The output circuit OPC may generate a reconstructed frame FR′ by combining reconstructed samples S′ corresponding to non-redundant samples generated by performing sample-by-sample decoding DPS and reconstructed samples S′ corresponding to redundant samples generated by copying reconstructed samples of a previous sample line ( S37 ).

[0091] The encoded bit stream EBS input to the memory device can be reconstructed by the decoder into data that can be used for overdrive compensation. The data can be decoded in the order in which the data is encoded, and after the decoding position is detected, the quantized data or the quantized residual of the data at the position can be dequantized by entropy decoding, and the reconstructed sample can be generated by adding the predicted sample with reference to the predicted sample before the current sample. The reconstructed sample is passed as the predicted data for the next sample and the next sample line, and can be used to calculate the number of available bits or to determine the codec mode structure for the next sample, sample line and / or slice as a lossy mode or a lossless mode using explicit information. According to an example embodiment, the number of lossy codec modes can be increased or decreased, and the decoder can use the same number of codec modes as defined in the encoder, or can use a number of codec modes that is reduced than the number of codec modes in the encoder.

[0092] Figure 7 and Figure 8 is a diagram illustrating an example of a sample in a data processing method according to an example embodiment.

[0093] Reference Figure 7 , in an example embodiment, Figure 3 The sampler SMP may group pixels PX of the input image frame FRAME (PIXEL) and generate corresponding samples S of the input frame FRAME (SAMPLE) based on the grouping. For example, an embodiment of the present disclosure may include determining an average value of pixels belonging to a group as a value of a corresponding sample. Figure 7 An example is shown in which four pixels PX in two rows and two columns are grouped into one sample S, but example embodiments are not limited thereto. Pixels in N rows and N columns (N is a natural number greater than or equal to 1) may be set as each pixel group, and embodiments of the present disclosure may include determining the value of the corresponding sample based on the average value, maximum value, representative value, variance, or other suitable characteristics of each pixel group.

[0094] Reference Figure 8 , in an example embodiment, Figure 3 The sampler SMP may generate or output samples in which each sample has a smaller number of bits than the corresponding pixel (or the corresponding plurality of pixels). For example, the sampler SMP may scale each pixel to a sample having a reduced number of bits compared to the pixel. In an example, the sampler SMP may reduce an X-bit pixel to a Y-bit sample (where Y is a natural number greater than 0 and less than X). For example, the sampler SMP may truncate a pixel and generate a corresponding sample by omitting or removing a certain number of less significant bits of the pixel and outputting or retaining the more significant bits of the pixel.

[0095] Figure 9 and Figure 10 is a diagram illustrating an example order of encoding and decoding in a data processing method according to an example embodiment.

[0096] In an example embodiment, Figure 9 As shown in , each of the sample lines SL1, SL2, and SL3 of the input frame FR may include samples arranged in a row direction, and encoding and decoding may be performed in a direction from a top sample line to a bottom sample line, and within each sample line, in a direction from a left sample to a right sample.

[0097] In an example embodiment, Figure 10 As shown in , each of the sample lines SL1, SL2, and SL3 of the input frame FR may include samples arranged in a column direction, and encoding and decoding may be performed from the sample line on the left to the sample line on the right, and from upper samples to lower samples within each sample line.

[0098] According to example embodiments, the order of encoding and decoding may be determined differently. However, the sample-by-sample encoding of the encoder and the sample-by-sample decoding of the decoder are performed in the same manner. For ease of illustration and description, this article will describe the order based on Figure 9 An example embodiment of encoding and decoding performed by a raster scanning method.

[0099] Figure 11 and Figure 12 is a diagram illustrating an example of generating an encoded bit stream in a data processing method according to an example embodiment.

[0100] exist Figure 11 , for ease of illustration and description, the i-th (where i is an integer greater than or equal to 1) sample line SLi and the (i+1)-th sample line SLi+1 included in the input frame are shown. The i-th sample line SLi may correspond to a previous sample line that has already been encoded and may include reconstructed samples S'(i,1), S'(i,2), S'(i,3), ..., and S'(i,k). The (i+1)-th sample line SLi+1 may correspond to a current sample line to be encoded and may include samples S(i+1,1), S(i+1,2), S(i+1,3), ..., and S(i+1,k), where k is a positive integer.

[0101] In an example embodiment, Figure 3The redundant detector RDD can determine the aforementioned similarity based on the absolute value |S(i+1,j)-S(i,j)| of the difference S(i+1,j)-S(i,j) between the current sample S(i+1,j) (not shown) included in the current sample line SLi+1 and the comparison sample S(i,j) included in the previous sample line SLi and adjacent to the current sample S(i+1,j), where j is a natural number greater than or equal to 1 and less than or equal to k. For such similarity determination, the redundant detector RDD can store samples S(i,1) to S(i,k) (not shown) of the previous sample line SLi. In some example embodiments, reconstructed samples S'(i,1) to S'(i,k) can be used as comparison samples for similarity determination instead of the samples S(i,1) to S(i,k) of the previous sample line SLi. In this case, the redundant detector RDD can store the reconstructed samples S'(i,1) to S'(i,k) of the previous sample line SLi for similarity determination.

[0102] Similarity determination can be made as described herein with reference to Figure 12 The description is performed on a sample line basis, as will be referred to herein Figure 14 The description is performed on a sample block basis, or as will be referred to herein Figure 15 The described is performed on a sample-by-sample basis.

[0103] Now refer to Figure 11 and Figure 12 , also refer to Figure 14 , when the sum of the absolute values of the current sample line SLi+1 |S(i+1,j)-S(i,j)| When it is less than or equal to the threshold value, Figure 3 The redundancy detector RDD of the encoder 100 may determine all samples S(i+1,1) to S(i+1,k) of the current sample line SLi+1 as the above-mentioned redundant samples, wherein each absolute value |S(i+1,j)-S(i,j)| corresponds to the difference between the current sample S(i+1,j) included in the current sample line SLi+1 and the comparison sample S(i,j) (not shown) included in the previous sample line SLi and adjacent to the current sample S(i+1,j). In some embodiments, when the sum value When the threshold value is greater than the threshold value, the redundancy detector RDD may determine all samples S(i+1,1) to S(i+1,k) of the current sample line SLi+1 as the above-mentioned non-redundant samples. As the threshold value increases, the compression ratio increases, but the loss ratio may also increase. In some embodiments, as the threshold value decreases, the loss ratio may decrease and the loss rate may increase. In an example embodiment, the threshold value may be set to zero for lossless compression.

[0104] Figure 12The quantization value QV and the encoded bit stream EBS corresponding to the i-th sample line SLi, the (i+1)-th sample line SLi+1 and the (i+2)-th sample line SLi+2 are shown. Figure 12 , QLi indicates the quantization value QV corresponding to the i-th sample line SLi, QLi+1 indicates the quantization value QV corresponding to the (i+1)-th sample line SLi+1, QLi+2 indicates the quantization value QV corresponding to the (i+2)-th sample line SLi+2, FLi indicates the flag corresponding to the i-th sample line SLi, and CLi indicates the compressed data corresponding to the i-th sample line SLi.

[0105] The redundancy detector RDD can append a flag having a first value (e.g., “1”) to the encoded bit stream EBS at a position where compressed data corresponding to redundant samples is excluded, and the redundancy detector RDD can append a flag having a second value (e.g., “0”) to the encoded bit stream at a leading position of compressed data corresponding to non-redundant samples.

[0106] Figure 12 The first case CS1 shows a case where the (i+1)th sample line SLi+1 is similar to the i-th sample line SLi and the (i+2)th sample line SLi+2 is not similar to the (i+1)th sample line SLi+1. In this case, the redundancy detector RDD may set the flag FLi corresponding to the non-redundant sample of the i-th sample line SLi to a value of "0", set the flag FLi+1 corresponding to the redundant sample of the (i+1)th sample line SLi+1 to a value of "1", and the redundancy detector RDD may set the flag FLi+2 corresponding to the non-redundant sample of the (i+2)th sample line SLi+2 to a value of "0".

[0107] Figure 3 The entropy encoder EENC can append a flag FLi having a value of "0" to the encoded bit stream EBS at a leading position of the compressed data CLi corresponding to the non-redundant samples of the i-th sample line SLi, append a flag FLi+1 having a value of "1" to the encoded bit stream EBS at a position where the compressed data CLi+1 corresponding to the redundant samples of the (i+1)-th sample line SLi+1 is excluded, and append a flag FLi+2 having a value of "0" to the encoded bit stream EBS at a leading position of the compressed data CLi+2 corresponding to the non-redundant samples of the (i+2)-th sample line SLi+2. Figure 5 The decoder 200 may copy the reconstructed sample of the i-th sample line SLi by referring to the flag FLi+1 having a value of “1” to generate the reconstructed sample of the (i+1)-th sample line SLi+1.

[0108] Figure 12The second case CS2 shows a case where the (i+1)th sample line SLi+1 is similar to the i-th sample line SLi and the (i+2)th sample line SLi+2 is similar to the (i+1)th sample line SLi+1. In this case, the redundancy detector RDD may set the flag FLi corresponding to the non-redundant sample of the i-th sample line SLi to a value of "0", set the flag FLi+1 corresponding to the redundant sample of the (i+1)th sample line SLi+1 to a value of "1", and set the flag FLi+2 corresponding to the redundant sample of the (i+2)th sample line SLi+2 to a value of "1".

[0109] Figure 3 The entropy encoder EENC can append a flag FLi having a value of "0" to the encoded bit stream EBS at a leading position of the compressed data CLi corresponding to the non-redundant samples of the i-th sample line SLi, append a flag FLi+1 having a value of "1" to the encoded bit stream EBS at a position where the compressed data CLi+1 corresponding to the redundant samples of the (i+1)-th sample line SLi+1 is excluded, and append a flag FLi+2 having a value of "1" to the encoded bit stream EBS at a position where the compressed data CLi+2 corresponding to the redundant samples of the (i+2)-th sample line SLi+2 is excluded. Figure 5 The decoder 200 may copy the reconstructed sample of the i-th sample line SLi to generate reconstructed samples of the (i+1)-th sample line SLi+1 and the (i+2)-th sample line SLi+2 by referring to the flags FLi+1 and FLi+2 having values of “1”.

[0110] Figure 13 、 Figure 14 and Figure 15 is a diagram showing an example of generating a coded bit stream in a data processing method according to an exemplary embodiment. Figure 11 and Figure 12 Redundant description.

[0111] Reference Figure 13 and Figure 14 , Figure 3 The encoder 100 may group samples included in each sample line into a plurality of sample blocks BK such that each sample block has a fixed number of samples, and determine the aforementioned similarity on a sample block-by-sample block basis. Figure 13 An example embodiment in which two samples are grouped into one sample block is shown, but the number of samples included in a sample block may vary.

[0112] When the sum of the absolute values of each sample block |S(i+1,j)-S(i,j)| is less than or equal to the threshold value, Figure 3The redundancy detector RDD of the encoder 100 can determine all samples of each sample block as redundant samples, where each absolute value |S(i+1,j)-S(i,j)| corresponds to the difference between the current sample S(i+1,j) included in the current sample line SLi+1 and the comparison sample S(i,j) included in the previous sample line SLi and adjacent to the current sample S(i+1,j).

[0113] Figure 14 The three sample blocks BK(i+1,j), BK(i+1,j+1), and BK(i+1,j+2) included in the (i+1)th sample line SLi+1 are similar to the three sample blocks BK(i,j), BK(i,j+1), and BK(i,j+2) included in the i-th sample line SLi, respectively. In this case, the redundancy detector RDD may set the flag FLi corresponding to the non-redundant sample of the i-th sample line SLi to a value of "0," set the flag FLi+1 corresponding to the non-redundant sample of the (i+1)th sample line SLi+1 to a value of "0," set the flag FLi+1 corresponding to the redundant sample of the (i+1)th sample line SLi+1 to a value of "1," and set the flag FLi+2 corresponding to the non-redundant sample of the (i+2)th sample line SLi+2 to a value of "0."

[0114] Figure 3 The entropy encoder EENC may receive quantization values QV from the quantizer QTZ on a sample-by-sample basis and on a sample block basis (e.g., Figure 13 The entropy encoder EENC receives a flag FL from the redundancy detector RDD in the case of (every two samples in the case of) the redundancy detector RDD. The entropy encoder EENC may append a flag FLi having a value of “0” to the coded bit stream EBS at a leading position of the compressed data CLi corresponding to the non-redundant samples of the i-th sample line SLi, append a flag FLi+1 having a value of “1” to the coded bit stream EBS at a position where the compressed data CLi+1 corresponding to the three sample blocks BK(i+1,j), BK(i+1,j+1), and BK(i+1,j+2) of the (i+1)-th sample line SLi+1 are excluded, and append a flag FLi+2 having a value of “0” to the coded bit stream EBS at a leading position of the compressed data CLi+2 corresponding to the non-redundant samples of the (i+2)-th sample line SLi+2. Figure 5 The decoder 200 may determine that the compressed data corresponds to a non-redundant sample until a value of “1” appears at the position of the flag. Figure 5The decoder 200 can generate reconstructed samples of three sample blocks BK(i+1,j), BK(i+1,j+1) and BK(i+1,j+2) of the (i+1)th sample line SLi+1 by copying the reconstructed samples of the three sample blocks BK(i,j), BK(i,j+1) and BK(i,j+2) of the i-th sample line SLi with reference to the flag FLi+1 having a value of “1”.

[0115] Figure 15 An example of determining similarity on a sample-by-sample basis is shown.

[0116] Reference Figure 15 As described herein, if the absolute value of the difference |S(i+1,j)-S(i,j)| between the current sample S(i+1,j) included in the current sample line SLi+1 and the comparison sample S(i,j) included in the previous sample line SLi and adjacent to the current sample S(i+1,j) is lower than the threshold value, then Figure 3 The redundancy detector RDD of the encoder 100 may determine the current sample S(i+1,j) as a redundant sample. In other words, the redundancy detector RDD may append a flag FLi+1 having a first value (e.g., a value of "1") to the encoded bitstream EBS at a position where compressed data corresponding to the redundant sample is excluded, and the redundancy detector RDD may append a redundancy depth value DPT indicating the number of consecutive redundant samples to a downstream position of the flag FLi+1 having a value of "1" in the encoded bitstream EBS.

[0117] Despite Figure 14 In the exemplary embodiment of , three flags FLi+1 having a value of "1" indicating three sample blocks BK(i+1,j), BK(i+1,j+1), and BK(i+1,j+2) corresponding to six redundant samples are included in the coded bit stream EBS, but Figure 15 In the example embodiment of FIG. 5 , one flag FLi+1 having a value of “1” and a redundancy depth value DPT indicating the number of redundant samples (eg, “6”) may be included in the encoded bitstream EBS.

[0118] Figure 5 The decoder 200 can determine that the compressed data corresponds to a non-redundant sample until a value of "1" appears in the position of the flag. In addition, the decoder 200 can determine that the value following the flag having a value of "1" is a redundant depth value DPT. The decoder 200 can extract the flag FL from the encoded bit stream ESB including such flag information (see Figure 3 ) and the redundant depth value DPT, and decoding can be performed based on the flag FL and the redundant depth value DPT.

[0119] If the flag FL has a first value (e.g., a value of "1"), the decoder 200 may copy the reconstructed samples of the previous sample line SLi to generate reconstructed samples corresponding to the redundant samples of the current sample line SLi+1. For example, the decoder 200 may use the copy of the reconstructed samples of the previous sample line SLi to generate reconstructed samples corresponding to the redundant samples of the current sample line SLi+1. If the flag FL has a second value (e.g., a value of "0"), the decoder 200 may decompress the compressed data set after the flag FL on a sample-by-sample basis to generate reconstructed samples corresponding to the non-redundant samples of the current sample line SLi+1. For example, the decoder 200 may generate reconstructed samples corresponding to the non-redundant samples of the current sample line SLi+1 by decompressing the compressed data set after the flag FL on a sample-by-sample basis.

[0120] Figure 16 is a diagram illustrating an example of prediction options in a data processing method according to an example embodiment, and Figure 17 is a diagram illustrating an example of determining an encoding selection option in a data processing method according to an example embodiment.

[0121] Reference Figure 16 , Figure 3 The encoder 100 may determine an encoding selection option from among a plurality of prediction options OP1, OP2, OP3, OP4, OP5, OP6, and OP7 corresponding to different combinations of neighboring samples adjacent to the current sample to be encoded. The encoder 100 may generate a prediction sample for encoding the current sample based on the reconstructed samples corresponding to the neighboring samples according to the encoding selection option.

[0122] The encoder 100 can be used Figure 16 The prediction sample is generated by one of the multiple prediction options OP1 to OP7. The seven prediction options OP1 to OP7 shown are some examples of prediction using already encoded samples. The embodiments of the present disclosure support modifying or adding sample information to be referenced in the prediction. For the first prediction option OP1, the encoder 100 can provide the average value of the encoded sample immediately before the current sample and the sample immediately above the current sample as the prediction sample. For the second prediction option OP2, the encoder 100 can provide the average value of the samples to the left, upper left and top of the current sample as the prediction sample. In the case of the third prediction option OP3, the encoder 100 can determine the prediction sample by averaging the n encoded samples immediately before the current sample on the same sample line, or by determining the most similar sample, where the n encoded samples can be added or deleted within the available range. In this way, the optimal prediction option can be selected from multiple prediction options OP1 to OP7, and the neighboring encoded samples can be used to provide the prediction sample for encoding the current sample.

[0123] Embodiments of the present disclosure support the use of multiple prediction options, where each prediction option can be explicitly coded by assigning a predetermined bit value, or all samples can be implicitly coded in the same way by selecting only one of the multiple prediction options.

[0124] Embodiments of the present disclosure support using multiple prediction options to make sample-by-sample predictions, where a predicted sample corresponding to the current sample can be generated by inheriting the best prediction option or prediction direction of a previously encoded parent sample of the current sample and omitting information about the prediction options.

[0125] Reference Figure 17 , also refer to Figure 16 , when encoding is performed on the i-th sample line SLi, Figure 3 The encoder 100 may determine the encoding selection option from among a plurality of prediction options OP1 to OP7 based on, for example, a parent sample S(i,j-1) (not shown) included in the current sample line SLi and encoded before the current sample S(i,j). In other words, Figure 17 As shown in the figure, the predictor EPRD generates a predicted sample PS(i,j) for the current sample S(i,j), and the reconstructor RCN that generates the reconstructed sample RS(i,j) for the current sample S(i,j) is provided with the predicted sample PS(i,j) corresponding to the current sample S(i,j), and the subtractor that generates the residual RD(i,j) corresponding to the current sample S(i,j) can be provided with the predicted sample PS(i,j-1) corresponding to the parent sample S(i,j-1).

[0126] in this case, Figure 5 The decoder 200 may determine a decoding selection option among a plurality of prediction options OP1 to OP7 based on a reconstructed sample S'(i, j-1) (not shown) generated by decoding compressed data corresponding to a parent sample S(i, j-1) without receiving any information about the encoding selection option from the encoder 100. The decoder 200 may generate a prediction sample for decoding compressed data corresponding to the current sample S(i, j) based on the reconstructed sample corresponding to the neighboring samples according to the decoding selection option.

[0127] Figure 18 、 Figure 19 and Figure 20 is a diagram illustrating a data processing circuit according to example embodiments.

[0128] Although the following description uses the case where the input image data is RGB data as an example, the exemplary embodiments may be applied to a format other than or in addition to the RGB format such as RGB. Various color formats such as YCbCr, YCoCg, HSV, CIELAB and CIELUV.

[0129] Reference Figure 18 The data processing circuit 21 may include encoders RENC, GENC, and BENC that respectively perform encoding on the red channel, the green channel, and the blue channel, a memory device MEM, and decoders RDEC, GDEC, and BDEC that respectively perform decoding on the red channel, the green channel, and the blue channel.

[0130] The red encoder RENC may encode the red image data R to generate an encoded red bit stream REBS, the green encoder GENC may encode the green image data G to generate an encoded green bit stream GEBS, and the blue encoder BENC may encode the blue image data B to generate an encoded blue bit stream BEBS.

[0131] The memory device MEM may separately store the encoded red bit stream REBS, the encoded green bit stream GEBS and the encoded blue bit stream BEBS.

[0132] The red decoder RDEC may decode the encoded red bit stream REBS provided from the memory device MEM to generate reconstructed red data R'. The green decoder GDEC may decode the encoded green bit stream GEBS provided from the memory device MEM to generate reconstructed green data G'. The blue decoder BDEC may decode the encoded blue bit stream BEBS provided from the memory device MEM to generate reconstructed blue data B'.

[0133] Reference Figure 19 and Figure 20 , also refer to Figure 18 , the data processing circuits 22 and 23 may omit encoding for at least one color channel among the plurality of color channels. The decoder may generate decoded data for at least one color channel in which encoding is omitted based on decoded data for other channels in which encoding is not omitted.

[0134] In an example embodiment, Figure 19 As shown in , the data processing circuit 22 may include encoders RENC and GENC and decoders RDEC and GDEC for the red and green channels, and may omit the encoder BENC and decoder BDEC for the blue channel. In this case, the virtual decoder VDEC may generate reconstructed blue data B' based on the reconstructed red data G' and the reconstructed green data G'. For example, the virtual decoder VDEC may provide the average of the reconstructed red data G' and the reconstructed green data G' as the reconstructed blue data B'.

[0135] In another example embodiment, Figure 20 As shown in , the data processing circuit 23 may include an encoder GENC and a decoder GDEC for the green channel, and the encoders RENC and BENC and the decoders RDEC and BDEC for the red and blue channels may be omitted. In this case, the reconstructed green data G' may be provided as reconstructed red data G' and reconstructed blue data B'.

[0136] When pixel data or sample data has similar information between channels, in particular when the information in each of the channels R, G, and B representing gray is highly similar between channels, the data can be compressed by omitting one or more channel information and encoding a flag indicating that compression using single-channel information and channel redundancy has been applied. In this case, the information of the representative channels (i.e., the channels that are not omitted) can be losslessly compressed and lossily compressed depending on the purpose, and the reconstructed frame can be decoded according to the compression form and the information received as a bitstream to form the reconstructed frame. In order to retain the redundancy between channels or certain data and compress the remaining data, embodiments of the present disclosure support applying different compression rates to each channel by converting to a color space such as YCbCr, HSV, CIELAB, CIELUV, or other color spaces divided into a brightness axis and a color axis, and then removing the redundancy between the color channels (e.g., only removing the redundancy).

[0137] In an example embodiment, the previous frame data may be compressed in the frequency domain. To remove redundant information when compressing on a full-frame basis rather than a sample and sample-line basis, data compression may be performed by converting the input frame to the frequency domain and then omitting and / or pruning data within a specific frequency range to remove redundant information. The frame data reflecting the reduced and / or omitted frequencies may be converted to the spatial domain to calculate a residual from the original data, quantize the residual, and apply entropy coding to compress the frame.

[0138] Figure 21 and Figure 22 is a diagram illustrating an example of parallel encoding in a data processing method according to an example embodiment.

[0139] Reference Figure 21 and Figure 22 The encoder 101 may group the plurality of sample lines SL forming the input frame FR into a plurality of slices SLC1 and SLC2 and perform encoding on the plurality of slices SLC1 and SLC2 in parallel. The number of the plurality of slices SLC1 and SLC2 included in one input frame FR and the number of sample lines included in one slice may vary.

[0140] The encoder 101 may include a plurality of encoders ENC1 and ENC2 for parallel encoding. The first encoder ENC1 may perform encoding on the first slice SLC1, and the second encoder ENC2 may perform encoding on the second slice SLC2.

[0141] In an example embodiment, the encoder 101 may include a single entropy encoder EENC that performs entropy encoding on the values output from the multiple encoders ENC1 and ENC2 as a whole to generate a single encoded bitstream EBS. In some example embodiments, the multiple encoders ENC1 and ENC2 may each include an entropy encoder for independently performing entropy encoding.

[0142] Figure 23 is a block diagram illustrating a display device according to example embodiments.

[0143] Reference Figure 23 A display device 300 according to an example embodiment may include a display panel 310 including a plurality of pixels PX, a scan driver 320 that supplies a scan signal SS to the plurality of pixels PX, and a display driver 330 that drives the display panel 310. The display driver 330 may include a data driver 340 that supplies a data signal DS to the plurality of pixels PX and a controller 350 that controls the operation of the display device 300. In an example embodiment, the controller 350 may include a sampler SMP, an encoder ENC, a memory device MEM, a decoder DEC, and a data compensation circuit DCC.

[0144] The display panel 310 may include a plurality of data lines, a plurality of scan lines, and a plurality of pixels PX associated with the plurality of data lines and the plurality of scan lines. In an example embodiment, each pixel PX may include a light-emitting element, and the display panel 310 may be a light-emitting display panel. For example, the light-emitting element may be an organic light-emitting diode (OLED), a nano-light-emitting diode (Nano-LED), a quantum dot (QD) light-emitting diode, a micro-light-emitting diode, an inorganic light-emitting diode, or any other suitable light-emitting element. In other example embodiments, the display panel 310 may be a liquid crystal display (LCD) panel or any other suitable display panel.

[0145] The scan driver 320 may generate a scan signal SS based on a scan control signal SCTRL received from the controller 350, and may sequentially provide the scan signal SS to a plurality of pixels PX through a plurality of scan lines in a row-by-row manner. In an example embodiment, the scan control signal SCTRL may include, but is not limited to, a scan start signal and a scan clock signal. In an example embodiment, the scan driver 320 may be integrated or formed in the display panel 310. In other example embodiments, the scan driver 320 may be implemented as one or more integrated circuits separate from the display panel 310.

[0146] The data driver 340 may generate a data signal DS based on the output image data ODAT and the data control signal DCTRL received from the controller 350, and may provide the data signal DS to the plurality of pixels PX via a plurality of data lines. In example embodiments, the data control signal DCTRL may include, but is not limited to, an output data enable signal, a horizontal start signal, and a load signal. In example embodiments, the display driver 330 including the data driver 340 and the controller 350 may be implemented in a single integrated circuit, which may be referred to as a timing controller embedded data driver (TED) integrated circuit. In other example embodiments, the data driver 340 and the controller 350 may be implemented as separate integrated circuits.

[0147] The controller 350 (e.g., a timing controller (TCON)) may receive input image data IDAT and a control signal CTRL from an external host processor (e.g., an application processor (AP), a graphics processing unit (GPU), or a graphics card). In an example embodiment, the input image data IDAT may be RGB image data including red image data, green image data, and blue image data. In an example embodiment, the control signal CTRL may include, but is not limited to, a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, and a main clock signal. The controller 350 may compensate the input image data IDAT to generate output image data ODAT. In addition, the controller 350 may provide the output image data ODAT and the data control signal DCTRL to the data driver 340 to control the operation of the data driver 340, and the controller 350 may provide the scan control signal SCTRL to the scan driver 320 to control the operation of the scan driver 320.

[0148] In the display apparatus 300 according to example embodiments, the sampler SMP may sample the input image data IDAT to generate an input frame FR including a plurality of samples forming a plurality of sample lines.

[0149] The encoder ENC may compress the input frame FR to generate an encoded bit stream EBS, the memory device MEM may store the encoded bit stream EBS, and the decoder DEC may decompress the encoded bit stream EBS provided from the memory device MEM to generate a reconstructed frame FR'.

[0150] As described herein, according to example embodiments, an encoder ENC may determine a similarity between samples of a current sample line to be encoded and samples of a previous sample line previously encoded, determine the samples of the current sample line as redundant samples or non-redundant samples based on the similarity, exclude compressed data corresponding to the redundant samples from an encoded bitstream, and append a flag indicating the location of the redundant samples to the encoded bitstream. A decoder DEC may extract the flag from an encoded bitstream EBS provided from a memory device MEM, and may decompress compressed data of the encoded bitstream EBS based on the flag to generate a reconstructed frame FR'.

[0151] The data compensation circuit DCC may compensate the input image data IDAT based on the reconstructed frame FR′ to generate the output image data ODAT.

[0152] Figure 24 is a block diagram illustrating an electronic device including a display device according to example embodiments.

[0153] Reference Figure 24 , the electronic device 1100 may include a processor 1110, a memory device 1120, a storage device 1130, an input / output (I / O) device 1140, a power supply 1150, and a display device 1160. The electronic device 1100 may also include a plurality of ports for communicating with a video card, a sound card, a memory card, a universal serial bus (USB) device, or the like, or for communicating with other systems.

[0154] The processor 1110 may perform calculations or tasks. According to example embodiments, the processor 1110 may be a microprocessor or a central processing unit (CPU). The processor 1110 may be connected to other components via an address bus, a control bus, and a data bus. According to example embodiments, the processor 1110 may also be connected to an expansion bus, such as a peripheral component interconnect (PCI) bus.

[0155] The memory device 1120 may store data that supports the operation of the electronic device 1100. For example, the memory device 1120 may include a non-volatile memory device such as an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a phase change random access memory (PRAM), a resistive random access memory (RRAM), a nano-floating gate memory (NFGM), a polymer random access memory (PoRAM), a magnetic random access memory (MRAM), and a ferroelectric random access memory (FRAM), and / or a volatile memory device such as a dynamic random access memory (DRAM), a static random access memory (SRAM), and a mobile DRAM.

[0156] The storage device 1130 may include a solid-state drive (SSD), a hard disk drive (HDD), or a compact disc read-only memory (CD-ROM). The I / O device 1140 may include input devices such as a keyboard, a keypad, a touchpad, a touch screen, and a mouse, and output devices such as a speaker and a printer. The power supply 1150 may provide power for the operation of the electronic device 1100. The display device 1160 may be connected to other components via the above bus or other communication links.

[0157] As referenced in this article Figures 1 to 23 As depicted, display device 1160 may include data processing circuitry (DPC) 1162 .

[0158] In this manner, in the data processing circuit, data processing method, and display driver according to example embodiments, by replacing redundant compressed data with a flag based on the similarity between the encoded comparison sample and the sample to be encoded, the size of a memory device storing data for overdrive compensation can be reduced while minimizing data loss. By replacing redundant compressed data with a flag, encoding time, decoding time, and bitstream size can be reduced, and the performance of a device including the data processing circuit can be improved.

[0159] According to example embodiments, the electronic device 1100 may be a digital television, a three-dimensional television, a smart phone, a virtual reality device, a personal computer (such as a tablet computer and a laptop computer), a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a music player, a portable game console, a navigation device, and the like, and may be any electronic device including a display device 1160.

[0160] It will be understood by those skilled in the art that the exemplary embodiments may be implemented in the form of systems, methods, products, etc. including computer-readable program code stored on a computer-readable medium. The computer-readable program code may be provided to a processor or other data processing circuit of a variety of computers. The computer-readable medium may be a computer-readable signal medium or a computer-readable recording medium. The computer-readable recording medium may be any tangible medium that can store or contain a program within or in conjunction with an instruction execution system, equipment, or device.

[0161] Example embodiments may be applied to any electronic device and system. For example, example embodiments may be applied to electronic devices and systems such as memory cards, solid-state drives (SSDs), embedded multimedia cards (eMMCs), universal flash memory (UFS), mobile phones, smart phones, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, camcorders, personal computers (PCs) such as laptop computers, server computers, workstations, digital televisions (TVs), set-top boxes, portable game consoles, navigation systems, wearable devices, Internet of Things (IoT) devices, Internet of Everything (IoE) devices, e-books, virtual reality (VR) devices, augmented reality (AR) devices, server systems, and automotive driving systems.

[0162] The foregoing is an illustration of example embodiments and is not to be construed as limiting thereof. Although a few example embodiments have been described, it will be readily apparent to those skilled in the art that many modifications are possible in the example embodiments without substantially departing from the example embodiments.

Claims

1. A data processing circuit, said data processing circuit providing data for overdrive compensation of a display device, wherein: The data processing circuit includes: An encoder, wherein the encoder is configured as follows: generating an encoded bitstream by compressing an input frame including a plurality of samples forming a plurality of sample lines; determining similarities between a plurality of samples of a current sample line to be encoded and a plurality of samples of a previous sample line previously encoded before the current sample line, wherein the plurality of samples of the current sample line and the plurality of samples of the previous sample line are included in the plurality of samples; determining the plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity; excluding compressed data corresponding to the plurality of redundant samples from the coded bitstream; and appending a flag indicating a location of the plurality of redundant samples to the coded bit stream; a memory device configured to store the coded bit stream; and A decoder is configured to extract the flag from the encoded bit stream provided from the memory device and generate a reconstructed frame by decompressing the encoded bit stream based on the flag.

2. The data processing circuit according to claim 1, wherein: The encoder is configured to determine the similarity based on an absolute value of a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample.

3. The data processing circuit according to claim 1, wherein: The encoder configuration is: appending the flag having a first value to the encoded bitstream at positions where the compressed data corresponding to the plurality of redundant samples is excluded; and The flag having a second value is appended to the encoded bitstream at a position preceding compressed data corresponding to the plurality of non-redundant samples.

4. The data processing circuit according to claim 1, wherein: The encoder is configured to determine all samples of the current sample line as the plurality of redundant samples when a sum value of a plurality of absolute values with respect to the current sample line is less than or equal to a threshold value, wherein each absolute value corresponds to a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample.

5. The data processing circuit according to claim 1, wherein: The encoder configuration is: grouping the plurality of samples included in the current sample line into a plurality of sample blocks such that each sample block among the plurality of sample blocks has a fixed number of samples; and When a sum value of a plurality of absolute values with respect to each sample block, each absolute value corresponding to a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample, is less than or equal to a threshold value, all samples of each sample block are determined as the plurality of redundant samples.

6. The data processing circuit according to claim 1, wherein: The encoder is configured to determine the current sample as a redundant sample among the plurality of redundant samples when an absolute value of a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample is less than or equal to a threshold value.

7. The data processing circuit according to claim 6, wherein: The encoder configuration is: appending the flag having a first value to the encoded bitstream at positions where the compressed data corresponding to the plurality of redundant samples is excluded; and A redundant depth value is appended to the encoded bitstream at a position following the flag having the first value, wherein the redundant depth value indicates the number of consecutive redundant samples among the plurality of redundant samples.

8. The data processing circuit according to claim 1, wherein: When the flag has a first value, the decoder is configured to generate a plurality of reconstructed samples corresponding to the plurality of redundant samples of the current sample line by copying a plurality of reconstructed samples of the previous sample line, and Wherein, when the flag has a second value, the decoder is configured to generate a plurality of reconstructed samples corresponding to the plurality of non-redundant samples by decompressing compressed data following the flag having the second value.

9. The data processing circuit according to claim 1, wherein: The encoder configuration is: determining a coding selection option among a plurality of prediction options corresponding to different combinations of a plurality of neighboring samples adjacent to a current sample to be coded; and According to the encoding selection option, a prediction sample for encoding the current sample is generated based on a plurality of reconstructed samples corresponding to the plurality of neighboring samples.

10. The data processing circuit according to claim 9, wherein: The encoder is configured to determine the encoding selection option based on a previously encoded parent sample included in the current sample line and preceding the current sample, and The decoder is configured to, in the absence of receiving information about the encoding selection option from the encoder: determining a decoding selection option among the plurality of prediction options based on a reconstructed sample generated by decoding compressed data corresponding to the parent sample; and According to the decoding selection option, prediction samples for decoding compressed data corresponding to the current sample are generated based on a plurality of reconstructed samples corresponding to the plurality of neighboring samples.

11. The data processing circuit according to claim 1, wherein: The encoder is configured to omit encoding of at least one color channel among a plurality of color channels, and The decoder is configured to generate decoded data of the at least one color channel whose encoding is omitted based on decoded data of other color channels among the multiple color channels whose encoding is not omitted.

12. The data processing circuit according to claim 1, wherein: The encoder configuration is: grouping the plurality of sample lines into a plurality of slices; and Encoding is performed in parallel on the plurality of slices.

13. The data processing circuit according to claim 1, wherein: The data processing circuit further includes: A sampler configured to generate the plurality of samples by: grouping a plurality of pixels of input image data; or Each pixel of the plurality of pixels is scaled to a sample having a reduced amount of bits compared to the pixel.

14. The data processing circuit according to claim 1, wherein: The encoder comprises: a subtractor configured to generate a residual by subtracting the predicted sample from the current sample; a quantizer configured to generate a quantized value by quantizing the residual; an entropy encoder configured to generate the encoded bitstream based on the quantized value and the flag; a reconstructor configured to generate a reconstructed sample based on the quantized value and the predicted sample; a predictor configured to generate the predicted sample based on a plurality of reconstructed samples corresponding to a plurality of previously encoded samples; and A redundancy detector is configured to generate the flag based on the reconstructed sample and the current sample.

15. The data processing circuit according to claim 1, wherein: The decoder comprises: an entropy decoder configured to generate the flag and the quantization value based on the encoded bit stream; an inverse quantizer configured to generate a reconstructed residual based on the quantized value and the reconstructed sample; an adder configured to generate the reconstructed sample by summing the reconstructed residual and the predicted sample; a predictor configured to generate the predicted samples based on a plurality of previously decoded reconstructed samples; and The output circuit is configured to generate the reconstructed frame based on the reconstructed samples and the flag.

16. A display driver for a display device, wherein: The display driver includes: a sampler configured to generate an input frame by sampling input image data, the input frame including a plurality of samples forming a plurality of sample lines; An encoder, wherein the encoder is configured as follows: generating an encoded bitstream by compressing the input frame; determining similarities between a plurality of samples of a current sample line to be encoded and a plurality of samples of a previous sample line previously encoded before the current sample line, wherein the plurality of samples of the current sample line and the plurality of samples of the previous sample line are included in the plurality of samples; determining the plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity; excluding compressed data corresponding to the plurality of redundant samples from the coded bitstream; and appending a marker indicating a location of the plurality of redundant samples to the coded bit stream; a memory device configured to store the coded bit stream; a decoder configured to extract the flag from the coded bit stream provided from the memory device and generate a reconstructed frame by decompressing the coded bit stream based on the flag; a data compensation circuit configured to generate output image data by compensating the input image data based on the reconstructed frame; and The data driver is configured to provide a plurality of data signals to a plurality of pixels of the display device based on the output image data.

17. The display driver according to claim 16, wherein: The encoder is configured to determine the similarity based on an absolute value of a difference between a current sample included in the current sample line and a comparison sample included in the previous sample line and adjacent to the current sample.

18. The display driver according to claim 16, wherein: When the flag has a first value, the decoder is configured to generate a plurality of reconstructed samples corresponding to the plurality of redundant samples of the current sample line by copying a plurality of reconstructed samples of the previous sample line, and Wherein, when the flag has a second value, the decoder is configured to generate a plurality of reconstructed samples corresponding to the plurality of non-redundant samples by decompressing compressed data following the flag having the second value.

19. The display driver according to claim 16, wherein: The encoder configuration is: determining a coding selection option among a plurality of prediction options corresponding to different combinations of a plurality of neighboring samples adjacent to a current sample to be coded; and According to the encoding selection option, a prediction sample for encoding the current sample is generated based on a plurality of reconstructed samples corresponding to the plurality of neighboring samples.

20. A data processing method for providing data for overdrive compensation of a display device, wherein: The data processing method includes: generating an encoded bitstream by compressing an input frame including a plurality of samples forming a plurality of sample lines; determining similarities between a plurality of samples of a current sample line to be encoded and a plurality of samples of a previous sample line previously encoded before the current sample line, wherein the plurality of samples of the current sample line and the plurality of samples of the previous sample line are included in the plurality of samples; determining the plurality of samples of the current sample line as a plurality of redundant samples or a plurality of non-redundant samples based on the similarity; excluding compressed data corresponding to the plurality of redundant samples from the coded bitstream; appending a flag indicating a location of the plurality of redundant samples to the coded bitstream; storing the encoded bit stream in a memory device; extracting the flag from the encoded bit stream provided from the memory device; and A reconstructed frame is generated by decompressing the encoded bitstream based on the flag.

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