Programmable integrated chip for high speed communication network and control method

Abstract

The application discloses a programmable integrated chip and a control method for a high-speed communication network. The chip comprises a fiber coupler array, a plurality of electro-optical modulators, a plurality of optical switches, a plurality of cross waveguides and an array waveguide grating. The fiber coupler array comprises a plurality of first fiber couplers, a plurality of second fiber couplers and a third fiber coupler. Each output end of the first fiber couplers is connected to each input end of the plurality of electro-optical modulators in one-to-one correspondence. Each output end of the plurality of electro-optical modulators is connected to each input end of the plurality of optical switches in one-to-one correspondence. Each optical switch comprises two output ends. One output end is connected to the input end of the second fiber coupler directly or through a cross waveguide. The other output end is connected to the input end of the array waveguide grating directly or through a cross waveguide. The output end of the array waveguide grating is connected to the input end of the third fiber coupler. The chip can be applied to both a multi-wavelength transmission scene and a single-wavelength transmission scene.

Description

Programmable integrated chips and control methods for high-speed communication networks Technical Field

[0001] This invention relates to the field of optical communication, and more particularly to a programmable integrated chip and control method for high-speed communication networks. Background Technology

[0002] With the popularization of 5G, data centers, big data and cloud computing, the demand for network bandwidth is growing exponentially. Coherent optical modules, as high-speed transmission devices, are key components to meet these demands. The high-speed electro-optic modulator and AWG (Arrayed Waveguide Grating) contained in them are important infrastructure for high-speed signal transmission, wavelength multiplexing and demultiplexing.

[0003] However, an existing optical network architecture uses AWG and optical modules for connection, which can effectively achieve wavelength multiplexing and demultiplexing in multi-wavelength transmission scenarios. However, this optical network architecture becomes more complicated in short-distance data transmission with single wavelength transmission.

[0004] Another optical network architecture does not use AWG (Ambient Light Gauge). In short-distance data transmission scenarios with single-wavelength transmission, this architecture can significantly simplify system complexity, reduce costs, and improve reliability. Furthermore, in fiber optic sensing systems, it can significantly reduce noise introduction and improve the purity of the sensing signal. However, when applied to multi-wavelength transmission scenarios, it leads to significant limitations in wavelength selection, multiplexing efficiency, transmission performance, and scalability. It suffers from problems such as the inability to scale to multiple wavelengths and a lack of wavelength tuning capabilities. In other words, existing optical network architectures suffer from the limitation of single-application scenarios. Summary of the Invention

[0005] The present invention provides a programmable integrated chip and control method for high-speed communication networks, which aims to solve the problem of limited application scenarios in the existing optical network architecture.

[0006] In a first aspect, the present invention discloses a programmable integrated chip for high-speed communication networks, comprising an array of fiber couplers, a plurality of electro-optic modulators, a plurality of optical switches, a plurality of cross waveguides, and an arrayed waveguide grating; the fiber coupler array includes a plurality of first fiber couplers, a plurality of second fiber couplers, and a third fiber coupler, wherein each output terminal of the first fiber coupler is connected to each input terminal of the plurality of electro-optic modulators in a one-to-one correspondence, each output terminal of the plurality of electro-optic modulators is connected to each input terminal of the plurality of optical switches in a one-to-one correspondence, each optical switch includes two output terminals, one output terminal is connected to the input terminal of the second fiber coupler via a cross waveguide or directly, and the other output terminal is connected to the input terminal of the arrayed waveguide grating directly or via a cross waveguide, and the output terminal of the arrayed waveguide grating is connected to the input terminal of the third fiber coupler.

[0007] In some embodiments, the programmable integrated chip for high-speed communication networks is configured with an optically programmable array.

[0008] In some embodiments, the programmable integrated chip for high-speed communication networks further includes a plurality of electrical pads, and the electrodes of the optical switch are connected to the electrical pads through a metal layer.

[0009] In some embodiments, the fiber optic coupler array is a mode-to-converter array, the first fiber optic coupler is a first mode-to-converter, the second fiber optic coupler is a second mode-to-converter, and the third fiber optic coupler is a third mode-to-converter.

[0010] In some embodiments, the number of electro-optic modulators and optical switches is the same, and both are four, while the number of cross waveguides is set to two.

[0011] In some embodiments, the electro-optic modulator is a silicon-based PN junction modulator.

[0012] In some embodiments, each optical switch comprises two silicon-based thermal phase shifters, a 1*2 beam splitter, and a 2*2 beam splitter; the silicon-based thermal phase shifter includes a silicon-based waveguide layer and a titanium nitride layer, wherein the titanium nitride layer is etched on the silicon-based waveguide layer.

[0013] In some embodiments, the integrated chip further includes a photodetector for detecting photocurrent, the photodetector being connected to the fiber optic coupler array.

[0014] In some embodiments, the optical fiber coupler array, the electro-optic modulator, the optical switch, the cross waveguide, and the arrayed waveguide grating establish an optical connection channel through a silicon-based optical waveguide.

[0015] In a second aspect, the present invention discloses a control method applied to the programmable integrated chip for high-speed communication networks described in the first aspect, the control method comprising:

[0016] If a signal transmission request is received, determine the signal transmission scenario;

[0017] If the signal transmission scenario is a multi-wavelength transmission scenario, control the optical switch to make the path where the array waveguide grating is located open;

[0018] If the signal transmission scenario is a single-wavelength transmission scenario, control the optical switch to make the path where the second fiber coupler is located open.

[0019] The beneficial effects of this invention are as follows: This invention discloses a programmable integrated chip for high-speed communication networks, comprising an array of fiber optic couplers, a plurality of electro-optic modulators, a plurality of optical switches, a plurality of cross waveguides, and an arrayed waveguide grating. The fiber optic coupler array includes a plurality of first fiber optic couplers, a plurality of second fiber optic couplers, and a third fiber optic coupler. Each output terminal of the first fiber optic coupler is connected one-to-one with each input terminal of the plurality of electro-optic modulators. Each output terminal of the electro-optic modulators is connected one-to-one with each input terminal of the plurality of optical switches. Each optical switch includes two output terminals: one output terminal is connected to the input terminal of a second fiber optic coupler via a cross waveguide or directly; the other output terminal is connected directly or via a cross waveguide to the input terminal of the arrayed waveguide grating. The output terminal of the arrayed waveguide grating is connected to the input terminal of the third fiber optic coupler. Wavelength multiplexing can be achieved through the arrayed waveguide grating, making it suitable for long-distance multi-wavelength transmission scenarios; alternatively, optical signals can be output without the arrayed waveguide grating, making it suitable for short-distance single-wavelength transmission scenarios. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 is an overall structural diagram of a programmable integrated chip for high-speed communication networks provided in an embodiment of the present invention;

[0022] Figure 2 shows a simulation diagram and a measured diagram of an arrayed waveguide grating in a programmable integrated chip for high-speed communication networks provided in an embodiment of the present invention; wherein, (a) is a simulation diagram of the AWG transmission spectrum, and (b) is a measured diagram of the AWG transmission spectrum.

[0023] Figure 3 is a flowchart of the control method provided in an embodiment of the present invention;

[0024] Figure 4 is a partial structural diagram of a programmable integrated chip for high-speed communication networks provided in an embodiment of the present invention;

[0025] Figure 5 is a simulation diagram of the M12 beam splitter in the optical switch of the programmable integrated chip for high-speed communication network provided in the embodiment of the present invention under the condition of 1550 nm; wherein, (c) is the optical field simulation diagram of the M12 beam splitter under the condition of 1550 nm, (d) is the true result diagram of the symmetrical imitation of the M12 beam splitter under the condition of 1550 nm, and (e) is the true result diagram of the antisymmetric imitation of the M12 beam splitter under the condition of 1550 nm.

[0026] Figure 6 shows the simulation and measured diagrams of the insertion loss of the M12 beam splitter in the optical switch of the programmable integrated chip for high-speed communication network provided in the embodiment of the present invention; wherein, (f) is the simulation diagram of the M12 insertion loss as a function of wavelength, and (g) is the measured diagram of the M12 insertion loss.

[0027] Figure 7 shows the output optical power as a function of electrical power obtained from the power-on test of the optical switch electrode of the programmable integrated chip for high-speed communication network provided in the embodiment of the present invention.

[0028] Reference numerals: 100, Integrated chip; 10, Fiber optic coupler array; 20, Electro-optic modulator; 30, Optical switch; 31, First optical switch; 32, Second optical switch; 33, Third optical switch; 34, Fourth optical switch; 40, Cross waveguide; 41, First cross waveguide; 42, Second cross waveguide; 50, Arrayed waveguide grating; 60, Electrical pad; 70, Photodetector. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and, or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and, or collections thereof.

[0031] It should also be noted that, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," "fixing," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. When an component is referred to as being "on" or "below" another component, the component can be located "directly" or "indirectly" on the other component, or there may be one or more intermediary components. The terms "first," "second," "third," etc., are only for the convenience of describing this technical solution and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0032] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0033] It should also be further understood that the terms “and” and “or” as used in this specification and the appended claims refer to any combination of one or more of the associated listed items and all possible combinations, and include such combinations.

[0034] As shown in Figure 1, which is an overall structural diagram of a programmable integrated chip for high-speed communication networks provided in an embodiment of the present invention, the present invention discloses a programmable integrated chip 100 for high-speed communication networks, including an optical fiber coupler array 10, several electro-optic modulators 20, several optical switches 30, several cross waveguides 40, and an arrayed waveguide grating 50. The optical fiber coupler array 10 is used to couple with optical fibers to transmit optical signals to the chip. After the optical network is reconstructed within the chip, the optical signals are output; these optical signals are photonic beams.

[0035] The fiber optic coupler array 10 includes multiple first fiber optic couplers, multiple second fiber optic couplers, and a third fiber optic coupler. The first fiber optic couplers are used to couple input optical fibers to input optical signals. The second and third fiber optic couplers are used to couple output optical fibers to output optical signals, wherein the output optical fiber connected to the second fiber optic coupler outputs a single-wavelength signal, and the output optical fiber connected to the third fiber optic coupler outputs a multi-wavelength signal.

[0036] Each output terminal of the first fiber coupler is connected to each input terminal of a plurality of electro-optic modulators 20 in a corresponding manner to transmit optical signals to the electro-optic modulators 20. The electro-optic modulators 20 are high-speed modulators, which change the carrier concentration by adjusting the voltage applied to the high-speed modulator, thereby changing the effective refractive index of the material, thereby realizing high-speed optical signal modulation.

[0037] Each output terminal of a plurality of electro-optic modulators 20 is connected one-to-one with each input terminal of a plurality of optical switches 30, and each output terminal of a plurality of optical switches 30 is connected one-to-one with each input terminal of a plurality of cross waveguides 40. The optical switches 30 are used to switch optical paths. Each optical switch 30 includes two output terminals. One output terminal is connected to the input terminal of a second fiber coupler either through a cross waveguide 40 or directly. The other output terminal is connected directly or through a cross waveguide 40 to the input terminal of an arrayed waveguide grating 50. The output terminal of the arrayed waveguide grating 50 is connected to the input terminal of a third fiber coupler. The cross waveguides 40 are used to reduce optical energy loss in the cross region and signal interference between adjacent waveguides.

[0038] Since each optical switch 30 has two output terminals, one of which forms a first optical path with the device connected to it for transmitting single-wavelength signals, and since multiple electro-optic modulators 20 and multiple first optical paths of optical switches 30 are provided, multiple single-wavelength signals can be transmitted and output from multiple optical fibers. The other output terminal forms a second optical path with the device connected to it for transmitting multi-wavelength signals. The multiple wavelength signals output by the multiple optical switches 30 are wavelength multiplexed by the arrayed waveguide grating 50 and can be output from a single optical fiber, improving the utilization rate of optical fiber resources. In other embodiments, the arrayed waveguide grating 50 can also perform wavelength demultiplexing when the integrated chip 100 receives the multiplexed multi-wavelength signals. In this case, the third fiber coupler acts as the input terminal of the chip and couples the input optical fiber. Thus, the integrated chip 100 provided in this embodiment of the invention can realize high-speed modulation and reconstruction of optical signals in an optical network.

[0039] The integrated chip 100 is also equipped with an OFPGA (Optical Programmable Gate Array), which can control the optical switch 30 to switch between the first optical path and the second optical path through the control algorithm, so that the integrated chip 100 can perform different functions and be applied to different scenarios.

[0040] The programmable integrated chip 100 for high-speed communication networks provided in this embodiment of the invention, compared with the optical network architecture in the prior art which is only applicable to a single scenario, can realize wavelength multiplexing and be applied to long-distance multi-wavelength transmission scenarios to give full play to the advantages of optical fiber utilization in wavelength division multiplexing systems, and can also be applied to short-distance single-wavelength transmission scenarios.

[0041] Furthermore, compared to traditional optical network architectures where optical modules and multiplexers are separate devices, the programmable integrated chip 100 for high-speed communication networks provided in this embodiment integrates multiple devices such as fiber coupler array 10, electro-optic modulator 20, optical switch 30, and arrayed waveguide grating 50 onto a single chip, reducing the footprint and facilitating high-density deployment, especially in data centers or high-density wavelength division multiplexing systems. Moreover, the high-speed modulation integrated chip for reconfigurable optical networks provided in this embodiment uses arrayed waveguide grating 50, which, compared to traditional multiplexers, features low insertion loss, high efficiency, and low cost. Referring to Figure 2, which shows the simulation and measured diagrams of the arrayed waveguide grating (AWG) in a programmable integrated chip for high-speed communication networks provided in this embodiment of the invention, (a) is the simulation diagram of the AWG transmission spectrum, and (b) is the measured diagram of the AWG transmission spectrum. This invention designs an 8-channel AWG. Based on the compactness of the integrated chip 100, four channels are used in this specific embodiment, with a channel spacing of 400 GHz, a wavelength spacing of 3.2 nm, and an insertion loss of 4.2 dB. Actual testing showed an AWG spacing of 3.2 nm and an insertion loss of 6.1 dB, which is basically consistent with the simulation. The insertion loss result in the measured diagram is slightly larger than the simulation result, mainly because other components in the optical transmission link have certain losses.

[0042] Referring again to Figure 1, in a specific embodiment, the programmable integrated chip 100 for high-speed communication networks further includes several electrical pads 60, and the electrodes of the optical switch 30 are connected to the electrical pads 60 through a metal layer. The fiber optic coupler array 10 is a mode-to-converter array, with the first fiber optic coupler being a first mode-to-converter, the second fiber optic coupler a second mode-to-converter, and the third fiber optic coupler a third mode-to-converter. Compared to traditional grating-coupled arrays, the mode-to-converter array has lower coupling insertion loss and is easier to integrate, package, and test. SSC1 to SSC12 in Figure 1 represent multiple mode-to-converters in the mode-to-converter array.

[0043] Specifically, referring to Figure 4, the number of electro-optic modulators 20 and optical switches 30 is the same, both being four, while the number of cross waveguides 40 is set to two. The electro-optic modulators 20 include a first modulator, a third modulator, a second modulator, and a fourth modulator. The optical switches 30 include a first optical switch 31, a second optical switch 32, a third optical switch 33, and a fourth optical switch 34. The cross waveguides 40 include a first cross waveguide 41 and a second cross waveguide 42. The output terminals of the four first mode converters in the mode-to-converter array are connected one-to-one with the input terminals of the first, second, third, and fourth modulators; the output terminals of the first, second, third, and fourth modulators are connected one-to-one with the input terminals of the first, second, third, and fourth optical switches 31, 32, 33, and 34.

[0044] The first output terminal of the first optical switch 31 is directly connected to the input terminal of a second mode converter; the second output terminal of the first optical switch 31 is connected to the first input terminal of the first cross waveguide 41, the first output terminal of the first cross waveguide 41 is connected to the input terminal of the arrayed waveguide grating 50, and the output terminal of the arrayed waveguide grating 50 is connected to the input terminal of the third mode converter.

[0045] The first output terminal of the second optical switch 32 is connected to the second input terminal of the first cross waveguide 41, and the second output terminal of the first cross waveguide 41 is connected to the input terminal of a second mode converter; the second output terminal of the second optical switch 32 is directly connected to the input terminal of the arrayed waveguide grating 50.

[0046] The first output terminal of the third optical switch 33 is directly connected to the input terminal of the arrayed waveguide grating 50; the second output terminal of the third optical switch 33 is connected to the first input terminal of the second cross waveguide 42, and the first output terminal of the second cross waveguide 42 is connected to the input terminal of a second mode converter.

[0047] The first output terminal of the fourth optical switch 34 is connected to the second input terminal of the second cross waveguide 42, and the second output terminal of the second cross waveguide 42 is connected to the input terminal of the arrayed waveguide grating 50; the second output terminal of the fourth optical switch 34 is directly connected to the input terminal of a second mode converter.

[0048] Based on the connection method described in the above example, each optical switch 30 has two output terminals, and the four optical switches 30 have a total of eight output terminals, thus forming four first optical paths and four second optical paths. In this way, the arrayed waveguide grating 50 can multiplex the optical signal from the four separate optical paths (i.e., the optical signals of the second optical paths) into multiple wavelength signals using a third mode converter to cooperate with the single optical fiber output, enabling the integrated chip 100 to achieve the transmission function. Alternatively, when the third mode converter acts as a receiver, the arrayed waveguide grating 50 can also achieve wavelength demultiplexing, enabling the integrated chip 100 to have the functions of multi-wavelength signal reception and wavelength demultiplexing. When transmitting a single wavelength signal, it can be output using the four first optical paths and four optical fibers.

[0049] Because it integrates a high-speed electro-optic modulator 20, the integrated chip can realize the function of an MZI broadband modulator, and each electro-optic modulator 20 can achieve a transmission bandwidth of more than 50 GHz.

[0050] In this embodiment, the programmable integrated chip 100 for high-speed communication networks also includes a rectangular base plate. The modulus converter array, electro-optic modulator 20, optical switch 30, cross waveguide 40, arrayed waveguide grating 50, and electrical pads 60 are all integrated on the base plate. Described from a top view of the integrated chip 100: the modulus converter array is arranged close to one of the short sides of the base plate and is arrayed along the short side. From the modulus converter array toward the inside of the base plate, the arrayed waveguide grating 50, cross waveguide 40, optical switch 30, and electro-optic modulator 20 are arranged in sequence. Four electro-optic modulators 20 are arranged in an array along the short side of the base plate. The long side of each electro-optic modulator 20 is parallel to the long side of the base plate, and the short side of each electro-optic modulator 20 is parallel to the short side of the base plate. The upper and lower sides of the four electro-optic modulators 20 are flush with or substantially flush with the upper and lower sides of the mode conversion converter array. Electrical pads 60 are disposed on the upper and lower sides of the electro-optic modulators 20. The output end of the mode conversion converter array is connected to the input end of the electro-optic modulator 20 away from the mode conversion converter array through the gap between the electro-optic modulator 20 and the electrical pads 60. Four optical switches 30 and a cross waveguide 40 are disposed between the electro-optic modulators 20 and the arrayed waveguide grating 50. The programmable integrated chip 100 for high-speed communication networks provided in this embodiment can be 4 mm long and 2.9 mm wide.

[0051] In summary, the programmable integrated chip 100 for high-speed communication networks provided in this embodiment has the characteristics of small size, low cost, simple structure, high integration, easy testing, and easy packaging.

[0052] Furthermore, the programmable integrated chip 100 for high-speed communication networks also includes a photodetector 70, which is connected to an array of fiber optic couplers.

[0053] In this embodiment, the photodetector 70 is connected to the modulus converter array. The photodetector 70, which is connected to SSC1, SSC2, SSC12, and SSC13, is used to detect photocurrent to facilitate the package coupling of the integrated chip 100. During coupling, when the maximum photocurrent of the modulus converter is measured, it can be determined that the coupling loss is the lowest at this time, and the modulus converters of other channels also have the best optical coupling.

[0054] In a specific embodiment, the electro-optic modulator 20 is a silicon-based PN junction modulator designed based on the plasma dispersion effect of silicon. It changes the carrier concentration and thus the effective refractive index of the material by adjusting the voltage applied to the electro-optic modulator 20, so as to achieve high-speed optical signal modulation. Therefore, the integrated chip 100 has the advantage of high-speed modulation.

[0055] In a specific embodiment, each optical switch 30 consists of two silicon-based thermal phase shifters, a 1*2 beam splitter, and a 2*2 beam splitter. The silicon-based thermal phase shifter includes a silicon-based waveguide layer and a titanium nitride layer. The titanium nitride layer is etched on the silicon-based waveguide layer. The silicon-based thermal phase shifter changes the phase by generating heat through applying a voltage to the titanium nitride layer structure, thereby changing the effective refractive index of the material.

[0056] The 1x2 beam splitter has one input and two outputs. The input is the same as the input of the optical switch 30, and the two outputs are connected to the inputs of two silicon-based thermal phase shifters. The 2x2 beam splitter has two inputs and two outputs. The outputs of the two silicon-based thermal phase shifters are connected to the two inputs of the 2x2 beam splitter, and the two outputs of the 2x2 beam splitter serve as the first and second outputs of the optical switch 30, respectively. This forms the front-end portion of the first and second optical paths within each optical switch 30. The integrated chip 100 is equipped with an OFPGA, which allows the first and second optical paths to be switched according to different functions through a set algorithm, enabling the integrated chip 100 to perform multi-wavelength reception, transmission, and MZI broadband modulator functions.

[0057] Further, referring to Figures 5, 6, and 7, Figure 5 is a simulation diagram of the M12 beam splitter (i.e., the aforementioned 1*2 beam splitter) in the optical switch of the programmable integrated chip for high-speed communication networks provided in the embodiment of the present invention under 1550 nm conditions; wherein, (c) is the simulated optical field diagram of the M12 beam splitter under 1550 nm conditions, with energy approximately 0; (d) is the true result diagram of the symmetrical simulation of the M12 beam splitter under 1550 nm conditions, and (e) is the true result diagram of the antisymmetric simulation of the M12 beam splitter under 1550 nm conditions. From (c) and (d), it can be seen that the optical energy is concentrated at the center of the waveguide, with almost no scattering into the cladding and virtually no insertion loss; the simulated transmittance reaches 99.65%. From (d) and (e), it can be seen that the splitting ratio of the M12 beam splitter is almost 1:1.

[0058] Figure 6 shows the simulation and measured insertion loss diagrams of the M12 beam splitter in the optical switch of the programmable integrated chip for high-speed communication networks provided in the embodiments of the present invention; where (f) is the simulation diagram of M12 insertion loss as a function of wavelength, and (g) is the measured diagram of M12 insertion loss; combined with (f), it can be seen that the embodiment of the present invention optimizes the insertion loss corresponding to 1550nm to 0.03dB through the particle swarm optimization algorithm. The simulation results are close to the measured results of (g), and the actual insertion loss of M12 is 0.08dB obtained by cascade testing. The error mainly comes from the manufacturing process error.

[0059] Figure 7 shows the output optical power as a function of electrical power obtained from the power-on test of the optical switch electrode of the programmable integrated chip for high-speed communication networks provided in this embodiment of the invention; from Figure 7, it can be seen that the half-wave power of the optical switch 30 is 1.28mW. Because the optical network contains a large number of optical switches 30, the low half-wave power design means that the overall chip needs low power consumption, which is crucial for the integrated chip 100 and ensures the high integration of the integrated chip 100.

[0060] Specifically, the optical fiber coupler array 10, electro-optic modulator 20, optical switch 30, cross waveguide 40 and arrayed waveguide grating 50 establish an optical connection channel through silicon-based optical waveguides. Therefore, the integrated chip 100 has the advantage of being compatible with CMOS technology.

[0061] Specifically, the optical signals transmitted by silicon-based optical waveguides and integrated chips are in the same mode, namely TEO mode, which can reduce the transmission loss of optical signals.

[0062] As shown in Figure 3, this embodiment of the invention also provides a control method applied to the programmable integrated chip for high-speed communication networks described in the above embodiments. The control method includes:

[0063] S1. If a signal transmission request is received, determine the signal transmission scenario.

[0064] Specifically, the signal transmission request may include the start and end points of the signal transmission, the transmission distance, etc. The transmission distance can be judged to determine whether it is a long-distance transmission or a short-distance transmission based on the magnitude of the preset value. Long-distance transmission is used in multi-wavelength transmission scenarios, while short-distance transmission is used in single-wavelength transmission scenarios.

[0065] In other embodiments, the signal transmission request also directly includes transmission scenario information.

[0066] S2. If the signal transmission scenario is a multi-wavelength transmission scenario, control the optical switch to make the path where the array waveguide grating is located open.

[0067] Controlling the optical switch to make the path of the array waveguide grating open, that is, switching the optical path by controlling the optical switch, so that the optical signal is output from one output end of the optical switch, the optical signal is transmitted to the array waveguide grating, wavelength multiplexing is achieved, and then it is transmitted to the third fiber coupler, that is, the third mode converter, to cooperate with the output signal of the single fiber.

[0068] S3. If the signal transmission scenario is a single-wavelength transmission scenario, control the optical switch to make the path where the second fiber coupler is located open.

[0069] Controlling the optical switch to make the path where the second fiber coupler is located open, that is, switching the optical path by controlling the optical switch, so that the optical signal is output from the other output end of the optical switch and transmitted to the second fiber coupler, that is, the second mode converter, to cooperate with multiple optical fibers to output single-wavelength signals.

[0070] In this way, programmable integrated chips used in high-speed communication networks can dynamically adjust the optical signal output path according to the application scenario, realizing on-demand allocation and flexible management of network resources. The control method can be implemented by configuring relevant algorithms using OFPGA.

[0071] With the explosive growth in demand for chip computing power in the current era of big data, the development of integrated photonic chip technology with deep learning capabilities, high computing power, and low power consumption is becoming an important direction for advancing high-performance information communication, processing, and computing. However, almost all current photonic integrated circuits (PICs) are application-specific, and developing such application-specific PICs is costly, time-consuming, and risky.

[0072] In summary, referring to Figures 1 to 7, the programmable integrated chip for high-speed communication networks provided by this invention integrates a high-speed modulator, arrayed waveguide grating, optical switch, mode converter, and cross waveguide. By configuring an OFPGA and corresponding algorithms, the chip can switch between single-wavelength and multi-wavelength transmission, and between multi-wavelength reception and transmission functions, and also features an MZI broadband modulator. This achieves a compact, independent, and programmable high-speed communication processing solution, significantly reducing the cost of traditional fiber optic and discrete device-based module products. This enables faster wireless networks, low-cost data communication, and scalable deployment in applications such as 5G / 6G, quantum communication, and fiber optic sensing. This offers significant cost advantages, shortens development cycles, and greatly reduces development risks. It can break the global monopoly of OFPGA R&D companies, enhance my country's competitiveness in OFPGA chip self-sufficiency, and provide industrial companies, academic institutions, and research institutions with equipment for rapid verification of emerging photonic technologies.

[0073] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A programmable integrated chip for high-speed communication networks, characterized in that, The device includes an array of fiber optic couplers, several electro-optic modulators, several optical switches, several cross waveguides, and an arrayed waveguide grating. The fiber optic coupler array includes multiple first fiber optic couplers, multiple second fiber optic couplers, and a third fiber optic coupler. Each output terminal of the first fiber optic coupler is connected to a corresponding input terminal of each of the several electro-optic modulators. Each output terminal of the several electro-optic modulators is connected to a corresponding input terminal of each of the several optical switches. Each optical switch includes two output terminals. One output terminal is connected to the input terminal of the second fiber optic coupler via a cross waveguide or directly. The other output terminal is connected to the input terminal of the arrayed waveguide grating directly or via a cross waveguide. The output terminal of the arrayed waveguide grating is connected to the input terminal of the third fiber optic coupler.

2. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The programmable integrated chip for high-speed communication networks is configured with an optically programmable array.

3. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, It also includes several electrical pads, and the electrodes of the optical switch are connected to the electrical pads through a metal layer.

4. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The fiber optic coupler array is a mode-to-converter array, the first fiber optic coupler is a first mode-to-converter, the second fiber optic coupler is a second mode-to-converter, and the third fiber optic coupler is a third mode-to-converter.

5. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The number of electro-optic modulators and optical switches is the same, and there are four of each. The number of cross waveguides is set to two.

6. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The electro-optic modulator is a silicon-based PN junction modulator.

7. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, Each optical switch consists of two silicon-based thermal phase shifters, a 1*2 beam splitter, and a 2*2 beam splitter; the silicon-based thermal phase shifter includes a silicon-based waveguide layer and a titanium nitride layer, wherein the titanium nitride layer is etched on the silicon-based waveguide layer.

8. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The integrated chip also includes a photodetector for detecting photocurrent, the photodetector being connected to the fiber optic coupler array.

9. The programmable integrated chip for high-speed communication networks according to claim 1, characterized in that, The optical fiber coupler array, the electro-optic modulator, the optical switch, the cross waveguide, and the arrayed waveguide grating establish an optical connection channel through a silicon-based optical waveguide.

10. A control method applied to a programmable integrated chip for a high-speed communication network as described in any one of claims 1 to 9, characterized in that, The control method includes: if a signal transmission request is received, determining the signal transmission scenario; if the signal transmission scenario is a multi-wavelength transmission scenario, controlling the optical switch to make the path where the array waveguide grating is located open; if the signal transmission scenario is a single-wavelength transmission scenario, controlling the optical switch to make the path where the second fiber coupler is located open.

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