Optical computing architecture

Abstract

The invention relates to the technical field of photon computing, in particular to an optical computing architecture which comprises a plurality of photon processors, a light source module and a high-speed data transceiving module connected with a multi-core data distributor and a multi-core data synthesizer. And the multi-core data distributor and the multi-core data synthesizer are connected with all the photon processors through a bus structure. Each photon processor converts an initial optical signal of the light source module into a wavelength multiplexing optical signal through a first optical demultiplexer, an optical beam splitter and an electro-optical modulation unit of the data loading module, the optical calculation module performs parallel optical calculation, and the data receiving module converts an optical signal output by the data receiving module into an electric signal and outputs a processed electric signal. Therefore, the optical computing architecture disclosed by the invention can realize core-level data multiplexing and matrix parallel operation through the synergistic effect of the multi-core distributor and the multi-core data synthesizer on the basis of realizing matrix multiplexing by multi-wavelength multiplexing, so that the throughput and the computing efficiency of optical computing are improved.

Description

Technical Field

[0001] The present application relates to the field of photonic computing technology, and in particular to an optical computing architecture. Background Art

[0002] Optical computing architecture refers to a system architecture that uses photons as information carriers to perform computing tasks. It primarily uses optical components to perform parallel computing operations such as matrix operations and convolution in the optical domain. Compared to traditional electronic computing, optical computing architecture leverages the physical properties of light, such as wavelength division multiplexing, low-latency propagation, and high parallelism, to achieve high-speed, low-power computing capabilities.

[0003] However, traditional optical computing architectures usually input different wavelengths into different waveguides through demultiplexers, resulting in a single chip being able to perform only a single matrix operation and unable to achieve multi-wavelength parallel computing, which greatly limits throughput and computing efficiency.

[0004] Therefore, there is an urgent need for an optical computing architecture to improve the throughput and computing efficiency of optical computing. Summary of the Invention

[0005] The present invention provides an optical computing architecture for improving the throughput and computing efficiency of optical computing.

[0006] In a first aspect, the present application provides an optical computing architecture.

[0007] The architecture includes multiple photon processors, a light source module, a high-speed data transceiver module, a multi-core data distributor, and a multi-core data synthesizer. The high-speed data transceiver module is connected to the multi-core data distributor and the multi-core data synthesizer. The multi-core data distributor and the multi-core data synthesizer are connected to all photon processors via a bus structure. Each photon processor includes a data loading module, an optical computing module, and a data receiving module.

[0008] The data loading module is configured to decompose the initial optical signal generated by the light source module into multiple wavelength channels through a first optical demultiplexer to obtain multiple first optical signals; perform energy equalization on each of the first optical signals through an optical beam splitter to obtain multiple second optical signals; and load the parallel electrical signals of the high-speed data transceiver module onto the second optical signals of the corresponding wavelength channels through an electro-optical modulation unit to generate wavelength-multiplexed optical signals;

[0009] The optical computing module is configured to perform parallel optical computing on the wavelength-multiplexed optical signal based on a preset optical computing strategy and output a corresponding optical signal;

[0010] The data receiving module is configured to convert the optical signal output by the optical computing module into an electrical signal and output a corresponding processed electrical signal;

[0011] The multi-core data distributor is used to synchronously load the same data to each photon processor when the target address range covers all photon processors, so as to realize multi-core data multiplexing.

[0012] Optionally, the data receiving module further includes a second optical demultiplexer, an optical detection unit and a transimpedance amplifier.

[0013] The second optical demultiplexer is configured to separate the optical signal output by the optical computing module into independent wavelength signals of a plurality of independent wavelength channels;

[0014] The optical detection unit is used to perform photoelectric conversion on each independent wavelength signal to obtain a corresponding current signal;

[0015] The transimpedance amplifier is used to perform linear conversion on each current signal to obtain the electrical signal.

[0016] Optionally, the light source module further includes a continuous wave laser, a frequency comb generation unit and an optical amplifier.

[0017] The light source module is further configured to generate a single-wavelength laser through the continuous-wave laser, and convert the single-wavelength laser into a flat frequency comb signal through the frequency comb generation unit;

[0018] The flat frequency comb signal is power-enhanced by the optical amplifier, and the enhanced flat frequency comb signal is transmitted to each data loading module.

[0019] Optionally, the optical computing architecture further includes a high-speed data processing module for receiving processed electrical signals from each data receiving module, integrating each processed electrical signal into a new signal to be processed, and transmitting the new signal to the high-speed data transceiver module.

[0020] Optionally, the high-speed data transceiver module is further used to:

[0021] The signals to be processed of the high-speed data processing module are deserialized, and the obtained multiple parallel signals are transmitted to the data loading modules of each core through the multi-core data distributor.

[0022] Optionally, the high-speed data processing module is further used to:

[0023] Based on a preset feedback compensation strategy, feedback compensation is performed on each processed electrical signal to generate a feedback signal;

[0024] Signal integration is performed based on the feedback signal and the signal to be processed to obtain a new signal to be processed.

[0025] Optionally, the data loading module is further used to update the weight parameters of the electro-optical modulation unit based on the new signal to be processed; the weight parameters include the splitting ratio and the phase parameter.

[0026] Optionally, the multiple photonic processors include a master processor and at least one slave processor, and the master processor and the at least one slave processor form a distributed network.

[0027] The beneficial effects of the present invention are as follows:

[0028] The embodiment of the present application provides an optical computing architecture, which includes multiple photon processors, light source modules, high-speed data transceiver modules, multi-core data distributors, and multi-core data synthesizers. Among them, the high-speed data transceiver module is connected to the multi-core data distributor and the multi-core data synthesizer, and the multi-core data distributor and the multi-core data synthesizer are connected to all photon processors through a bus structure. The data loading module in each photon processor decomposes the initial optical signal generated by the light source module into multiple independent wavelength channels through the first optical demultiplexer, and the first optical signal on each wavelength channel is evenly divided in energy through the optical beam splitter to achieve equal distribution of optical power. Then, through the electro-optical modulation unit, the multiple parallel electrical signals of the high-speed data transceiver module are loaded into the optical signals of the corresponding independent wavelength channels, and the combined beam is used as a wavelength-multiplexed optical signal. The optical computing module performs parallel optical computing on the wavelength-multiplexed optical signal through a preset optical computing strategy, outputs the corresponding optical signal, and then the data receiving module converts the optical signal output by the optical computing module into an electrical signal, and outputs the corresponding processed electrical signal. In this way, this application combines optical wavelength-level parallel computing, and on the basis of performing independent matrix operations on a single-core and multiple wavelengths, realizes multi-core data multiplexing and flexible parallel matrix operations through a multi-core data distributor and a multi-core data synthesizer, thereby breaking through the single-core computing power limitations, data transmission redundancy and multi-core collaborative efficiency bottlenecks, and improving the throughput and computing efficiency of optical computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0030] Figure 1 A schematic diagram of the structure of an optical computing architecture provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of a multi-core optical computing process provided in an embodiment of the present application;

[0032] Figure 3A schematic structural diagram of a light source module provided in an embodiment of the present application;

[0033] Figure 4 A schematic diagram of the structure of a data loading module provided in an embodiment of the present application;

[0034] Figure 5 A schematic structural diagram of a data receiving module provided in an embodiment of the present application;

[0035] Figure 6 A schematic diagram of the structure of a single-core photonic processor provided in an embodiment of the present application;

[0036] Figure 7 A calculation diagram of a Mach-Zehnder interferometer network provided in an embodiment of the present application;

[0037] Figure 8 A schematic diagram of multi-wavelength calculation of a microring resonator provided in an embodiment of the present application;

[0038] Figure 9 A schematic diagram of nonlinear calculation of a microring resonator provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. Unless there is a conflict, the embodiments in the present application and the features in the embodiments can be combined with each other in any way. In addition, although a logical order is shown in the flowchart, in some cases, the steps shown or described can be performed in an order different from that here.

[0040] The terms "first" and "second" in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the term "comprising" and any of its variations are intended to cover non-exclusive protection. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices. "Multiple" in this application can mean at least two, for example, two, three or more, and the embodiments of this application are not limited thereto.

[0041] The term "and / or" in the embodiments of this application is simply a description of the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the following three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this document generally indicates that the related objects are in an "or" relationship.

[0042] The following is a brief introduction to the design concept of the embodiments of this application.

[0043] Optical computing architecture refers to a system architecture that uses photons as information carriers to perform computing tasks. It primarily uses optical components to perform parallel computing operations such as matrix operations and convolution in the optical domain. Compared to traditional electronic computing, optical computing architecture leverages the physical properties of light, such as wavelength division multiplexing, low-latency propagation, and high parallelism, to achieve high-speed, low-power computing capabilities.

[0044] However, traditional optical computing architectures typically use demultiplexers to input different wavelengths into separate waveguides. This results in a single chip being limited to performing a single matrix operation and unable to achieve multi-wavelength parallel computing, significantly limiting throughput and computational efficiency. Furthermore, traditional technologies rely heavily on serial optical waveguide splitting and matrix splicing, which can easily lead to increased optical signal crosstalk and loss. Furthermore, they can only utilize a limited number of wavelength channels, and the light source power cannot support ultra-large-scale computing. Existing technologies typically use a single chip with a limited number of electrical ports, which restricts the scale of matrix operations.

[0045] In view of the above problems, an embodiment of the present application provides an optical computing architecture, which includes multiple photonic processors, light source modules and high-speed data transceiver modules. Each photonic processor includes a data loading module, and the data loading module can decompose the initial optical signal generated by the light source module into multiple independent wavelength channels through a first optical demultiplexer, physically isolate each wavelength, reduce the signal crosstalk of the traditional single-wavelength waveguide, and establish an independent modulation path for each wavelength, laying the foundation for subsequent multi-wavelength parallel optical computing. The first optical signal on each wavelength channel is energy-equalized by an optical beam splitter to achieve equal distribution of optical power, ensuring that the second optical signal intensity of each wavelength channel is consistent, so as to block the cumulative error of traditional cascade splitting from the source and avoid distortion caused by uneven power in subsequent modulation. Then, through the electro-optical modulation unit, the multiple parallel electrical signals of the high-speed data transceiver module are loaded into the optical signal of the corresponding independent wavelength channel to combine into a single wavelength multiplexed optical signal, that is, a wavelength multiplexed optical signal. In this way, the optical computing architecture of this application enables each wavelength channel to independently carry parallel electrical signals, allowing multiple matrix operations to be performed simultaneously within a single chip, breaking through the limitations of traditional single-wavelength serial computing and improving the throughput and computational efficiency of optical computing. Furthermore, this application loads multiple parallel electrical signals onto independent wavelength channels and then multiplexes them into a single optical signal, expanding a single physical input port into multiple logical input ports. This supports thousands of parallel signal processing channels and overcomes the port count bottleneck of traditional architectures.

[0046] Furthermore, the data loading module in the embodiment of the present application separates the wavelengths through a first optical demultiplexer, independently modulates them through an electro-optical modulation unit, and then combines them through an optical multiplexer. This can reduce crosstalk within the same waveguide, allowing each input port to carry multi-wavelength information, enabling parallel optical computing and significantly improving computing power without changing the chip design. Furthermore, through the aforementioned parallel computing structure, the present application can simultaneously complete multiple vector-matrix multiplication tasks on a single computing chip, achieving matrix multiplexing computing with different data but the same matrix, significantly improving computing power density.

[0047] Furthermore, the optical computing architecture of the present application also configures an independent light source module and an independent optical amplifier for each photonic processor, thereby compensating for the splitting loss locally and avoiding cascade power attenuation.

[0048] Furthermore, the optical computing architecture of this application provides a dynamically controlled feedback mechanism. By deserializing thousands of electrical signal inputs through a high-speed data transceiver module and dynamically compensating for uneven optical splitting with a high-speed data processing module, this creates a closed-loop negative feedback mechanism. This optimizes the parameters of the optical modulation unit in real time, compensates for weak signal paths, improves the signal-to-noise ratio, and addresses issues such as insufficient optical signal power and optical splitting errors. Furthermore, it enables time-series superposition operations, expanding the optical computing architecture's time-series computing capabilities and adapting to nonlinear tasks such as deep learning.

[0049] Furthermore, in the embodiment of the present application, the multiple photon processors include a main processor and at least one slave processor, and a distributed network is formed between the multiple photon processors. Among them, each photon processor is not spatially spliced, but acts as an independent computing core, independently undertaking computing tasks, and each computing core can receive the calculation results of other computing cores as input to achieve continuous computing. In addition, each photon processor is provided with an independent electrical port, which is easy to integrate while greatly increasing the number of electrical ports. By connecting multiple photon processors using a multi-core data distributor 500 and a multi-core data integrator 501, computing tasks can be dispersed to the optical computing units of each photon processor, and the results can be integrated through electrical signals to break through the limit on the number of single-core ports. In this way, the present application uses a distributed network architecture to make each optical computing core independent and interconnected, and can achieve different computing matrices but reuse of input data, greatly improving the flexibility of optical computing.

[0050] Below, the system architecture provided by the exemplary embodiments of the present application is described with reference to the accompanying drawings. Figure 1 FIG. 1 is a schematic diagram of a structure of an optical computing architecture provided in an embodiment of the present application, the system comprising:

[0051] Multiple photonic processors 001, including a master processor (OPU1) and slave processors (OPU2~OPU m ).

[0052] The light source module 400 is used to generate an initial optical signal and transmit it to the data loading module of each photonic processor to provide a multi-wavelength light source and ensure optical power consistency.

[0053] The high-speed data transceiver module 002 is connected to the multi-core data distributor 500, and is used to receive electrical signals to be processed or processed electrical signals, and deserialize the serial electrical signals into thousands of parallel signals, so as to input the same or different electrical signals into the multi-core data distributor 500 for transmission to the data loading module 100 of each OPU core, adapting to large-scale matrix operation requirements and solving the bottleneck of electrical ports.

[0054] The multi-core data distributor 500 connects the data inputs of each photon processor via a bus, and obtains the data of the corresponding photon processor by reading the bus target address range, thereby realizing the distribution of different cores and different computing tasks.

[0055] The multi-core data integrator 501 connects the data outputs of each photon processor through a bus, and sorts the output data on the bus in a specific time sequence, completing real-time parallel computing and real-time multi-core data splicing data integration processing, and performs high-speed data reception and transmission and processing through the high-speed data reception and transmission module 002 and the high-speed data processing module 003 to realize multi-core photon processing.

[0056] The high-speed data processing module 003 is used to receive the output electrical signals of each data receiving module 300 and integrate them into new signals to be processed, so that the high-speed data transceiver module 002 can perform subsequent processing according to the new signals to be processed to achieve closed-loop control.

[0057] In one possible implementation, when the target address range of the multi-core data distributor 500 in the embodiment of the present application covers all photonic processors, multiple photonic processors can synchronously load the same data, realizing one-time data transmission and data multiplexing for synchronous reception by multiple cores.

[0058] Specifically, the multi-core data distributor 500 controls the data flow through the target address range, thereby supporting multiple modes of distributed computing and data reuse computing. For example, by specifying a single processor through the target address, independent tasks can be assigned, and when the target address covers all processors, the same data can be loaded synchronously to achieve functions such as weight matrix reuse. In this way, the multi-core data distributor 500 in the embodiment of the present application can realize intelligent task allocation through address decoding and reduce redundant data transmission. Specifically, refer to Figure 2 The figure shows a flow chart of a multi-core optical computing provided by an embodiment of the present application. After the multi-core data distributor 500 receives the target address and target data, it first determines whether to reuse the task flow. If it is reused and the target address covers multiple cores, the shared data mode is executed. At this time, after the optical computing core reads the target address, all photonic processors are selected to synchronously load the multiplexed data. If it is not reused and different target addresses correspond to different data, the distributed processing mode is executed. At this time, the optical computing core selects different processors in the order of addresses to load difference data. After the task is distributed, each photonic processor obtains a balanced light source through the optical power divider 700, performs multi-wavelength parallel modulation through the data loading module 100, and the optical computing module 200 completes the parallel multi-core optical computing based on the target data, generating independent outputs of calculation results 1 to calculation results n. Next, the multi-core data synthesizer 501 sorts and splices the calculation results through the timing bus, and finally outputs the parallel multi-core optical calculation results. The entire process realizes multi-core communication through the high-speed data transceiver module 002 and closed-loop feedback through the high-speed data processing module 003, forming a complete distributed multi-core multi-wavelength computing system.

[0059] In a possible implementation, the optical computing architecture in the embodiment of the present application further includes an optical power equalizer 700 for equalizing the energy of the initial optical signal generated by the light source module and transmitting the obtained multi-path optical signals to each photonic processor respectively.

[0060] Specifically, such as Figure 1As shown, the optical power equalizer 700 is located between the light source module 400 and each photon processor, and distributes the multi-wavelength light source equally to each photon processor 001, thereby ensuring the consistency of the input optical power of each computing core from the source.

[0061] In one possible implementation, a master processor connects to multiple slave processors to form a distributed network. Each OPU forms the core unit of the distributed optical computing architecture, independently completing local optical computing tasks. Furthermore, each photonic processor includes a data loading module, an optical computing module, and a data receiving module, enabling parallel optical information processing (e.g., loading multiple wavelength data signals onto the same waveguide) and a single OPU, as well as parallel matrix operations on different data within the same matrix.

[0062] Specifically, in this application, each photon processor 001 is not spatially spliced, but acts as an independent computing core, independently undertaking computing tasks. Each computing core can receive the calculation results of other computing cores as input to achieve continuous computing. In addition, each photon processor can be provided with an independent electrical port, which is easy to integrate while greatly increasing the number of electrical ports. By connecting multiple photon processors using a multi-core data distributor 500 and a multi-core data integrator 501, computing tasks can be distributed to the optical computing units of each photon processor, and the results can be integrated through electrical signals to break through the limit on the number of single-core ports. In this way, this application uses a distributed network architecture to make each optical computing core independent and interconnected, and can achieve different computing matrices but reuse of input data, greatly improving the flexibility of optical computing.

[0063] In one possible embodiment, the optical beam splitter of the master OPU core (OPU1) in the present application can be connected to each slave OPU core (OPU2-OPU m ) to form a distributed computing network. In addition, the high-speed data transceiver modules of each OPU core can be connected through the multi-core data distributor 500 and the multi-core data synthesizer 501 to achieve electrical signal coordination and load balancing.

[0064] In one possible implementation, reference Figure 3 The figure shows a structural diagram of a light source module provided in an embodiment of the present application. In the embodiment of the present application, the light source module 400 may include a continuous wave (CW) laser 401, a frequency comb generation unit 402 and an optical amplifier 403.

[0065] Specifically, the light source module 400 can generate a single-wavelength laser through a continuous-wave laser 401 in response to an external laser drive signal, and convert the single-wavelength laser into a multi-wavelength flat frequency comb signal through a frequency comb generation unit 402 to provide a multi-wavelength light source. Subsequently, the optical amplifier 403 performs power amplification on the flat frequency comb signal to obtain a processed initial optical signal, which is then input into the data loading module and passed through the optical beam splitter 104 therein to obtain multiple optical signals (I1, I2, ..., I n ). In this way, the present application can configure an independent light source module 400 for each OPU core, and compensate for the optical power loss locally through the optical amplifier 403 to avoid power shortage caused by cascade loss.

[0066] In one possible implementation, Figure 1 As shown, each photonic processor OPU in this application may include:

[0067] (1) The data loading module 100 is used to generate a wavelength-multiplexed optical signal based on the initial optical signal of the light source module 400 and the parallel electrical signal deserialized by the high-speed data transceiver module 002, and transmit it to the optical computing module 200.

[0068] (2) The optical computing module 200 is used to perform parallel optical computing based on a preset optical computing strategy and output the calculated optical signal to the data receiving module 300.

[0069] (3) The data receiving module 300 is used to convert the optical signal output by the optical computing module into an electrical signal, that is, to output the electrical signal.

[0070] In one possible implementation, the data loading module in the embodiment of the present application may include a first optical demultiplexer, an optical beam splitter, an electro-optical modulation unit, and an optical multiplexer. The data loading module may decompose the initial optical signal input by the light source module into multiple wavelength channels via the first optical demultiplexer, thereby obtaining first optical signals on multiple wavelength channels. The optical beam splitter may then perform energy equalization processing on each of the first optical signals to obtain multiple equalized second optical signals. The electro-optical modulation unit may then load the parallel electrical signals of the high-speed data transceiver module onto the second optical signals of the corresponding wavelength channels, thereby generating a wavelength-multiplexed optical signal.

[0071] Specifically, refer to Figure 4 1 is a schematic structural diagram of a data loading module provided in an embodiment of the present application. The data loading module 100 may include a first optical demultiplexer 101 , an optical beam splitter 104 , an electro-optical modulation unit 102 and an optical multiplexer 103 .

[0072] Specifically, the data loading module can decompose the initial optical signal input from the light source module 400 into multiple wavelength channels (such as Figure 4 λ1, λ2...λ shown n-1 ,λ n ), obtain the first optical signals on multiple wavelength channels. And the energy of each first optical signal is evenly distributed through the optical beam splitter 104 to obtain multiple second optical signals after the energy is evenly divided. The second optical signal of each wavelength channel is respectively connected to the corresponding electro-optical modulation unit 102, and the multi-channel electrical signal deserialized by the high-speed data transceiver module 002 is loaded onto the second optical signal of the corresponding wavelength channel through intensity modulation. In this way, the modulated initial optical signal is re-combined into a single optical fiber or optical waveguide through the optical multiplexer 103 to form a wavelength-multiplexed optical signal, and output to the optical computing module 200 for subsequent processing. In this way, the present application adopts a multi-wavelength independent modulation architecture (λ1, λ2...λ n-1 ,λ n ), the wavelength channels are separated by the first optical demultiplexer 101 and transmitted in the same waveguide, thereby ensuring the balance of optical power of each wavelength and reducing long-distance signal crosstalk.

[0073] In one possible implementation, reference Figure 5 FIG2 is a schematic diagram of a data receiving module provided in an embodiment of the present application. The data receiving module 300 may include a second optical demultiplexer 301 , an optical detection unit 304 and a transimpedance amplifier 302 .

[0074] Specifically, the data receiving module 300 can separate the optical signal output by the optical computing module into independent wavelength signals on multiple independent wavelength channels (such as Figure 5 The λ1...λ shown n ), the optical detection unit 304 performs photoelectric conversion on each independent wavelength signal to obtain a corresponding current signal. Then, the transimpedance amplifier 302 performs linear conversion on each current signal and outputs a corresponding electrical signal, i.e., a processed electrical signal.

[0075] In one possible implementation, reference Figure 6The figure shows a structural schematic diagram of a photonic processor OPU provided by an embodiment of the present application, wherein the initial optical signal generated by the light source module 400 is input into the single-core photonic processor and enters the data loading module 100 therein. The first optical demultiplexer 101 decomposes the signal into multiple independent wavelength channels, and then the optical power of each channel is evenly distributed through the optical beam splitter. Finally, the high-speed parallel electrical signal is loaded to the corresponding wavelength through the electro-optical modulation unit to generate a wavelength-multiplexed optical signal. The wavelength-multiplexed optical signal is transmitted to the optical computing module 200 for multi-wavelength parallel matrix operation, and the operation result is transmitted to the data receiving module 300, which separates the wavelengths through the photoelectric detector and converts the optical signal into an electrical signal for output. The final result is output as processed data after the second optical demultiplexer 301 completes the electrical signal integration. In this way, the single-core OPU completes closed-loop processing and realizes multi-wavelength parallel computing and optoelectronic collaborative processing within a single chip. In one possible implementation, the optical computing module is composed of an optical computing chip and can support a variety of mainstream photonic computing architectures. The optical computing module can realize linear or nonlinear operations on optical signals through a preset optical computing strategy combined with an optical waveguide structure. After completing optical computing tasks such as matrix multiplication and convolution, it outputs the optical signal to the data receiving module for subsequent processing.

[0076] Specifically, the optional optical computing strategies of the optical computing module in this application include but are not limited to: micro-ring resonator scheme and Mach-Zehnder Interferometer (MZI) scheme (for example, triangle, rectangle, parallelogram computing network), etc.

[0077] Specifically, such as Figure 7 The figure shows a computational schematic diagram of a Mach-Zehnder interferometer (MZI) network provided by an embodiment of the present application. This MZI network can be used to implement discrete parallel computation of multi-wavelength signals. The target matrix is ​​decomposed to obtain MZI network weights. Voltages are then applied to the MZI network through an iterative or direct loading method to complete the matrix configuration. Multi-wavelength signals are then input into the MZI network, where parallel computation is performed simultaneously due to interference effects during propagation. Signal detection and parallel information reading are then completed at the output port.

[0078] Specifically, such as Figure 8The figure shows a multi-wavelength calculation schematic diagram of a microring resonator provided by an embodiment of the present application, which can be used to implement multi-wavelength aliasing calculation. Multi-wavelength signals are input into the microring array via a lateral waveguide. Different microrings are adjusted to different resonance points, allowing different wavelength signals such as λ1, λ2, and λ3 to enter the vertical waveguide in different proportions. Different wavelengths are coupled by microrings in the same column but different rows according to preset weights. For example, a1 a2 a3, b1b2b3, and c1c2c3 represent the aliasing weights of different wavelength signals of λ1, λ2, and λ3 in the output channels of the first, second, or third columns, respectively. This allows for arbitrary aliasing control of different wavelengths. The aliased multi-wavelength signals are output via the vertical waveguide, completing signal detection and parallel information reading.

[0079] Specifically, such as Figure 9 The figure shows a schematic diagram of nonlinear calculation of a microring resonator provided by an embodiment of the present application, which uses a microring to realize optoelectronic collaborative nonlinear calculation. The sampling and control module extracts the light intensity information of each wavelength signal in real time from the input multi-wavelength optical signals such as λ1, λ2, and λ3, and converts it into a control signal and feeds it back to the bias control unit of the microring resonator to dynamically adjust its resonance point. By utilizing the nonlinearity of the microring resonance, the output light intensity changes nonlinearly under different input light intensities, and the different input light intensities are output to two output ports after control: nonlinear output 1 and nonlinear output 2, thereby realizing wavelength-adaptive nonlinear transformation at the dual ports synchronously, breaking through the functional limitations of single-channel output, and providing dynamically adjustable optical computing hardware support for deep learning.

[0080] In one possible implementation, to address the issue of inconsistent signal strength across channels caused by uneven optical splitting or transmission loss, the high-speed data processing module 003 in this embodiment can use a preset feedback compensation strategy to provide feedback compensation to the output signals of each OPU core, generating a feedback signal. The module then integrates the feedback signal with the signal to be processed to generate a new signal to be processed. The data loading module then updates the weight parameters of the electro-optical modulation unit based on the new signal to be processed, thereby forming a closed-loop control loop to balance the signal strength across channels.

[0081] Specific, combined Figure 1 As shown, the optical detection unit in the data receiving module 300 detects the optical signal intensity at each wavelength, and the transimpedance amplifier outputs the corresponding multi-channel electrical signals. The high-speed data processing module 003 compares the electrical signal intensities of each channel to identify weak signal paths (for example, where the intensity of λ1 is lower than that of λ2). The high-speed data processing module generates a voltage-driven feedback signal 600 for the weak path. This feedback signal 600 is input to the electro-optical modulation unit 102 of the data loading module, which fine-tunes the splitting ratio of the weak path (for example, by increasing the modulation voltage of λ2). This increases the optical intensity of the weak signal path, causing the data receiving module to output an electrical signal of uniform intensity, i.e., the processed electrical signal. This balances the power of each wavelength and eliminates static error accumulation.

[0082] Specifically, in this application, the feedback signal is processed by the high-speed data module according to the calculation program, rearranged according to the input signal timing and format, superimposed with the signal to be processed, and input into the high-speed data transceiver module. The high-speed data processing module distributes it to each OPU. The data loading module of each OPU drives the electro-optical modulation unit based on the new signal to be processed, dynamically adjusting weight parameters such as the splitting ratio and phase to update the weight of the optical calculation unit.

[0083] In one possible implementation, for training tasks requiring real-time updates, the present application embodiment employs an optical detection unit that outputs an electrical signal corresponding to the calculation result, and a high-speed data processing module that converts the electrical signal into a calculation result vector. An external computing unit provides a target result (e.g., label data). The high-speed data processing module compares the target with the calculation result to generate a loss vector. Based on the loss vector, the module calculates the weight update value using an iterative algorithm (e.g., gradient descent). The high-speed data processing module decomposes the weight update value into a splitting ratio or phase parameter and transmits it via a feedback signal to a high-speed data transceiver module. The module deserializes the received serial electrical signal into thousands of parallel signals, driving the electro-optical modulation unit to adjust the weight parameters of the optical computing module in real time.

[0084] Specifically, in the present application, an external computing unit generates a target matrix, and a high-speed data processing module generates an electrical drive signal based on the weight parameters such as the splitting ratio and phase offset of the target matrix to adjust the splitting ratio and phase of the electro-optical modulation unit in real time. The external computing unit may include, but is not limited to, a graphics processing unit (GPU), a central processing unit (CPU), etc., which are used to provide initial data or intermediate data for the optical computing architecture of the present application. After receiving the multi-wavelength optical signals from each OPU core, the high-speed data processing module can compensate for the signal path with lower intensity based on the feedback compensation strategy for signal strength consistency, that is, adjust the splitting ratio through the feedback signal to achieve balanced signal intensity on each path. Furthermore, in this process, the multi-core data distributor 500 and the multi-core data synthesizer 501 can be used to support real-time updates of the weight parameters of the optical computing module between multiple cores, support dynamic weight synchronization updates, and adapt to nonlinear computing tasks (e.g., deep learning dynamic weights).

[0085] In one possible embodiment, combining Figure 1As shown, based on the optical computing architecture of the embodiment of the present application, after the electrical signal to be processed is pre-processed by the high-speed data processing module 003, it will be input into the high-speed data transceiver module 002 for signal deserialization. The branched electrical signal is transmitted to the data loading module 100 of each photon processor through the multi-core data distributor 500 to realize electro-optical conversion. After the optical signal generated by the light source module 400 is evenly split, it is demultiplexed into a multi-wavelength optical signal by the first demultiplexer in the data loading module 100, and then the electrical signal is loaded to each wavelength through the intensity modulation of the electro-optical modulation unit to obtain a wavelength-multiplexed optical signal. The optical computing module 200 performs parallel operations on the wavelength-multiplexed optical signal, and the calculation result is transmitted to the data receiving module 300 in the form of an optical signal. The optical signal is converted into an electrical signal by the optical detector unit therein, and is collected as a digital signal by the analog-to-digital converter therein. In this way, the calculated digital data enters the high-speed data processing module 003 through the multi-core data synthesizer 501 and the high-speed data transceiver module 002 to complete data collection and storage. For data that requires cyclic calculation, the embodiment of the present application can combine the processed feedback signal 600 with the signal to be processed to form a new signal to be processed after calculation by the high-speed digital-analog processing module and the external computing unit, and readjust the overall weight in the multi-core photonic processor architecture.

[0086] In one possible implementation, an operating process of the optical computing mechanism of an embodiment of the present application may be as follows: the electrical signal to be processed may first be input into a high-speed data transceiver module to complete serial-to-parallel conversion, and the parallel electrical signal generated by deserialization may be distributed to the data loading module of each OPU through a multi-channel interface. The data loading module adopts a layered optical-to-electrical signal conversion design.

[0087] The light source module adopts a distributed design to ensure multi-core scalability, in which a continuous wave laser is used to generate the initial optical signal, and the optical frequency comb is used to generate a single expanded multi-wavelength light source, and the optical amplifier is used to compensate for the splitting loss to ensure the consistency of the optical power of each OPU core. Then, the continuous optical signal generated by the light source module can be evenly distributed to multiple OPUs through an optical beam splitter. In each OPU core, the optical signal is separated into preset wavelengths by the first optical demultiplexer and connected to an independent electro-optical modulation unit. The electrical signal to be processed is deserialized into thousands of parallel signals by the high-speed data transceiver module, which drives the electro-optical modulation unit to load the electrical signal to the corresponding wavelength. The modulated multi-wavelength optical signal is combined into a single-channel multiplexed signal by the optical multiplexer and input into the optical computing module through a low-loss optical waveguide.

[0088] The optical computing module builds a parallel computing network using optical computing solutions such as microring resonators or Mach-Zehnder interferometers. The combined wavelength-multiplexed optical signals perform matrix multiplication or convolution operations in an optical waveguide, leveraging the physical isolation of different wavelengths to reduce signal crosstalk. The calculation results obtained by the optical computing module are output as optical signals to the data receiving module, eliminating the need for optoelectronic conversion and significantly reducing latency.

[0089] The data receiving module adopts the coordinated architecture of optical domain demultiplexing and electrical domain amplification. The input optical signal is separated into independent wavelengths (λ1-λ n ), each wavelength corresponds to a light detection unit that completes the photoelectric conversion, and the generated microcurrent signal is converted into a high signal-to-noise ratio electrical signal through a transimpedance amplifier array, and finally integrated into a complete calculation result by the high-speed data processing module. In the above process, the high-speed data transceiver module and the high-speed data processing module can be coordinated between multiple OPU cores through the multi-core data distributor 500 and the multi-core data synthesizer 501. In addition, the splitting ratio and phase parameters of the electro-optical modulation unit are adjusted in real time through the feedback signal generated by the high-speed digital-to-analog processing module and the external computing unit to achieve dynamic weight update and adapt to the requirements of nonlinear tasks such as deep learning.

[0090] For ease of description, the above sections are divided into unit modules (or modules) according to their functions and described separately. Of course, when implementing this application, the functions of each unit (or module) can be implemented in the same or multiple software or hardware. Those skilled in the art will understand that various aspects of this application can be implemented as systems, methods, or program products. Therefore, various aspects of this application can be specifically implemented in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation that combines hardware and software aspects, which can be collectively referred to as "circuit", "module" or "system" here.

[0091] It should be noted that although several units or subunits of the device are mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, depending on the embodiment of the application, the features and functions of two or more units described above can be embodied in a single unit. Conversely, the features and functions of a single unit described above can be further divided and embodied by multiple units.

[0092] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0093] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. An optical computing architecture, characterized in that: The architecture includes multiple photon processors, a light source module, a high-speed data transceiver module, a multi-core data distributor, and a multi-core data synthesizer. The high-speed data transceiver module is connected to the multi-core data distributor and the multi-core data synthesizer. The multi-core data distributor and the multi-core data synthesizer are connected to all photon processors via a bus structure. Each photon processor includes a data loading module, an optical computing module, and a data receiving module. The data loading module is configured to decompose the initial optical signal generated by the light source module into multiple wavelength channels through a first optical demultiplexer to obtain multiple first optical signals; and to equally split the energy of each of the first optical signals through an optical beam splitter to obtain multiple second optical signals; By means of an electro-optical modulation unit, the parallel electrical signal of the high-speed data transceiver module is added to the second optical signal of the corresponding wavelength channel to generate a wavelength multiplexed optical signal; The optical computing module is configured to perform parallel optical computing on the wavelength-multiplexed optical signal based on a preset optical computing strategy and output a corresponding optical signal; The data receiving module is configured to convert the optical signal output by the optical computing module into an electrical signal and output a corresponding processed electrical signal; The multi-core data distributor is used to synchronously load the same data to each photon processor when the target address range covers all photon processors, so as to realize multi-core data multiplexing.

2. The architecture according to claim 1, wherein: The data receiving module further includes a second optical demultiplexer, an optical detection unit and a transimpedance amplifier. The second optical demultiplexer is configured to separate the optical signal output by the optical computing module into independent wavelength signals of a plurality of independent wavelength channels; The optical detection unit is used to perform photoelectric conversion on each independent wavelength signal to obtain a corresponding current signal; The transimpedance amplifier is used to perform linear conversion on each current signal to obtain the electrical signal.

3. The architecture of claim 1, wherein: The light source module also includes a continuous wave laser, a frequency comb generation unit and an optical amplifier. The light source module is further configured to generate a single-wavelength laser through the continuous-wave laser, and convert the single-wavelength laser into a flat frequency comb signal through the frequency comb generation unit; The flat frequency comb signal is power-enhanced by the optical amplifier, and the enhanced flat frequency comb signal is transmitted to each data loading module.

4. The architecture of claim 1, wherein: The optical computing architecture further includes a high-speed data processing module for receiving processed electrical signals from each data receiving module, integrating each processed electrical signal into a new signal to be processed, and transmitting the new signal to the high-speed data transceiver module.

5. The architecture of claim 4, wherein: The high-speed data transceiver module is further used for: The signals to be processed of the high-speed data processing module are deserialized, and the obtained multiple parallel signals are transmitted to the data loading modules of each core through the multi-core data distributor.

6. The architecture of claim 4, wherein: The high-speed data processing module is further used for: Based on a preset feedback compensation strategy, feedback compensation is performed on each processed electrical signal to generate a feedback signal; Signal integration is performed based on the feedback signal and the signal to be processed to obtain a new signal to be processed.

7. The architecture of claim 6, wherein: The data loading module is further configured to update the weight parameters of the electro-optical modulation unit based on the new signal to be processed; the weight parameters include a splitting ratio and a phase parameter.

8. The architecture of claim 1, wherein: The plurality of photonic processors include a master processor and at least one slave processor, wherein the master processor and the at least one slave processor form a distributed network.

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