An address mapping method for a multi-host system and a multi-host system
By dividing shared and private storage spaces in a multi-host system and utilizing a combination of page pointers and read/write addresses, the problem of inflexible address mapping in existing technologies is solved, enabling flexible and independent data sharing between hosts, simplifying the read/write process, and reducing latency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 成都星拓微电子科技股份有限公司
- Filing Date
- 2025-05-23
- Publication Date
- 2026-06-23
AI Technical Summary
The existing address mapping method of multi-host systems is inflexible, resulting in complex data reading and writing between hosts and high latency.
In a multi-host system, shared storage space and private storage space are divided, and the direct address or shared storage space of read and write instructions is determined by combining page pointers and read/write addresses, thus achieving flexible address mapping.
This enables data to be both independent and shared between hosts, simplifying the data read and write process and reducing latency.
Smart Images
Figure CN120541005B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of storage technology, and more specifically, to an address mapping method for a multi-host system and a multi-host system. Background Technology
[0002] Address mapping refers to the process of translating logical addresses used in a program's address space into physical addresses that are directly addressed by the machine at runtime; this process is also known as address relocation. The main purpose of address mapping is to establish a correspondence between virtual and physical addresses, ensuring that the CPU (Central Processing Unit) can correctly access memory locations.
[0003] In operating systems, address mapping is widely used in memory management. For example, in paged memory management, logical addresses need to be translated into physical addresses through page tables before they can be directly accessed by the CPU. In practice, address mapping relationships can be determined during programming or compile time, or it can be accomplished through static or dynamic address mapping.
[0004] In integrated circuit design systems, some systems have multiple hosts, but the number of registers is limited. Therefore, there are generally fixed methods for mapping addresses in the system.
[0005] Currently, the conventional address mapping method generally involves dividing the storage space into multiple parts, with the number of storage spaces equal to the number of hosts, and the storage spaces being independent of each other. This allows each host to have its own storage space, and each host can read and write to its storage space through the corresponding logical address.
[0006] However, this address mapping method is not flexible. The data stored on each host is independent of each other, which makes data reading and writing between hosts relatively complex and results in high read and write latency.
[0007] In summary, existing technologies suffer from inflexible address mapping methods for multi-host systems. Summary of the Invention
[0008] The purpose of this application is to provide an address mapping method for a multi-host system and a multi-host system, so as to solve the problem of inflexibility of address mapping methods for multi-host systems in the prior art.
[0009] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows:
[0010] On one hand, embodiments of this application provide an address mapping method for a multi-host system, applied to a multi-host system including registers and at least two hosts. The registers include shared storage space and at least two private storage spaces. The shared storage space is stored in pages, and each host corresponds to one private storage space. The method includes:
[0011] When any host issues a read / write instruction, it is determined whether the read / write address in the read / write instruction is a direct address; wherein, the read / write instruction includes a read / write address and a page pointer;
[0012] If so, then read and write the corresponding private storage space according to the direct address;
[0013] If not, then a real address is generated based on the low-order address of the read / write address and the page pointer, and the shared storage space is read and written based on the real address.
[0014] Optionally, each of the private storage spaces includes a first storage space and a second storage space, wherein the first storage space cannot be read or written by other hosts, and the second storage space can be read or written by other hosts; after the step of determining whether the read / write address is a direct address, the method further includes:
[0015] When it is determined that the read / write address is a direct address, it is determined whether the page pointer is a preset value;
[0016] If so, then read and write to the corresponding host's second storage space according to the page pointer;
[0017] If not, then read or write to its own first or second storage space.
[0018] Optionally, the step of reading and writing to the corresponding host's second storage space based on the page pointer includes:
[0019] When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key;
[0020] The steps for reading and writing to one's own first or second storage space include:
[0021] When performing a write operation on its own second storage space, the write operation is performed according to the second key; the first key is different from the second key.
[0022] Optionally, the step of reading and writing to the corresponding host's second storage space based on the page pointer includes:
[0023] When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key;
[0024] The steps for reading and writing to one's own first or second storage space include:
[0025] When performing a write operation on its own second storage space, the write operation is executed directly.
[0026] Optionally, the step of reading and writing to the corresponding host's second storage space based on the page pointer includes:
[0027] The second storage space of the corresponding host is read and written according to the lower-order address of the read / write address.
[0028] Optionally, the steps for any host to issue a read / write address include:
[0029] Any host issues a read / write address based on a preset mapping table; wherein the mapping table includes at least the following user characteristics:
[0030] Address code, name, shared / non-shared, member, member bit width, reset value, attributes, and description.
[0031] Optionally, the step of determining whether the read / write address in the read / write instruction is a direct address includes:
[0032] The value of the read / write address is compared with a preset address value to determine whether the read / write address is a direct address.
[0033] Optionally, when the read / write address is an 8-bit address, the step of determining whether the read / write address in the read / write instruction is a direct address includes:
[0034] When the value of the 8-bit address is between 0 and 127, the read / write address is determined to be a direct address;
[0035] When the value of the 8-bit address is between 128 and 255, the read / write address is determined to be a non-direct address.
[0036] Optionally, when the read / write address is an address greater than 8 bits, the step of determining whether the read / write address in the read / write instruction is a direct address includes:
[0037] When the value of the read / write address is between 0 and 127, the read / write address is determined to be a direct address;
[0038] When the value of the read / write address is greater than 127, the read / write address is determined to be a non-direct address.
[0039] On the other hand, embodiments of this application also provide a multi-host system for executing the above-described address mapping method.
[0040] Compared with the prior art, this application has the following advantages:
[0041] This application provides an address mapping method for a multi-host system. The multi-host system includes registers and at least two hosts. The registers include shared memory and at least two private memory spaces. The shared memory is stored in pages, and each host corresponds to one private memory space. When any host issues a read / write instruction, it determines whether the read / write address in the instruction is a direct address. The read / write instruction includes the read / write address and a page pointer. If so, the corresponding private memory space is read / written based on the direct address. If not, a real address is generated based on the lower-order bits of the read / write address and the page pointer, and the shared memory space is read / written based on the real address. Because this application divides the shared and private memory spaces in the registers and uses page pointers to read and write between them, it ensures that data between each host can be both independent and shared, and achieves uniformity in logical addresses, making address mapping more flexible.
[0042] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0043] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0044] Figure 1 This is a schematic diagram of the modules of a multi-host system provided in an embodiment of this application.
[0045] Figure 2 An exemplary flowchart of an address mapping method for a multi-host system provided in an embodiment of this application.
[0046] Figure 3 A schematic diagram of the shared storage space module provided in the embodiments of this application.
[0047] Figure 4 An exemplary flowchart of the sub-step S104 provided in the embodiments of this application.
[0048] Figure 5 This is another schematic diagram of a multi-host system provided in an embodiment of this application. Detailed Implementation
[0049] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0050] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0051] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0052] It should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0053] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0054] As described in the background section, the address mapping method in the prior art is not flexible, and the data stored between each host is independent of each other, which makes data reading and writing between hosts relatively complicated and has high read and write latency.
[0055] In view of this, to solve the above problems, this application provides an address mapping method for a multi-host system. Please refer to... Figure 1 The multi-host system includes registers and at least two hosts. The registers include shared storage space and at least two private storage spaces. The shared storage space is stored in pages, and each host corresponds to one private storage space. Specifically, in this application, the registers are divided into N+1 storage spaces, where N represents the number of hosts. These N+1 storage spaces include N private storage spaces and 1 shared storage space. The private storage spaces are for independent reading and writing by each host, while the shared storage space is for reading and writing by all hosts.
[0056] For example, when there are two hosts, M0 and M1, the registers are divided into two private memory spaces and one shared memory space. Typically, M0 reads and writes to one of the private memory spaces, and M1 reads and writes to the other. Both M0 and M1 can also read and write to the shared memory space. Similarly, when there are three hosts, the registers are divided into three private memory spaces and one shared memory space, which will not be elaborated further here.
[0057] Understandably, the multi-host system provided in this application can offer a unified yet proprietary register interface, providing dedicated storage space for different hosts, each with its own configurable features. Simultaneously, it provides shared storage space for all hosts, enabling data sharing.
[0058] Based on the architecture of the multi-host system described above, please refer to Figure 2 The address mapping method for multi-host systems provided in this application includes:
[0059] S102, when any host issues a read / write instruction, determine whether the read / write address in the read / write instruction is a direct address; wherein, the read / write instruction includes the read / write address and the page pointer; if yes, then execute S104; if no, then execute S106.
[0060] S104, read and write the corresponding private storage space based on the direct address;
[0061] S106 generates a real address based on the low-order address of the read / write address and the page pointer, and performs read / write operations on the shared memory space based on the real address.
[0062] In this application, for read / write instructions sent by the host, the read / write instruction includes a read / write address and a page pointer. The criterion for determining whether the host is reading from or writing to shared or private storage space is whether the read / write address is a direct address. That is, each host sends a read / write instruction as {read / write address, page pointer}. For example, if the host sends a read / write instruction as {11111111, page5}, then 11111111 represents an 8-bit read / write address, and page5 indicates that the page pointer points to page 5.
[0063] In one implementation, determining whether a host is reading from or writing to shared or private storage space can be based on the value of the read / write address. For example, the read / write address value can be compared with a preset address value to determine whether the read / write address issued by the host is a direct address.
[0064] The read / write address value in this application is a decimal value, and the default address value in this application is also a decimal value. For example, when the address is an 8-bit address, it can represent a value between 0 and 255 in decimal. Therefore, when determining whether the read / write address in the read / write instruction is a direct address, it can be:
[0065] When the value of an 8-bit address is between 0 and 127, the read / write address is determined to be a direct address.
[0066] When the value of the 8-bit address is between 128 and 255, the read / write address is determined to be a non-direct address. In this application, a non-direct address can also be defined as a page address. When the address sent by the host is determined to be a direct address, the corresponding private storage space is read and written; when the address sent by the host is a page address, the shared storage space is read and written.
[0067] For example, when the 8-bit address is 00000000, which is represented as 0 in decimal, the read / write command issued by the host is determined to be for reading and writing to the private storage space. When the 8-bit address is 11111111, which is represented as 255 in decimal, the read / write command issued by the host is determined to be for reading and writing to the shared storage space.
[0068] Of course, the preset address value can also be set to other values. For example, it can be set so that when the 8-bit address value is between 0 and 191, the read / write address is determined to be a direct address. This is not limited here. Furthermore, the determination between the direct address and the page address can be reversed. For example, when the 8-bit address value is between 0 and 127, the read / write address is determined to be a page address; when the 8-bit address value is between 128 and 255, the read / write address is determined to be a direct address. This is also not limited here.
[0069] Furthermore, the host's read / write address can also be a value greater than 8 bits; for example, the host's read / write address can be a 16-bit address. In this case, the read / write address can be converted to a value between 0 and 65535. Based on this, as one implementation method, when determining whether the read / write address in the read / write instruction is a direct address, it can be done as follows:
[0070] When the value of the read / write address is between 0 and 127, the read / write address is determined to be a direct address.
[0071] When the value of the read / write address is greater than 127, the read / write address is determined to be a non-direct address (page address).
[0072] In another implementation, when determining whether the read / write address in the read / write instruction is a direct address, it can be:
[0073] When the value of the read / write address is between 0 and 32767, the read / write address is determined to be a direct address.
[0074] When the value of the read / write address is greater than 32767, the read / write address is determined to be a non-direct address (page address).
[0075] After determining whether the read / write address is a direct address, if it is, then read and write operations are performed on the corresponding private storage space. If the read / write address is a page address, then read and write operations are performed on the shared storage space. For example, Figure 3 As shown, since the shared memory space is stored in pages, in order to determine the specific read / write location, it is necessary to generate the actual address based on the low-order bits of the read / write address and the page pointer. In the diagram, 1# represents the first page, 2# represents the second page, and so on.
[0076] In this application, the actual address can be represented as {page_ptr, addr[6:0]}, where page_ptr represents the page pointer, and addr[6:0] represents the low-order address in the read / write address. It should be noted that the low-order address in the read / write address mentioned in this application refers to the last few bits of the read / write address. For example, if the read / write address is an 8-bit address, specifically 10101010, then the low-order address is the last 7 bits, i.e., 0101010. Therefore, by combining the page pointer and the low-order address of the read / write address, the specific read / write location in the shared memory space can be determined.
[0077] For example, if a shared memory space is divided into 32 pages, and the host sends a read / write instruction of {11000001, page5}, then since the value of the read / write address is greater than 127, it indicates that the host is performing a read / write operation on the shared memory space. Based on this, the actual address can be generated using the lower-order bits of the read / write address and the page pointer. The actual address can be represented as {page5, 1000001}, meaning the host is reading from or writing to the fifth page of the shared memory space, at address 1000001.
[0078] Furthermore, as one implementation method, each private storage space includes a first storage space and a second storage space. The first storage space cannot be read or written by other hosts, while the second storage space can be read and written by other hosts. That is, the private storage space can also be divided into two parts, where the first storage space can only be read and written by itself, while the second storage space can be read and written by other hosts. For example, the first storage space can store the host's core parameters, while the second storage space can store operating parameters.
[0079] It should be noted that the division between the first and second storage spaces can also be implemented based on the values of the read and write addresses. For example, combining the above, when the value of the 8-bit address is between 0 and 127, the read and write address is determined to be the direct address. Furthermore, when the value of the 8-bit address is between 0 and 30, it indicates that the first storage space is being read from or written to; when the value of the 8-bit address is between 31 and 127, it indicates that the second storage space is being read from or written to.
[0080] Based on this, please refer to Figure 4 Step S104 includes:
[0081] S1041, determine whether the page pointer is the preset value. If yes, execute S1042; otherwise, execute S1043.
[0082] S1042, reads and writes to the corresponding host's second storage space based on the page pointer.
[0083] S1043, reads and writes to its own first or second storage space.
[0084] In this application, the page pointer can perform two functions. One function is to determine which page of the shared storage space is being read or written when the host reads or writes to the shared storage space. The other function is to determine which host's private storage space is being read or written when the host reads or writes to the private storage space.
[0085] For example, when there are two hosts, the default value is set to the second page. Based on this, if the read / write address is determined to be a direct address and the page pointer is the second page, then the second storage space of the other host is read / written. When the page pointer is any other value, it means that the second storage space of the host itself is read / written. For example, when the page pointer is the first page or the fifth page, it means that the second storage space of the host itself is read / written.
[0086] For easier understanding, please refer to Figure 5 This application uses two hosts, with the read / write address issued by the hosts being an 8-bit address, as an example to illustrate the concept:
[0087] The two hosts are M0 and M1. Their registers are divided into two private storage spaces, D1 and D2, and a shared storage space S. Private storage space D1 corresponds to host M0, and private storage space D2 corresponds to host M1. Private storage space D1 includes a first storage space D11 and a second storage space D12. The first storage space D11 can only be read and written by host M0, not by host M1; the second storage space D12 can be read and written by both host M0 and host M1. Similarly, private storage space D2 includes a first storage space D21 and a second storage space D22. The first storage space D21 can only be read and written by host M1, not by host M0; the second storage space D22 can be read and written by both host M1 and host M0.
[0088] When host M0 issues a read / write instruction of {11111111, page5}, it means that host M0 is reading and writing to the shared memory space S. Specifically, based on the direct address {page5, 1111111}, it reads and writes to the fifth page of the shared memory space S, at the address 1111111.
[0089] When host M0 issues a read / write command of {00000000, page0}, it means that host M0 is reading and writing the first storage space D11 in its private storage space D1; when host M0 issues a read / write command of {01100000, page0}, it means that host M0 is reading and writing the second storage space D12 in its private storage space D1.
[0090] When host M0 issues a read / write command of {01100000, page2}, it means that host M0 is reading and writing to the second storage space D22 in the private storage space D2.
[0091] Similarly, when host M1 issues the same read / write command, its read / write logic is consistent. It should be noted that in this application, when both host M0 and host M1 issue the read / write command {01100000, page0}, although the commands are the same, the specific read / write locations are different. Therefore, in the entire multi-host system, the read / write logic among the hosts is consistent, and their storage spaces can be independent yet mutually accessible, achieving data sharing. During the actual read / write process, even if the hosts send the same read / write command, read / write operations at different locations can be performed. The address mapping method of the entire system is more flexible, data read / write is simpler, and since all hosts are based on the same set of read / write logic, read / write latency can be shortened.
[0092] When there are more hosts, such as 3 or 4 hosts, the preset values for page pointers can be set to multiple values. In one implementation, each host corresponds to one page pointer. For example, if the system includes hosts M0, M1, and M2, the preset value of the page pointer for host M0 is the first page, the preset value of the page pointer for host M1 is the second page, and the preset value of the page pointer for host M2 is the third page. When host M0 issues a read / write command of {01100000, page1}, it reads and writes to the second storage space of its own private storage space; when host M0 issues a read / write command of {01100000, page2}, it reads and writes to the second storage space of the private storage space corresponding to host M1; and when host M0 issues a read / write command of {01100000, page3}, it reads and writes to the second storage space of the private storage space of host M2.
[0093] In another implementation, all hosts are arranged in sequence and execute the preset values of the page pointers in order. For example, hosts M0, M1, and M2 are arranged in sequence. For host M0, when host M0 issues a read / write instruction of {01100000, page1}, it reads and writes to the second storage space of the private storage space corresponding to host M1; when host M0 issues a read / write instruction of {01100000, page2}, it reads and writes to the second storage space of the private storage space corresponding to host M2; when host M0 issues a read / write instruction of {01100000, pageX}, it reads and writes to the second storage space of its own private storage space, where X is a number other than 1 and 2. Similarly, for host M1, when host M1 issues a read / write instruction of {01100000, page1}, it reads and writes to the second storage space of the private storage space corresponding to host M0; when host M1 issues a read / write instruction of {01100000, page2}, it reads and writes to the second storage space of the private storage space corresponding to host M2; when host M1 issues a read / write instruction of {01100000, pageX}, it reads and writes to the second storage space of its own private storage space, where X is a number other than 1 and 2, and so on.
[0094] Of course, since the register is divided into multiple storage spaces, the mapping table provided in this application also changes accordingly when the host performs read and write operations. When any host issues a read or write address based on the preset mapping table, the mapping table includes at least the following user characteristics:
[0095] Address code, name, shared / non-shared, member, member bit width, reset value, attributes, and description.
[0096] Compared to existing technologies, the mapping table provided in this application includes "shared / non-shared" user characteristics, thus enabling rapid reading and writing of private or shared storage spaces during the read / write process. Furthermore, the standardized register form format allows designers to fill out the form as needed, and subsequent verification and software engineers all use this form as an interface and carrier, simplifying the actual operation process.
[0097] In addition, to protect data in different spaces from being arbitrarily rewritten, a corresponding key is required when the host performs a read operation.
[0098] As the first implementation method, the steps for reading and writing to the corresponding host's second storage space based on the page pointer include:
[0099] When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key.
[0100] The steps for reading and writing to one's own first or second storage space include:
[0101] When performing a write operation on its own second storage space, the write operation is performed according to the second key; the first key is different from the second key.
[0102] That is, for each second storage space, when a write operation is performed by its corresponding host, the host needs to provide a first key; when a write operation is performed by another host, the other host needs to provide a second key that is different from the first key. This is to ensure that different keys are required for different hosts to perform write operations, thereby increasing the difficulty of writing to the storage space and ensuring that the storage space is not arbitrarily modified.
[0103] For example, when performing a write operation on the second storage space D12 of the private storage space D1 corresponding to host M0, host M1 needs to issue the first key 0x69, while host M0 needs to issue the second key 0x96. Of course, if a read operation is performed, there is no effect.
[0104] Furthermore, when the host performs read operations on the first and second storage spaces in its private storage space, it also needs to provide different keys. The complexity of the key for writing to the first storage space is greater than the complexity of the key for writing to the second storage space, in order to protect the first storage space.
[0105] For example, when host M0 performs a write operation on its corresponding private storage space D1, if it performs a write operation on the second storage space, it needs to issue the second key 0x96; if it performs a write operation on the first storage space, it needs to issue the third key 0x9966.
[0106] If host M0 and host M1 perform read operations on the shared storage space, the keys provided by host M0 and host M1 are the same, for example, both are 0x6699.
[0107] As another implementation, the steps for reading and writing to the corresponding host's second storage space based on the page pointer include:
[0108] When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key.
[0109] The steps for reading and writing to one's own first or second storage space include:
[0110] When performing a write operation on its own second storage space, the write operation is executed directly.
[0111] In this implementation, a host does not need to provide a key when writing to its own second storage space; a key is only required when writing to the second storage space of other hosts. Of course, for write operations to shared storage spaces, the host may also not need to provide a key.
[0112] In summary, this application provides an address mapping method for a multi-host system. The multi-host system includes registers and at least two hosts. The registers include shared memory and at least two private memory spaces. The shared memory is stored in pages, and each host corresponds to one private memory space. When any host issues a read / write instruction, it determines whether the read / write address in the instruction is a direct address. The read / write instruction includes a read / write address and a page pointer. If so, the corresponding private memory space is read / written based on the direct address. If not, a real address is generated based on the lower-order bits of the read / write address and the page pointer, and the shared memory space is read / written based on the real address. Because this application divides the shared and private memory spaces in the registers and uses page pointers to read and write between them, it ensures that data between each host can be both independent and shared, while maintaining logical address consistency, making address mapping more flexible.
[0113] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
[0114] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this application. No reference numerals in the claims should be construed as limiting the scope of the claims.
Claims
1. An address mapping method for a multi-host system, characterized in that, The method is applied to a multi-host system, wherein the multi-host system includes registers and at least two hosts, the registers include shared storage space and at least two private storage spaces, the shared storage space is stored in pages, and each host corresponds to one private storage space; the method includes: When any host issues a read / write instruction, it is determined whether the read / write address in the read / write instruction is a direct address; wherein, the read / write instruction includes a read / write address and a page pointer; If so, then read and write the corresponding private storage space according to the direct address; If not, then the real address is generated based on the low-order address of the read / write address and the page pointer, and the shared storage space is read and written based on the real address; Each of the aforementioned private storage spaces includes a first storage space and a second storage space. The first storage space cannot be read or written by other hosts, while the second storage space can be read and written by other hosts. After determining whether the read / write address is a direct address, the method further includes: When it is determined that the read / write address is a direct address, it is determined whether the page pointer is a preset value; If so, then read and write to the corresponding host's second storage space according to the page pointer; If not, then read or write to its own first or second storage space.
2. The address mapping method for a multi-host system as described in claim 1, characterized in that, The steps for reading and writing to the corresponding host's second storage space based on the page pointer include: When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key; The steps for reading and writing to one's own first or second storage space include: When performing a write operation on its own second storage space, the write operation is performed according to the second key; the first key is different from the second key.
3. The address mapping method for a multi-host system as described in claim 1, characterized in that, The steps for reading and writing to the corresponding host's second storage space based on the page pointer include: When a write operation is performed on the second storage space of the corresponding host, the write operation is performed according to the first key; The steps for reading and writing to one's own first or second storage space include: When performing a write operation on its own second storage space, the write operation is executed directly.
4. The address mapping method for a multi-host system as described in claim 1, characterized in that, The steps for reading and writing to the corresponding host's second storage space based on the page pointer include: The second storage space of the corresponding host is read and written according to the lower-order address of the read / write address.
5. The address mapping method for a multi-host system as described in claim 1, characterized in that, The steps for any host to issue a read / write address include: Any host issues a read / write address based on a preset mapping table; wherein the mapping table includes at least the following user characteristics: Address code, name, shared / non-shared, member, member bit width, reset value, attributes, and description.
6. The address mapping method for a multi-host system as described in claim 1, characterized in that, The steps for determining whether the read / write address in the read / write instruction is a direct address include: The value of the read / write address is compared with a preset address value to determine whether the read / write address is a direct address.
7. The address mapping method for a multi-host system as described in claim 6, characterized in that, When the read / write address is an 8-bit address, the steps for determining whether the read / write address in the read / write instruction is a direct address include: When the value of the 8-bit address is between 0 and 127, the read / write address is determined to be a direct address; When the value of the 8-bit address is between 128 and 255, the read / write address is determined to be a non-direct address.
8. The address mapping method for a multi-host system as described in claim 6, characterized in that, When the read / write address is an address greater than 8 bits, the steps for determining whether the read / write address in the read / write instruction is a direct address include: When the value of the read / write address is between 0 and 127, the read / write address is determined to be a direct address; When the value of the read / write address is greater than 127, the read / write address is determined to be a non-direct address.
9. A multi-host system, characterized in that, The multi-host system is used to execute the address mapping method of the multi-host system as described in any one of claims 1 to 8.