Multi-machine collaborative circuit design optimization method and system based on software and hardware separation
Through the multi-machine collaborative circuit design optimization system separated by software and hardware, the dynamic interaction and protective communication between the decision-making machine and the actuator are used to solve the problem that electronic design automation software is susceptible to piracy, and efficient and safe circuit design and data protection are achieved.
Patent Information
- Application Number
- CN202510689368.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-27
- Publication Date
- 2025-08-29
AI Technical Summary
Existing electronic design automation software is susceptible to piracy threats, and traditional protection methods are insufficient in dynamic confrontation, which cannot effectively prevent monitoring and intercepting and tampering with data, resulting in economic losses and technical risks of enterprises.
The multi-machine collaborative circuit design optimization system based on software and hardware separation is adopted. Through the dynamic interaction between the decision-making machine and the execution machine, the physical isolation architecture and protective communication protocol are used to ensure the security of the software entity in the decision-making machine, and high-precision and intelligent closed-loop design iteration is achieved.
It significantly improves circuit design efficiency and software security, shortens the manual parameter adjustment cycle, improves data security, and blocks the tampering and illegal calls of core algorithms by attack methods.
Smart Images
Figure CN120562356A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the fields of computer technology and software protection, and in particular to a multi-machine collaborative circuit design optimization system and method based on software and hardware separation, belonging to the field of circuit design optimization technology. Background Art
[0002] With the rapid advancement of semiconductor technology, electronic design automation (EDA) software has become a core tool in the integrated circuit (IC) design field, covering the entire process from schematic design and simulation verification to physical layout. EDA technology significantly improves design efficiency and accuracy through algorithm optimization and intelligent features. However, with the increasing complexity and market demand for EDA software, piracy has become an increasingly prominent issue, becoming a key challenge hindering innovation and secure development in the industry. EDA software is primarily distributed through illegal cracking, key leaks, or low-cost resale on second-hand platforms. This behavior not only results in significant financial losses for companies but also poses serious technical risks due to a lack of official support, threatening user data security and product quality. To combat the threat of piracy, companies often implement multiple technical protection measures, including strengthening key management systems, optimizing underlying encryption architectures, and integrating real-time usage data analysis to increase the difficulty of software cracking. Despite this, traditional protection methods remain insufficient in dynamic countermeasures. These anti-piracy measures are unable to address attacks through surveillance, interception, and data tampering. There is an urgent need for more proactive security systems through technological innovation. Summary of the Invention
[0003] In view of this, the present application provides a multi-machine collaborative circuit design optimization system and method based on software and hardware separation to solve or alleviate the technical problems existing in the prior art and at least provide a beneficial option.
[0004] The technical solution of the embodiment of the present application is implemented as follows: a multi-machine collaborative circuit design optimization system based on software and hardware separation is provided, including: an execution machine, configured with hardware resources, used to enable a decision machine through preset instructions, and perform circuit simulation calculations, obtain simulation data and send it to the decision machine; the decision machine is arranged with a software entity that is physically isolated, calls the hardware resources of the execution machine through a protective communication protocol, and receives the simulation data transmitted by the execution machine, so as to analyze the simulation data through the software entity and feed back design variable correction instructions to the execution machine.
[0005] Further preferably, the decision machine includes a double physical isolation structure, and the chassis of the decision machine is physically isolated by at least a first physical lock and a second seal; the decision machine only uses an optical fiber interface as a communication channel with the execution machine.
[0006] Further preferably, the protective communication protocol includes: encrypting preset instructions with a dynamically generated session key; an instruction whitelist mechanism that only allows preset instructions to pass verification; and a two-way authentication process that verifies the legitimacy of the execution machine and the decision machine.
[0007] Further preferably, the execution machine is provided with a client interface, and the execution machine is configured to obtain a preset standardized instruction set by loading the client interface, and send an activation request to the decision machine through the protective communication protocol.
[0008] Further preferred: the software entity includes at least an artificial intelligence large model and an agent model, and the decision machine is configured to: receive the activation request, perform key verification based on the activation request, and enter a standby state when the verification is passed; otherwise, trigger an abnormal fuse mechanism, and when the number of verification failures is greater than a preset number, block the communication channel.
[0009] Further preferably, the execution machine is further configured to: after the decision machine enters the standby state, load the initial circuit design scheme and configure the simulation environment, and perform circuit simulation calculations based on the initial circuit design scheme to obtain simulation data and send it to the decision machine.
[0010] Further preferably, the decision machine is further configured to: receive the simulation data, perform normalization processing and feature analysis on the simulation data using the software entity, and generate an adaptability adjustment strategy after executing multi-objective optimization based on the software entity, so as to obtain design variable correction instructions according to the adaptability adjustment strategy and send them to the execution machine.
[0011] Further preferably, the execution machine is further configured to: receive the design variable correction instruction, and perform decryption and compliance verification through an independent security module; after passing the compliance verification, automatically modify the circuit parameters according to the design variable correction instruction, and restart the simulation verification.
[0012] Further preferably, the decision machine is further configured to: receive the simulation calculation results after modifying the circuit parameters, and judge whether the optimization termination conditions are met based on the simulation calculation results. If so, output the current optimal circuit design scheme and deviation report; otherwise, continue to perform design optimization.
[0013] Based on the same concept, the present application also provides a multi-machine collaborative circuit design optimization method based on the separation of software and hardware, including: the execution machine enables the decision machine through preset instructions, and performs circuit simulation calculations, obtains simulation data and sends it to the decision machine; the decision machine calls the hardware resources of the execution machine through a protective communication protocol, and receives the simulation data transmitted by the execution machine, so as to analyze the simulation data based on the software entity and feedback the design variable correction instructions to the execution machine.
[0014] The embodiment of the present application adopts the above technical solution, which has the following advantages:
[0015] The present invention is based on a multi-machine collaborative architecture with software and hardware separation. Through the dynamic interaction mechanism between the decision-making machine and the execution machine, it realizes high-precision, intelligent closed-loop design iteration, which can significantly shorten the manual parameter adjustment cycle and convergence efficiency in circuit design optimization. The use of a physical isolation architecture and a double-layer protection mechanism of instructions can effectively block attack methods. The software entity is protected in the decision-making machine, ensuring that the core algorithm is not tampered with or illegally called, effectively protecting the software entity. The above-mentioned circuit-assisted design and software security protection significantly improve circuit design efficiency, software and data security.
[0016] The above summary is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments and features described above, further aspects, embodiments and features of the present application will be readily apparent by reference to the accompanying drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0018] Figure 1 This is a framework diagram of the multi-machine collaborative circuit design optimization system based on software and hardware separation described in this application.
[0019] Figure 2 This is a flow chart of the multi-machine collaborative circuit design optimization method based on software and hardware separation described in this application.
[0020] Figure 3 This is the operation flow chart of the multi-machine collaborative circuit design optimization system based on software and hardware separation described in this application.
[0021] Figure 4 It is a schematic diagram of the interaction process between the execution machine and the decision machine described in this application.
[0022] Figure 5 It is a schematic diagram of the communication protection and physical isolation structure of the decision-making machine described in this application.
[0023] Figure 6a This is an example diagram of the execution machine described in this application.
[0024] Figure 6b This is an example diagram of the decision-making machine described in this application.
[0025] Reference numerals: 401 - optical fiber, 402 - second seal, 403 - rack-mounted server, 404 - optical fiber. DETAILED DESCRIPTION
[0026] Hereinafter, only certain exemplary embodiments are briefly described. As will be appreciated by those skilled in the art, the described embodiments may be modified in various ways without departing from the spirit or scope of the present application. Therefore, the drawings and description are to be regarded as illustrative in nature and not restrictive.
[0027] The embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0028] like Figure 1 As shown, an embodiment of the present application provides a multi-machine collaborative circuit design optimization system based on software and hardware separation, including: an execution machine, configured with hardware resources, for enabling a decision machine through preset instructions, and performing circuit simulation calculations, obtaining simulation data and sending it to the decision machine; the decision machine is arranged with a software entity that is physically isolated, calls the hardware resources of the execution machine through a protective communication protocol, and receives the simulation data transmitted by the execution machine, so as to analyze the simulation data through the software entity and feed back design variable correction instructions to the execution machine.
[0029] In this embodiment, specifically: the decision machine includes a dual physical isolation structure, and the chassis of the decision machine is physically isolated by at least a first physical lock and a second seal; the decision machine only uses an optical fiber interface as a communication channel with the execution machine.
[0030] Further preferably, the protective communication protocol includes: encrypting preset instructions with a dynamically generated session key; an instruction whitelist mechanism that only allows preset instructions to pass verification; and a two-way authentication process that verifies the legitimacy of the execution machine and the decision machine.
[0031] In this embodiment, specifically: the execution machine is provided with a client interface, and the execution machine is configured to obtain a preset standardized instruction set by loading the client interface, and send an activation request to the decision machine through the protective communication protocol.
[0032] In this embodiment, specifically: the software entity includes at least an artificial intelligence large model and an agent model, and the decision machine is configured to: receive the activation request, perform key verification based on the activation request, and enter a standby state when the verification is passed; otherwise, trigger the abnormal fuse mechanism, and when the number of verification failures is greater than a preset number, block the communication channel.
[0033] It should be noted that the software entity includes at least an artificial intelligence big model and an agent model, but is not limited to these two models, and also includes other adapted optimization algorithms.
[0034] In this embodiment, specifically: the execution machine is further configured to: after the decision machine enters the standby state, load the initial circuit design plan and configure the simulation environment, and perform circuit simulation calculations based on the initial circuit design plan, obtain simulation data and send it to the decision machine.
[0035] In this embodiment, specifically: the decision machine is further configured to: receive the simulation data, use the software entity to normalize and feature analyze the simulation data, and generate an adaptability adjustment strategy after executing multi-objective optimization based on the software entity, so as to obtain design variable correction instructions according to the adaptability adjustment strategy and send them to the execution machine.
[0036] In this embodiment, specifically: the execution machine is further configured to: receive the design variable correction instruction, and perform decryption and compliance verification through an independent security module; after passing the compliance verification, automatically modify the circuit parameters according to the design variable correction instruction, and restart the simulation verification.
[0037] In this embodiment, specifically: the decision machine is further configured to: receive the simulation calculation results after modifying the circuit parameters, and determine whether the optimization termination conditions are met based on the simulation calculation results. If so, output the current optimal circuit design scheme and deviation report; otherwise, continue to perform design optimization.
[0038] Based on the same concept, Figure 2 As shown, the present application also provides a multi-machine collaborative circuit design optimization method based on separation of software and hardware, including: the execution machine enables the decision machine through preset instructions, and performs circuit simulation calculations, obtains simulation data and sends it to the decision machine; the decision machine calls the hardware resources of the execution machine through a protective communication protocol, and receives the simulation data transmitted by the execution machine, so as to analyze the simulation data based on the software entity and feed back design variable correction instructions to the execution machine.
[0039] When this application is working: the specific implementation process architecture is as follows Figure 3 As shown, it includes four parts: system initialization and design target loading, multi-machine collaborative iterative optimization, instruction execution and closed-loop feedback, and safety protection and exception handling:
[0040] (1) System initialization and design target loading
[0041] After the decision engine is activated, it prioritizes loading preset circuit design target parameters, including but not limited to power consumption thresholds, timing constraints, and area limits. It also simultaneously initializes built-in optimization analysis models, such as the AI big model and proxy models, which have optimization capabilities. The execution engine also loads the initial circuit design plan, including the netlist file, physical layout data, and simulation environment configuration.
[0042] (2) Multi-machine collaborative iterative optimization
[0043] The execution machine performs circuit simulation calculations based on the initial design, generates a calculation result data set including but not limited to circuit design-related timing results, power consumption data, transient signals and other indicators, and feeds it back to the decision machine through an encrypted transmission channel and a preset instruction interface.
[0044] After receiving the feedback data, the decision machine performs target comparison and decision generation, conducts multi-dimensional deviation analysis on the simulation results and the preset design goals, identifies key optimization directions, such as power consumption, area, timing, etc., performs multi-dimensional analysis on the simulation data fed back by the execution machine, uses the built-in optimization model to generate an adaptability adjustment strategy, and generates a parameter adjustment instruction set based on the analysis results, including transistor size correction values, load adjustment schemes, etc., and attaches a dynamically generated session key to encrypt the instructions.
[0045] (3) Instruction execution and closed-loop feedback
[0046] After receiving the encrypted instruction set, the execution engine decrypts and verifies its format compliance through an independent security module. It automatically modifies the circuit design parameters based on the instruction content and restarts the simulation. The updated calculation results are fed back to the decision engine, triggering a new round of optimization. This interactive process continues until a preset termination condition is met or achieved, such as the deviation rate between the simulation data and the design target falling below a preset threshold or reaching a preset maximum number of iterations. The decision engine then outputs the current optimal solution and a deviation report.
[0047] (4) Security protection and exception handling
[0048] Throughout the entire process, the decision engine and the execution engine exchange encrypted data via fiber channels. Communication is limited to predefined command protocols, and the optimization analysis models embedded in the decision engine cannot be modified through physical contact. The decision engine has a built-in runtime monitoring module. If it detects an anomaly, such as the number of instruction set verification failures exceeding a safety threshold, it immediately triggers a system lockdown and generates an audit log.
[0049] The interaction process between the execution machine and the decision machine in this application is as follows Figure 4 As shown, it includes three parts: system initialization and instruction preloading, preset instructions triggering the decision-making machine startup, and secure communication link establishment and data transmission:
[0050] (1) System initialization and instruction preloading
[0051] When the executor starts up, it loads the client interface, retrieves a preset standardized instruction set containing instruction codes and trigger conditions, and sends an activation request to the decision-making machine through a preset verification process. After receiving the encrypted request, the decision-making machine performs verification code verification and environmental self-tests. It parses the verification key in the activation request, which contains encrypted information such as the device fingerprint and hardware ID digital signature to verify the legitimacy of the executor. It also checks the integrity and timestamp of the built-in software. After confirming that the decision-making module's operating environment is normal, it enters a standby state. Failure to verify the key triggers an abnormal circuit breaker mechanism. A specified number of failures will block the data channel and sever the communication link, protecting the device.
[0052] (2) The preset instruction triggers the decision-making machine to start
[0053] The execution machine selects from the client interface according to the current circuit design task requirements, such as timing optimization goals or power consumption goals, and automatically encapsulates the instruction code, task identifier and resource requirement parameters into a structured data packet through the client background, attaches a dynamic session key for secondary encryption, and then sends it to the decision machine; after receiving the instruction data packet, the decision machine is activated through the instruction parsing and decision modules in turn, decrypts the data, extracts the instruction type and parameter constraints, and calls the multi-objective optimization algorithm of the optimization model in the built-in software, and generates the initial optimization strategy in combination with the preset design constraint library.
[0054] (3) Establishment of secure communication link and data transmission
[0055] The decision-making machine initiates a connection request through a physically isolated dedicated fiber-optic communication interface. After the executive machine responds, both parties perform two-way authentication. After the verification is passed, the decision-making machine transmits a data packet to the executive machine. The executive machine parses the data packet and adjusts the circuit design parameters, and performs simulation verification of the new generation parameters according to the set simulation environment.
[0056] The decision-making machine performs a multi-dimensional analysis of the simulation data fed back by the execution machine based on preset design goals such as power consumption, area, and timing. It then uses built-in optimization models to generate adaptive adjustment strategies, guiding the execution machine through parameter correction and layout optimization. This closed-loop process significantly shortens the traditional manual parameter adjustment cycle while improving the convergence efficiency of large-scale circuit designs through multi-machine parallel computing.
[0057] The communication protection and physical isolation structure of the decision-making machine in this application are as follows Figure 5 As shown, it includes the physical layer protection structure and communication protection design module:
[0058] (1) Physical layer protection structure
[0059] The decision-making machine utilizes a multi-level physical isolation design, specifically including protective housing components and isolated interfaces. Physical locks and seals are installed at the chassis disassembly area, allowing unlocking only with authorized keys. For communication interfaces, commonly used USB ports and other interfaces are physically shielded, leaving only fiber optic interfaces with protective communication protocols. This achieves electrical isolation between the decision-making machine's internal circuitry and the external actuators, preventing physical side-channel attacks.
[0060] (2) Software layer security control
[0061] The decision-making machine's built-in software implements collaborative protection through pre-set instruction sets and verification activation. These pre-set instruction sets are stored in the decision-making machine, while the execution machine only receives format-verified instruction sets and cannot reversely access the decision-making machine's internal logic. Combined with dynamic encryption keys and an instruction whitelist mechanism, this effectively blocks attacks such as reverse engineering and code injection, ensuring that core algorithms are protected from tampering and unauthorized access.
[0062] A dual-layer protection mechanism of physical isolation architecture and command interface is adopted to protect the built-in software in the decision-making machine, solving the systematic defects of traditional electronic design automation auxiliary tools in physical security and communication protection.
[0063] Furthermore, the physical isolation example in this application is shown in FIG6, where the execution machine is a rack server 403 with hardware resource advantages. Figure 6a The decision-making machine is a workstation with double protection of the first physical lock and the second seal 402. Figure 6b The two devices exchange data via optical fiber 401 and 404. Through dynamic closed-loop interaction between the decision-making machine and the execution machine, a deep integration of circuit design automation and security protection is achieved, effectively resolving the technical shortcomings of traditional stand-alone architectures, such as limited optimization efficiency and prone software leaks.
[0064] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various modifications or substitutions within the technical scope disclosed in this application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.
Claims
1. A multi-machine collaborative circuit design optimization system based on software and hardware separation, characterized by: include: The execution machine is configured with hardware resources and is used to enable the decision machine through preset instructions, perform circuit simulation calculations, and obtain simulation data and send it to the decision machine; The decision machine is equipped with a physically isolated software entity, which calls the hardware resources of the execution machine through a protective communication protocol and receives simulation data transmitted by the execution machine, so as to analyze the simulation data through the software entity and feed back design variable correction instructions to the execution machine.
2. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 1 is characterized in that: The decision-making machine includes a double physical isolation structure, and the chassis of the decision-making machine is physically isolated by at least a first physical lock and a second seal; The decision-making machine only uses an optical fiber interface as a communication channel with the execution machine.
3. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 2 is characterized in that: The protective communication protocol includes: dynamically generated session keys to encrypt preset instructions; an instruction whitelist mechanism to only allow preset instructions to pass verification; and a two-way authentication process to verify the legitimacy of the execution machine and the decision machine.
4. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 3 is characterized in that: The execution machine is provided with a client interface, and the execution machine is configured as follows: A preset standardized instruction set is obtained by loading the client interface, and an activation request is sent to the decision-making machine through the protective communication protocol.
5. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 4 is characterized in that: The software entity includes at least an artificial intelligence model and an agent model, and the decision-making machine is configured as follows: Receive the activation request, perform key verification based on the activation request, and enter the standby state when the verification is passed; otherwise, trigger the abnormal fuse mechanism, and block the communication channel when the number of verification failures is greater than the preset number.
6. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 5 is characterized in that: The execution machine is further configured as: After the decision machine enters the standby state, the initial circuit design scheme is loaded and the simulation environment is configured, and circuit simulation calculations are performed based on the initial circuit design scheme to obtain simulation data and send it to the decision machine.
7. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 6 is characterized in that: The decision machine is further configured as: The simulation data is received, the simulation data is normalized and feature analyzed using the software entity, and an adaptability adjustment strategy is generated after performing multi-objective optimization based on the software entity, so as to obtain a design variable correction instruction according to the adaptability adjustment strategy and send it to the execution machine.
8. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 7 is characterized in that: The execution machine is further configured as: receiving the design variable modification instruction, and performing decryption and compliance verification through an independent security module; After passing the compliance check, the circuit parameters are automatically modified according to the design variable correction instructions, and the simulation verification is restarted.
9. The multi-machine collaborative circuit design optimization system based on software and hardware separation according to claim 7 is characterized in that: The decision machine is further configured as: Receive the simulation calculation results after modifying the circuit parameters, and determine whether the optimization termination conditions are met based on the simulation calculation results. If so, output the current optimal circuit design solution and deviation report; otherwise, continue to perform design optimization.
10. A multi-machine collaborative circuit design optimization method based on software and hardware separation, characterized in that: include: The execution machine activates the decision machine through preset instructions, performs circuit simulation calculations, obtains simulation data and sends it to the decision machine; The decision machine calls the hardware resources of the execution machine through a protective communication protocol and receives simulation data transmitted by the execution machine, analyzes the simulation data based on the software entity, and feeds back design variable correction instructions to the execution machine.