Driving circuit, driving method, display panel and computer readable medium

Abstract

The invention provides a driving circuit, a driving method, a display panel and a computer readable medium. In the technical scheme provided by the invention, the gate driving unit can output scanning signals to the target scanning lines at the same time in one scanning period, the target scanning lines are connected with the gates of the thin film transistors of the target sub-pixels, and the number of the target scanning lines is an integer greater than 1. The source electrode driving unit can output data voltage to the source electrode of the thin film transistor of the target sub-pixel at the same time through the data line in a scanning period so as to complete image display in the scanning period. According to the technical scheme, the dynamic power consumption of picture display can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a driving circuit, a driving method, a display panel, and a computer-readable medium. Background Art

[0002] Liquid crystal displays (LCDs) have many advantages such as thin body, power saving, and no radiation, and have been widely used in electronic devices such as LCD TVs, mobile phones, digital cameras, computer screens, or laptop screens.

[0003] Currently, LCD panels typically use a tripple+Z architecture and a source column drive scheme. For example, for a display panel with a resolution of 1920 x 720, to output a single red frame, the gates of the thin-film transistors (TFTs) corresponding to the red subpixels (R pixels) are turned on row by row. A single data line (source line) is required to sequentially charge 720 R pixels, resulting in a dynamic power consumption that satisfies the equation: AVDD * C * frame rate * 720. Here, AVDD is the drive voltage, C is the load capacitance, and 720 is the number of charges per frame.

[0004] However, the dynamic power consumption of the screen display under this driving mode is relatively large. Summary of the Invention

[0005] The present application provides a driving circuit, a driving method, a display panel, and a computer-readable medium to reduce dynamic power consumption of a display screen.

[0006] In a first aspect, the present application provides a driving circuit, comprising data lines, scan lines, a gate driving unit, and a source driving unit, wherein the gate driving unit is connected to the scan lines, the source driving unit is connected to the data lines, and the number of the data lines and the scan lines is multiple; the data lines and the scan lines are arranged perpendicular to each other, a sub-pixel is provided at the intersection of two adjacent data lines and two adjacent scan lines, a thin film transistor is provided in the sub-pixel, the gate of the thin film transistor of each row of sub-pixels is connected to the scan line of the corresponding row, the source of the thin film transistor of the sub-pixels in the same row is connected to the data line on the same side, and the source of the thin film transistor of two sub-pixels in adjacent rows and the same column is connected to the data lines on different sides; the gate driving unit is used to simultaneously output a scanning signal to a target scan line within a scanning cycle, the target scan line is connected to the gate of the thin film transistor of the target sub-pixel, and the number of the target scan lines is an integer greater than 1; the source driving unit is used to simultaneously output a data voltage to the source of the thin film transistor of the target sub-pixel through the data line within the scanning cycle.

[0007] With reference to the first aspect, in a possible implementation, the scanning period is a frame.

[0008] In combination with the first aspect, in a possible implementation manner, the polarities of the voltages on the data lines in one scanning period are the same, and the polarities of the voltages on the data lines in adjacent scanning periods are opposite.

[0009] In combination with the first aspect, in a possible implementation, the driving circuit further includes a timing controller, which is connected to the gate driving unit and the source driving unit respectively; the timing controller is used to receive image data, determine the target sub-pixel based on the image data, and indicate the target scanning line within the one scanning cycle to the gate driving unit, and send a voltage signal to the source driving unit, wherein the voltage signal is used to indicate the data voltage output by the source driving unit to the source of the thin film transistor of the target sub-pixel through the data line at the same time within the one scanning cycle.

[0010] In a second aspect, the present application provides a driving method, which is applied to the driving circuit as described in the first aspect, and the driving circuit also includes a timing controller; the driving method includes: receiving image data; determining a target sub-pixel based on the image data; indicating a target scan line to a gate driving unit, wherein the target scan line is connected to the gate of the thin film transistor of the target sub-pixel, and the number of the target scan lines is an integer greater than 1; and sending a voltage signal to the source driving unit, wherein the voltage signal is used to indicate the data voltage output by the source driving unit to the source of the thin film transistor of the target sub-pixel through the data line simultaneously within one scanning cycle.

[0011] In combination with the second aspect, in a possible implementation, the scanning period is a frame.

[0012] In combination with the second aspect, in a possible implementation manner, the polarities of the voltages on the data lines in one scanning period are the same, and the polarities of the voltages on the data lines in adjacent scanning periods are opposite.

[0013] In a third aspect, the present application provides a display panel, which includes a driving circuit as described in the first aspect or any one implementation of the first aspect, or includes various functional modules for implementing the driving method as described in the second aspect or any one implementation of the second aspect.

[0014] In a fourth aspect, the present application provides a computer-readable medium storing a program code for computer execution, wherein the program code includes instructions for executing the driving method as described in the second aspect or any one of the implementations of the second aspect.

[0015] The present application provides a driving circuit, a driving method, a display panel and a computer-readable medium. In the technical solution provided by the present application, the gate driving unit can simultaneously output a scanning signal to the target scanning line within a scanning cycle to simultaneously turn on the gate of the thin film transistor (TFT) connected to the target scanning line. The target scanning line is connected to the gate of the TFT of the target sub-pixel. The source driving unit can simultaneously output a data voltage to the source of the TFT of the target sub-pixel through the data line within a scanning cycle to complete the display of the picture within the scanning cycle. The technical solution provided by the present application reduces the number of charging times of the picture display within a scanning cycle by optimizing the driving method of the picture display, thereby reducing the dynamic power consumption of the picture display. The scanning cycle can be a frame. Compared with the existing driving method, the number of charging times of the displayed picture within a scanning cycle in the technical solution provided by the present application is 1. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1is a schematic structural diagram of a driving circuit of a liquid crystal display panel;

[0017] Figure 2 A schematic diagram illustrating a method for driving a liquid crystal display panel;

[0018] Figure 3 is a schematic diagram illustrating a voltage driving waveform of a liquid crystal display panel;

[0019] Figure 4 This is a schematic diagram illustrating driving a liquid crystal display panel by frame inversion in this application;

[0020] Figure 5 This is a schematic diagram of the data voltage waveform for driving a liquid crystal display panel by frame inversion in this application;

[0021] Figure 6 is a schematic structural diagram of a driving circuit of a liquid crystal display panel in this application;

[0022] Figure 7 Schematic diagram illustrating the driving method of the liquid crystal display panel in this application. DETAILED DESCRIPTION

[0023] The technical solutions of the present invention will be described clearly and completely below with reference to the accompanying drawings. It is apparent that the embodiments described are only a portion of the embodiments of the present invention, not all of them. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without inventive effort are intended to fall within the scope of protection of the present invention.

[0024] First combine Figures 1 to 3 , explain the technical problems that need to be solved by this application.

[0025] Currently, liquid crystal display panels generally use a triple gate + zigzag inversion (tripple + Z) architecture, with a source column driving method such as Figure 1 The driving circuit shown. Figure 1 The resolution of the LCD panel is 1920*720.

[0026] like Figure 1As shown, the driving circuit includes parallel scan lines Gm, where m is a positive integer less than or equal to 2160, and 1920 parallel data lines Sn, where n is a positive integer less than or equal to 1920. It can be seen that the scan lines Gm and the data lines Sn are arranged perpendicular to each other. A sub-pixel is provided at the intersection of two adjacent data lines and two adjacent scan lines. A thin film transistor (TFT) is provided in the sub-pixel, or in other words, one sub-pixel corresponds to one TFT. Therefore, the image displayed by the sub-pixel can be controlled by controlling the TFT of the sub-pixel. It should be noted that each pixel (pixel) on the liquid crystal display panel is composed of the three primary colors of red, blue, and green (RGB). Each color in a pixel can be called a sub-pixel, that is, the sub-pixel includes a red sub-pixel (R pixel), a green sub-pixel (G pixel), and a blue sub-pixel (B pixel). The TFT includes a field effect transistor and a capacitor unit. The field effect transistor includes a gate (G), a source (S), and a drain (D). As an example, one end of the capacitor unit may be connected to the drain of the field effect transistor, and the other end may be connected to a common voltage (Vcom) (not shown in the figure). The capacitor unit includes a load capacitor.

[0027] It can be seen that the gates of the field-effect transistors in the same row are connected to the scan lines of the row, the sources of the field-effect transistors in the same row are connected to the data lines on the same side, and the sources of two field-effect transistors in adjacent rows and the same column are connected to the data lines on different sides, or in other words, to the data lines on the left and right sides respectively. The gate of the field-effect transistor can be understood as the gate of the TFT, and the source of the field-effect transistor can be understood as the source of the TFT. In this application, the scan voltage on the scan line Gm can open or close the gate of the TFT in the row. When the gate is open, the source of the TFT can receive the data voltage from the data line Sn, thereby charging the TFT, and then causing the sub-pixels in the row to display the corresponding image under the drive of the scan line Gm and the data line Sn.

[0028] like Figure 1 As shown, the driving circuit also includes a gate driving unit and a source driving unit, the gate driving unit is connected to the scan line Gm, and the source driving unit is connected to the data line Sn. The gate driving unit is used to output a scanning signal to the scan line Gm, or in other words, the voltage on the scan line Gm can be provided by the gate driving unit. Correspondingly, the voltage on the data line Sn can be provided by the source driving unit. The gate driving unit can be a gate integrated circuit (gate IC), and the source driving unit can be a source integrated circuit (source IC), which are not limited here.

[0029] In order to avoid the DC blocking effect and DC residual phenomenon of the liquid crystal display panel, an AC voltage can be applied to both ends of the liquid crystal display panel, thereby driving the liquid crystal display panel by reversing the polarity. The AC voltage uses Vcom as the reference voltage, that is, the data voltage has positive and negative polarities, and the positive and negative polarities are relative to Vcom. For example, when the data voltage is greater than Vcom, the data voltage can be considered to be positive, and when the data voltage is less than Vcom, the data voltage can be considered to be negative. Therefore, the driving process of the liquid crystal display panel can be understood as continuously charging the voltage on the sub-pixel from positive polarity to negative polarity, and then from negative polarity to positive polarity. The voltage on the sub-pixel can be understood as the data voltage received by the source of the TFT corresponding to the sub-pixel.

[0030] Figure 2 A schematic diagram illustrating driving a liquid crystal display panel by polarity inversion is shown. Figure 2 The polarity inversion method shown is column inversion. Column inversion can be understood as the voltage on the sub-pixels corresponding to adjacent data lines being reversed in terms of column polarity. Figure 2 As shown, the sub-pixels connected to each data line form a "Z" shape. The voltage on the sub-pixel corresponding to data line S1 is positive, and the voltage on the sub-pixel corresponding to data line S2 is negative. Similarly, the voltage on the sub-pixel corresponding to data line S1919 is positive, and the voltage on the sub-pixel corresponding to data line S1920 is negative. To drive all sub-pixels, data line SZ1 is added. Therefore, the number of data lines in this driving mode is 1921.

[0031] Figure 3 A schematic diagram of a data voltage waveform for driving a liquid crystal display panel by column inversion is shown. Figure 3 Taking the display of a red frame as an example, the R pixel is at a high level, such as R(255+) in the figure, and the G pixel and the B pixel are at a low level, such as G(0+) and B(0+) in the figure respectively. Figure 3 Si in the data line S1 can be understood as S1, S3, S5, ..., S2159, and correspondingly, S(i+1) can be understood as S2, S4, S6, ..., S2160. Taking S1 and S2 as an example, the voltage on the R pixel corresponding to data line S1 is positive, and the voltage on the R pixel corresponding to data line S2 is negative. After the source driver unit outputs a positive data voltage to data line S1, it can perform column inversion to output a negative data voltage to data line S2.

[0032] Currently, liquid crystal display panels usually use a line-by-line scanning method to display images. Figure 1For example, at time t1, the scan voltage on scan line G1 can be set to a high level to turn on the gate of the TFT corresponding to that row, so that the data line Sn outputs the data voltage to the source of the TFT corresponding to the first row of sub-pixels. Correspondingly, at time t2, the scan voltage on scan line G2 can be set to a high level to turn on the gate of the TFT corresponding to that row, so that the data line Sn outputs the data voltage to the source of the TFT corresponding to the second row of sub-pixels. This process continues in this way until the scanning of one frame of data is completed, and the process returns to the first row to scan the second frame of data.

[0033] Therefore, when the display panel resolution is 1920*720, to display a red frame under the above drive mode, one data line needs to charge 720 R pixels. The dynamic power consumption satisfies the relationship: AVDD*C*frame rate*720. Here, AVDD can be understood as the drive voltage (such as the data voltage), C can be understood as the load capacitance, and 720 can be understood as the number of charges within a frame. In other words, within a frame of display, one data line needs to output the data voltage 720 times, or in other words, within a frame of display, one data line needs to complete 720 sub-pixel charging.

[0034] It should be understood that the dynamic power consumption of the screen display is proportional to the number of charging times within a frame, that is, the existing liquid crystal display panel has a large number of charging times, resulting in a large dynamic power consumption of the screen display.

[0035] In view of this, the present application provides a driving circuit, a driving method, a display panel, and a computer-readable medium. The technical solution provided in the present application reduces the number of charging times within a frame by optimizing the driving method of the screen display, thereby reducing the dynamic power consumption of the screen display.

[0036] The following combination Figures 4 to 7 , describe the technical solution provided in this application.

[0037] In the technical solution provided by the present application, the gate driving unit can simultaneously output scanning signals to the target scanning lines within a scanning cycle to simultaneously turn on the gates of the TFTs connected to the target scanning lines. The target scanning lines are connected to the gates of the TFTs of the target sub-pixels.

[0038] Optionally, the scanning period may be a frame. One scanning period is one frame. The scanning signal may be a gate high voltage (VGH).

[0039] The target sub-pixel can be understood as the sub-pixel that needs to display the image within a scan cycle. For example, when displaying a red frame, the target sub-pixel can be understood as all R pixels within the frame. The target scan line can be understood as the scan line connected to the gate electrodes of the TFTs of all R pixels within the frame.

[0040] In the present application, the number of target scan lines is an integer greater than 1. This means that the present application does not display images using a line-by-line scanning method. Instead, the image is displayed by simultaneously opening the gates of the TFTs of the target sub-pixels within a scanning cycle. Accordingly, after the gates of the TFTs of the target sub-pixels are opened, the source driver unit can output a data voltage to the source electrodes of the TFTs of the target sub-pixels via the data lines within the scanning cycle, thereby charging the target sub-pixels.

[0041] by Figure 1 For example, when displaying a frame of red picture, the target scan lines are G1, G4, G7, ..., G2158, and the gate driving unit can simultaneously output scan signals to the target scan lines so that the gates of the TFTs of the R pixels in one frame are simultaneously opened; the source driving unit can output data voltages to the sources of the TFTs of the R pixels through the data lines, thereby charging the R pixels and further displaying a frame of red picture.

[0042] In one possible implementation, the source driver unit can charge the target sub-pixels using a frame inversion driving method, or the source driver unit can simultaneously charge the source electrodes of the TFTs of the target sub-pixels through the data lines to display a single frame. In this implementation, the number of charges per frame is one, or all target sub-pixels within a frame can be charged simultaneously. Frame inversion can be understood as the voltage polarity of the sub-pixels within a frame being the same, and the voltage polarity of the sub-pixels within adjacent frames being opposite.

[0043] Figure 4 Schematic diagram illustrating driving a liquid crystal display panel by frame inversion in this application. Figure 4 As shown, the voltage polarity of all sub-pixels in the p-th frame is positive, and the voltage polarity of all sub-pixels in the (p+1)-th frame is negative. P is a positive integer.

[0044] Figure 5 This is a schematic diagram of data voltage waveforms for driving a liquid crystal display panel through frame inversion in this application. Figure 5 In the example of displaying a red frame, the R pixel is at a high level, such as R(255+) in the figure, and the G pixel and B pixel are at a low level, such as G(0+) and B(0+) in the figure. Figure 5 The data voltage waveform shown is used to drive the R pixel.

[0045] like Figure 5As shown, the source driving unit can output a positive polarity data voltage to all data lines in the p-th frame, so that all data lines in the p-th frame can simultaneously output a positive polarity data voltage to the source of the TFT of the R pixel, so as to realize the charging of the R pixel in the p-th frame, so that the p-th frame displays a red picture. The source driving unit converts the positive polarity data voltage into a negative polarity data voltage through a frame inversion driving method, thereby outputting a negative polarity data voltage to all data lines in the (p+1)-th frame, so that all data lines in the (p+1)-th frame can simultaneously output a negative polarity data voltage to the R pixel, so as to realize the charging of the R pixel in the (p+1)-th frame, so that the (p+1)-th frame displays a red picture. Among them, the voltage signals of the R pixel, G pixel and B pixel respectively occupy 1 / 3 of the frame. In some implementations, Figure 5 The data voltage waveform shown may also be referred to as an RGB signal waveform.

[0046] It should be noted that if a green frame is displayed, Figure 5 The R pixel and the B pixel are at a low level, such as R(0+), B(0+), and the G pixel is at a high level, such as G(255+).

[0047] In this implementation, the source driving unit outputs the data voltage to the data line in a frame inversion manner, so that all data lines can simultaneously output the data voltage to the source of the TFT of the target sub-pixel, so that the target sub-pixel only needs to be charged once in one frame, thereby reducing the number of charging times in one frame display and reducing the dynamic power consumption of the screen display.

[0048] In one possible implementation, when the source driver unit charges the target sub-pixels via the data lines within a scan cycle, each data line can simultaneously output a data voltage to the source of the TFT of the connected target sub-pixel. This means that within a display image within a scan cycle, a data line only needs to output a data voltage once, or in other words, within a display image within a scan cycle, a data line only needs to complete the charging of the sub-pixels once. It should be understood that this implementation still employs a column-inversion driving method. For example, the source driver unit can provide a positive data voltage to data line S1, so that data line S1 can simultaneously output a positive data voltage to the source of the TFT of the sub-pixel connected to data line S1. The source driver unit then converts the positive data voltage to a negative data voltage using a column-inversion driving method and outputs it to data line S2, so that data line S2 can simultaneously output a negative data voltage to the source of the TFT of the sub-pixel connected to data line S2, until all target sub-pixels are fully charged within a frame.

[0049] In this implementation, a data line only needs to output a data voltage once within a frame of display. In other words, a data line only needs to charge a sub-pixel once within a frame of display. Compared to existing technologies, this implementation reduces the number of charging times within a frame by optimizing the display drive method, thereby reducing dynamic power consumption during the display process.

[0050] In a possible implementation, the driving circuit further includes a timing controller (TCON). The timing controller is connected to the gate driving unit and the source driving unit respectively, such as Figure 6 The timing controller may include a frame buffer.

[0051] Figure 7 Schematic diagram illustrating the driving method of the liquid crystal display panel in this application. Figure 7 The driving method shown can be applied to Figure 6 In the driving circuit shown in Figure 7 As shown, the driving method includes S701 to S704.

[0052] As an example, the driving method may be executed by a timing controller, or by a software and / or hardware module in the timing controller, which is not limited here.

[0053] S701, receiving image data.

[0054] The image data may be low-voltage differential signaling data mapping (LVDS data mapping).

[0055] S702: Determine a target sub-pixel based on the image data.

[0056] After receiving the image data, the timing controller may determine the target sub-pixel within one or more scanning periods based on the image data. The scanning period may be a frame.

[0057] In a possible implementation, after determining the target sub-pixel, the timing controller may store the target sub-pixel in a frame buffer for subsequent use.

[0058] S703: Send a control signal to the gate driving unit to indicate the target scan line.

[0059] After determining the target sub-pixel, the timing controller can send a control signal to the gate driver unit based on the target sub-pixel to indicate the target scan line within a scan cycle. In response, the gate driver unit can receive the control signal and simultaneously output a scan signal to the target scan line within a scan cycle.

[0060] S704 , sending a voltage signal to the source driving unit to indicate the data voltage that the source driving unit outputs to the source of the TFT of the target sub-pixel simultaneously through the data line in one scanning period.

[0061] After determining the target sub-pixel, the timing controller can send a voltage signal to the source driving unit based on the target sub-pixel to indicate the data voltage that the source driving unit outputs to the source of the TFT of the target sub-pixel through the data line simultaneously within one scanning cycle. The voltage signal is for example Figure 5 Accordingly, the source driving unit can receive the voltage signal and output the data voltage to the source of the TFT of the target sub-pixel through the data line based on the voltage signal.

[0062] This application does not limit the execution order of S703 and S704.

[0063] In the technical solution provided in the present application, the number of charging times within a frame is reduced by optimizing the driving method of the picture display, thereby reducing the dynamic power consumption during the picture display process.

[0064] The present application also provides a display panel, including the driving circuit as shown in the above embodiment, or including various functional modules for implementing the driving method as shown in the above embodiment, and the functional modules can be hardware and / or software modules.

[0065] The present application also provides a computer program product. For example, when driving a liquid crystal display panel, the computer program product, when executed on a computer, can implement the method implemented by the timing controller, gate driver unit, or source driver unit in the above embodiments. The present application also provides a computer-readable storage medium containing computer instructions. When the computer instructions are executed on a processor, the method implemented by the timing controller, gate driver unit, or source driver unit in any of the above embodiments can be implemented.

[0066] The term "plurality" in this article refers to two or more. The term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the previous and next associated objects are in an "or" relationship; in the formula, the character " / " indicates that the previous and next associated objects are in a "division" relationship. In addition, it should be understood that in the description of this application, words such as "first" and "second" are only used for the purpose of distinguishing the description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0067] It can be understood that in the embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0068] It should be emphasized that the above are only preferred embodiments of the present invention and do not limit the present invention in any form. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A driving circuit, characterized in that: The device comprises a data line, a scan line, a gate driving unit and a source driving unit, wherein the gate driving unit is connected to the scan line, the source driving unit is connected to the data line, and there are multiple data lines and scan lines; The data lines and the scan lines are arranged perpendicularly to each other, a sub-pixel is provided at the intersection of two adjacent data lines and two adjacent scan lines, a thin film transistor is provided in the sub-pixel, the gate of the thin film transistor of each row of sub-pixels is connected to the scan line of the corresponding row, the source of the thin film transistor of the sub-pixels in the same row is connected to the data line on the same side, and the source of the thin film transistor of two sub-pixels in adjacent rows and the same column is connected to the data lines on different sides; The gate driving unit is configured to simultaneously output scanning signals to target scanning lines within a scanning period, wherein the target scanning lines are connected to gates of thin film transistors of target sub-pixels, and the number of the target scanning lines is an integer greater than 1; The source driving unit is configured to simultaneously output a data voltage to the source of the thin film transistor of the target sub-pixel through the data line within the one scanning period.

2. The driving circuit according to claim 1, wherein: The scanning period is a frame.

3. The driving circuit according to claim 1 or 2, characterized in that: The polarities of the voltages on the data lines in one scanning period are the same, and the polarities of the voltages on the data lines in adjacent scanning periods are opposite.

4. The driving circuit according to claim 3, wherein: The driving circuit further includes a timing controller, which is connected to the gate driving unit and the source driving unit respectively; The timing controller is used to receive image data, determine the target sub-pixel based on the image data, indicate the target scan line within the one scan cycle to the gate drive unit, and send a voltage signal to the source drive unit, wherein the voltage signal is used to indicate the data voltage output by the source drive unit to the source of the thin film transistor of the target sub-pixel through the data line simultaneously within the one scan cycle.

5. A driving method, characterized in that: The driving method is applied to the driving circuit according to claim 1, wherein the driving circuit further comprises a timing controller; The driving method includes: receiving image data; determining a target sub-pixel based on the image data; Instructing a gate driving unit of target scan lines, where the target scan lines are connected to gates of thin film transistors of target sub-pixels, and the number of the target scan lines is an integer greater than 1; A voltage signal is sent to the source driving unit, where the voltage signal is used to indicate a data voltage that the source driving unit outputs simultaneously to the source of the thin film transistor of the target sub-pixel through the data line within one scanning period.

6. The driving method according to claim 5, wherein: The scanning period is a frame.

7. The driving method according to claim 5 or 6, characterized in that: The polarities of the voltages on the data lines in one scanning period are the same, and the polarities of the voltages on the data lines in adjacent scanning periods are opposite.

8. A display panel, characterized in that: The method comprises the driving circuit according to any one of claims 1 to 4, or comprises functional modules for implementing the driving method according to any one of claims 5 to 7.

9. A computer-readable medium, characterized in that The computer-readable medium stores a program code for computer execution, the program code including instructions for executing the driving method according to any one of claims 5 to 7.

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