A method for testing insertion loss of circuit boards

Abstract

This invention belongs to the field of circuit board testing technology and discloses a method for testing the insertion loss of circuit boards. The method includes: fixing the circuit board; cutting the two ends of the circuit board using the two ends of the transmission line as cutting references to expose the two ends of the transmission line; contacting two probes with the exposed ends of the transmission line respectively to perform a first insertion loss test, obtaining a first insertion loss test value S1 for a transmission line of length X; continuing to cut the two ends of the circuit board to a set length, shortening the length of the transmission line and exposing both ends, obtaining a transmission line of length Y; contacting two probes with the exposed ends of the transmission line of length Y respectively to perform a second insertion loss test, obtaining a second insertion loss test value S2 for the transmission line of length Y; and using a de-embedding algorithm to calculate the insertion loss test value S3 per unit length of the transmission line. This invention can improve the accuracy of insertion loss testing, and the connection between the probes and the transmission line is convenient, simplifying the testing operation.

Description

Technical Field

[0001] This invention relates to the field of circuit board testing technology, and in particular to a method for testing circuit board insertion loss. Background Technology

[0002] In the high-speed PCB manufacturing process, the stack-up structure, copper foil roughness, temperature, humidity and process can all affect the PCB production quality. Therefore, after multiple substrates are laminated, it is necessary to perform insertion loss tests on the transmission lines on different layers of the substrate within the PCB to test the high-speed signal transmission quality.

[0003] Currently, testing is performed by fabricating vias to connect probes to transmission lines on substrates with different numbers of layers. For example, as shown... Figure 1 As shown, circuit board 1 has multiple substrate layers. Transmission lines V1 and V2 are located on two substrate layers with different numbers of layers, and their lengths are different. When testing transmission line V1, a via is machined downwards from position A on the top surface of circuit board 1, extending to the bottom layer. The probe connector then contacts the connection pad (test point) on the via at position A on the top surface of circuit board 1 to achieve contact and conductivity with transmission line V1. Similarly, when testing transmission line V2, a via is machined downwards from position B on the top surface of circuit board 1, extending to the bottom layer. The probe connector then contacts the connection pad (test point) on the via at position B on the top surface of circuit board 1 to achieve contact and conductivity with transmission line V2. However, residual via pins can affect the accuracy of the test. To solve this problem, the residual piles in the holes are removed by back drilling. However, due to the influence of the back drilling depth control accuracy, it cannot be guaranteed that the actual length of the residual piles is the same as the length of the residual piles set during the removal process. Therefore, the insertion loss of the transmission line cannot be accurately tested, resulting in low accuracy of the test results. Summary of the Invention

[0004] The purpose of this invention is to provide a circuit board insertion loss testing method, which can improve the accuracy of transmission line insertion loss testing, and the connection between the probe and the transmission line is more convenient, making the testing operation simple and improving the convenience of insertion loss testing.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] A method for testing insertion loss of a circuit board includes:

[0007] The circuit board is fixed, and the two ends of the transmission line are cut with the two ends of the circuit board as the cutting reference to expose the two ends of the transmission line.

[0008] Two probes are respectively brought into contact with the two exposed ends of the transmission line to perform the first insertion loss test, and the first insertion loss test value S1 of the transmission line with a length of X is obtained.

[0009] Continue cutting the two ends of the circuit board to a set length, so that the length of the transmission line is shortened and the two ends are exposed, to obtain the transmission line with a length of Y;

[0010] The two probes are respectively brought into contact with the two exposed ends of the transmission line of length Y to perform a second insertion loss test, and the second insertion loss test value S2 of the transmission line of length Y is obtained.

[0011] The insertion loss test value S3 per unit length of the transmission line is calculated using a de-embedding algorithm. The formula for calculating the insertion loss test value S3 is: S3=(S1-S2) / (XY).

[0012] In some possible implementations, the circuit board has N substrate layers arranged from top to bottom, where N≥2. Each substrate layer has a set of transmission lines. The N sets of transmission lines are tested sequentially in descending order of length, and the two ends of the i-th tested transmission line extend beyond the two ends of the (i+1)-th tested transmission line. During testing, after exposing the two ends of the i-th tested transmission line and performing a first insertion loss test on it, the two ends of the circuit board are cut again using the two ends of the (i+1)-th tested transmission line as the cutting reference. While exposing the two ends of the (i+1)-th tested transmission line, the length of the i-th tested transmission line is shortened and its two ends are exposed, so as to perform a second insertion loss test on the i-th tested transmission line.

[0013] In some possible implementations, after cutting the two ends of the circuit board with the two ends of the Nth test transmission line as the cutting reference, and performing a second insertion loss test on the (N-1)th test transmission line, performing a first insertion loss test on the Nth test transmission line, and then continuing to cut the two ends of the circuit board to a set length, so that the length of the Nth test transmission line is shortened and the two ends are exposed, so as to perform a second insertion loss test on the Nth test transmission line.

[0014] In some possible implementations, when the two ends of the circuit board are cut with the two ends of the transmission line as the cutting reference, the cutting surface covers the entire end face of the circuit board; when the circuit board is cut to a set length, the cutting surface covers the entire end face of the circuit board.

[0015] In some possible implementations, when cutting the two ends of the circuit board with the two ends of the transmission line as the cutting reference, the two ends of the circuit board are cut in a direction perpendicular to the top surface of the circuit board.

[0016] In some possible implementations, while continuing to cut the circuit board to a set length, both ends of the circuit board are cut in a direction perpendicular to the top surface of the circuit board.

[0017] In some possible implementations, during the first and second insertion loss tests on the transmission line, the probe is moved by a drive mechanism and brought into contact with the transmission line.

[0018] In some possible implementations, during the first and second insertion loss tests on the transmission line, the two probes are positioned opposite each other and both are connected to the same drive mechanism, which drives the two probes to move in directions that are closer to or further away from each other.

[0019] In some possible implementations, securing the circuit board includes clamping the circuit board with a fixture.

[0020] In some possible implementations, the clamp includes a drive member and two clamping plates arranged opposite each other. The drive member can drive the two clamping plates to move closer or further apart. When the two clamping plates move closer together, they can clamp the circuit board.

[0021] The beneficial effects of this invention are:

[0022] The circuit board insertion loss testing method provided by this invention involves cutting the circuit board at both ends using the two ends of the transmission line as the cutting reference, exposing the two ends of the transmission line to facilitate contact and communication between the two probes and the exposed ends of the transmission line. This improves the convenience of connecting the probes and the transmission line, thereby simplifying the testing operation and enhancing the ease of insertion loss testing. Furthermore, based on the initial insertion loss test value S1 obtained by cutting the circuit board at both ends using the two ends of the transmission line as the cutting reference and performing the first insertion loss test, the circuit board is further cut to a predetermined length, shortening the transmission line and exposing both ends. A second insertion loss test is then performed on the shortened transmission line, yielding a second insertion loss test value S2. The insertion loss test value S3 per unit length of the transmission line is calculated based on the transmission line length, the first insertion loss test value S1, and the second insertion loss test value S2. This method eliminates the loss caused by vias and connector pads, is unaffected by fluctuations from back-drilling residual posts, and employs a de-embedding algorithm to calculate the insertion loss test value S3, thus removing the influence of the probe connectors on the test loss during measurement and improving the accuracy of the insertion loss test. Attached Figure Description

[0023] Figure 1 This is a top view of the circuit board when testing it using existing circuit board insertion loss testing methods.

[0024] Figure 2This is a flowchart of the circuit board insertion loss testing method provided by the present invention;

[0025] Figure 3 This is a front view of step S100 of the present invention, in which the two ends of the circuit board are cut using the two ends of the transmission line L2 as the cutting reference.

[0026] Figure 4 This is a front view of step S100 of the present invention, in which the two probes respectively contact the two exposed ends of the transmission line L2.

[0027] Figure 5 This is a front view of step S200 of the present invention, in which the two ends of the circuit board are cut using the two ends of the transmission line L3 as the cutting reference.

[0028] Figure 6 This is a front view of step S200 of the present invention, in which two probes are respectively brought into contact with the two exposed ends of the transmission line L2 of length Y1.

[0029] Figure 7 This is a front view of step S300 of the present invention, in which the two probes are respectively in contact with the two exposed ends of the transmission line L3.

[0030] In the picture:

[0031] 1. Circuit board; 2. Probe; 3. Clamping plate. Detailed Implementation

[0032] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0033] In the description of this invention, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0034] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0035] In the description of this embodiment, the terms "upper," "lower," "right," etc., refer to the orientation or positional relationship shown in the accompanying drawings. They are used only for ease of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. In addition, the terms "first" and "second" are used only for distinction in description and have no special meaning.

[0036] like Figure 2 As shown, the circuit board insertion loss testing method provided by the present invention includes the following steps:

[0037] S1. Fix the circuit board 1, and cut the two ends of the circuit board 1 using the two ends of the transmission line as the cutting reference to expose the two ends of the transmission line. It should be noted that "exposed" means that the end of the transmission line is exposed, and the end of the transmission line will not be cut during the cutting, or it means that part of the structure at the end of the transmission line is cut off to expose the end of the transmission line.

[0038] Preferably, when cutting the two ends of the circuit board 1 using the two ends of the transmission line as the cutting reference, the two ends of the circuit board 1 are cut along a direction perpendicular to the top surface of the circuit board 1, that is, cut from the top surface of the circuit board 1 downwards or from the bottom surface of the circuit board 1 upwards. Since the circuit board 1 is a layered structure formed by stacking substrate layers, this cutting method can ensure that the circuit board 1 will not deform. Of course, the two ends of the circuit board 1 can also be cut along a direction perpendicular to the side surface of the circuit board 1. Preferably, the cutting surface covers the entire end face of the circuit board 1, that is, the cutting tool passes through the entire end face of the circuit board 1. This setting can ensure that there is no obstruction when the probe 2 is connected to the transmission line, making the connection more convenient, and the cutting surface can cover the entire end face of the circuit board 1 using a simple cutting tool.

[0039] S2. Contact the two probes 2 with the two exposed ends of the transmission line respectively to perform the first insertion loss test and obtain the first insertion loss test value S1 of the transmission line with length X.

[0040] S3. Continue to cut the two ends of the circuit board 1 to a set length, so that the length of the transmission line is shortened and the two ends are exposed, and a transmission line of length Y is obtained.

[0041] Preferably, when continuing to cut the circuit board 1 to a set length, the two ends of the circuit board 1 are cut along a direction perpendicular to the top surface of the circuit board 1, that is, cut from the top surface of the circuit board 1 downwards or from the bottom surface of the circuit board 1 upwards. Since the circuit board 1 is a layered structure formed by stacking substrate layers, this cutting method can ensure that the circuit board 1 will not deform. Of course, when continuing to cut the circuit board 1 to a set length, the two ends of the circuit board 1 can also be cut along a direction perpendicular to the side surface of the circuit board 1. Preferably, the cut surface covers the entire end face of the circuit board 1, that is, the cutting tool passes through the entire end face of the circuit board 1. This setting can ensure that the subsequent connection between the probe 2 and the transmission line is unobstructed, making the connection more convenient, and the cut surface can cover the entire end face of the circuit board 1 using a simple cutting tool.

[0042] S4. Contact the two probes 2 with the two exposed ends of the transmission line of length Y to perform a second insertion loss test and obtain the second insertion loss test value S2 of the transmission line of length Y.

[0043] S5. The insertion loss test value S3 per unit length of the transmission line is calculated using a de-embedding algorithm. The formula for calculating the insertion loss test value S3 is: S3=(S1-S2) / (XY). The de-embedding algorithm is existing technology in related fields and will not be described in detail in this embodiment.

[0044] By cutting the two ends of the circuit board 1 using the two ends of the transmission line as the cutting reference, the two ends of the transmission line are exposed, making it easier for the two probes 2 to contact and connect with the exposed ends of the transmission line. This improves the convenience of connecting the probes 2 and the transmission line, thereby simplifying the testing operation and improving the convenience of insertion loss testing. Furthermore, based on the first insertion loss test value S1 obtained by cutting the two ends of the circuit board 1 using the two ends of the transmission line as the cutting reference and performing the first insertion loss test, the two ends of the circuit board 1 are cut to a set length, shortening the length of the transmission line and exposing the two ends. A second insertion loss test is performed on the shortened transmission line, obtaining a second insertion loss test value S2. Based on the length values ​​X and Y of the transmission line, the first insertion loss test value S1, and the second insertion loss test value S2, the insertion loss test value S3 per unit length of the transmission line is calculated. This eliminates the loss caused by vias and connectors, and is not affected by the fluctuation of back drill residue. The insertion loss test value S3 is calculated using a de-embedding algorithm, which can remove the influence of the connector of the probe 2 on the test loss during measurement, thus improving the accuracy of insertion loss testing.

[0045] Optionally, during the first and second insertion loss tests on the transmission line, a drive mechanism moves probe 2 to contact the transmission line. This setup saves manpower and ensures accurate contact between probe 2 and the transmission line, improving testing efficiency. Specifically, during the first and second insertion loss tests, the two probes 2 are positioned opposite each other and connected to the same drive mechanism. The drive mechanism moves the two probes 2 in directions that bring them closer together or further apart. This setup facilitates the alignment of the two probes 2 with the two ends of the transmission line.

[0046] Optionally, to ensure stable cutting of the circuit board 1, fixing the circuit board 1 includes clamping it with a fixture. Specifically, the fixture includes a driving member and two opposing clamping plates 3. The driving member can drive the two clamping plates 3 to move closer or further apart. When the two clamping plates 3 are close together, they clamp the circuit board 1. This arrangement satisfies the clamping requirements of the circuit board 1 and provides a relatively secure clamping. In other embodiments, the circuit board 1 can also be fixed to the cutting platform with screws.

[0047] Optionally, the circuit board 1 has a substrate layer on which a set of transmission lines are provided. When testing the transmission lines, the two ends of the circuit board 1 are cut with the two ends of the transmission lines as the cutting reference to expose the two ends of the transmission lines. Then, two probes 2 are respectively brought into contact with the exposed ends of the transmission lines to perform the first insertion loss test and obtain the first insertion loss test value S of the transmission line with a length of X0. 10 Continue cutting the two ends of circuit board 1 to a predetermined length, shortening the transmission line and exposing both ends to obtain a transmission line of length Y0; then, contact the two probes 2 with the exposed ends of the transmission line of length Y0 to perform a second insertion loss test, and obtain the second insertion loss test value S of the transmission line of length Y0. 20 Finally, the insertion loss test value S per unit length of the transmission line is calculated using a de-embedding algorithm. 30 S 30 =(S 10 -S 20 ) / (X0-Y0).

[0048] Optionally, the circuit board 1 has N substrate layers from top to bottom, where N ≥ 2. Each substrate layer has a set of transmission lines. The N sets of transmission lines are tested sequentially in descending order of length, and the two ends of the i-th test transmission line extend beyond the two ends of the (i+1)-th test transmission line. Optionally, the projection of the N sets of transmission lines onto the top surface of the circuit board 1 is N line segments, which are arranged in parallel or overlap each other. Furthermore, the lengths of the N sets of transmission lines can be all different or partially the same. During testing, after exposing the two ends of the i-th test transmission line and performing a first insertion loss test, the two ends of the circuit board 1 are cut again using the two ends of the (i+1)-th test transmission line as the cutting reference. Simultaneously, the length of the i-th test transmission line is shortened and its two ends are exposed, allowing for a second insertion loss test. With this setup, before performing the second insertion loss test on the i-th test transmission line, the two ends of the (i+1)-th test transmission line are directly cut to the two ends of the circuit board 1 using the two ends of the (i+1)-th test transmission line as the cutting reference. When performing the first insertion loss test on the (i+1)-th test transmission line, there is no need to cut again, saving one cutting operation. Furthermore, the position of the transmission line can be determined based on the data information of the circuit board 1, making it convenient to determine the cutting reference.

[0049] Furthermore, after cutting both ends of the Nth test transmission line using the two ends of the Nth test transmission line as the cutting reference, and performing a second insertion loss test on the (N-1)th test transmission line, a first insertion loss test is performed on the Nth test transmission line. Then, the two ends of the circuit board 1 are cut to a predetermined length to shorten the length of the Nth test transmission line and expose both ends for a second insertion loss test. Since the Nth test transmission line is the last group of transmission lines, in order to eliminate the test loss of the probe 2 connector, reduce the influence of external factors or transmission line ends, and ensure the test accuracy of the last group of transmission lines, after performing the first insertion loss test on the last group of transmission lines, the two ends of the circuit board 1 are cut to a predetermined length for a second insertion loss test, making the test accuracy more accurate.

[0050] For example, N equals four. Circuit board 1 has four substrate layers from top to bottom. The transmission lines arranged on the four substrate layers from top to bottom are: transmission line L1, transmission line L2, transmission line L3, and transmission line L4, with the length relationship being: transmission line L2 > transmission line L3 > transmission line L4 > L1. Based on the data information of circuit board 1, the four sets of transmission lines are tested sequentially in descending order of length. The specific steps are as follows:

[0051] S100, such as Figure 3 As shown, the two ends of transmission line L2 are used as the cutting reference. Figure 3Using the two cutting surfaces C1 as cutting references, the two ends of circuit board 1 are cut to expose the two ends of transmission line L2; as follows Figure 4 As shown, the two probes 2 are respectively brought into contact with the two exposed ends of the transmission line L2 to make the test line connected, and the first insertion loss test is performed to obtain the first insertion loss test value S of the transmission line L2 with length X1. 11 ;

[0052] S200, such as Figure 5 As shown, the two ends of the transmission line L3 are used as the cutting reference to continue cutting the two ends of the circuit board 1. Figure 5 The two cutting surfaces C2 are used as cutting references, such as Figure 6 As shown, after cutting, both ends of transmission line L3 are exposed, while the length of transmission line L2 is shortened and both ends are exposed, resulting in transmission line L2 of length Y1. Two probes 2 are then placed in contact with the exposed ends of transmission line L2 of length Y1 to connect the test circuit, thus obtaining the second insertion loss test value S of transmission line L2 of length Y1. 21 Finally, the insertion loss test value S of the transmission line L2 per unit length is obtained using the de-embedding algorithm. 31 S 31 =(S 11 -S 21 ) / (X1-Y1).

[0053] S300, such as Figure 7 As shown, the two probes 2 are respectively brought into contact with the two exposed ends of the transmission line L3 to connect the test line and perform the first insertion loss test, obtaining the first insertion loss test value S of the transmission line L3 with a length of X2. 12 ;

[0054] S400. Using the two ends of transmission line L4 as the cutting reference, continue cutting the two ends of circuit board 1, exposing the two ends of transmission line L4. At the same time, shorten the length of transmission line L3 and expose its two ends, obtaining transmission line L3 of length Y2. Contact the two probes 2 with the two exposed ends of transmission line L3 of length Y2 respectively to make the test line connected, and obtain the second insertion loss test value S of transmission line L3 of length Y2. 22 Finally, the insertion loss test value S of the transmission line L3 per unit length is obtained using the de-embedding algorithm. 32 S 32 =(S 12 -S 22 ) / (X2-Y2).

[0055] S500. Contact the two probes 2 with the two exposed ends of the transmission line L4 respectively to connect the test line and perform the first insertion loss test to obtain the first insertion loss test value S of the transmission line L4 with a length of X3. 13 ;

[0056] S600. Using the two ends of transmission line L1 as the cutting reference, continue cutting the two ends of circuit board 1, exposing the two ends of transmission line L1. At the same time, shorten the length of transmission line L4 and expose both ends, obtaining transmission line L4 of length Y3. Contact the two probes 2 with the exposed ends of transmission line L4 of length Y3 respectively to make the test circuit connected, and obtain the second insertion loss test value S of transmission line L4 of length Y3. 23 Finally, the insertion loss test value S of the transmission line L4 per unit length is obtained using the de-embedding algorithm. 33 S 33 =(S 13 -S 23 ) / (X3-Y3).

[0057] S700. Contact the two probes 2 with the two exposed ends of the transmission line L1 respectively to connect the test line and perform the first insertion loss test to obtain the first insertion loss test value S of the transmission line L1 with a length of X4. 14 ;

[0058] S800. Continue cutting the circuit board 1 to a set length at both ends, shortening the transmission line L1 and exposing both ends to obtain a transmission line L1 of length Y4. Place the two probes 2 into the exposed ends of the transmission line L1 of length Y4 to connect the test circuit, and obtain the second insertion loss test value S of the transmission line L1 of length Y4. 24 Finally, the insertion loss test value S of the transmission line L1 per unit length is obtained using the de-embedding algorithm. 34 S 34 =(S 14 -S 24 ) / (X4-Y4).

[0059] The above steps involve multiple cuts to circuit board 1 and multiple sets of tests, thus achieving insertion loss testing for all transmission lines.

[0060] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art will be able to make various obvious changes, readjustments, and substitutions without departing from the scope of protection of the present invention. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.

Claims

1. A method for testing insertion loss on a circuit board, characterized in that, include: The circuit board (1) is fixed, and the two ends of the circuit board (1) are cut with the two ends of the transmission line as the cutting reference to expose the two ends of the transmission line. Two probes (2) are respectively brought into contact with the two exposed ends of the transmission line to perform the first insertion loss test and obtain the first insertion loss test value S1 of the transmission line with a length of X. Continue to cut the two ends of the circuit board (1) to a set length, so that the length of the transmission line is shortened and the two ends are exposed, and the transmission line with a length of Y is obtained. The two probes (2) are respectively brought into contact with the two exposed ends of the transmission line of length Y to perform a second insertion loss test and obtain the second insertion loss test value S2 of the transmission line of length Y. The insertion loss test value S3 per unit length of the transmission line is calculated using a de-embedding algorithm. The formula for calculating the insertion loss test value S3 is: S3=(S1-S2) / (XY). The circuit board (1) was cut multiple times and multiple sets of tests were performed in sequence to achieve insertion loss testing of all the transmission lines.

2. The circuit board insertion loss testing method according to claim 1, characterized in that, The circuit board (1) has N substrate layers from top to bottom, where N≥2. Each substrate layer has a set of transmission lines. The N sets of transmission lines are tested in order from longest to shortest. The two ends of the i-th test transmission line extend beyond the two ends of the (i+1)-th test transmission line. During the test, after exposing the two ends of the i-th test transmission line and performing the first insertion loss test on the i-th test transmission line, the two ends of the circuit board (1) are cut again with the two ends of the (i+1)-th test transmission line as the cutting reference. While exposing the two ends of the (i+1)-th test transmission line, the length of the i-th test transmission line is shortened and the two ends are exposed, so as to perform the second insertion loss test on the i-th test transmission line.

3. The circuit board insertion loss testing method according to claim 2, characterized in that, After cutting the two ends of the transmission line of the Nth test as the cutting reference, and performing a second insertion loss test on the transmission line of the N-1th test, performing a first insertion loss test on the transmission line of the Nth test, and then continuing to cut the two ends of the circuit board (1) to a set length, so that the length of the transmission line of the Nth test becomes shorter and the two ends are exposed, so as to perform a second insertion loss test on the transmission line of the Nth test.

4. The circuit board insertion loss testing method according to claim 1, characterized in that, When the two ends of the circuit board (1) are cut with the two ends of the transmission line as the cutting reference, the cutting surface covers the entire end face of the circuit board (1); when the circuit board (1) is cut to a set length, the cutting surface covers the entire end face of the circuit board (1).

5. The circuit board insertion loss testing method according to claim 1, characterized in that, When cutting the two ends of the circuit board (1) with the two ends of the transmission line as the cutting reference, the two ends of the circuit board (1) are cut in a direction perpendicular to the top surface of the circuit board (1).

6. The circuit board insertion loss testing method according to claim 1, characterized in that, While continuing to cut the circuit board (1) to a set length, both ends of the circuit board (1) are cut in a direction perpendicular to the top surface of the circuit board (1).

7. The circuit board insertion loss testing method according to claim 1, characterized in that, During the first insertion loss test and the second insertion loss test of the transmission line, the probe (2) is moved by the driving mechanism and the probe (2) comes into contact with the transmission line.

8. The circuit board insertion loss testing method according to claim 7, characterized in that, During the first insertion loss test and the second insertion loss test of the transmission line, the two probes (2) are positioned opposite each other and are both connected to the same driving mechanism. The driving mechanism drives the two probes (2) to move in directions that are closer to each other or further away from each other.

9. The circuit board insertion loss testing method according to claim 1, characterized in that, Fixing the circuit board (1) includes clamping the circuit board (1) with a clamp.

10. The circuit board insertion loss testing method according to claim 9, characterized in that, The clamp includes a drive member and two clamping plates (3) arranged opposite to each other. The drive member can drive the two clamping plates (3) to move closer or further apart. When the two clamping plates (3) move closer together, the two clamping plates (3) can clamp the circuit board (1).

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