Ultrahigh heart rate electrocardio acquisition system

Abstract

The invention discloses an ultra-high heart rate electrocardio acquisition system, which comprises a signal acquisition unit adopting an ADS131E08 chip and supporting 8 channels, a 24-bit delta-sigma ADC (Analog to Digital Converter) and programmable gain amplification; the dynamic sampling rate adjusting unit is used for dynamically adjusting the sampling rate between 1kSPS and 64kSPS according to the heart rate change, and the sampling rate is increased to be greater than or equal to 2kSPS when the heart rate exceeds 200 times per minute; a low-noise design circuit has a common-mode rejection ratio greater than or equal to 110dB, a dynamic range greater than or equal to 118dB and total harmonic distortion less than or equal to-90dB, and power frequency interference is suppressed; the morphological enhancement module is used for enhancing QRS wave group characteristics by using digital morphological filtering; the multi-lead fusion module is used for fusing multi-lead signals through time sequence alignment and R-wave phase difference analysis; and the anti-interference module is integrated with a hardware comparator, and is used for lead falling detection and dynamic digital notch filtering. The system is suitable for researches on myocardial ischemia, arrhythmia and drug cardiotoxicity. Compared with the prior art, the device has the advantages of being simple in structure, low in cost, high in precision, high in reliability and the like, and can effectively solve the problem of animal ultrahigh heart rate electrocardio collection.

Description

Technical Field

[0001] The present application relates to the field of biomedical electronic technology, and in particular to an ultra-high heart rate electrocardiogram (ECG) acquisition system. Background Art

[0002] Traditional animal ECG acquisition equipment is mostly designed for animals with lower heart rates or physiological parameters similar to those of humans. Its sampling rate, dynamic range, and anti-interference capabilities often make it difficult to accommodate signals with very high heart rates. Existing ECG systems have the following shortcomings:

[0003] Limited heart rate range: Ordinary ECG monitors mostly support heart rate acquisition of up to 200 to 300 beats per minute. When faced with heart rates of mice or experimental rats exceeding 500 beats per minute, signal details are lost or the waveform is distorted.

[0004] Insufficient dynamic range: At high heart rates, the ECG waveform amplitude increases (the QRS wave is steep), and at the same time, interference signals such as muscle potentials and respiratory artifacts increase. Traditional analog front-ends are prone to saturation and cannot take into account both weak ECG amplitudes and sudden high peak values.

[0005] Severe power frequency interference: In laboratory environments, 50 / 60Hz power grid interference can easily mix into ECG signals. Traditional hardware filtering (such as analog notching) increases structural complexity and power consumption, and may still cause loss of useful signals.

[0006] High power consumption: Continuous high-speed sampling and complex analog filtering design make traditional multi-channel systems consume a lot of power, which is not conducive to long-term monitoring or battery-powered applications.

[0007] Complex hardware: To be compatible with multi-lead signals and achieve high precision, traditional systems often use multi-stage filtering and large-size analog amplifiers, which increases the hardware size and cost.

[0008] These issues make it difficult for existing ECG acquisition systems to simultaneously meet the requirements of high accuracy, wide dynamic range, low noise, high interference immunity, and low power consumption when monitoring experimental animals with very high heart rates. Therefore, a new design solution is needed to address these challenges. Summary of the Invention

[0009] In view of the deficiencies in the prior art, the present invention aims to provide an ultra-high heart rate electrocardiogram acquisition system to solve the problems raised in the above background technology.

[0010] According to one aspect of the present application, a very high heart rate electrocardiogram acquisition system is characterized by comprising:

[0011] A signal acquisition unit comprising at least one ADS131E08 chip configured in differential input mode, supporting eight input channels, a 24-bit delta-sigma ADC, a built-in programmable gain amplifier (PGA), and an internal reference source. The built-in programmable gain amplifier provides 1x, 2x, 4x, and 8x gain levels to accommodate ECG signals of varying amplitudes.

[0012] A dynamic sampling rate adjustment unit detects heart rate changes in real time through a microcontroller and dynamically adjusts the sampling rate between 1kSPS and 64kSPS. When the heart rate exceeds 200 beats / minute, the sampling rate is increased to ≥2kSPS to capture QRS waveform details.

[0013] A low-noise design circuit, including a high common-mode rejection ratio (≥110dB) instrumentation amplifier, a right leg drive (RLD) circuit, and a second-order low-pass filter network, enables the system to achieve a dynamic range of ≥118dB and total harmonic distortion ≤-90dB at 1kSPS, while also suppressing 50 / 60Hz power frequency interference.

[0014] The morphological enhancement module uses a digital morphological filter that combines closing and opening operations, using a structure element with a width of 3 to 5 sampling points to enhance the QRS complex characteristics and suppress baseline drift;

[0015] The multi-lead fusion module synchronously collects at least two lead signals and generates a fused ECG signal through time alignment and R-wave phase difference analysis. The lead weights are dynamically adjusted according to the signal-to-noise ratio.

[0016] An anti-interference module, including a hardware comparator, a lead-off detection circuit, and a software digital notch filter. The comparator sets positive and negative thresholds to mark amplitude mutation signals. Lead-off detection is achieved through impedance monitoring. The digital notch filter dynamically switches between 50 / 60Hz suppression modes.

[0017] The system adopts a low-power architecture as a whole, integrates sleep mode and dynamic power management, and is suitable for ECG acquisition of anesthetized animals at a heart rate of 15 to 500 beats per minute. It also supports myocardial ischemia and arrhythmia model research and drug cardiotoxicity assessment.

[0018] Preferably, the input channel configuration of the ADS131E08 chip is:

[0019] At least three channels for limb leads (I, II, III) and two channels for chest leads (V1, V2);

[0020] Each channel is equipped with a high-pass filter with a cutoff frequency of 0.5Hz and a low-pass filter with a cutoff frequency of 150Hz.

[0021] The gain of the built-in programmable gain amplifier is automatically adjusted according to the signal amplitude, and when the peak-to-peak value of the QRS wave exceeds 80% of the ADC range, the gain downshift protection is triggered.

[0022] Preferably, the dynamic sampling rate adjustment unit performs the following steps:

[0023] Calculate the interval between adjacent R waves (RR interval) in real time. When the interval is less than 120ms, increase the sampling rate to ≥4kSPS.

[0024] If the intervals of five consecutive adjacent R waves are greater than 400ms, the sampling rate is reduced to 1kSPS;

[0025] A transition buffer mechanism is used when the sampling rate is switched to avoid data loss.

[0026] Preferably, the processing flow of the morphological enhancement module includes:

[0027] Perform a closing operation on the original signal: use a flat structure element with a width of 5 sampling points to perform expansion and then erosion to enhance the continuity of the QRS wave;

[0028] Perform an open operation on the closed operation result: perform corrosion and then expansion using a structure element with a width of 3 sampling points to eliminate high-frequency noise;

[0029] The morphologically processed signal is differentiated from the original signal to extract the QRS wave envelope features.

[0030] Preferably, the multi-lead fusion module is implemented by the following steps:

[0031] Perform R wave candidate detection on each lead signal and generate a time mark sequence;

[0032] Calculate the time deviation of R wave markers of different leads. If the deviation exceeds 10ms, the abnormal lead data will be eliminated.

[0033] The retained lead signals are weighted averaged, with the weights being proportional to the signal-to-noise ratio (SNR) of each lead.

[0034] Preferably, the lead-off detection method of the anti-interference module includes:

[0035] Apply a 10kHz, 10μA AC detection signal to each lead;

[0036] Monitor changes in electrode impedance. If the impedance value exceeds 1 MΩ for 200 ms, it is determined to be lead-off.

[0037] Trigger an alarm and pause data collection on the abnormal channel.

[0038] Preferably, the low power consumption architecture implementation includes:

[0039] The microcontroller enters deep sleep mode when there is no signal processing task, and only the ADC clock is kept running;

[0040] A time-sharing power supply strategy is used to power off the analog front-end circuits of inactive leads;

[0041] The data storage module adopts intermittent writing mode, writing cache data once every 10 seconds.

[0042] Preferably, when the system is used for electrocardiogram monitoring of anesthetized animals:

[0043] The electrodes were needle-type and implanted subcutaneously in the limbs and precordial area of ​​rats, with a contact impedance of ≤500Ω;

[0044] When the system detects a heart rate greater than 450 beats / minute, it automatically enables 64kSPS sampling rate and ×1 gain mode;

[0045] The ST segment deviation is calculated in real time, and a myocardial ischemia warning is triggered when the deviation exceeds 0.2mV.

[0046] Preferably, the implementation of the digital notch filter includes:

[0047] Adaptive LMS algorithm is used to eliminate power frequency interference, with an update step size of μ = 0.02;

[0048] Insert a compensating delay into the filtered signal to make the phases of the signals before and after processing consistent;

[0049] When the power frequency fluctuation is detected to exceed ±1Hz, the notch center frequency is automatically adjusted.

[0050] Preferably, the system verifies the signal validity by the following steps:

[0051] QRS width, R wave amplitude, and ST slope were calculated for each cardiac cycle;

[0052] If the coefficient of variation of the parameter is >15% within three consecutive cycles, it is determined to be an artifact and the data is discarded;

[0053] A forward prediction algorithm is used to fill in the deleted data segments to maintain the continuity of heart rate calculation.

[0054] The technical effects of the present invention are:

[0055] 1. The present invention can collect ECG signals with high fidelity within an ultra-high heart rate range of 15 to 500 beats per minute, and maintain waveform distortion under critical heart rate conditions;

[0056] 2. The system dynamically adjusts the sampling rate and gain to accurately capture weak voltage signals within a wide dynamic range, ensuring that even strong signals are not saturated;

[0057] 3. Multi-lead signal fusion and real-time digital filtering significantly improve signal quality, eliminating the need for complex analog filter design and thus simplifying the hardware structure;

[0058] 4. The overall system power consumption is low, suitable for long-term continuous monitoring, and the hardware layout is compact, which is conducive to laboratory or wearable device applications;

[0059] Compared with the existing technology, the above technical solution has the advantages of simple structure, low cost, high precision and strong reliability, and can effectively solve the technical difficulties in collecting ECG data of animals with ultra-high heart rates. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] Figure 1 This is a structural block diagram of an ultra-high heart rate electrocardiogram acquisition system according to an embodiment of the present application.

[0061] Figure 2 This is a flow chart of a signal processing algorithm for an ultra-high heart rate electrocardiogram acquisition system according to an embodiment of the present application. DETAILED DESCRIPTION

[0062] The following combination Figure 1 and Figure 2 and embodiments, which describe the hardware composition, functional modules and processing flow of the present invention in detail, but are not limited to these examples.

[0063] In one embodiment, a very high heart rate electrocardiogram (ECG) acquisition system includes:

[0064] The signal acquisition unit includes at least one ADS131E08 chip. The chip is configured in differential input mode and supports 8 input channels, a 24-bit delta-sigma ADC, a built-in programmable gain amplifier (PGA), and an internal reference source. The PGA provides 1x, 2x, 4x, and 8x gain levels to accommodate ECG signals of different amplitudes. The input channel configuration of the ADS131E08 chip is as follows:

[0065] At least three channels for limb leads (I, II, III) and two channels for chest leads (V1, V2);

[0066] Each channel is equipped with a high-pass filter with a cutoff frequency of 0.5Hz and a low-pass filter with a cutoff frequency of 150Hz.

[0067] The PGA gain is automatically adjusted according to the signal amplitude. When the QRS peak-to-peak value exceeds 80% of the ADC range, the gain downshift protection is triggered.

[0068] The dynamic sampling rate adjustment unit uses a microcontroller to detect heart rate changes in real time and dynamically adjusts the sampling rate between 1 kSPS and 64 kSPS. When the heart rate exceeds 200 beats / minute, the sampling rate is increased to ≥ 2 kSPS to capture QRS waveform details. The dynamic sampling rate adjustment unit performs the following steps:

[0069] Calculate the interval between adjacent R waves (RR interval) in real time. When the interval is less than 120ms, increase the sampling rate to ≥4kSPS.

[0070] If five consecutive RR intervals are greater than 400ms, the sampling rate is reduced to 1kSPS;

[0071] A transition buffer mechanism is used when the sampling rate is switched to avoid data loss.

[0072] The low-noise design circuit includes a high common-mode rejection ratio (CMRR) (≥110dB) instrumentation amplifier, a right-leg drive (RLD) circuit, and a second-order low-pass filter network. This enables the system to achieve a dynamic range of ≥118dB and total harmonic distortion of ≤-90dB at 1kSPS, while also suppressing 50 / 60Hz power frequency interference.

[0073] The morphological enhancement module uses digital morphological filtering that combines closing and opening operations, using a structuring element with a width of 3 to 5 sampling points to enhance QRS complex features and suppress baseline drift. The processing flow of the morphological enhancement module includes:

[0074] Perform a closing operation on the original signal: use a flat structure element with a width of 5 sampling points to perform expansion and then erosion to enhance the continuity of the QRS wave;

[0075] Perform an open operation on the closed operation result: perform corrosion and then expansion using a structure element with a width of 3 sampling points to eliminate high-frequency noise;

[0076] The morphologically processed signal is differentiated from the original signal to extract the QRS wave envelope features.

[0077] The multi-lead fusion module synchronously collects at least two lead signals and generates a fused ECG signal through time alignment and R-wave phase difference analysis. The lead weights are dynamically adjusted according to the signal-to-noise ratio. The multi-lead fusion module is implemented by the following steps:

[0078] Perform R wave candidate detection on each lead signal and generate a time mark sequence;

[0079] Calculate the time deviation of R wave markers of different leads. If the deviation exceeds 10ms, the abnormal lead data will be eliminated.

[0080] The retained lead signals are weighted averaged, with the weights being proportional to the signal-to-noise ratio (SNR) of each lead.

[0081] The anti-interference module includes a hardware comparator, a lead-off detection circuit, and a software digital notch filter. The comparator sets positive and negative thresholds to mark amplitude mutation signals. Lead-off detection is achieved through impedance monitoring. The digital notch filter dynamically switches between 50 / 60Hz suppression modes. The lead-off detection method of the anti-interference module includes:

[0082] Apply a 10kHz, 10μA AC detection signal to each lead;

[0083] Monitor changes in electrode impedance. If the impedance value exceeds 1 MΩ for 200 ms, it is determined to be lead-off.

[0084] Trigger an alarm and pause data collection on the abnormal channel.

[0085] The implementation of a digital notch filter includes:

[0086] Adaptive LMS algorithm is used to eliminate power frequency interference, with an update step size of μ = 0.02;

[0087] Insert a compensating delay into the filtered signal to make the phases of the signals before and after processing consistent;

[0088] When the power frequency fluctuation is detected to exceed ±1Hz, the notch center frequency is automatically adjusted.

[0089] The system adopts a low-power architecture with integrated sleep mode and dynamic power management. It is suitable for ECG acquisition in anesthetized animals at heart rates of 15 to 500 beats per minute. It also supports myocardial ischemia and arrhythmia model research and drug cardiotoxicity assessment. The low-power architecture is implemented in the following ways:

[0090] The microcontroller enters deep sleep mode when there is no signal processing task, and only the ADC clock is kept running;

[0091] A time-sharing power supply strategy is used to power off the analog front-end circuits of inactive leads;

[0092] The data storage module adopts intermittent writing mode, writing cache data once every 10 seconds.

[0093] When the system is used for ECG monitoring of anesthetized animals:

[0094] The electrodes were needle-type and implanted subcutaneously in the limbs and precordial area of ​​rats, with a contact impedance of ≤500Ω;

[0095] When the system detects a heart rate greater than 450 beats / minute, it automatically enables 64kSPS sampling rate and ×1 gain mode;

[0096] The ST segment deviation is calculated in real time, and a myocardial ischemia warning is triggered when the deviation exceeds 0.2mV.

[0097] The system verifies the signal validity through the following steps:

[0098] QRS width, R wave amplitude, and ST slope were calculated for each cardiac cycle;

[0099] If the coefficient of variation of the parameter is >15% within three consecutive cycles, it is determined to be an artifact and the data is discarded;

[0100] A forward prediction algorithm is used to fill in the deleted data segments to maintain the continuity of heart rate calculation.

[0101] Example 1: ECG monitoring in a rat myocardial ischemia model

[0102] Hardware Configuration

[0103] Electrode placement: Needle electrodes were implanted in the rat's right forelimb (RA), left hindlimb (LL), and cardiac apex (V1), with contact impedance ≤ 300 Ω. ADS131E08 configuration: sampling rate 4 kSPS, PGA gain × 4, reference voltage 2.4 V.

[0104] Microcontroller: STM32L476RG, main frequency 80MHz, low power mode enabled.

[0105] Signal processing flow

[0106] 1. Data acquisition: Synchronously collect the signals of lead II (RA-LL) and lead V1, and input them into the ADC after 0.5-150Hz bandpass filtering;

[0107] 2. Dynamic sampling rate adjustment: The initial sampling rate is 2kSPS, and it switches to 4kSPS after the heart rate is detected to rise to 400 beats / min (RR interval 150ms);

[0108] 3. Morphological enhancement: Perform closing operation (structural element width 5 points) → opening operation (3 points) → difference processing on the II lead signal to enhance ischemic features such as ST segment elevation;

[0109] 4. Multi-lead fusion: Lead V1 is marked as low SNR (weight 0.3) due to respiratory artifact, and lead II is weighted 0.7. After fusion, the accuracy of ST segment offset measurement is improved by 40%;

[0110] 5. Anti-interference processing: Adaptive notch filter eliminates 50Hz interference (suppression ratio 82dB), and the lead-off detection module monitors impedance changes in real time.

[0111] Results: The system worked continuously for 6 hours and successfully captured ischemia-induced ST segment elevation (0.25 mV) and T wave inversion, with a data integrity rate of >99.5%.

[0112] Example 2: Cardiotoxicity Assessment of Drugs in Mice

[0113] Hardware Configuration

[0114] Electrodes: Surface patch electrodes were placed on the limbs of mice, chest lead V2;

[0115] ADS131E08 configuration: sampling rate 8kSPS (heart rate 450 beats / min), gain × 2;

[0116] Wireless transmission: Upload heart rate and QT interval data to the PC every 5 seconds via the BLE module.

[0117] Key Algorithms

[0118] 1. QT interval calculation: Locate the Q wave start and T wave end in the morphologically enhanced signal, calculate the QT interval, and correct for heart rate (Bazett formula).

[0119] 2. Cardiac toxicity warning: When the QT interval is prolonged by more than 10% and accompanied by premature ventricular contractions (PVCs), an audible and visual alarm is triggered;

[0120] 3. Low power management: The microcontroller enters STOP mode between data transmissions, reducing overall power consumption to 35mW.

[0121] Results: The system detected an increase in the QT interval from 68ms to 82ms after drug treatment and recorded three PVC events. The data were verified to be consistent with FDA-approved ECG analysis software.

[0122] In summary, the ECG acquisition system of this invention, using ADS131E08-based hardware and advanced digital signal processing algorithms, achieves high-precision, low-noise acquisition and analysis of ECG signals from anesthetized animals at very high heart rates. The system boasts strong dynamic adaptability and anti-interference performance, while maintaining low power consumption and simplified hardware, meeting the ECG monitoring needs of modern life science experiments.

[0123] The above embodiments are intended only to illustrate the technical solutions of the embodiments of the present application and are not intended to limit them. Although the embodiments of the present application have been described in detail with reference to the aforementioned embodiments, it should be understood by those skilled in the art that, without departing from the spirit and scope defined by the claims of the present application, they may still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein with equivalents.

Claims

1. An ultra-high heart rate electrocardiogram acquisition system, characterized in that: include: A signal acquisition unit comprising at least one ADS131E08 chip configured in differential input mode, supporting eight input channels, a 24-bit delta-sigma ADC, a built-in programmable gain amplifier (PGA), and an internal reference source. The built-in programmable gain amplifier provides 1x, 2x, 4x, and 8x gain levels to accommodate ECG signals of varying amplitudes. A dynamic sampling rate adjustment unit detects heart rate changes in real time through a microcontroller and dynamically adjusts the sampling rate between 1kSPS and 64kSPS. When the heart rate exceeds 200 beats / minute, the sampling rate is increased to ≥2kSPS to capture QRS waveform details. A low-noise design circuit, including a high common-mode rejection ratio (≥110dB) instrumentation amplifier, a right leg drive (RLD) circuit, and a second-order low-pass filter network, enables the system to achieve a dynamic range of ≥118dB and total harmonic distortion ≤-90dB at 1kSPS, while also suppressing 50 / 60Hz power frequency interference. The morphological enhancement module uses a digital morphological filter that combines closing and opening operations, using a structure element with a width of 3 to 5 sampling points to enhance the QRS complex characteristics and suppress baseline drift; The multi-lead fusion module synchronously collects at least two lead signals and generates a fused ECG signal through time alignment and R-wave phase difference analysis. The lead weights are dynamically adjusted according to the signal-to-noise ratio. An anti-interference module, including a hardware comparator, a lead-off detection circuit, and a software digital notch filter. The comparator sets positive and negative thresholds to mark amplitude mutation signals. Lead-off detection is achieved through impedance monitoring. The digital notch filter dynamically switches between 50 / 60Hz suppression modes. The system adopts a low-power architecture as a whole, integrates sleep mode and dynamic power management, and is suitable for ECG acquisition of anesthetized animals at a heart rate of 15 to 500 beats per minute. It also supports myocardial ischemia and arrhythmia model research and drug cardiotoxicity assessment.

2. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The input channel configuration of the ADS131E08 chip is: At least three channels for limb leads (I, II, III) and two channels for chest leads (V1, V2); Each channel is equipped with a high-pass filter with a cutoff frequency of 0.5Hz and a low-pass filter with a cutoff frequency of 150Hz. The gain of the built-in programmable gain amplifier is automatically adjusted according to the signal amplitude, and when the peak-to-peak value of the QRS wave exceeds 80% of the ADC range, the gain downshift protection is triggered.

3. The ultra-high heart rate ECG acquisition system according to claim 1, characterized in that: The dynamic sampling rate adjustment unit performs the following steps: Calculate the interval between adjacent R waves (RR interval) in real time. When the interval is less than 120ms, increase the sampling rate to ≥4kSPS. If the intervals of five consecutive adjacent R waves are greater than 400ms, the sampling rate is reduced to 1kSPS; A transition buffer mechanism is used when the sampling rate is switched to avoid data loss.

4. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The processing flow of the morphological enhancement module includes: Perform a closing operation on the original signal: use a flat structure element with a width of 5 sampling points to perform expansion and then erosion to enhance the continuity of the QRS wave; Perform an open operation on the closed operation result: perform corrosion and then expansion using a structure element with a width of 3 sampling points to eliminate high-frequency noise; The morphologically processed signal is differentiated from the original signal to extract the QRS wave envelope features.

5. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The multi-lead fusion module is implemented by the following steps: Perform R wave candidate detection on each lead signal and generate a time mark sequence; Calculate the time deviation of R wave markers of different leads. If the deviation exceeds 10ms, the abnormal lead data will be eliminated. The retained lead signals are weighted averaged, with the weights being proportional to the signal-to-noise ratio (SNR) of each lead.

6. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The lead-off detection method of the anti-interference module includes: Apply a 10kHz, 10μA AC detection signal to each lead; Monitor changes in electrode impedance. If the impedance value exceeds 1 MΩ for 200 ms, it is determined to be lead-off. Trigger an alarm and pause data collection on the abnormal channel.

7. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The low power consumption architecture implementation method includes: The microcontroller enters deep sleep mode when there is no signal processing task, and only the ADC clock is kept running; A time-sharing power supply strategy is used to power off the analog front-end circuits of inactive leads; The data storage module adopts intermittent writing mode, writing cache data once every 10 seconds.

8. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: When the system is used for ECG monitoring of anesthetized animals: The electrodes were needle-type and implanted subcutaneously in the limbs and precordial area of ​​rats, with a contact impedance of ≤500Ω; When the system detects a heart rate greater than 450 beats / minute, it automatically enables 64kSPS sampling rate and ×1 gain mode; The ST segment deviation is calculated in real time, and a myocardial ischemia warning is triggered when the deviation exceeds 0.2mV.

9. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The implementation of the digital notch filter includes: Adaptive LMS algorithm is used to eliminate power frequency interference, with an update step size of μ = 0.02; Insert a compensating delay into the filtered signal to make the phases of the signals before and after processing consistent; When the power frequency fluctuation is detected to exceed ±1Hz, the notch center frequency is automatically adjusted.

10. The ultra-high heart rate electrocardiogram acquisition system according to claim 1, characterized in that: The system verifies the signal validity through the following steps: QRS width, R wave amplitude, and ST slope were calculated for each cardiac cycle; If the coefficient of variation of the parameter is >15% within three consecutive cycles, it is determined to be an artifact and the data is discarded; A forward prediction algorithm is used to fill in the deleted data segments to maintain the continuity of heart rate calculation.

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