Two-stage anti-attack coupling memristor neural network finite time bisection synchronization control method based on T-S fuzzy model

Abstract

The invention discloses a T-S fuzzy model-based two-stage anti-attack coupling memristive neural network finite time bipartite synchronization control method. The method comprises the steps of establishing a memristive neural network model and a symbol topological structure; converting the memristive neural network model into a fuzzy coupling memristive neural network model, defining a synchronous error state variable, and establishing an error system of the memristive neural network; converting the error system into a form based on differential inclusion; a two-stage finite time synchronous controller is designed, in the first stage, when the state of an error system meets the condition, a pulse controller based on a hybrid trigger mechanism is designed to resist spoofing attacks; and in the second stage, a controller combining finite time control and fixed time control mechanisms is designed to resist DoS attacks. According to the invention, a two-stage controller is designed, and the controller integrates pulse safety control, feedback control and a finite time and control mechanism, and can simultaneously resist spoofing attacks with energy constraints and DoS attacks with random outbreak features.

Description

Technical Field

[0001] The present invention belongs to the technical field of intersection of intelligent control and network security, and is applicable to complex scenarios with network attacks, uncertain interference and multiple delays. Specifically, it relates to a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model. Background Art

[0002] In recent years, neural network-based dynamic modeling technology has demonstrated significant advantages in fields such as artificial intelligence, pattern recognition, and optimization computing. By simulating the nonlinear characteristics of biological neural systems, it provides an efficient solution framework for complex linear and nonlinear programming, image processing, and associative memory tasks. In particular, the close similarity between the physical properties of memristors and biological synapses makes memristive neural networks a key enabler for integrated storage and computing, low-power brain-inspired chips. By leveraging the memory effect and nonlinear conductivity of memristors, memristive neural networks can more accurately depict the dynamic behavior of biological neural networks, laying the physical foundation for neuromorphic computing and intelligent hardware development.

[0003] Research on synchronization of fuzzy-coupled memristor neural networks is a cutting-edge area in the field of intelligent systems and complex networks. Its core goal is to address the synchronization degradation caused by nonlinear memristor weight switching, network topology uncertainty, and external interference in dynamic multi-node coordination. Existing approaches have made progress in robust synchronization control under parameter perturbations by introducing the TS fuzzy model to regularize the dynamics and topological uncertainty of memristors and constructing dual-channel, non-fragile control mechanisms (e.g., a hybrid time-delay compensation channel based on an improved Jensen inequality and a memory-based sampling control channel driven by a Bernoulli sequence). These approaches have partially addressed challenges such as finite-time / asymptotic synchronization, time-delay compensation, and parameter uncertainty handling. However, current approaches still have significant limitations: First, controller designs are often based on the assumption of ideal communication, lacking security control mechanisms against network security threats such as spoofing and denial-of-service attacks. Second, existing frameworks struggle to cohesively handle multiple delays, uncertain interference, and finite-time binary synchronization requirements, limiting their applicability in dynamic and complex scenarios such as the Industrial Internet of Things and multi-agent adversarial collaboration. The above defects restrict the engineering application of memristive neural networks in high-security and strong real-time scenarios. There is an urgent need to propose an integrated solution that integrates anti-attack collaborative control, delay-interference joint suppression and fast binary synchronization.

[0004] The core challenge of secure communication in networked control systems lies in defending against hybrid attacks (such as channel blocking from DoS attacks and data falsification from spoofing attacks) while maintaining system synchronization stability. For coupled memristor neural networks, their memory effects and non-smooth nonlinearities make the synchronization process amplifying multimodal attacks. Hybrid attacks on both the sensor-controller and controller-actuator channels can disrupt charge-flux balance through spatiotemporal mismatches in synaptic weights, induce error cascades due to coupled structural perturbations, and distort activation functions due to memristor threshold shifts, forming a multi-dimensional threat chain. While existing security control methods can address single attack modes, they lack a coordinated defense mechanism against the multimodal conduction effects and nonlinear dynamic coupling in hybrid attack scenarios. This poses a risk of synchronization instability in high-security scenarios such as the Industrial Internet of Things and distributed collaborative computing. An integrated, attack-resistant synchronization control framework that balances channel attack blocking, topological perturbation suppression, and parameter distortion compensation is urgently needed.

[0005] To address the threat of continuous attacks caused by the injection of false data into communication channels, existing research has employed discontinuous pulse security control strategies. This strategy effectively suppresses the probability of attack success by reducing the frequency of the attack window period. Progress has been made in suppressing deception attacks in multi-agent networks, controlling pulse consistency under DoS attacks, and achieving near-deterministic synchronization of neural networks in random dual-attack scenarios. However, existing pulse security control methods still have significant limitations. First, they lack deep integration with TS fuzzy rules, making it difficult to collaboratively model the dynamic characteristics of synaptic weights in neural networks and compensate for the effects of uncertainties such as parameter perturbations and time-delay disturbances on system robustness. Second, existing research focuses primarily on asymptotic synchronization and lacks theoretical support for the design and stability analysis of pulse control laws under strong constraints on dynamic performance indicators, such as finite and fixed time periods. This results in limited adaptability to industrial scenarios such as real-time decision-making and high-precision coordination. These limitations restrict the universal application of pulse security control in hybrid drive and fault diagnosis of intelligent systems. A new pulse collaborative control framework that integrates fuzzy dynamic compensation, multimodal attack suppression, and strong time-sensitive synchronization is urgently needed. Summary of the Invention

[0006] The present invention aims to solve one of the technical problems existing in the related art at least to a certain extent.

[0007] The purpose of the present invention is to provide a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model. By establishing a memristor neural network model for multiple time delays and TS fuzzy rules and designing a two-stage dynamic anti-attack controller, the problems of insufficient model adaptability, lack of hybrid attack defense mechanism and binary synchronization error quantization in the existing memristor neural network synchronization control are solved, and efficient and secure synchronization under complex attack scenarios is achieved.

[0008] In order to achieve the above-mentioned object, the present invention provides a two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on TS fuzzy model, comprising the following steps:

[0009] S100, establish a memristor neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules;

[0010] S200, performing symbolic topology conversion, defining a canonical transformation matrix based on the structural balance diagram, and converting the memristor neural network model;

[0011] S300, defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network;

[0012] S400, estimating the memristor function based on set-valued mapping and differential inclusion theory, and converting the error system into a form based on differential inclusion;

[0013] S500, design a two-stage finite-time synchronous controller, including:

[0014] Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks;

[0015] Phase 2: Based on the active-dormant alternation characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller that combines finite time control and fixed time control mechanisms is designed to resist DoS attacks, conduct efficient information exchange during the attack intervals, and maintain a safe state during the attack period.

[0016] A further preferred technical solution of the present invention is to establish a memristive neural network model and a symbolic topology structure for multiple time delays and TS fuzzy rules in step S100, specifically:

[0017] S110, constructing a memristive neural network comprising N node neural network couplings, and expressing the dynamic model of the i-th node of the memristive neural network as:

[0018]

[0019] in, , Represents a node set, N represents the number of nodes; Indicates the Nodes in The state vector at the moment, n represents the dimension of the state vector of each node; represents a positive definite diagonal matrix; 、 and Both represent uncertain disturbances; and represents the activation function;

[0020] Assume that the memristive neural network has Heavy delay, Indicates the Heavy delay, and ; represents the coupling strength; represents a multiplicity set; represents a symbolic function; Represents a constant, when Node and When the nodes have a cooperative relationship , when the relationship is adversarial 0, when there is no connection ;

[0021] and Indicates the The memristor weights of the nodes are:

[0022]

[0023]

[0024] in Indicates the switching jump coefficient, 、 、 and are all real constants, express dimensional vector No. elements, ;

[0025] S120, the dynamic model of the target node of the memristive neural network is expressed as:

[0026]

[0027] in Indicates that the target node is The state vector at time t, and Represents the memristor weight of the target node, which are:

[0028]

[0029]

[0030] S130, representing the N-node neural network as a symbolic topological structure ,in Represents a vertex set, and its index set is recorded as , represents the edge set, Represents the adjacency matrix; if the node and If there is information interaction between , otherwise, ; Assume that the graph There is no self-loop when Represents a vertex and There is a cooperative relationship between Represents a vertex and There is a competitive relationship between them;

[0031] The Laplacian matrix Defined as , degree matrix ,in ; Laplacian matrix Elements Expressed as:

[0032] .

[0033] Preferably, the symbol topology conversion is performed in step S200, a canonical transformation matrix is ​​defined based on the structural balance diagram, and the memristor neural network model is converted; specifically, the following steps are performed:

[0034] S210, Definition Diagram The structural balance of Divide into two subsets and ,and 、 ; That is, for , established; for , Established;

[0035] S220, Design is a structural equilibrium diagram, then there exists is the canonical transformation matrix of the element , making Established, of which ; Let the matrix ,but Established, Matrix is a semi-positive definite matrix with zero row sum, expressed as:

[0036]

[0037] make ,Depend on The structural equilibrium diagram determines the equation If established, ;

[0038] S230, converting the dynamic model of the i-th node of the memristor neural network into the following form:

[0039] .

[0040] Preferably, the step S300 includes defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network; including:

[0041] S310, build TS fuzzy logic rule base ,set up for , for , , for , combined with fuzzy rules, the dynamic model of the i-th node of the memristor neural network converted in step S230 is again converted into the fuzzy dynamic model of the i-th node of the memristor neural network, which is expressed as:

[0042]

[0043] in, is a node The known constant matrix of is a node The memristor matrix; is a measurable premise variable, is a fuzzy set, is a fuzzy set; , , It is Rule No. membership functions, and ;

[0044] S320, converting the dynamic model of the target node in step S120 into a fuzzy memristor neural network target node dynamic model, expressed as:

[0045]

[0046] S330, define the synchronization error state variable between the i-th node and the target node as:

[0047]

[0048] The error system of the memristor neural network is established and expressed as:

[0049]

[0050] in, , .

[0051] Preferably, the step S400 estimates the memristor function based on set-valued mapping and differential inclusion theory, and converts the error system into a form based on differential inclusion; specifically:

[0052] Based on the memristor coefficient and fuzzy rules of the dynamic model of the i-th node of the memristor neural network, a fuzzy memristor matrix is ​​constructed. 、 、 and ;in Elements , Elements , Elements , Elements ;

[0053] According to differential inclusion theory and set-valued mapping, there exists a matrix and , convert the error system of the memristor neural network established in step S330 into the following form:

[0054]

[0055] in, , .

[0056] Preferably, in the first stage of step S500, when the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks, specifically including:

[0057] S511, when the state of the error system When , a pulse controller based on a hybrid trigger mechanism is designed, which can be expressed as:

[0058]

[0059] in, Represents the controller, represents the pulse control gain, Indicates the pulse time, is a set of pulse control sequences that satisfies , represents a Dirac pulse;

[0060] S512, for the coexistence of deception attacks and DoS attacks on the controller-actuator communication channel, a composite attack model of leader-follower neural network topology is constructed.

[0061] when When, Control instructions for each node A spoofing attack occurs in the controller-actuator transmission channel, causing the actuator receiving signal to be injected with tampered data, namely:

[0062]

[0063] in As an attack signal; construct the Bernoulli distributed random variables associated with network nodes To characterize the probability of attack success, assume Independent of each other, their distribution satisfies:

[0064]

[0065] in, is a constant;

[0066] S513: Based on the control instruction after the received signal is tampered with, the controller of the first stage is rewritten as follows:

[0067]

[0068] Under the first stage control, that is When , the error system of the memristor neural network is expressed as:

[0069]

[0070] in, ,set up exist Left continuous, that is , ; After the first stage pulse safety control, ,At this time, the second stage of security control is started.

[0071] Preferably, in the second stage of step S500, a controller combining finite time control and fixed time control mechanisms is designed to resist DoS attacks; specifically, the controller includes:

[0072] S521, the second stage considers the impact of DoS attacks in the communication channel on the limited time synchronization of the system, based on the active-dormant alternation characteristics of DoS attacks, and Represent the DoS attack time period and the attack sleep time period respectively, where the time series is the control moment redefined in the second stage of the controller. During the sleep period, the communication channel works normally; during the attack period, the control input is 0. Based on this, the controller of the second stage is expressed as:

[0073]

[0074] 、 They are:

[0075]

[0076] in, , , , are control gains, , ;

[0077] S522, under the second stage control, i.e. When , the error system of the memristor neural network is expressed as:

[0078]

[0079] The error system of the memristor neural network under the influence of hybrid attacks is boundedly stable in fixed time mean square, realizing secure fixed time mean square synchronization control of the dynamic network and the target network.

[0080] On the other hand, the present invention provides a non-transitory computer-readable storage medium having computer instructions stored thereon, which enable a computer to execute the above-mentioned two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model.

[0081] Another aspect of the present invention provides an electronic device, comprising: a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus, and the processor calls the logic instructions in the memory to execute the above-mentioned two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model.

[0082] On the other hand, the present invention provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer executes the above-mentioned two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model.

[0083] Beneficial effects: The present invention adopts a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model. Aiming at the synchronization control requirements of fuzzy coupled memristor neural networks in complex environments, firstly, by introducing an improved fuzzy membership function and memristor characteristics, a new fuzzy coupled memristor neural network model is established, which effectively solves the limitations of traditional neural network models in dealing with asymmetric activation functions and external disturbances, and provides a new paradigm for the collaborative optimization of complex systems; secondly, in response to the deception attacks and DoS attacks faced by the controller-to-actuator communication channel, a two-stage controller is designed, which integrates pulse security control, feedback control and finite-time and fixed-time control mechanisms, and can simultaneously resist deception attacks with energy constraints and DoS attacks with random burst characteristics; this study breaks through the paradigm that existing pulse security control research is mostly limited to asymptotic synchronization, constructs a finite-time fixed-time binary synchronization analysis framework, and derives a finite-fixed-time synchronization criterion with lower conservatism by constructing a new time-varying piecewise Lyapunov-Krasovskii functional, and establishes a computational model for the upper bound of the synchronization convergence time. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] Figure 1 Schematic diagram of the memristive neural network of the present invention being subjected to deception attack and DoS attack;

[0085] Figure 2 Schematic diagram of the security control method for resisting hybrid attacks at different stages of the present invention;

[0086] Figure 3 This is a topological diagram of the fuzzy memristor coupled dynamic network in Example 2;

[0087] Figure 4 The synchronization error state between the follower and the target under the two-stage safety control of the present invention is Schematic diagram;

[0088] Figure 5 The synchronization error state between the follower and the target under the two-stage safety control of the present invention is Schematic diagram. DETAILED DESCRIPTION

[0089] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the drawings in the present invention. Obviously, the embodiments described are part of the embodiments of the present invention, not all of the embodiments, and they should not be understood as limitations on the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. In the description of the present invention, it should be understood that the terms used are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0090] The problems faced by the present invention are mainly the following points:

[0091] 1. Insufficient adaptability of existing models: Traditional memristive neural network models are limited by a single delay assumption and deterministic coupling topology. They cannot analyze heterogeneous attack scenarios under the synergistic effects of dynamic coupling topologies, multiple delays, and hybrid attacks (spoofing attacks and DoS attacks), resulting in reduced synchronization control accuracy and robustness.

[0092] 2. Lack of hybrid attack defense mechanism: Existing controllers do not design dynamic defense strategies for the time-domain switching characteristics of spoofing attacks and DoS attacks. The attack mode and controller parameters are mismatched, making it difficult to suppress the attack window.

[0093] 3. Difficulty in quantifying binary synchronization errors: There is a lack of effective quantification tools for the dynamics of binary synchronization errors coupled with multiple time delays, pulse disturbances, and fuzzy logic. Existing stability criteria are incompatible with nonlinear memory effects and attack transmission mechanisms. In particular, traditional synchronization time calculation methods ignore the interactive effects of saturation constraints and fuzzy differential inclusions, resulting in estimated time thresholds deviating from actual engineering requirements.

[0094] The following combination Figure 1-Figure 5 The present invention provides a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on a TS fuzzy model, a non-transient computer-readable storage medium, an electronic device, and a computer program product.

[0095] Example 1: This example provides a two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model. The overall idea of ​​the method is:

[0096] A memristor-coupled neural network model integrating multiple time delays and fuzzy rules is constructed, and the time-varying characteristics of the dynamic coupling topology and the nonlinear behavior of the memristor weight switching are approximated by TS fuzzy rules. A heterogeneous attack scenario analysis framework is introduced to model the synergistic mechanism of deception attacks and DoS attacks in the sensor-controller and controller-actuator dual channels, and to characterize the multi-dimensional destructive path of attacks on synaptic weights and activation functions. A two-stage dynamic anti-attack controller is designed, and combined with the differential inclusion theory under fuzzy rules, the influence of multiple time delays and fuzzy logic coupling on the synchronization error dynamics is uniformly analyzed, and the sufficient conditions for finite-time binary synchronization are derived. Integral inequalities and scaling techniques are used to quantify the coupling relationship between attack intensity, delay upper bound and fuzzy membership function, and calculate the upper bound threshold of synchronization time to ensure that the estimated results meet the actual engineering fault tolerance requirements.

[0097] The specific steps are as follows:

[0098] S100. Establish a memristive neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules.

[0099] S110, Consider Finite-time binary synchronization control of a memristor neural network coupled with neural networks (nodes), where each neural network model is a nonlinear system containing deterministic disturbances and multiple time delays. The dynamic model of the i-th node of the memristor neural network is expressed as:

[0100]

[0101] in, , Represents a node set, N represents the number of nodes; Indicates the Nodes in The state vector at the moment, n represents the dimension of the state vector of each node; represents a positive definite diagonal matrix; 、 and Both represent uncertain disturbances; and represents the activation function;

[0102] Assume that the memristive neural network has Heavy delay, Indicates the Heavy delay, and ; represents the coupling strength; represents a multiplicity set; represents a symbolic function; Represents a constant, when Node and When the nodes have a cooperative relationship , when the relationship is adversarial 0, when there is no connection ;

[0103] and Indicates the The memristor weights of the nodes are:

[0104]

[0105]

[0106] in Indicates the switching jump coefficient, 、 、 and are all real constants, express dimensional vector No. elements, ;

[0107] S120, the dynamic model of the target node of the memristive neural network is expressed as:

[0108]

[0109] in Indicates that the target node is The state vector at time t, and Represents the memristor weight of the target node, which are:

[0110]

[0111]

[0112] S130, representing the N-node neural network as a symbolic topological structure ,in Represents a vertex set, and its index set is recorded as , represents the edge set, Represents the adjacency matrix; if the node and If there is information interaction between , otherwise, ; Assume that the graph There is no self-loop when Represents a vertex and There is a cooperative relationship between Represents a vertex and There is a competitive relationship between them;

[0113] The Laplacian matrix Defined as , degree matrix ,in ; Laplacian matrix Elements Expressed as:

[0114] .

[0115] S2. Perform symbolic topology transformation, define the canonical transformation matrix based on the structural balance diagram, and transform the memristor neural network model.

[0116] S210, Definition Diagram The structural balance of Divide into two subsets and ,and 、 ; That is, for , established; for , Established;

[0117] S220, Design is a structural equilibrium diagram, then there exists is the canonical transformation matrix of the element , making Established, of which ; Let the matrix ,but Established, Matrix is a semi-positive definite matrix with zero row sum, expressed as:

[0118]

[0119] make ,Depend on The structural equilibrium diagram determines the equation If established, ;

[0120] S230, converting the dynamic model of the i-th node of the memristor neural network into the following form:

[0121] .

[0122] S3. Define fuzzy logic rules, transform the memristor neural network model into a fuzzy coupled memristor neural network model, define the synchronization error state variable between the i-th node and the target node, and establish the error system of the memristor neural network.

[0123] S310, build TS fuzzy logic rule base ,set up for , for , , for , combined with fuzzy rules, the dynamic model of the i-th node of the memristor neural network converted in step S230 is again converted into the fuzzy dynamic model of the i-th node of the memristor neural network, which is expressed as:

[0124]

[0125] in, is a node The known constant matrix of is a node The memristor matrix; is a measurable premise variable, is a fuzzy set, is a fuzzy set; , , It is Rule No. membership functions, and ;

[0126] S320, converting the dynamic model of the target node in step S120 into a fuzzy memristor neural network target node dynamic model, expressed as:

[0127]

[0128] S330, define the synchronization error state variable between the i-th node and the target node as:

[0129]

[0130] The error system of the memristor neural network is established and expressed as:

[0131]

[0132] in, , .

[0133] S4. Estimate the memristor function based on set-valued mapping and differential inclusion theory, and transform the error system into a form based on differential inclusion.

[0134] Based on the memristor coefficient and fuzzy rules of the dynamic model of the i-th node of the memristor neural network, a fuzzy memristor matrix is ​​constructed. 、 、 and ;in Elements , Elements , Elements , Elements ;

[0135] According to differential inclusion theory and set-valued mapping, there exists a matrix and , convert the error system of the memristor neural network established in step S330 into the following form:

[0136]

[0137] in, , .

[0138] S5. Design a two-stage finite-time synchronous controller, including:

[0139] S510, Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks;

[0140] S511, when the state of the error system When , a pulse controller based on a hybrid trigger mechanism is designed, which can be expressed as:

[0141]

[0142] in, Represents the controller, represents the pulse control gain, Indicates the pulse time, is a set of pulse control sequences that satisfies , represents a Dirac pulse;

[0143] Next, we construct a scenario where deception attacks and DoS attacks coexist in the controller-actuator communication channel. Figure 1 Composite attack model of the leader-follower neural network topology shown.

[0144] S512, for the coexistence of deception attacks and DoS attacks on the controller-actuator communication channel, a composite attack model of leader-follower neural network topology is constructed.

[0145] when When, Control instructions for each node A spoofing attack occurs in the controller-actuator transmission channel, causing the actuator receiving signal to be injected with tampered data, namely:

[0146]

[0147] in As an attack signal; construct the Bernoulli distributed random variables associated with network nodes To characterize the probability of attack success, assume Independent of each other, their distribution satisfies:

[0148]

[0149] in, is a constant;

[0150] S513: Based on the control instruction after the received signal is tampered with, the controller of the first stage is rewritten as follows:

[0151]

[0152] Under the first stage control, that is When , the error system of the memristor neural network is expressed as:

[0153]

[0154] in, ,set up exist Left continuous, that is , ; After the first stage pulse safety control, ,At this time, the second stage of security control is started.

[0155] S520, Phase II: Based on the active-dormant alternating characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller combining finite time control and fixed time control mechanisms is designed to resist DoS attacks, perform efficient information exchange during the attack intervals, and maintain a safe state during the attack duration.

[0156] Because network synchronization relies on the dynamic information exchange between neurons in the follower and leader networks, attackers can trigger a double-destruction effect by periodically blocking communication channels. This causes the network topology to exhibit discontinuous time-varying characteristics, leading to dynamic parameter perturbations in node coupling relationships. Therefore, the second phase focuses on the impact of DoS attacks in the communication channel on the system's finite-time synchronization. By constructing a time-varying coupled topology model that is aware of the attack cycle, efficient information exchange between attacks and maintenance of a secure state during the attack duration are achieved.

[0157] S521, the second stage considers the impact of DoS attacks in the communication channel on the limited time synchronization of the system, based on the active-dormant alternation characteristics of DoS attacks, and They represent the time period of DoS attack and the dormant time period of attack respectively, such as Figure 2 As shown, the time series is the control moment redefined in the second stage of the controller. During the sleep period, the communication channel works normally; during the attack period, the control input is 0. Based on this, the controller of the second stage is expressed as:

[0158]

[0159] 、 They are:

[0160]

[0161] in, , , , are control gains, , ;

[0162] When a periodic DoS attack occurs, the time The information transmission from the controller to the actuator is intercepted, that is, , and during the dormant period The internal signal is restored. The second stage controller The first part consists of three items. Ensure that the network reaches asymptotic or exponential synchronization, which is consistent with The combination can ensure that the network reaches a finite time synchronization and The combination of terms ensures that the network achieves fixed-time synchronization during this phase, and a superlinear design eliminates initial state dependency, ensuring an upper bound on the synchronization time. Asymptotic convergence ensures robustness, finite-time improves transient performance, and fixed-time strengthens attack resistance, ultimately achieving fixed-time bounded synchronization under DoS attacks.

[0163] S522, under the second stage control, i.e. When , the error system of the memristor neural network is expressed as:

[0164]

[0165] The error system of the memristor neural network under the influence of hybrid attacks is boundedly stable in fixed time mean square, realizing secure fixed time mean square synchronization control of the dynamic network and the target network.

[0166] The two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model provided in this embodiment can achieve:

[0167] 1. We propose a memristive neural network model that integrates multiple delays and fuzzy rules, overcoming the dual limitations of a single delay constraint and deterministic coupling in traditional binary synchronization theory. By establishing a mathematical representation that integrates dynamic coupling topology with memory properties, we construct a novel computational framework that can analyze complex heterogeneous attack scenarios and achieve dynamic modeling of the evolution of multimodal network security threats.

[0168] 2. To address the alternating temporal threats of spoofing and DoS attacks faced by controller-actuator communication channels, a two-stage anti-attack control approach is proposed based on pulse control, finite-time control, and fixed-time control mechanisms. By constructing a dynamic switching mechanism driven by attack signatures, this approach overcomes the technical challenge of dynamically reconfiguring security control strategies in hybrid attack scenarios, significantly enhancing the resilience and defense capabilities of networked systems.

[0169] 3. By constructing a Lyapunov functional, we rigorously derive sufficient algebraic criteria for finite-time binary synchronization. From a theoretical perspective, we break through the traditional single time-delay assumption and deterministic interference constraints, establish a stability analysis framework for time-delay-interference coupled systems, and provide an analytical expression for the upper bound of synchronization time, providing a quantitative evaluation benchmark for the robustness analysis and security enhancement of neuromorphic computing systems in complex adversarial environments.

[0170] Example 2: This example provides a specific example to illustrate the two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model of the present invention.

[0171] The first step is to establish a fuzzy memristor neural network model with uncertain perturbations and multiple delays

[0172] In this embodiment, the finite time mean square safety bounded synchronization control of the fuzzy memristor neural network is considered, which includes five follower neural networks and a target network. The topology of the fuzzy memristor neural network is as follows: Figure 3 As shown, the dynamic model of the i-th node of the memristor neural network is expressed as:

[0173]

[0174] in , Indicates the The state of the neural network, , , the weighted fitness of the fuzzy rule is:

[0175]

[0176] Time memristive coefficient ;

[0177] , ,

[0178] , .

[0179] Assume that the uncertain disturbance is:

[0180] ;

[0181] Assume that the activation function is , the delay is , , , the coupling strength is .

[0182] The target neural network dynamics model given in this embodiment is:

[0183]

[0184] In the formula represents the state of the target neural network, , , , , and nonlinear functions , Same value as following neural network.

[0185] In this embodiment, the symbolic topology is given for 5 neural networks. ,in Represents a vertex set, and its index set is recorded as , represents the edge set, Represents the adjacency matrix. If the node and If there is information interaction between , otherwise, ; Assume that the graph There is no self-loop when Represents a vertex and There is a cooperative relationship between Represents a vertex and In this embodiment, the internal coupling weight matrix of the five neural networks is as follows:

[0186]

[0187] Step 2: Introducing hybrid attack modeling

[0188] In this embodiment, the first phase considers the controller-to-actuator channel being attacked by spoofing. Defining the spoofing attack signal , introduce Bernoulli distribution variables Describe the probability of a successful attack and assume that the random variable Independent of each other, represents a positive integer, and:

[0189]

[0190] in is a constant, Denotes that at time t, the random variable The probability of taking the value 1 is equal to a constant , Denotes that at time t, the random variable The probability of taking the value 0 is equal to a constant .

[0191] In the second stage, defining DoS attacks: considering the attack cycle , where the DoS attack duration is .

[0192] The third step is to design a two-stage controller:

[0193] The first stage controller is: ,in ;

[0194] Second stage controller:

[0195] in ,

[0196] In this embodiment, , , , , .

[0197] In this embodiment, under the action of the two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model, when the complex coupled memristor neural network is subjected to a mixed attack, combined with Figure 4 and Figure 5 As shown, the states between each follower neural network and the target neural network ultimately achieve finite-time mean square safe bounded synchronization control.

[0198] Example 3: This embodiment provides a non-transitory computer-readable storage medium having computer instructions stored thereon, which enable a computer to execute a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on a TS fuzzy model, the method comprising the following steps:

[0199] S100, establish a memristor neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules;

[0200] S200, performing symbolic topology conversion, defining a canonical transformation matrix based on the structural balance diagram, and converting the memristor neural network model;

[0201] S300, defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network;

[0202] S400, estimating the memristor function based on set-valued mapping and differential inclusion theory, and converting the error system into a form based on differential inclusion;

[0203] S500, design a two-stage finite-time synchronous controller, including:

[0204] Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks;

[0205] Phase 2: Based on the active-dormant alternation characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller that combines finite time control and fixed time control mechanisms is designed to resist DoS attacks, conduct efficient information exchange during the attack intervals, and maintain a safe state during the attack period.

[0206] Example 4: This embodiment provides an electronic device, which may include: a processor, a communications interface, a memory, and a communications bus, wherein the processor, the communications interface, and the memory communicate with each other via the communications bus. The processor may call logic instructions in the memory to execute a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on a TS fuzzy model, the method comprising the following steps:

[0207] S100, establish a memristor neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules;

[0208] S200, performing symbolic topology conversion, defining a canonical transformation matrix based on the structural balance diagram, and converting the memristor neural network model;

[0209] S300, defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network;

[0210] S400, estimating the memristor function based on set-valued mapping and differential inclusion theory, and converting the error system into a form based on differential inclusion;

[0211] S500, design a two-stage finite-time synchronous controller, including:

[0212] Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks;

[0213] Phase 2: Based on the active-dormant alternation characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller that combines finite time control and fixed time control mechanisms is designed to resist DoS attacks, conduct efficient information exchange during the attack intervals, and maintain a safe state during the attack period.

[0214] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage media include various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0215] Embodiment 5: This embodiment provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can perform a two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on a TS fuzzy model. The method includes the following steps:

[0216] S100, establish a memristor neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules;

[0217] S200, performing symbolic topology conversion, defining a canonical transformation matrix based on the structural balance diagram, and converting the memristor neural network model;

[0218] S300, defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network;

[0219] S400, estimating the memristor function based on set-valued mapping and differential inclusion theory, and converting the error system into a form based on differential inclusion;

[0220] S500, design a two-stage finite-time synchronous controller, including:

[0221] Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks;

[0222] Phase 2: Based on the active-dormant alternation characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller that combines finite time control and fixed time control mechanisms is designed to resist DoS attacks, conduct efficient information exchange during the attack intervals, and maintain a safe state during the attack period.

[0223] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0224] Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented using software plus a necessary general-purpose hardware platform, or of course, hardware. Based on this understanding, the essence of the above technical solution, or the portion that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, or an optical disk, and includes a number of instructions for causing a computer device (such as a personal computer, server, or network device) to execute the methods described in each embodiment or certain portions of the embodiments.

[0225] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on TS fuzzy model, characterized by: The steps include: S100, establish a memristor neural network model and symbolic topology structure for multiple time delays and TS fuzzy rules; S200, performing symbolic topology conversion, defining a canonical transformation matrix based on the structural balance diagram, and converting the memristor neural network model; S300, defining fuzzy logic rules, converting the memristor neural network model into a fuzzy coupled memristor neural network model, defining a synchronization error state variable between the i-th node and the target node, and establishing an error system of the memristor neural network; S400, estimating the memristor function based on set-valued mapping and differential inclusion theory, and converting the error system into a form based on differential inclusion; S500, design a two-stage finite-time synchronous controller, including: Phase 1: When the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks; Phase 2: Based on the active-dormant alternation characteristics of DoS attacks, a dynamic switching strategy driven by attack characteristics is constructed. A controller that combines finite time control and fixed time control mechanisms is designed to resist DoS attacks, conduct efficient information exchange during the attack intervals, and maintain a safe state during the attack period.

2. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model according to claim 1 is characterized in that: In step S100, a memristor neural network model and a symbolic topology structure for multiple time delays and TS fuzzy rules are established, specifically: S110, constructing a memristive neural network comprising N node neural network couplings, and expressing the dynamic model of the i-th node of the memristive neural network as: ； in, , Represents a node set, N represents the number of nodes; Indicates the Nodes in The state vector at the moment, n represents the dimension of the state vector of each node; represents a positive definite diagonal matrix; 、 and Both represent uncertain disturbances; and represents the activation function; Assume that the memristive neural network has Heavy delay, Indicates the Heavy delay, and ; represents the coupling strength; represents a multiplicity set; represents a symbolic function; Represents a constant, when Node and When the nodes have a cooperative relationship , when the relationship is adversarial , when there is no connection ; in, and Indicates the The memristor weights of the nodes are: ； ； in Indicates the switching jump coefficient, 、 、 and are all real constants, express dimensional vector No. elements, ; S120, the dynamic model of the target node of the memristive neural network is expressed as: ； in Indicates that the target node is The state vector at time t, and Represents the memristor weight of the target node, which are: ； ； S130, representing the N-node neural network as a symbolic topological structure ,in Represents a vertex set, and its index set is recorded as , represents the edge set, Represents the adjacency matrix; if the node and If there is information interaction between , otherwise, ; Assume that the graph There is no self-loop when Represents a vertex and There is a cooperative relationship between Represents a vertex and There is a competitive relationship between them; The Laplacian matrix Defined as , degree matrix ,in ; Laplacian matrix Elements Expressed as: 。 3. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model according to claim 2 is characterized in that: Step S200 performs symbolic topology conversion, defines a canonical transformation matrix based on the structural balance diagram, and converts the memristor neural network model; specifically: S210, Definition Diagram The structural balance of Divide into two subsets and ,and 、 ; That is, for , established; for , Established; S220, Design is a structural equilibrium diagram, then there exists is the canonical transformation matrix of the element , making Established, of which ; Let the matrix ,but Established, Matrix is a semi-positive definite matrix with zero row sum, expressed as: ； make ,Depend on The structural equilibrium diagram determines the equation If established, ; S230, converting the dynamic model of the i-th node of the memristor neural network into the following form: 。 4. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model according to claim 3 is characterized in that: Step S300 defines fuzzy logic rules, transforms the memristor neural network model into a fuzzy coupled memristor neural network model, defines the synchronization error state variable between the i-th node and the target node, and establishes the error system of the memristor neural network; including: S310, build TS fuzzy logic rule base ,set up for , for , , for , combined with fuzzy rules, the dynamic model of the i-th node of the memristor neural network converted in step S230 is again converted into the fuzzy dynamic model of the i-th node of the memristor neural network, which is expressed as: ； in, is a node The known constant matrix of is a node The memristor matrix; is a measurable premise variable, is a fuzzy set, is a fuzzy set; , , It is Rule No. membership functions, and ; S320, converting the dynamic model of the target node in step S120 into a fuzzy memristor neural network target node dynamic model, expressed as: ； S330, define the synchronization error state variable between the i-th node and the target node as: ； The error system of the memristor neural network is established and expressed as: ； in, , 。 5. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model according to claim 4 is characterized in that: Step S400 estimates the memristor function based on set-valued mapping and differential inclusion theory, and converts the error system into a form based on differential inclusion; specifically: Based on the memristor coefficient and fuzzy rules of the dynamic model of the i-th node of the memristor neural network, a fuzzy memristor matrix is ​​constructed. 、 、 and ;in Elements , Elements , Elements , Elements ; According to differential inclusion theory and set-valued mapping, there exists a matrix and , convert the error system of the memristor neural network established in step S330 into the following form: ； in, , .

6. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on TS fuzzy model according to claim 5 is characterized in that: In the first stage of step S500, when the error system state meets the conditions, a pulse security controller based on a hybrid trigger mechanism is designed to resist spoofing attacks, specifically including: S511, when the state of the error system When , a pulse controller based on a hybrid trigger mechanism is designed, which can be expressed as: ； in, Represents the controller, represents the pulse control gain, Indicates the pulse time, is a set of pulse control sequences that satisfies , represents a Dirac pulse; S512, for the coexistence of deception attacks and DoS attacks on the controller-actuator communication channel, a composite attack model of leader-follower neural network topology is constructed. when When, Control instructions for each node A spoofing attack occurs in the controller-actuator transmission channel, causing the actuator receiving signal to be injected with tampered data, namely: ； in As an attack signal; construct the Bernoulli distributed random variables associated with network nodes To characterize the probability of attack success, assume Independent of each other, their distribution satisfies: ； in, is a constant; S513: Based on the control instruction after the received signal is tampered with, the controller of the first stage is rewritten as follows: ； Under the first stage control, that is When , the error system of the memristor neural network is expressed as: ； in, ,set up exist Left continuous, that is , ; After the first stage pulse safety control, ,At this time, the second stage of security control is started.

7. The two-stage anti-attack coupled memristor neural network finite time binary synchronization control method based on the TS fuzzy model according to claim 6 is characterized in that: In the second phase of step S500 , a controller combining finite time control and fixed time control mechanisms is designed to resist DoS attacks; Specifically include: S521, the second stage considers the impact of DoS attacks in the communication channel on the limited time synchronization of the system, based on the active-dormant alternation characteristics of DoS attacks, and Represent the DoS attack time period and the attack sleep time period respectively, where the time series is the control moment redefined in the second stage of the controller. During the sleep period, the communication channel works normally; during the attack period, the control input is 0. Based on this, the controller of the second stage is expressed as: ； 、 They are: ； in, , , , are control gains, , ; S522, under the second stage control, i.e. When , the error system of the memristor neural network is expressed as: ； The error system of the memristor neural network under the influence of hybrid attacks is boundedly stable in fixed time mean square, realizing secure fixed time mean square synchronization control of the dynamic network and the target network.

8. A non-transitory computer-readable storage medium, characterized in that Computer instructions are stored thereon, which enable the computer to execute the two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model as described in any one of claims 1 to 7.

9. An electronic device, characterized in that: include: A processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other via the communication bus, and the processor calls logic instructions in the memory to execute the two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model described in any one of claims 1 to 7.

10. A computer program product, characterized in that The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer executes the two-stage anti-attack coupled memristor neural network finite-time binary synchronization control method based on the TS fuzzy model according to any one of claims 1 to 7.

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