Hardware test resource allocation method based on dynamic topology adaptation

Abstract

The invention relates to the technical field of electrical digital data processing, in particular to a hardware test resource allocation method based on dynamic topology adaptation, which comprises the following steps of: 1, constructing a dynamic topology sensing network: acquiring electrical connection signals between devices on a test backboard in real time, generating and periodically updating a topology connection matrix, and establishing a dynamic topology sensing network; the matrix element value represents the on-off state of a physical link between devices, and when a device plugging event is detected, matrix updating is triggered immediately; 2, quantifying resource and task attributes; 3, dynamic resource matching of topology driving is executed; and 4, responding to non-interruption migration of topology change: when the topology connection matrix is updated, executing the step 3 again on the influenced task, and realizing non-interruption switching through new and old resource parallel initialization and signal deviation fault-tolerant verification. Through the dynamic topology adaptation technology, test resources can be dynamically adjusted and matched according to real-time topology and task requirements, and efficient utilization of the resources is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical digital data processing, and in particular to a hardware test resource allocation method based on dynamic topology adaptation. Background Art

[0002] In the field of hardware automated testing, especially in multi-device collaborative testing scenarios (such as chip production line testing and communication base station module testing), the test system needs to manage the dynamic connection between heterogeneous test resources (including digital signal generators, power modules, high-speed acquisition cards, etc.) and the hardware devices under test. Existing technologies generally use static resource allocation strategies. This technical implementation method pre-binds a fixed mapping relationship between test resources and specific devices under test during the test initialization phase and maintains this allocation throughout the entire test cycle. This technical solution has the following inherent drawbacks: The hardware environment under test experiences frequent hot-swap operations (such as replacing chip modules during production) and link failures (such as signal interruption caused by aging backplane connectors). Static allocation strategies require a fixed topology. When such topology changes occur, the previously allocated resources cannot continue communicating due to physical link failures, forcing the test task to be interrupted. For example, in base station testing, replacing a faulty RF module will render the bound signal analyzer resources ineffective. Static strategies match resources solely based on initial task requirements, ignoring changes in resource status and topological relevance during testing. Because resource type and task requirements are matched on a single dimension (typically considering only functional type), high-value resources (such as high-speed acquisition cards) are often allocated to non-critical tasks, while urgent tasks remain in a waiting state due to mismatched resource types. Actual measurement data shows that in a 200-node test environment, the peak idle rate of dedicated power modules using static strategies can reach 35%. Topology changes require manual intervention to reconfigure resource mappings. This process includes releasing resources, switching physical paths, and restarting tasks. For example, in multi-channel memory testing, the average test interruption caused by repairing a single link failure takes over 15 minutes, severely limiting the efficiency of high-throughput production lines.

[0003] Therefore, there is an urgent need for a hardware test resource allocation method based on dynamic topology adaptation to solve the above problems. Summary of the Invention

[0004] Based on the above objectives, the present invention provides a hardware test resource allocation method based on dynamic topology adaptation, comprising: Step 1: Build a dynamic topology-aware network: Collect electrical connection signals between devices on the test backplane in real time, generate and periodically update a topology connection matrix. The matrix element values ​​represent the on / off status of the physical links between devices. Detecting a device plug-in or unplug event immediately triggers a matrix update. Step 2: Quantify resource and task attributes: Poll the hardware status register of the test resource to generate a resource status vector including busy / idle status, remaining available time and resource type code; Parse the task type identifier, required resource type set, task criticality and waiting tolerance time in the test task request, and calculate the task priority weight value; Step 3: Perform topology-driven dynamic resource matching: Calculate the minimum hop length from the idle resource to the device under test based on the topological connection matrix, where the hop length increases with the number of transit devices; The topology-aware matching value is generated by integrating the resource type compatibility, hop path length influencing factors and real-time resource load rate; Multiply the task priority weight value and the topology-aware matching value to obtain the resource adaptation weight, and select the highest weight combination to allocate resources; Step 4: Non-disruptive migration in response to topology changes: When the topology connection matrix is ​​updated, step 3 is re-executed for the affected tasks, and non-disruptive switching is achieved through parallel initialization of new and old resources and signal deviation fault tolerance verification. Beneficial effects of the present invention: 1. This invention takes into account events such as bit error rate exceeding limits and device response timeouts, and calculates weights based on the severity and duration of each event, ensuring an accurate assessment of each event's contribution to the failure rate. This event-based update mechanism ensures that weight updates truly reflect each event's actual impact on the system, thereby improving the accuracy of failure rate weight updates.

[0005] 2. This invention introduces a sliding time window approach, enabling updates to failure rate weights to reflect the stability of the current environment in real time. The length of the sliding time window is negatively correlated with the stability of the test environment, enabling flexible response to varying network or device status changes. This allows for more timely weight updates, ensuring the system can quickly adapt to new failures or changes.

[0006] 3. By normalizing the total contribution of all events to the interval [0, 1], this invention ensures that the contributions of different events can be compared and integrated under the same standard. By using the historical maximum contribution value as the normalization benchmark, the weight update of each event is performed under the same benchmark, effectively avoiding the problem of a single event excessively affecting system stability.

[0007] 4. By calculating the contribution value of each event, this invention fully considers the severity and duration of the event, allowing the system to effectively respond to fault events of varying scales. Severe fault events (such as long-term bit errors or timeouts) will have a greater impact on the weight, while short-term, small-scale faults will not excessively affect the overall stability of the system. This allows the system to make reasonable adjustments based on the actual fault situation, improving the robustness and reliability of the network. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0009] Figure 1 is a flow chart of the steps of the method of the present invention; Figure 2 A flowchart of the steps for generating the topology-aware matching value in step 3 of the method of the present invention; Figure 3 The figure is a flow chart of the steps of the process of determining the phase synchronization threshold value according to the method of the present invention. DETAILED DESCRIPTION

[0010] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments. It is also noted that, to provide a more detailed description, the following embodiments are best and preferred embodiments, and those skilled in the art may employ alternative methods for implementing certain known technologies. Furthermore, the accompanying drawings are intended only to provide a more detailed description of the embodiments and are not intended to limit the present invention.

[0011] See Figure 1-Figure 3 An embodiment of the present invention provides a hardware test resource allocation method based on dynamic topology adaptation. First, in a test environment, electrical connection signals between devices on the backplane are collected in real time. These signals are detected by sensors and converted into a topology connection matrix, which reflects the physical link status (up or down) between each device. When the system detects device insertion or removal or link failure, the topology matrix is ​​immediately updated, ensuring that the topology information reflects the current hardware connection status, thereby preventing resource failures caused by link changes.

[0012] The system periodically polls the hardware status registers of test resources to obtain information such as each resource's usage status (e.g., busy / idle), remaining available time, and resource type, and generates a corresponding resource status vector. This information provides the foundational data for subsequent resource matching. Furthermore, the system analyzes test task requests for information such as task type, resource requirements, task priority, and wait tolerance to calculate the task's priority weight. This calculation is based on the task's urgency and importance, ensuring that urgent tasks receive high-priority resources.

[0013] Based on the dynamic topology connection matrix, the system first calculates the minimum hop path length from the idle resource to the device under test, taking into account the number of transit devices between devices. A shorter hop path length means faster data transmission efficiency and response time. Then, a topology-aware matching value is calculated based on the compatibility of the resource type, the influencing factors of the hop path, and the real-time load of the resource. The system further multiplies the task's priority weight by this matching value to determine the adaptation weight for each task and resource, ultimately selecting the resource with the highest adaptation weight and assigning it to the task.

[0014] When the topology matrix is ​​updated, the system re-evaluates the resource allocation for the affected tasks and re-executes the resource matching process in step 3. To avoid system interruption, the new resources are initialized in parallel with the original resources and signal deviation tolerance is verified to ensure that the tasks can run smoothly on the new resources. This process requires no human intervention and ensures the continuity and efficiency of hardware resource allocation.

[0015] Through the dynamic topology adaptation technology of the present invention, test resources can be dynamically adjusted and matched according to the real-time topology and task requirements, ensuring efficient resource utilization. The topology-aware network can respond to device plugging and unplugging and link failures in real time, avoiding resource failure and test interruption caused by static allocation. In addition, dynamic resource matching enables tasks to be reasonably allocated according to priority and the actual status of resources, improving test efficiency. Especially in the high-throughput environment of the production line, the non-interruption migration technology greatly reduces the time loss caused by fault repair and link switching, and improves the stability and response speed of the overall test system.

[0016] In one possible implementation, whenever the topology connection matrix changes, the system records the time interval between the current change event and the previous event. In this way, the system can obtain a series of time interval data, which provides a basis for subsequent periodic adjustments.

[0017] The system calculates the average of all historical time intervals and sets a first scaling factor. If the most recent time interval is less than the first scaling factor, this indicates frequent topology changes. The system then determines that the test environment may be in a dynamic state and requires more frequent updates to the topology connectivity matrix. To accommodate these changes, the system shortens the topology update cycle to the second scaling factor, ensuring a more timely response to topology changes.

[0018] In addition to monitoring the frequency of changes, the system also observes the duration of the test environment's steady state. When the test environment remains stable for a period of time, the system compares it with the median of its historical steady state duration to determine whether it has entered a stable state. If the steady state duration exceeds the set baseline threshold, the system deems the topology environment stable and can appropriately extend the update cycle. In this case, the system extends the update cycle by a factor of three to reduce unnecessary topology updates and improve resource allocation efficiency.

[0019] The system sets scaling factors by quantifying the complexity of the test environment. Complexity is determined by two factors: the number of concurrently online devices and the frequency of topology changes. The system quantifies the complexity of the test environment based on the product of these two factors, providing a basis for setting the first, second, and third scaling factors. Specifically, the more complex the test environment (the more devices and the more frequent the changes), the shorter the update cycle. Conversely, a more stable environment can extend the update cycle.

[0020] This dynamic adjustment of the update cycle significantly improves the flexibility and efficiency of topology matrix updates. In dynamic test environments with frequent device changes, shortening the update cycle ensures real-time topology information and timely responses to link changes, thereby avoiding resource allocation errors or task execution delays caused by lagging topology information. In steady-state test environments, extending the update cycle reduces unnecessary topology updates, saving computing resources and time, and improving overall system performance.

[0021] By introducing complexity quantification and proportional coefficient adjustment, the system can adaptively adjust the topology update strategy according to different test environments, making test resource allocation more intelligent and flexible, and ensuring the efficiency and stability of the test process.

[0022] In one possible implementation, an appropriate basic weight coefficient is first selected from a preset weight coefficient table based on the task's criticality (i.e., its urgency or importance). The criticality of a task is determined by its nature or external requirements. For tasks with higher criticality, the system assigns them a higher basic weight coefficient, ensuring they receive higher priority in resource scheduling.

[0023] The decay factor calculation process is based on the ratio of a task's wait tolerance to the current average task wait time. When a task waits longer than the preset tolerance, the decay factor decreases. Specifically, a larger ratio indicates a smaller decay factor, indicating that the task's wait time has exceeded its tolerance and its priority should be lowered to avoid wasting resources on lower-priority tasks. This decay mechanism dynamically reflects the actual wait time of tasks, preventing excessively long wait times from occupying resources and impacting system efficiency.

[0024] The priority weight value of the task is obtained by multiplying the base weight coefficient selected from the weight coefficient table with the decay factor. This priority weight value determines the scheduling priority of the task. Tasks with higher priority weight values ​​will receive higher priority in resource scheduling to ensure that critical tasks are completed on time.

[0025] The weighting coefficient table is constructed based on the historical cost of losses caused by task interruptions. These costs are weighted by two factors: the time required to redo the task and the cost of equipment idleness during the interruption. By analyzing historical data, we can estimate the potential losses caused by task interruptions and set corresponding basic weighting coefficients for different task categories. This allows the system to appropriately adjust the priority of tasks based on their potential losses, avoiding maximizing losses.

[0026] This calculation method allows task priority weights to be precisely adjusted based on the task's actual situation. When a task's waiting time is too long, the system can promptly lower its priority by calculating a decay factor, preventing excessive resource usage due to long wait times. Furthermore, a weight coefficient table based on loss cost can effectively identify tasks with the greatest impact on system resources, prioritizing high-priority, high-loss-cost tasks and minimizing system losses caused by task interruptions or redoes.

[0027] This approach not only improves resource utilization efficiency but also ensures fairer and more reasonable task scheduling, reduces unnecessary resource waste, and optimizes the overall task execution process. This dynamic and intelligent priority adjustment mechanism makes task scheduling more aligned with actual needs and effectively improves overall system performance and responsiveness.

[0028] In one possible implementation, the degree of compatibility is first calculated by matching the set of resource types required for the task with the candidate resource type codes bit by bit. The matching of each bit represents whether a feature of the resource type meets the task requirements. The degree of compatibility is calculated by taking the proportion of the number of matched bits to the total number of bits and multiplying it by the type compatibility correction factor. The compatibility correction factor is obtained by querying the mapping table of the electrical parameters and task requirements in the resource specification. Through this correction factor, the weight of the degree of compatibility can be adjusted to ensure that key factors such as electrical parameters are effectively considered. This process ensures a high degree of match between the type of resource and the task requirements, thereby improving the efficiency and accuracy of task execution.

[0029] When evaluating resources, the path length also affects the final matching value. Path hop count refers to the number of devices traversed during data transmission or task execution. By inputting the minimum hop path length into a piecewise function, a linear decay value is output when the hop count is less than or equal to the preset hop count threshold; when the hop count exceeds the threshold, an exponential decay value is output. This decay mechanism reflects the impact of path length on resource matching. Especially in the case of long paths, signal or data transmission can be affected by interference or delays in transit devices, resulting in reduced task execution efficiency. Dynamic adjustment of the decay slope is achieved through the signal attenuation coefficient of the transit devices. This allows the attenuation factor to be adjusted in real time based on actual conditions, more accurately reflecting the impact of different paths on task execution.

[0030] During resource scheduling, heavily loaded resources can impact task execution. To prevent resource overload, the system applies a penalty coefficient to heavily loaded resources. The intensity of the penalty is positively correlated with the extent to which the resource's load exceeds a critical value. This means that when a resource's load exceeds a certain range, its matching value decreases, preventing tasks from being assigned to heavily loaded resources. This mechanism effectively prevents resource bottlenecks and improves task processing stability.

[0031] This topology-aware matching value generation method comprehensively considers multiple factors, including resource type compatibility, path length, and resource load, ensuring that tasks are efficiently and reasonably allocated to appropriate resources. Resource type compatibility calculation ensures that the resources required for a task meet its specific requirements. The hop count and path length impact factor effectively optimizes transmission paths, avoiding delays or losses caused by long paths. Load rate compensation penalizes highly loaded resources, ensuring that tasks are not executed under resource overload conditions, thereby improving the overall efficiency and stability of the system.

[0032] This method can dynamically adjust resource allocation strategies according to changes in the actual environment, avoiding the inefficiency or mismatch problems caused by static configuration, thereby optimizing the time and quality of task execution and greatly improving resource utilization and task processing capabilities.

[0033] In one possible implementation, after a new resource is allocated, it first undergoes an initialization process. During this process, the new resource is loaded with a standard test stimulus signal and performs a self-test. The self-test compares the new resource's output signal with its nominal value. If the deviation between the two is less than a first tolerance value determined by the device's accuracy level, the self-test is considered passed. This step ensures that the new resource's performance meets predetermined standards in preparation for the switch. If the deviation exceeds the tolerance range, this indicates a performance issue with the new resource and makes it unsuitable for switchover.

[0034] After the new resource passes self-test, the signal deviation verification phase begins. During this phase, the output signals of the old and new resources are collected simultaneously within a preset overlap time. Through synchronous acquisition, the amplitude and phase differences between the two are calculated. The amplitude difference is used to determine the difference in signal strength and ensure it is within the acceptable range. The phase difference is used to verify signal synchronization, ensuring that the phase relationship between the switched resource and the original resource is consistent, thus avoiding errors caused by signal asynchrony.

[0035] After signal deviation verification is complete, the amplitude and phase differences are used to determine whether resource switching is possible. If the amplitude difference is less than the lower limit of the device signal's allowable fluctuation range, and the phase difference is less than the set phase synchronization threshold, the signals of the new and old resources are considered consistent, and the old resource can be released and smoothly switched to the new one. If the amplitude or phase difference exceeds the set range, an alarm mechanism is triggered, indicating a problem with the switch. In this case, it is necessary to return to step 3 and re-evaluate the resource's compatibility or re-execute the verification process.

[0036] The aforementioned non-interruptible switching process ensures system stability and continuity during task resource switching. The parallel initialization process ensures that new resources undergo rigorous self-testing before switching to ensure they meet accuracy requirements, reducing erroneous switching due to unqualified resources. The signal deviation verification process further ensures signal consistency during the switching process by accurately comparing the signals of new and old resources, avoiding system anomalies caused by signal mismatches. The fault-tolerant switching decision mechanism makes reasonable decisions at critical moments, ensuring the system can respond flexibly to resource switching and promptly issue warnings and rollbacks when problems arise. This reduces risks and system interruptions caused by resource issues and significantly improves system reliability and fault tolerance.

[0037] This non-interruption switching method can effectively avoid pauses during task execution and improve the system's ability to work continuously in complex environments, thereby improving the efficiency and reliability of task processing. It is suitable for task resource switching scenarios that require high stability and high precision.

[0038] In one possible implementation, a standard sine wave signal is first injected into each relay device type within the test environment. This signal, with its stable frequency and amplitude, serves as a standard input signal, ensuring signal source consistency during testing. By injecting this signal, the test environment can simulate the changes in the signal as it passes through the relay device, facilitating subsequent measurement of the signal attenuation coefficient.

[0039] After a signal passes through a relay device, the test equipment measures the change in the signal-to-noise ratio (SNR). This is a key indicator of signal quality. After a signal passes through a device, its SNR typically decreases, reflecting the degree of signal attenuation. By measuring this decrease in SNR, we can directly assess the attenuation effect of the relay device on the signal.

[0040] By collecting data at different hop counts (i.e., the number of relay devices a signal passes through) and the corresponding signal-to-noise ratio degradation, we perform data fitting based on the relationship between the signal-to-noise ratio degradation and the number of hops. The result of the fitting is a signal attenuation curve, the slope of which is the signal attenuation coefficient. The attenuation coefficient reflects the rate at which signal quality degrades with each additional relay device. This coefficient is an important indicator for evaluating how signal quality changes with increasing hop count.

[0041] When the relay device's firmware is upgraded, the device's signal processing capabilities may change, potentially affecting its signal attenuation characteristics. Therefore, the above measurement process must be repeated to update the signal attenuation coefficient. After a firmware upgrade, the device's performance parameters and signal processing logic may differ, so the attenuation coefficient must be regularly remeasured and updated to ensure the accuracy of the calculated results.

[0042] This method accurately captures the attenuation characteristics of each relay device during signal transmission and quantifies them as a signal attenuation coefficient. This coefficient is crucial for path planning and optimization. Specifically, it helps assess the quality of paths with different hop counts, select paths with minimal signal attenuation, and improve transmission efficiency and signal quality.

[0043] Furthermore, re-measuring and updating the attenuation coefficient after a device firmware upgrade ensures the system can promptly adapt to changes in device performance, thus avoiding performance fluctuations caused by firmware updates. This enhances the system's flexibility and adaptability, ensuring consistent and reliable signal transmission quality.

[0044] By accurately calculating the attenuation coefficient, the signal transmission path is optimized, and the communication quality and efficiency are improved. Especially in equipment updates and multi-hop path environments, the negative impact of signal attenuation on system performance can be effectively reduced.

[0045] In one possible implementation, the maximum clock jitter range is first obtained from the device's datasheet. Clock jitter refers to the random fluctuations in the clock signal and is a key parameter for evaluating a device's synchronization performance. Product datasheets typically provide a device's clock jitter range, which represents the maximum fluctuation in the device's clock signal under different operating conditions.

[0046] Determine the phase sensitivity level based on the type of test task. Different test tasks have different requirements for clock synchronization. Some tasks may have more relaxed phase synchronization requirements, while others require extremely high precision. Therefore, it is necessary to evaluate and determine the phase sensitivity level based on the task type. The higher the phase sensitivity level, the more stringent the synchronization accuracy requirement. Accordingly, the phase synchronization threshold should be smaller to ensure that the accuracy requirements of the task are met.

[0047] Next, based on the determined phase sensitivity level, the device's maximum clock jitter range is divided into multiple subranges. This division refines the clock jitter range based on the sensitivity level. For example, at higher sensitivity levels, the subranges are more detailed, ensuring a more precise phase synchronization threshold. At lower sensitivity levels, the subranges are larger, accommodating looser synchronization requirements.

[0048] During this partitioning process, the median of the target subintervals is selected as the phase synchronization threshold. This median is representative and provides a balance within the clock jitter range, ensuring synchronization accuracy while not compromising device performance or test efficiency due to overly stringent requirements. This median becomes the final phase synchronization threshold, reflecting the balance between mission requirements and device clock performance.

[0049] Finally, the required phase sensitivity level was further confirmed by analyzing the timing constraints in the test task requirements. Timing constraints define the specific time accuracy requirements during the test. Understanding these constraints can help accurately determine the synchronization accuracy requirements and thus appropriately set the phase synchronization threshold.

[0050] This process allows for the precise selection of an appropriate phase synchronization threshold for each task, based on the device's clock jitter characteristics and the test task's requirements. Specifically, this method flexibly adjusts the synchronization threshold based on the device's maximum clock jitter range and dynamically adjusts the threshold based on the test task's phase sensitivity level, ensuring the device meets synchronization accuracy requirements under varying operating conditions.

[0051] Furthermore, this method allows synchronization accuracy to be adjusted based on the timing constraints of different tasks, enhancing adaptability and flexibility during testing. This not only improves test accuracy but also optimizes the synchronization performance of the device in actual operation, ensuring stable and accurate operation under diverse task conditions. This method allows for more precise definition of clock synchronization boundaries, reduces system errors caused by inaccurate synchronization, and improves overall system stability and reliability.

[0052] In one possible implementation, the state of each node and connection in a network topology is represented by a topological connectivity matrix. This matrix records the direct connection relationships between nodes and can be represented in the form of an adjacency matrix. Each element of the matrix indicates whether there is a direct connection between the corresponding nodes. If there is a direct connection, the element value is 1; if there is no connection, the element value is 0. This matrix is ​​used as the adjacency matrix for the Dijkstra algorithm, and the resource node is set as the starting point to calculate the shortest path from the resource node to other nodes.

[0053] In traditional Dijkstra's algorithm, path weights typically only consider the number of hops or distance. However, in this method, the calculation of path weights further considers the historical failure rates of transit devices. Specifically, path weights are determined not only by the number of hops but also by the historical failure rates of the transit devices involved. Transit devices with higher failure rates receive a higher weight in the path, which in turn increases the overall weight of the path. This avoids selecting paths that pass through devices with high failure rates, thereby improving overall path reliability.

[0054] When calculating the shortest path, if there are multiple paths with equal hop counts, this method further compares the sum of their historical failure rates. Specifically, if the number of hops is the same, paths with the lowest sum of historical failure rates of intermediate devices are prioritized. This strategy reduces the risk of data transmission on devices with high failure rates, thereby improving network stability and reliability.

[0055] The improved Dijkstra algorithm can take into account device failure histories while selecting the shortest path, improving the intelligence and reliability of path selection. While the traditional Dijkstra algorithm relies solely on path length or hop count, this method incorporates failure rate factors, avoiding paths that pass through devices with high failure rates and reducing the risk of transmission interruptions or performance degradation caused by transit device failures.

[0056] Furthermore, when multiple paths have the same number of hops but different failure rates, this method prioritizes the path with the lowest combined historical failure rate, helping to improve overall network stability and mitigate the risk of frequent failures. This method is particularly suitable for scenarios with high demands on network reliability, such as real-time communications and data transmission, which are critical services.

[0057] Ultimately, adopting this improved path selection method can effectively improve the robustness of the network, optimize resource utilization, ensure the stability of the data transmission path, and thus improve the overall efficiency and stability of the system.

[0058] In one possible implementation, the system monitors and records signal quality and device response in real time during each signal transmission. If abnormal events occur, such as exceeding the bit error rate limit or device response timeout, these events are recorded and used in subsequent failure rate calculations. Exceeding the bit error rate limit indicates a high error rate during data transmission, while device response timeouts indicate a device failure to respond in a timely manner, potentially indicating a malfunction or performance issue.

[0059] For each event, the contribution value is calculated as follows: Contribution value of a single event = event severity level × duration / standard test cycle; Among them, the event severity level is scored according to the nature of the event. Events with high severity levels (such as large-scale bit errors or long equipment response timeouts) will have larger contribution values. The duration indicates the length of time the event occurs. The longer the time, the greater the impact on the failure rate. The standard test cycle serves as a benchmark, usually set as a fixed period, to standardize the contribution value of events.

[0060] During the actual failure rate update process, the system uses a sliding time window to calculate the contribution of all events. The length of the sliding window is related to the stability of the test environment. A shorter window length indicates greater sensitivity to recent events, reflecting the dynamic changes in the test environment; a longer window length better reflects the stability of the system over a longer period of time. This sliding window mechanism allows the system to adapt to different test environments and dynamically update the failure rate calculation.

[0061] The total contribution of all events is normalized based on the maximum historical contribution, ensuring that the contribution is normalized to the interval [0, 1]. This normalization process ensures that the failure rate weight can be fairly compared with the weights of other path selections, avoiding the extreme impact of a single event. The normalization baseline uses the historical maximum contribution value, meaning that the system normalizes the current weight based on the most severe historical failure event, preventing excessive inflation or deflation of the failure rate weight.

[0062] Through the above mechanism, the update of historical failure rate weights can not only reflect the actual impact of each event on network transmission, but also be dynamically adjusted according to different environments and event characteristics to ensure the accuracy and timeliness of the failure rate weights.

[0063] This update mechanism effectively combines event severity and occurrence time, reflecting network instability in a relatively short period of time and preventing short-term failures from impacting long-term path selection reliability. The use of a sliding time window allows the system to automatically adjust failure rate weights based on changes in the test environment, providing a more flexible and dynamic response capability.

[0064] By normalizing the historical maximum contribution value, we ensure that all failure rate weights remain within a reasonable range, preventing a single high-severity event from having a significant impact on path selection and improving network stability and robustness. Furthermore, this method can adjust the availability of different paths in the network in real time based on the actual occurrence of failure events, further enhancing the network's intelligent management capabilities and reliability.

[0065] The present invention encompasses any alternatives, modifications, equivalents, and solutions that fall within the spirit and scope of the present invention. To provide a thorough understanding of the present invention, specific details are described in detail below in connection with the preferred embodiments of the present invention, but those skilled in the art will be able to fully understand the present invention without these detailed descriptions. Furthermore, to avoid unnecessary confusion regarding the essence of the present invention, well-known methods, processes, procedures, components, and circuits have not been described in detail.

[0066] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A hardware test resource allocation method based on dynamic topology adaptation, characterized in that: include: Step 1: Build a dynamic topology-aware network: Collect electrical connection signals between devices on the test backplane in real time, generate and periodically update a topology connection matrix. The matrix element values ​​represent the on / off status of the physical links between devices. Detecting a device plug-in or unplug event immediately triggers a matrix update. Step 2: Quantify resource and task attributes: Poll the hardware status register of the test resource to generate a resource status vector including busy / idle status, remaining available time and resource type code; Parse the task type identifier, required resource type set, task criticality, and waiting tolerance in the test task request, and calculate the task priority weight value; Step 3: Perform topology-driven dynamic resource matching: Calculate the minimum hop length from the idle resource to the device under test based on the topological connection matrix, where the hop length increases with the number of transit devices; The topology-aware matching value is generated by integrating the resource type compatibility, hop path length influencing factors and real-time resource load rate; Multiply the task priority weight value and the topology-aware matching value to obtain the resource adaptation weight, and select the highest weight combination to allocate resources; Step 4: Non-disruptive migration in response to topology changes: When the topology connection matrix is ​​updated, step 3 is re-executed for the affected tasks, and non-disruptive switching is achieved through parallel initialization of new and old resources and signal deviation fault tolerance verification.

2. The method according to claim 1, characterized in that The dynamic adjustment process of the update period of the topology connection matrix in step 1 includes: Record the time interval sequence between two adjacent matrix change events. When the latest interval is less than the first proportional coefficient of the statistical mean of the historical intervals, shorten the update period to the second proportional coefficient of the original period. Monitor the steady-state duration of the test environment. When the duration exceeds a benchmark threshold determined by the median of historical steady-state durations, extend the update period by the third proportional coefficient of the original period. The first, second and third proportional coefficients are set according to the complexity level of the test environment, and the complexity is quantified by the product of the number of simultaneously online devices and the frequency of topology changes.

3. The method according to claim 1, characterized in that The calculation process of the task priority weight value in step 2 includes: Selecting a basic weight coefficient from a preset weight coefficient table based on the mission criticality; The decay factor is calculated based on the ratio of the waiting tolerance time to the current average task waiting time. The larger the ratio, the smaller the decay factor. Multiply the basic weight coefficient by the attenuation factor to get the priority weight value; The weight coefficient table is constructed by analyzing the loss cost caused by historical task interruptions, and the loss cost is calculated by the weighted sum of the time spent on task redoing and the cost of equipment idleness.

4. The method according to claim 1, wherein The generation of the topology-aware matching value in step 3 includes: Resource type compatibility calculation: The resource type set required for the task is matched bit by bit with the candidate resource type codes. The compatibility is calculated as the ratio of the number of matching bits to the total number of bits multiplied by the type compatibility correction factor. The correction factor is obtained by querying the electrical parameter and task requirement compliance mapping table in the resource specification. Calculation of the hop path length impact factor: The minimum hop path length is input into a piecewise function. When the hop count is less than or equal to the hop count threshold, a linear attenuation value is output. When the hop count is greater than the threshold, an exponential attenuation value is output. The attenuation slope is dynamically adjusted based on the signal attenuation coefficient of the relay device. Real-time load rate compensation: A penalty coefficient is applied to high-load resources. The penalty intensity is positively correlated with the extent to which the load rate exceeds the critical value.

5. The method according to claim 1, characterized in that The non-interruption switching in step 4 includes: Parallel initialization process: Newly allocated resources load standard test stimulus and perform self-test. The self-test passing standard is that the deviation of its output signal from the nominal value is less than the first tolerance determined by the equipment accuracy grade. Signal deviation verification: Synchronously collect the output signals of the new and old resources within the preset overlap time and calculate their amplitude and phase differences; Fault-tolerant switching judgment: When the amplitude difference is less than the lower limit of the allowed fluctuation range of the device under test signal and the phase difference is less than the phase synchronization threshold, the old resource is released and switched to the new resource. Otherwise, an alarm is triggered and the process returns to step 3.

6. The method according to claim 4, characterized in that The signal attenuation coefficient in the calculation of the hop path length impact factor is obtained as follows: For each relay device category, a standard sine wave signal is injected into the test environment; The signal-to-noise ratio degradation value of the measured signal after it is transmitted through the device; The attenuation curve is fitted based on the corresponding relationship between the signal-to-noise ratio drop value and the number of hops. The slope of the curve is the signal attenuation coefficient. When the device firmware is upgraded, the above measurement process is re-executed to update the coefficients.

7. The method according to claim 5, characterized in that The process of determining the phase synchronization threshold includes: Obtain the maximum clock jitter range of the device under test as stated in the product specification; Determine the phase sensitivity level based on the current test task type. The higher the sensitivity level, the smaller the threshold. The maximum clock jitter range is divided into multiple sub-intervals according to the sensitivity level, and the median of the target sub-interval is selected as the phase synchronization threshold; The phase sensitivity level is obtained by parsing the timing constraint clauses in the task requirements.

8. The method according to claim 1, characterized in that The minimum hop path length is calculated using the improved Dijkstra algorithm: The topological connection matrix is ​​used as the adjacency matrix and the resource node is used as the source point; The historical failure rate weight of the transit equipment is added to the path weight allocation. The higher the failure rate, the greater the path weight. When there are multiple paths with equal hop counts, the path with the smallest sum of historical failure rates is preferentially selected.

9. The method according to claim 8, characterized in that The updating mechanism of the historical failure rate weight includes: Record the bit error rate exceeding limit events and device response timeout events that occur during each signal transmission process; Contribution value of a single event = event severity level × duration / standard test cycle; The total contribution value is calculated based on the sliding time window, and the window length is negatively correlated with the stability of the test environment; The total contribution value is normalized to the failure rate weight in the interval [0,1], and the normalized benchmark value is the historical maximum contribution value.

10. The method according to claim 5, characterized in that The process after returning to step 3 includes: A topology change penalty term is added to the resource adaptation weight calculation. The intensity of the penalty term is positively correlated with the number of the last N handover failures. Mark the current task with a topology sensitivity flag. If the minimum hop path length of a candidate resource is greater than the safe hop threshold, the resource will be excluded from allocation. The safety hop count threshold is dynamically calculated based on the signal integrity requirements of the device under test, and the calculation method is: a. Obtain the minimum signal-to-noise ratio tolerance of the device receiving end; b. Calculate the median single-hop signal attenuation based on the backplane channel model; c. Calculate the maximum allowed number of hops that meets the signal-to-noise ratio tolerance and round down.

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