Image display method and electronic equipment

Abstract

The invention provides an image display method and electronic equipment, relates to the technical field of display, and aims to improve the Vsync signal output frequency of a display screen under the condition that the display time of the display screen of the electronic equipment for displaying an image is overtime and the image displayed by the display screen is delayed through an image display drive of the electronic equipment. After receiving the display data of the next frame of image, the image display driver writes the display data of the next frame of image into the display screen in response to the frequency-increased Vsync signal fed back by the display screen, so that the display screen is driven to display the next frame of image in real time, the degree of delay occurring in the process of displaying the image by the display screen can be reduced, and the user experience is improved. And the user is not easy to perceive the delay of the equipment display picture.

Description

Image display method and electronic device Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular to an image display method and electronic device. Background Art

[0002] Vertical synchronization (Vsync) technology synchronizes the frame rate of the graphics processing unit (GPU) with the refresh rate of the display. This prevents screen tearing, which occurs when the GPU frame rate and the display refresh rate are different and the display starts refreshing the next frame before the previous frame is finished.

[0003] However, in the actual application of Vsync technology in electronic devices, based on the specifications of the display driver integrated circuit (DDIC) used by the electronic devices and the vertical synchronization response mechanism of the Vsync technology, once the upper system layer of the electronic device times out when processing the image, the DDIC will miss the Vsync signal and will be unable to send the image to the display screen (that is, the display data of the image cannot be written to the display screen). In this case, the display screen will time out to display the currently displayed image for at least two consecutive refresh cycles, and the user of the electronic device will then notice a delay in the device display screen.

[0004] Some current methods of improving the software control logic of the upper layer of the system still cannot prevent the DDIC from missing the Vsync signal, making it difficult to effectively solve the problem of the display screen displaying the first image for a long time, causing the user to feel that there is a delay in the device display screen.

[0005] Summary of the Invention

[0006] Embodiments of the present application provide an image display method and an electronic device for reducing the duration of a display screen's timeout display of an image so that a user is less likely to notice a delay in the device's display screen.

[0007] To achieve the above objectives, the embodiments of the present application adopt the following technical solution: when the display screen of an electronic device times out on the display of an image, the image display driver of the electronic device immediately increases the frequency of the output Vsync signal, thereby transmitting and displaying the image (writing the image display data to the display screen) in response to the Vsync signal with the increased frequency. In other words, when the display screen times out on the display screen, the present application causes the image display driver to transmit and display the image in response to the Vsync signal with the increased frequency, thereby effectively reducing the duration of the display screen's image display timeout, thereby making it less noticeable to the user that there is a delay in the device's display screen.

[0008] In a first aspect, the present application provides an image display method, which is applied to an electronic device. At a first moment, the electronic device generates a first vertical synchronization (Vsync) signal, and in response to the first Vsync signal, the display screen of the electronic device begins to display a first image. At a second moment after the first moment, the electronic device generates a second Vsync signal, and in response to the second Vsync signal, the display screen begins to display a second image. At a third moment, in response to a second display duration of the display screen displaying the second image being greater than a first display duration of the display screen displaying the first image, the electronic device generates a third Vsync signal.

[0009] In the present application, the first Vsync signal generated by the electronic device at the first moment corresponds to the first Vsync cycle, and the first Vsync cycle corresponds to the first display duration of the first image. The second Vsync signal generated by the electronic device at the second moment corresponds to the second Vsync cycle, and the second Vsync cycle is equal to the first Vsync cycle. The third Vsync signal generated by the electronic device at the third moment corresponds to the third Vsync cycle, and the third Vsync cycle is shorter than the first Vsync cycle. It can be understood that the third Vsync signal is the Vsync signal with the frequency increased.

[0010] In the present application, by increasing the frequency of the output Vsync signal when the display screen of the electronic device times out on the display of the second image, the image display driver of the electronic device can respond to the Vsync signal with the increased frequency fed back by the display screen, and write the display data of the next frame of the second image to the display screen within a short period of time when the display screen times out on the display of the second image, so as to drive the display screen to immediately display the next frame of the image. In this way, the image instant display performance of the electronic device during the image display process can be effectively improved. Compared with the traditional solution, the image display driver of the electronic device responds to the Vsync signal with the increased frequency to display the next frame of the second image, which can effectively reduce the duration of the display screen's timeout display of the second image, thereby making it difficult for the user to perceive the delay in the device display screen.

[0011] In a possible implementation manner of the first aspect, the second image is a next frame image of the first image.

[0012] In a possible implementation of the first aspect, the second display duration is less than twice the first display duration.

[0013] In the present application, when the second display time of the second image on the display screen is longer than the first display time but less than twice the first display time, the frequency of the output Vsync signal is increased so that the image display driver drives the display screen to start displaying the next frame of the second image when the second display time is less than twice the first display time, so that the display screen will not display the second image for a long time for two consecutive first Vsync cycles, and thus there will be no phenomenon of device display screen delay similar to the traditional solution.

[0014] In a possible implementation manner of the first aspect, in response to the third Vsync signal, the display screen displays a third image of a next frame after the second image.

[0015] In the present application, upon receiving display data for a third image following the second image, the image display driver of the electronic device writes the third image display data to the display screen in response to a third Vsync signal triggered by the display screen at a third moment, thereby driving the display screen to refresh and display the third frame image after a short timeout from the second image. In this way, the display screen does not need to refresh and display the third image after a timeout from the second image for at least two consecutive Vsync cycles, thereby effectively reducing the duration of the display screen's timeout display of the second image, making it less noticeable to the user that there is a delay in the device's display.

[0016] In a possible implementation manner of the first aspect, a third display duration for the display screen to display the third image is shorter than a first display duration corresponding to the first Vsync period.

[0017] In a possible implementation manner of the first aspect, a third display duration for displaying the third image on the display screen is the same as a first display duration corresponding to the first Vsync period.

[0018] In the present application, by making the display duration of the third image displayed on the display screen the same as the first display duration corresponding to the above-mentioned first Vsync period, the stability of displaying each frame of image during the image refresh display process of the display screen can be ensured.

[0019] In a possible implementation manner of the first aspect, the electronic device generates a fourth Vsync signal at a fourth moment after the second moment and before the third moment.

[0020] In a possible implementation manner of the first aspect, in response to the fourth Vsync signal, the display screen continues to display the second image for a timeout period.

[0021] In a possible implementation of the first aspect, when the display screen generates a first Vsync signal at a first moment using a frequency of 120 Hz, a first Vsync period corresponding to the first Vsync signal is approximately 8.3 (1 / 120≈8.3) ms. Subsequently, when the frequency of the Vsync signal output by the display screen is increased to 360 Hz, a third Vsync period corresponding to a third Vsync signal output by the display screen at a third moment is approximately 2.8 (1 / 360≈2.8) ms.

[0022] In a possible implementation of the first aspect, when the first Vsync period is approximately 8.3 ms and the third Vsync period is approximately 2.8 ms, the first display duration corresponding to the first Vsync period is approximately 8.3 ms, and the second display duration for the display screen to display the second image is approximately 8.3 ms+2.8 ms=11.1 ms.

[0023] In a possible implementation of the first aspect, at a fifth moment after the third moment, the electronic device generates a fifth Vsync signal, wherein the fifth Vsync signal corresponds to a fifth Vsync period, and the fifth Vsync period is equal to the first Vsync period.

[0024] In a possible implementation of the first aspect, the display duration of the fourth image is greater than the preset interval duration; the fourth image is an image displayed in the previous frame at the fifth moment, the preset interval duration is the interval duration between the fifth moment and the sixth moment minus the time required to reduce the frequency of the output Vsync signal, and the sixth moment is the moment when the fourth image is written to the display screen.

[0025] In the present application, after the display screen begins displaying the third image, in response to the display duration of the fourth image being longer than the interval between the fifth moment and the sixth moment minus the time required to reduce the frequency of the output Vsync signal, the electronic device reduces the frequency of the output Vsync signal. Subsequently, at a fifth moment after the third moment, the electronic device generates a fifth Vsync signal having a Vsync period equal to the first Vsync period. The fourth image is the third image itself or a frame of image following the third image. The sixth moment is the moment when the fourth image is written to the display screen. That is, if the fourth image is the third image itself, the sixth moment is the third moment when the display screen begins displaying the third image in response to the third Vsync signal (at this time, the third image is written to the display screen and the display screen begins displaying the third image), while if the fourth image is a frame of image following the third image, the sixth moment is the moment when the display screen begins displaying the frame of image following the third image (at this time, the frame of image following the third image is written to the display screen and the display screen begins displaying the third image). The interval between the fifth and sixth moments is the first display duration corresponding to the first Vsync period.

[0026] For example, as shown in FIG20 , assuming that the fourth image is the third image itself and the sixth moment is the third moment itself, after the display screen begins displaying the third image (Image 2) at the third moment (t5), the electronic device calculates the third display duration of Image 2 in real time. If the third display duration is greater than the interval (8.3ms) between the fifth moment (t6) and t5 minus the time it takes to reduce the frequency of the output Vsync signal (the time it takes is the time between the moment indicated by the vertical dashed line on the right side of the figure and t6), the electronic device reduces the frequency of the output Vsync signal at the moment indicated by the vertical dashed line on the right side of the figure. Thus, at t6, the electronic device generates a fifth Vsync signal (Vsync signal 6) having a fifth Vsync period of 8.3ms (equal to the first Vsync period).

[0027] In the present application, by reducing the frequency of the output Vsync signal, the display screen can avoid wasting device power consumption by outputting the Vsync signal (third Vsync signal) with an increased frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0028] In a possible implementation manner of the first aspect, the fifth moment is separated from the third moment by N 8.3 ms, where N is a positive integer greater than or equal to 1.

[0029] In one possible implementation of the first aspect, after the display screen of the electronic device displays the third image, an image display driver of the electronic device determines whether display data for a next frame of the third image has been received within a third display duration of the display screen displaying the third image. If the determination is yes, the image display driver reduces the frequency of a Vsync signal output by the display screen.

[0030] In the present application, after determining that the display screen has stabilized its display of the third image, the frequency of the output Vsync signal is reduced. This can avoid the display screen outputting the Vsync signal at an increased frequency for a long time, which causes wasteful power consumption of the device, thereby achieving the purpose of saving device power consumption.

[0031] In another possible implementation of the first aspect, after the display screen of the electronic device displays the third image, the electronic device may further detect whether the image display driver receives display data for an Nth frame of image following the third image within a display duration of an N-1th frame of image following the display screen displaying the third image, where N is a positive integer greater than 1.

[0032] In this way, when it is detected that the image display driver receives display data of the Nth frame image after the third image within the display time of the N-1th frame image after the display screen displays the third image, the image display driver further reduces the frequency of the Vsync signal output by the display screen.

[0033] In the present application, the frequency of the output Vsync signal is reduced after the display screen has stabilized the display of the N-1th frame after the third image. This can also avoid the waste of device power consumption caused by the display screen still outputting the Vsync signal with a higher frequency after the display screen has stabilized the image.

[0034] Moreover, by reducing the frequency of the output Vsync signal after the display screen displays the N-1th frame image after the third image, the phenomenon of frequently increasing and decreasing the frequency of the output Vsync signal can be avoided, thereby further saving the power consumption required for the device to frequently adjust the frequency of the output Vsync signal.

[0035] In another possible implementation of the first aspect, the electronic device further includes an image display driver. In response to the display screen displaying the second image, the image display driver calculates a second display duration for the display screen to display the second image. Furthermore, the image display driver compares the second display duration with the first display duration. When the second display duration is greater than the first display duration, the image display driver sends a control instruction to the display screen in response to the second display duration being greater than the first display duration. In response to the control instruction, the display screen increases the frequency of the output Vsync signal and generates a third Vsync signal with the increased frequency at a third moment after the second moment.

[0036] For example, by configuring a delay detection module in the image display driver of the electronic device, and detecting whether the second display duration is greater than the first display duration through the delay detection module, the frequency of the output Vsync signal is increased when the delay detection module detects that the second display duration is greater than the first display duration. In this way, since the image display driver is located in the kernel layer of the entire system of the electronic device, whether the upper layer of the system (such as the application layer, the application framework layer or the hardware abstraction layer) causes the display of the second display duration to be greater than the first display duration, or the kernel layer itself causes the second display duration to be greater than the first display duration, it can be detected by the newly added delay detection module in the kernel layer. That is, the comprehensiveness and accuracy of detecting whether the second display duration is greater than the first display duration are improved.

[0037] In another possible implementation of the first aspect, when the image display driver of the electronic device detects whether the second display duration is greater than the first display duration through the delay detection module, the electronic device may first detect whether the image display driver responds to the second Vsync signal. Then, upon detecting that the image display driver responds to the second Vsync signal, thereby determining that the electronic device is displaying the second image and is not in a state where the display screen delays displaying the first image, the image display driver detects, through the delay detection module, whether the second display duration of the second image displayed by the display screen is greater than the first display duration.

[0038] In the present application, before the delay detection module detects whether the second display duration is greater than the first display duration, it first detects whether the image display driver responds to the second Vsync signal. When it is detected that the image display driver responds to the second Vsync signal, it is determined that the electronic device is currently displaying the second image and is not in a state where the display screen is delaying displaying the first image. Then, the delay detection module is used to detect whether the second display duration is greater than the first display duration. In this way, it is possible to ensure that the frequency of the output Vsync signal is increased only when the electronic device enters the delayed display state (the display screen displays the image for a timeout) from the non-delayed display state, so as to achieve a targeted reduction in the degree of delay in the device display caused by the long-term display of the image.

[0039] In another possible implementation of the first aspect, when the image display driver of the electronic device increases the frequency of the output Vsync signal, it can control the display screen to increase the frequency of the output Vsync signal to M times the original frequency. Where M is a positive integer greater than 1; the original frequency is the frequency of the Vsync signal fed back to the image display driver and other upper-layer software and hardware modules of the electronic device system when the display screen displays images at the current refresh rate. For example, if the display screen supports a 360Hz base frequency, the original frequency can be 60Hz, 90Hz, or 120Hz.

[0040] In another possible implementation of the first aspect, when an image display driver of an electronic device controls a display screen to increase the frequency of an output Vsync signal to M times the original frequency, the image display driver may receive display data of a third image sent by an upper layer of the system before the display screen outputs the i-th Vsync signal with the frequency increased. Here, i is a positive integer and i is less than M. Based on this, the image display driver writes the display data of the third image to the display screen in response to the i-th Vsync signal with the frequency increased, thereby driving the display screen to display the third image.

[0041] In the present application, the image display driver of the electronic device receives display data for the third image before the display screen outputs the i-th Vsync signal with a frequency boost, and then writes the display data for the third image to the display screen in response to the i-th Vsync signal with a frequency boost, thereby driving the display screen to display the third image. This ensures that the image display driver of the electronic device displays the third image, which is the next frame of the second image, in response to the Vsync signal with a frequency boost triggered by the display screen within a short period of time when the display screen times out on displaying the second image, rather than displaying the second image for at least two consecutive Vsync cycles, as in conventional solutions, which results in a long timeout of the second image, and then displays the third image in response to the Vsync signal triggered by the display screen at the original frequency. This ensures the stability of reducing the duration of the display screen's timeout display of the second image.

[0042] In another possible implementation of the first aspect, after an image display driver of the electronic device begins writing display data of a third image to a display screen to drive the display screen to begin displaying the third image, in order to prevent the image display driver from directly responding to a new Vsync signal with a frequency increase, the next frame of the third image is sent to the display screen in advance, causing the display screen to display the third image in a shorter period of time. Furthermore, the image display driver stops responding to any Vsync signal with a frequency increase triggered by the display screen during a third display duration while the display screen displays the third image, thereby refusing to write display data of the next frame of the third image to the display screen during the third display duration.

[0043] Afterwards, when the third display time is greater than the difference between the first display time and the third Vsync cycle, the image display driver resumes responding to the Vsync signal with a higher frequency triggered by the display screen, and then responds to the Vsync signal with a higher frequency to write the display data of the next frame of the third image to the display screen after confirming that the third display time reaches the first display time.

[0044] In the present application, by not responding to the Vsync signal with a higher frequency during the third display duration, the display screen can avoid the phenomenon in which the image display driver prematurely sends the next frame of the third image to the display screen, causing the display screen to only briefly display the third image. This further improves the stability of the electronic device in displaying the third image and subsequent images.

[0045] In a second aspect, the present application provides an electronic device that has the functionality to implement the method described in the first aspect. This functionality can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functionality described above.

[0046] In a third aspect, the present application provides an electronic device comprising: a processor and a memory; the memory is used to store computer program code, the computer program code including computer execution instructions, and when the electronic device is running, the processor executes the computer execution instructions to enable the electronic device to perform the method described in the first aspect above.

[0047] In a fourth aspect, the present application provides an electronic device comprising: a processor; the processor is configured to be coupled to a memory, and after reading instructions in the memory, execute the method described in the first aspect above according to the instructions.

[0048] In a fifth aspect, the present application provides a computer-readable storage medium, which stores computer instructions. When the computer-readable storage medium is run on an electronic device, the electronic device can execute the method described in the first aspect above.

[0049] In a sixth aspect, the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the method described in the first aspect above.

[0050] In a seventh aspect, a device (e.g., a display system) is provided, comprising a processor configured to support an electronic device in implementing the functions described in the first aspect. In one possible design, the device further comprises a memory configured to store program instructions and data necessary for the electronic device.

[0051] Among them, the technical effects brought about by any design method in the second to seventh aspects can refer to the technical effects brought about by different implementation methods in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] FIG1 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application;

[0053] FIG2 is a schematic diagram of a system architecture of an electronic device in conventional technology;

[0054] FIG3 is a schematic diagram showing the principles of layer drawing, rendering, synthesis and image frame display by an electronic device in conventional technology;

[0055] FIG4 is a schematic diagram showing the principles of another electronic device in conventional technology for performing layer drawing, rendering, synthesis, and image frame display;

[0056] FIG5 is a schematic diagram of a system architecture of an electronic device according to an embodiment of the present application;

[0057] FIG6 is a schematic diagram showing the principles of layer drawing, rendering, synthesis, and image frame display by an electronic device according to an embodiment of the present application;

[0058] FIG7 is a schematic diagram showing the principles of another electronic device performing layer drawing, rendering, synthesis, and image frame display in an embodiment of the present application;

[0059] FIG8 is a flowchart diagram 1 of an image display method provided in an embodiment of the present application;

[0060] FIG9 is a waveform diagram of a Vsync signal output by a display screen using a 120 Hz-TE standard frequency synchronization scheme in an embodiment of the present application;

[0061] FIG10 is a waveform diagram of a Vsync signal output by a display screen using a 360 Hz-TE high frequency synchronization solution in an embodiment of the present application;

[0062] FIG11 is a schematic diagram of the duration of an image displayed on a display screen under a situation according to an embodiment of the present application;

[0063] FIG12 is a schematic diagram of the duration of an image displayed on a display screen in another case according to an embodiment of the present application;

[0064] FIG13 is a schematic diagram showing the principle of an electronic device transmitting and displaying an image in response to a Vsync signal with an increased frequency under one embodiment of the present application;

[0065] FIG14 is a schematic diagram showing the principle of an electronic device transmitting and displaying an image in response to a Vsync signal with an increased frequency under another embodiment of the present application;

[0066] FIG15 is a schematic diagram showing the principle of an electronic device transmitting and displaying an image in response to a Vsync signal with an increased frequency under another embodiment of the present application;

[0067] FIG16 is a schematic diagram of the system architecture and data signal flow of an electronic device involved in an embodiment of the present application;

[0068] FIG17 is a schematic diagram of control logic for image display by an electronic device according to an embodiment of the present application;

[0069] FIG18 is a second flow chart of an image display method provided in an embodiment of the present application;

[0070] FIG19 is a schematic diagram showing the principle of extending the image display time of an electronic device according to an embodiment of the present application;

[0071] FIG20 is a schematic diagram showing the principle of reducing the frequency of an output Vsync signal by an electronic device under a situation according to an embodiment of the present application;

[0072] FIG21 is a schematic diagram showing the principle of reducing the frequency of the output Vsync signal of an electronic device in another case according to an embodiment of the present application. DETAILED DESCRIPTION

[0073] The present invention provides an image display method that can be applied to electronic devices including display screens. When the display screen times out, the method increases the frequency of the vertical synchronization signal output by the display screen, causing the electronic device's image display driver to respond to the higher-frequency vertical synchronization signal to display the image. This effectively reduces the duration of the display screen's image display timeout, making it less noticeable to users that there is a delay in the device's display.

[0074] It should be noted that the above-mentioned electronic devices can be mobile phones, tablet computers, desktop / laptop / handheld computers, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), augmented reality (AR) and virtual reality (VR) devices, and other electronic devices with display screens. The embodiments of the present application do not impose any special restrictions on the specific form of the electronic devices.

[0075] The implementation of the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0076] Please refer to Figure 1, which is a schematic diagram of the structure of an electronic device 100 provided in an embodiment of the present application. As shown in Figure 1, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 111, a power management module 112, a battery 113, an antenna 1, an antenna 2, a mobile communication module 140, a wireless communication module 150, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identification module (SIM) card interface 195.

[0077] It should be understood that the structure illustrated in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0078] The processor 110 may include one or more processing units, for example: the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units can be independent devices or integrated into one or more processors. Among them, the controller can be the nerve center and command center of the electronic device 100. The controller can generate an operation control signal based on the instruction opcode and the timing signal to complete the control of instruction fetching and execution.

[0079] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the same instruction or data again, it can directly access the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0080] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface.

[0081] It is understood that the interface connection relationship between the modules illustrated in the embodiment of the present invention is merely an illustrative illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods from the above embodiments, or a combination of multiple interface connection methods.

[0082] The charging management module 111 is configured to receive charging input from a charger. While charging the battery 113, the charging management module 111 can also power the electronic device through the power management module 112. The wireless communication functionality of the electronic device 100 is implemented via antenna 1, antenna 2, mobile communication module 140, wireless communication module 150, a modem processor, and a baseband processor.

[0083] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In other embodiments, the antennas can be used in conjunction with a tuning switch.

[0084] The mobile communication module 140 can provide solutions for wireless communications including 2G / 3G / 4G / 5G / 6G applied to the electronic device 100. The modulation and demodulation processor may include a modulator and a demodulator. The wireless communication module 150 can provide solutions for wireless communications including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared technology (IR), etc. applied to the electronic device 100.

[0085] Electronic device 100 implements display functionality through a GPU, display screen 194, and an application processor. A GPU is a microprocessor for image processing that connects display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0086] Display screen 194 is used to display images, videos, and the like. Display screen 194 includes a display panel. The display panel may include, but is not limited to, a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a mini organic light-emitting diode (MINILED), a micro organic light-emitting diode (MicroLed), a quantum dot light-emitting diode (QLED), and the like. In some embodiments, electronic device 100 may include one or N display screens 194, where N is a positive integer greater than one.

[0087] The electronic device 100 can implement a shooting function through an ISP, a camera 193, a video codec, a GPU, a display screen 194, and an application processor.

[0088] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 200.

[0089] The internal memory 121 may be used to store computer-executable program codes, where the executable program codes include instructions.

[0090] The processor 110 executes various functional applications and data processing of the electronic device 100 by running instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0091] The electronic device 100 can implement audio functions such as music playback and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0092] The buttons 190 include a power button, a volume button, etc. The indicator 192 may be an indicator light.

[0093] The sensor module 180 may include a folding angle detection sensor, a pressure sensor, a gyro sensor, an air pressure sensor,

[0094] Magnetic sensor, acceleration sensor, distance sensor, proximity sensor, fingerprint sensor, temperature sensor, touch sensor, ambient light sensor, bone conduction sensor, etc.

[0095] It should be noted that, in the embodiments of the present application, the display screen of the electronic device to which the image display method provided in the embodiments of the present application is applied is a screen type that supports source chip (Source IC) refresh interrupts. A Source IC refresh interrupt is a state in which the Source IC of the display screen can be driven to interrupt at any time (referred to as a Source refresh interrupt) when not in a refresh state, thereby re-entering the refresh state and resuming operation. The Source IC's work in the refresh state can include refreshing the image display data to cause the display screen to begin displaying the image, or responding to a frame cut instruction to switch the refresh rate of the display screen.

[0096] For example, the display screen of an electronic device may be a display screen that uses low-temperature polysilicon oxide (LTPO) transistors, thereby supporting Source refresh interruption based on the low leakage characteristic of LTPO. However, the display screen of an electronic device cannot usually be a display screen that uses low-temperature polysilicon (LTPS) transistors. Because as the leakage of the transistor increases, even if the Source refresh interruption can still be supported, the overall display effect of the display screen will be seriously affected. Therefore, due to the serious leakage characteristic of LTPS, the display screen using LTPS usually does not support the Source refresh interruption function. Therefore, it can be understood that as long as the display screen of an electronic device uses transistors with low leakage characteristics, it can support Source refresh interruption.

[0097] Based on the different design requirements of actual applications, the transistor types used in electronic device displays can certainly be other types besides LTPO. However, regardless of the specific type of transistor used in the display screen, and regardless of whether the transistor has low leakage characteristics that enable support for source refresh interrupts, as long as the display screen of the electronic device is of a screen type that supports source refresh interrupts, it should be included in the scope of protection of the image display method provided in the embodiments of this application.

[0098] In an embodiment of the present application, the base frequency supported by the display screen of the electronic device may be 60 Hz, 70 Hz, 75 Hz, 80 Hz, 90 Hz, 120 Hz, or 360 Hz, etc. The refresh rate of the display screen for displaying images (abbreviated as image refresh rate or display frame rate) is less than or equal to the base frequency supported by the display screen. Furthermore, the image refresh rate supported by the display screen is typically less than or equal to 120 Hz. For example, the image refresh rate of the display screen can typically be configured as 60 Hz, 70 Hz, 75 Hz, 80 Hz, 90 Hz, or 120 Hz.

[0099] When the display screen supports a 120Hz image refresh rate, the display screen can increase the image refresh rate from 60Hz, 70Hz, 75Hz, 80Hz, 90Hz to 120Hz, or reduce the image refresh rate from 120Hz to 90Hz, 80Hz, 75Hz, 70Hz, or 60Hz. In the embodiments of the present application, the image refresh rate of the electronic device is the image refresh rate currently used by the display screen of the electronic device. Therefore, in some feasible embodiments of the present application, the image refresh rate of the electronic device or the image refresh rate of the display screen of the electronic device may also be referred to as the current refresh rate.

[0100] It should be noted that in the embodiments of the present application, the Vsync signal is a periodic discrete signal involved in the process of applying Vsync technology to electronic devices. That is, there will be a Vsync signal triggered by the hardware driver every Vsync period (also known as a refresh period or refresh duration, etc.).

[0101] It should be noted that in the embodiments of the present application, the Vsync signal is used to trigger the hardware to refresh the displayed image frame. The Vsync signal can be generated by the display and fed back to the APP, modem processor, GPU, ISP, and controller. Therefore, the Vsync signal can also be considered a type of tearing effect (TE) signal fed back from the display 194 to the processor 110.

[0102] In an embodiment of the present application, when the display screen supports a basic frequency of 360 Hz, the display screen can adaptively switch the frequency of the output Vsync signal to 60 Hz, 90 Hz, 120 Hz or 360 Hz based on the control of the image display driver in the electronic device, thereby triggering and outputting Vsync signals with different Vsync periods at different times.

[0103] In different systems or architectures, the name of the Vsync signal may be different. For example, in some systems or architectures, the Vsync signal may specifically be VSYNC_APP, VSYNC_SF, or VSYNC_HW. But no matter what the name of the Vsync signal is, as long as it is a synchronization signal with similar functions and conforms to the technical ideas of the method provided in the embodiments of the present application, it should be covered within the scope of protection of the present application. Moreover, in different systems or architectures, the definition of the Vsync signal may also be different, but no matter what definition is made of the Vsync signal, as long as it is a synchronization signal with similar functions and conforms to the technical ideas of the method provided in the embodiments of the present application, it should also be covered within the scope of protection of the present application.

[0104] It should be noted that the software system of the electronic device can adopt a layered architecture, an event-driven architecture, a micro-kernel architecture, a microservice architecture, or a cloud architecture. For ease of understanding, the present embodiment takes the Android system with a layered architecture as an example to explain in detail the image display method provided by the present embodiment of the electronic device when applied to the present invention.

[0105] 2 , taking the example of an electronic device sending (or writing) an image to a display screen for display in response to a Vsync signal as an example, the software and hardware processing flow of an electronic device of the Android system in this process will be described.

[0106] As shown in Figure 2, the hardware and software architecture of an electronic device utilizes a layered design. The software layer includes the application layer (APP layer), the application framework layer (FWK layer), the hardware abstraction layer (HAL), and the kernel layer. The hardware layer includes the display panel. The application layer can include various applications running on the electronic device, such as gallery, browser, theme apps, and wallpaper apps. The application framework layer primarily provides graphics processing services, such as the surface flinger (SF) service for rendering images provided by the application and the GPU service for compositing multiple layers of the image to be displayed. The kernel layer primarily includes the image display driver, which is responsible for delivering images to the display panel after being processed and issued by upper system layers (other system layers above the kernel layer where the image display driver resides, such as the application layer, application framework layer, and hardware abstraction layer). The hardware layer primarily includes the display panel, which refreshes the image to be displayed based on calls from the image display driver.

[0107] In the system framework of the electronic device shown in Figure 2, the drawing and display of images require the coordination of various system layers based on the Vsync signal output by the display screen. That is, when the application layer's gallery, browser, theme application, or wallpaper application receives the Vsync signal output by the display screen, the application APP responds to the Vsync signal to draw the image. Then, when the next Vsync signal output by the display screen arrives, the APP responds to the Vsync signal to send the drawn image to the application framework layer. The SF and GPU in the application framework layer respectively perform image rendering and layer synthesis on the drawn image to obtain the display data of the image to be displayed, and then pass the display data of the image to be displayed to the image display driver of the kernel layer through the hardware abstraction layer. Furthermore, when the display screen outputs a new Vsync signal again, the image display driver responds to the new Vsync signal to call the display module serial interface (DSI) through the smart display engine (SDE) to write the display data of the image to be displayed into the DDIC of the display screen. The DDIC of the display screen can then store the image data sent by the software side in a buffer, thereby controlling the display panel to complete the refresh display of the image by scanning (or reading) the display data in the buffer.

[0108] In the image display processing flow of the above-mentioned electronic device, since each system layer of the electronic device software layer cooperates based on the Vsync signal output by the display screen to realize the final display of the image, it is crucial for each layer to monitor and respond to the Vsync signal. However, in the actual application of Vsync technology in electronic devices, based on the DDIC specifications and vertical synchronization response mechanism of Vsync technology adopted by electronic devices, once the upper system layer of the electronic device times out when processing the image, the image display driver will miss the Vsync signal and will not be able to send the image to the display screen, and will need to wait for at least the next Vsync signal to be received before responding to send the image. In this way, the display screen will time out the display of the same frame of image for at least two consecutive refresh cycles. In this way, the user of the electronic device will visually feel that there is a delay in the device display screen.

[0109] As shown in Figure 3, the DDIC of the electronic device's display supports a 120Hz image refresh rate. When the DDIC refreshes and outputs a vertical synchronization signal at 120Hz, the Vsync period of the output vertical synchronization signal is approximately 8.3ms. Consequently, the display screen also displays an image for approximately 8.3ms. Thus, at time t1, the display screen outputs Vsync signal 1; the APP in the electronic device's application layer responds to Vsync signal 1 and begins drawing image 1. The SF in the electronic device's application framework layer also responds to Vsync signal 1 and renders image 0, previously sent by the APP, through the rendering server (also called a render thread). After the SF completes rendering image 0, it further sends image 0 to the GPU. Upon receiving image 0, the GPU immediately begins layer compositing of image 0. At this point, the display screen will also begin displaying image -1, the previous frame of image 0, for 8.3ms until time t2 arrives.

[0110] At time t2, the Vsync signal 2 output by the display screen arrives; the APP of the electronic device application layer responds to the Vsync signal 2 to start drawing image 2, and the SF also responds to the Vsync signal 2 to render the image 1 sent by the APP at time t2, and after the SF completes the rendering of image 1, it further sends the image 1 to the GPU, so that after receiving the image 1, the GPU starts to perform layer synthesis on the image 1. At this time, after the GPU completes the synthesis of image 1, it will synchronously send the display data of image 1 to the image display driver of the electronic device system kernel layer (that is, the moment when the GPU completes the image synthesis also means that the image display driver has received the display data of the synthesized image 1). Therefore, after the GPU completes the synthesis of image 0 before time t2 and sends image 0 to the image display driver, the image display driver writes the display data of image 0 to the display screen in response to the Vsync signal 2 at time t2, so that the display screen refreshes the display image 0 at time t2 until time t3.

[0111] At t3, the Vsync signal 3 output by the display arrives. However, if the electronic device is in a high-load scenario between t2 and t3, causing the application layer APP to not complete the drawing of image 2 at this time, then both the SF and the GPU will not perform any image processing actions until the next Vsync signal arrives because they have not received the image 2 that should have been sent by the APP at t3. At this time, since the GPU has completed the synthesis of image 1 before t3 and sent the display data of image 1 to the image display driver, the image display driver responds to the Vsync signal 3 at t3 and writes the display data of image 1 to the display. The display starts refreshing the display image 1 at t3 and continues until t4.

[0112] At time t4, the Vsync signal 4 output by the display screen arrives. If the electronic device does not have a new image display requirement at this time, the APP will not respond to the Vsync signal 4 to draw the image. However, since the SF has received the image 2 that the APP has completed drawing and sent before at time t4, it will still respond to the Vsync signal 4 to start rendering the image 2. After SF completes the rendering of image 2, the GPU will further perform layer synthesis on the image 2 sent by SF and send the display data of the synthesized image 2 to the image display driver. At this time, since the image display driver did not receive any image display data at time t4, it missed the Vsync signal 4 and did not write the image display data to the display screen. In this way, the display screen will continue to display image 1 at time t4 until time t5.

[0113] At time t5, the Vsync signal 5 output by the display arrives. The image display driver responds to the Vsync signal 5 and writes the display data of Image 2 received previously to the display. The display thus refreshes and displays Image 2 from time t5 until time t6. At time t6, because the APP has completed the electronic device's original image display requirements before time t4 and no new image drawing is performed, and the electronic device has not generated any new image display requirements from time t3 to time t6, the display stops refreshing the image after it finishes displaying Image 2 at time t6. At this point, the display enters a dormant or off-screen state.

[0114] As shown in Figure 4, the display screen of the electronic device still uses a refresh rate of 120Hz, outputs a Vsync signal with a Vsync period of 8.3ms, and also displays images with a display duration of 8.3ms. In this case, at time t4, the Vsync signal 4 output by the display screen arrives, but if the electronic device is in a high-load scenario between time t3 and time t4, causing the GPU to not complete the synthesis of image 2, the image display driver of the electronic device's core layer will not receive the display data of image 2 before time t4, and will miss the Vsync signal 4 and will not write any image display data to the display screen. As a result, the display screen will continue to display image 1, which was displayed at time t3, until time t5 at time t4.

[0115] In combination with the above, in some high-load scenarios, electronic devices may experience application layer APP image drawing timeout, application framework layer SF image rendering timeout (not shown in the attached figure), or application framework layer GPU synthesis image timeout, causing the kernel layer image display driver to miss the Vsync signal to send the image to the display screen. Therefore, the display screen needs to display the image being displayed for two consecutive cycles (16.6ms), that is, at this time the display screen shows that the current refresh rate drops directly from 120Hz to 60Hz. For users, the current refresh rate of the display screen drops directly from 120Hz to 60Hz, which will be visually obvious. There is a delay in the display screen.

[0116] It should be noted that, in the embodiment of the present application, the above-mentioned electronic device is in a high-load scenario, which may be a scenario in which the electronic device has too many threads opened at the same time, resulting in a reduction in the available system resources allocated to the APP, SF or GPU. It should be understood that in different systems or architectures, the definition of high-load scenarios for electronic devices may also be different. However, no matter how the high-load scenario is defined, as long as the scenario affects the system's response to the vertical synchronization signal for image drawing, rendering or synthesis, thereby causing the display screen to time out the image display, so that the user feels a delay in the device display screen, it complies with the technical ideas of the method provided in the embodiment of the present application and should also be covered within the scope of protection of the present application.

[0117] In response to the above situation, even though there are some attempts to improve the above user experience, these methods are all through improving the software control logic of the upper layer of the electronic device system, such as changing the algorithm processing logic of the upper layer of the system for image drawing, rendering or synthesis, so as to reduce the intermediate time of image processing as much as possible. However, no matter how the software control logic of the upper layer of the system is adjusted, it is impossible to fundamentally avoid the performance limitations of the hardware used by the electronic device, which leads to the phenomenon that the electronic device responds to the Vsync signal timeout or directly misses the Vsync signal. In other words, at present, only improving the software control logic of the upper layer of the electronic device system is difficult to effectively solve the problem of the display screen timing out for a long time to display the image, causing the user to feel that there is a delay in the device display screen.

[0118] In order to reduce the degree to which the display screen overtime displays an image, causing the user to feel that there is a delay in the device display screen, and to effectively improve the user's poor visual experience of the device display screen, the present application proposes an image display method to reduce the length of time the display screen overtime displays an image, so that the user is less likely to notice the delay in the device display screen.

[0119] It should be noted that the method proposed in the embodiment of the present application can be considered as a separate improvement relative to the above-mentioned solution for adjusting the software control logic of the upper layer of the electronic device system, and can also be considered as a further optimization and supplement to the solution for adjusting the software control logic. That is, the image display method proposed in the embodiment of the present application has been improved separately at the software control level of the electronic device system, and the method proposed in the embodiment of the present application has also been creatively improved at the system hardware level, thereby combining the improvements at both the system software and hardware levels to further reduce the duration of the display screen's timeout display of the image, greatly reducing the degree of delay in the device display screen, making it difficult for the user to perceive the delay in the device display screen.

[0120] In a feasible implementation of the embodiment of the present application, as shown in FIG5 , the method proposed in the embodiment of the present application can be implemented by adding a delay detection module to the core layer of the electronic device system to detect whether the duration of the image displayed by the electronic device's display screen during the image display process is greater than the image display duration corresponding to the current refresh rate used by the display screen. Based on this, when the delay detection module detects that the display screen has timed out, the image display driver of the electronic device immediately increases the frequency of the Vsync signal output by the display screen, thereby responding to the Vsync signal with the increased frequency and writing the display data of the next frame of image to the display screen in a short time to drive the display screen to display the next frame of image. That is, the method proposed in the embodiment of the present application can enable the display screen to quickly display the next frame of image when there is a slight delay in displaying the image, rather than requiring the display screen to display the image for at least two consecutive Vsync cycles before displaying the next frame of image as in the traditional solution. In this way, the duration of the image timeout on the display screen can be effectively reduced, thereby greatly reducing the degree of delay in the device display screen, making it difficult for the user to perceive the delay in the device display screen.

[0121] The method proposed in the embodiment of the present application configures the delay detection module in the image display driver of the kernel layer of the electronic device system. In this way, whether the kernel layer where the delay detection module is located causes the display screen to time out, or the application layer, application framework layer or hardware abstraction layer of the system causes the display screen to time out, it can be detected by the delay detection module. This also improves the comprehensiveness of the detection of whether the display screen image has timed out, and increases the frequency of the output Vsync signal so that the image display driver can accurately send the next frame of image for display immediately.

[0122] Next, in conjunction with FIG6 , a feasible specific implementation of the image display method provided in the embodiment of the present application is described.

[0123] As shown in Figure 6, when the display screen of an electronic device (supporting a 360Hz base frequency) is refreshing and displaying an image at a current refresh rate of 120Hz, if at time t3, the APP used by the system application layer to draw the image 2 to be displayed takes longer than the Vsync period of 8.3ms corresponding to the current refresh rate of 120Hz, the APP will not respond to the Vsync signal 3 to send the display data of image 2 to the SF of the application framework layer at time t3, and thus cause the image display driver to miss the Vsync signal 3 and be unable to send the image to the display screen at time t3, resulting in the phenomenon that the display screen times out on image 1. The image display method provided in the embodiment of the present application uses a new hardware module, the delay detection module, in the core layer of the electronic device system. When the display screen displays image 1 for a timeout (exceeding 8.3ms), the image display driver of the electronic device increases the frequency of the Vsync signal output by the display screen to 360Hz. Therefore, at time t5, the display screen outputs the Vsync signal a with a frequency increase (corresponding to a Vsync period of 2.8ms). After receiving Vsync signal a, the image display driver in the system kernel layer, which is used to drive the display screen, responds to Vsync signal a and writes the display data of Image 2, which was received just before time t5, to the display screen. In this way, at time t5, the display screen starts displaying Image 2, after displaying Image 1 for only about 2.8ms.

[0124] As shown in Figure 7, when the display screen of an electronic device (supporting a 360Hz base frequency) is refreshing and displaying an image at the current refresh rate of 120Hz, if the GPU of the system application framework layer synthesizes image 2 for more than 8.3ms, the GPU will not send the display data of image 2 to the image display driver of the kernel layer until after time t4, and thus cause the image display driver to miss the Vsync signal 4 and be unable to send the image to the display screen at time t4, resulting in the phenomenon that the display screen times out on image 1. In response to this phenomenon, the image display method provided in the embodiment of the present application increases the frequency of the Vsync signal output by the display screen to 360Hz when the electronic device detects that the display screen has timed out on displaying image 1 through a delay detection module. Therefore, the display screen can output the Vsync signal a with a frequency increase at time t5 (the corresponding Vsync period is 2.8ms), and the image display driver responds to the Vsync signal a at time t5, and writes the display data of Image 2, which has been synthesized by the GPU and sent to the image display driver before time t5, to the display screen, so that the display screen starts to display Image 2 when the display time of Image 1 is only about 2.8ms longer.

[0125] Compared to conventional solutions, the image display method provided in the embodiments of the present application utilizes a newly added delay detection module. Upon discovering that a display screen has timed out due to a missed Vsync signal (also known as frame loss) at any level of the electronic device's system, the method immediately increases the frequency of the Vsync signal output by the display screen, thereby enabling the image display driver to instantly display the image based on the increased Vsync signal. This eliminates the need for the display screen to display an image for at least two consecutive Vsync cycles (e.g., one Vsync cycle is 8.3ms, and two Vsync cycles are 16.6ms), as in conventional solutions. This results in a long (e.g., 8.3ms) timeout before the next frame written by the image display driver is displayed. Instead, the display screen can display the image for a very short (e.g., 2.8ms) timeout before responding to the image display driver's request to display the next frame. This extremely short timeout is virtually imperceptible to the user. That is, when the display screen of an electronic device times out on an image, the present application can increase the frequency of the output Vsync signal so that the image display driver can quickly send and display the next frame of image, thereby effectively reducing the duration of the display screen's timeout display of the image, making it difficult for users to notice the delay in the device's display screen.

[0126] In addition, in the embodiment of the present application, by comparing Figure 3 with Figure 6 or comparing Figure 4 with Figure 7, it can be found that the image display method provided by the embodiment of the present application is more than the traditional solution, and the electronic device responds to the Vsync signal to display the image in the same unit time. That is, the method provided by the embodiment of the present application can also effectively improve the average frame rate of the electronic device in response to the Vsync signal to display the image. Moreover, the more times the electronic device's system misses the Vsync signal and causes the display screen to time out to display the image, the more image frames the method provided by the embodiment of the present application will respond to and display in the same unit time, thereby improving the average frame rate of the electronic device in displaying the image more significantly and effectively.

[0127] Based on the overall overview of the image display method provided by the above-mentioned embodiment of the present application, the specific embodiments of the image display method provided by the embodiment of the present application are described in turn below.

[0128] Please refer to Figure 8, which is a flowchart of a specific implementation of the image display method provided in an embodiment of the present application. It should be understood that although the execution order of some method steps is shown in Figure 8, the image display method provided in the embodiment of the present application can adopt an execution order different from the method steps shown in the figure based on the different design needs of actual applications. That is, the order of the method steps shown in Figure 8 does not constitute a limitation on the execution logical order of the image display method provided in the embodiment of the present application, and any other reasonable changes based on the order of the method steps shown in Figure 8 should be included in the scope of protection of the image display method provided in the embodiment of the present application.

[0129] In one feasible embodiment of the image display method provided in the embodiments of the present application, when the image display method is executed by an electronic device, at a first moment, the electronic device generates a first Vsync signal, and in response to the first Vsync signal, the display screen of the electronic device begins to display the first image. At a second moment after the first moment, the electronic device generates a second Vsync signal. In response to the second Vsync signal, the display screen begins to display the second image. At a third moment after the second moment, in response to a second display duration of the display screen displaying the second image being greater than a first display duration of the display screen displaying the first image, the electronic device generates a third Vsync signal.

[0130] It should be noted that in the embodiment of the present application, the first Vsync signal generated by the electronic device at the first moment corresponds to the first Vsync cycle, and the first Vsync cycle corresponds to the first display duration of the first image, that is, the first Vsync cycle is equal to the first display duration. The second Vsync signal generated by the electronic device at the second moment corresponds to the second Vsync cycle, and the second Vsync cycle is equal to the first Vsync cycle. The third Vsync signal generated by the electronic device at the third moment corresponds to the third Vsync cycle, and the third Vsync cycle is shorter than the first Vsync cycle.

[0131] In the embodiment of the present application, a smaller Vsync period indicates a higher frequency of outputting the Vsync signal. The electronic device may generate the third Vsync signal at the third moment in response to the second display duration being greater than the first display duration. This may be achieved by: the electronic device, through its own image display driver, controlling the display screen to increase the frequency of triggering the Vsync signal when the second display duration is greater than the first display duration, so that the display screen outputs the third Vsync signal with the increased frequency at the third moment in accordance with the increased frequency.

[0132] In the embodiment of the present application, by generating the third Vsync signal at the third moment, the display screen can start displaying the image of the next frame of the second image after displaying the second image for a very short time.

[0133] In a feasible embodiment, the electronic device controls the display screen to increase the frequency of triggering the Vsync signal through the image display driver, and the specific process of the electronic device generating the third Vsync signal at the third moment can be referred to S1 to S3 shown in Figure 8.

[0134] S1: Detect whether the second display duration is greater than the first display duration.

[0135] In an embodiment of the present application, the image display driver of the electronic device calculates in real time the second display time for the display screen to display the second image after the display screen responds to the second Vsync signal at a second moment to display the second image, and detects whether the second display time is greater than the first display time for the display screen to display the first image.

[0136] It should be noted that, in the embodiment of the present application, the second image displayed on the display screen is the next frame image of the first image displayed on the display screen.

[0137] For example, when a display screen uses a 60Hz refresh rate as the current refresh rate for image refresh and displays, and uses this 60Hz frequency as the frequency for triggering the Vsync signal, when the first Vsync signal is triggered at a first moment, the first Vsync period corresponding to the first Vsync signal is approximately 1 / 60≈16.6ms, that is, the display screen triggers a first Vsync signal every 16.6ms. At this time, the first display duration corresponding to the first Vsync period is also approximately 16.6ms, that is, the display screen refreshes and displays a frame of image every approximately 16.6ms. Thus, because the second Vsync period is equal to the first Vsync period, after the display screen displays the second image in response to the second Vsync signal at a second moment, the second display duration during which the display screen continues to display the second image is also approximately 16.6ms. In this way, if, after the display screen displays the second image, the image display driver of the electronic device calculates the second display duration in real time and detects that the second display duration is greater than 16.6ms, it can be determined that the second display duration is greater than the first display duration.

[0138] S2: when the second display duration is longer than the first display duration, the frequency of the output Vsync signal is increased.

[0139] In an embodiment of the present application, when the image display driver of the electronic device is displaying the second image on the display screen, if it is detected that the second display duration of the second image is greater than the first display duration, the image display driver controls the display screen to increase the frequency of the output Vsync signal.

[0140] For example, when the display screen uses the current refresh rate of 60Hz as the output frequency of the Vsync signal and displays a second image, the image display driver calculates the second display duration of the second image in real time. If the second display duration is greater than the first display duration by 16.6ms, the image display driver determines that a delay has occurred in the display screen's display of the second image. Consequently, the image display driver immediately issues a control instruction to the display screen, causing it to increase the current 60Hz output frequency of the Vsync signal.

[0141] S3: Generate a third Vsync signal.

[0142] In an embodiment of the present application, after the image display driver of the electronic device controls the display screen to increase the frequency of the output Vsync signal, the display screen outputs a third Vsync signal with an increased frequency to the image display driver and other software and hardware modules at a third moment after the second moment.

[0143] It should be noted that in the embodiment of the present application, since the higher the frequency of the output Vsync signal, the smaller the Vsync period, therefore, after the display screen increases the frequency of the output Vsync signal, the third Vsync period corresponding to the third Vsync signal triggered at the third moment is smaller than the above-mentioned first Vsync period and also smaller than the above-mentioned second Vsync period (when the display screen outputs the first Vsync signal at the first moment and outputs the second Vsync signal at the second moment, the frequency of the output Vsync signal has not yet been increased).

[0144] For example, after the electronic device controls the display to increase the frequency of the currently used output Vsync signal from 60Hz to 360Hz, the display screen outputs a third Vsync signal with a first increased output frequency after increasing the frequency of the output Vsync signal by approximately 2.8ms, based on a Vsync period of 1 / 360≈2.8ms corresponding to the increased frequency of 360Hz. At this time, the third Vsync period corresponding to the third Vsync signal is approximately 2.8ms, which is shorter than the first Vsync period of approximately 16.6ms.

[0145] In a feasible embodiment, the specific process of the display screen displaying the next frame image of the second image in response to the third Vsync signal can be further referred to S4 shown in FIG8 .

[0146] S4: Writing display data of the third image.

[0147] It should be noted that, in the embodiment of the present application, the third image is the next frame image of the above-mentioned second image.

[0148] In the embodiment of the present application, in response to the electronic device generating a third Vsync signal at a third moment, the display screen displays a third image. That is, after receiving the display data of the third image sent by the upper layer of the system, the image display driver of the electronic device writes the display data of the third image to the display screen in response to the third Vsync signal with a frequency boost output by the display screen at the third moment, so that the display screen displays the third image at the third moment.

[0149] For example, assuming that the display screen of an electronic device supports a 360Hz base frequency, when the display screen uses the current refresh rate of 120Hz, the image display duration corresponding to 8.3ms, during the process of displaying the image, the display screen uses the 120Hz frequency as the frequency of the output Vsync signal. After the display screen responds to the second Vsync signal at the second moment and starts to display the second image, the image display driver of the electronic device continuously detects whether the second display duration of the second image displayed by the display screen is greater than the first display duration of 8.3ms (the Vsync period corresponding to the 120Hz frequency is approximately 8.3ms). In this way, when the image display driver detects that the second display duration is greater than 8.3ms, it determines that there is a delay problem in the current display of the second image on the display screen, and thus controls the display screen to start the pre-set 360Hz-TE high-frequency synchronization scheme to control the display screen to increase the frequency of the output Vsync signal to 360Hz. In this way, at the third moment, the display screen outputs the third Vsync signal with the increased frequency according to the Vsync period 1 / 360≈2.8ms corresponding to the 360Hz frequency. After receiving the third Vsync signal, the image display driver responds to it by writing the display data for the third image, sent by the upper system layer before the third time, to the display screen. Thus, the display screen begins refreshing and displaying the third image at the third time. At this point, the display screen only displays the second image for approximately 2.8ms.

[0150] In other feasible embodiments, the image display driver of the electronic device can not only receive the display data of the third image before receiving the third Vsync signal, but also receive the display data of the third image sent by the upper layer of the system in response to the third Vsync signal at the same time as receiving the third Vsync signal, and write the display data of the third image to the display screen when responding to the third Vsync signal. For example, when the amount of the display data of the third image is small, so that the upper layer of the system processes the display data of the third image and the time taken to transmit the display data of the third image between the various software and hardware modules is short, there will be no situation where the image display driver cannot receive the display data before completing the response to the Vsync signal. In this way, the image display driver can receive the display data of the third image with a smaller amount of data after receiving the third Vsync signal, and write the display data of the third image to the display screen at the same time as responding to the third Vsync signal.

[0151] It should be noted that in the embodiment of the present application, the 360Hz-TE high-frequency synchronization solution can be a Vsync signal output control solution pre-added to the display screen, allowing the display screen to switch the frequency of the output Vsync signal based on needs. It should be understood that based on the different design requirements of actual applications, other Vsync signal output control solutions of the same type but with different frequencies can of course be pre-added to the display screen, such as a 60Hz-TE low-frequency synchronization solution and a 120Hz-TE standard frequency synchronization solution.

[0152] When a display responds to a synchronization scheme with a specific frequency, it outputs a Vsync signal based on the Vsync period corresponding to that frequency. For example, when a 360Hz-TE high-frequency synchronization scheme is enabled, the display outputs a Vsync signal every 2.8ms, with a Vsync period corresponding to the 360Hz frequency of 2.8ms. When a 120Hz-TE standard-frequency synchronization scheme is enabled, the display outputs a Vsync signal every 8.3ms, with a Vsync period corresponding to the 120Hz frequency of 8.3ms. And when a 60Hz-TE low-frequency synchronization scheme is enabled, the display outputs a Vsync signal every 16.6ms, with a Vsync period corresponding to the 60Hz frequency of 16.6ms.

[0153] In an embodiment of the present application, when the display screen of an electronic device uses 120Hz as the current refresh rate for image refresh display, it can default to using a 120Hz-TE standard frequency synchronization scheme to output a Vsync signal at 120Hz as the original frequency. Thus, by comparing the waveform diagram of the display screen shown in FIG9 using the 120Hz-TE standard frequency synchronization scheme to refresh and output the Vsync signal, and the waveform diagram of the display screen shown in FIG10 using the 360Hz-TE high frequency synchronization scheme to refresh and output the Vsync signal, it can be seen that when the display screen outputs the Vsync signal at a frequency of 120Hz (all dotted arrows in FIG9 and FIG10 indicate the moments when the display screen outputs the Vsync signal), if the image display driver misses a Vsync signal, resulting in a delay in sending image 1 to the display screen, the display screen will display image 0 of the previous frame of image 1 within at least two consecutive Vsync cycles. If the image display driver misses a Vsync signal, resulting in a delay in sending image 3 to the display screen, the display screen will also display image 2 of the previous frame of image 3 within at least two consecutive Vsync cycles. If the display outputs Vsync signals at a 360Hz frequency, then if the image display driver misses a Vsync signal (in this case, a high-frequency Vsync signal), resulting in a delay in sending Image 1 to the display, the image display driver only needs to timeout Image 0 for a shorter Vsync period before responding to the next high-frequency Vsync signal and sending the image to the display to begin displaying Image 1. Even if the image display driver misses two consecutive high-frequency Vsync signals and fails to send Image 3 to the display, the display only needs to timeout Image 2 for two shorter Vsync periods. Even these two shorter Vsync periods (2.8ms + 2.8ms = 5.4ms) are shorter than the single Vsync period (8.3ms) required when outputting Vsync signals at a 120Hz frequency.

[0154] Compared to traditional solutions, the image display method provided in the embodiments of the present application increases the frequency of the Vsync signal output by the display screen when the display screen displays an image timeout, thereby allowing the image display driver to instantly display the image based on the high-frequency Vsync signal after the frequency increase. In this way, the display screen can respond to the image display driver to display the next frame of the image after only a very short time of timeout. The user will be visually almost unable to perceive the delay in the device display screen. In other words, the method provided in the embodiments of the present application can effectively reduce the duration of the display screen's image timeout, making it difficult for the user to perceive the delay in the device display screen.

[0155] In a feasible embodiment, the second display time length during which the display screen displays the second image is less than twice the first display time length.

[0156] In an embodiment of the present application, as long as the second display time is longer than the first display time but less than twice the first display time, the display screen responds to a third Vsync signal with a smaller Vsync period to start displaying the third image, the display screen will not display the second image for a long time for two consecutive first Vsync periods, so there will be no phenomenon of device display screen delay similar to the traditional solution.

[0157] In this way, the image display driver of the electronic device can not only control the display screen to increase the frequency of the output Vsync signal upon initially detecting that the second display duration is longer than the first display duration, but can also control the display screen to increase the frequency of the output Vsync signal at any time when the second display duration is longer than the first display duration but less than twice the first display duration. In this case, the image display driver writes display data of the third image to the display screen in response to the third Vsync signal output by the display screen with the frequency increased, so that the display screen displays the third image if the duration of the second image display timeout does not exceed the first display duration.

[0158] In a feasible embodiment, the third display time length during which the display screen displays the third image is shorter than the first display time length.

[0159] In the embodiment of the present application, since the display screen displays the third image in response to the third Vsync signal with a frequency increase when the display of the second image times out (the second display duration is greater than the first display duration), if the electronic device generates a new Vsync signal using a Vsync period corresponding to the third Vsync signal, and the image display driver of the electronic device also receives the display data of the image of the next frame of the third image before (or at the same time as) the electronic device generates the new Vsync signal, the image display driver will respond to the new Vsync signal and write the display data of the image of the next frame of the third image to the display screen. That is, the display screen begins to refresh and display the image of the next frame of the third image in response to the new Vsync signal. In this way, the third display duration (approximately from the third moment to the moment when the electronic device generates the new Vsync signal) during which the display screen displays the third image will be less than the first display duration corresponding to the first Vsync period.

[0160] For example, as shown in FIG11 , after time t4 (indicated by the vertical dashed line in the figure), the image display driver controls the display screen to increase the frequency of the Vsync signal output from the original 120Hz to 360Hz. At a third time (t5), the display screen displays the third image (Image 2) in response to the third Vsync signal a. Thereafter, if the display screen still triggers a new Vsync signal a at 360Hz, at time t6, the display screen will begin refreshing and displaying Image 3, the next frame of Image 2, in response to the new Vsync signal a. At this point, the display screen displays the third image for a third display duration of only approximately 5.4ms, which is less than the first display duration of 8.3ms for the first image (Image 0).

[0161] In another feasible embodiment, the third display time duration for the display screen to display the third image may also be the same as the first display time duration mentioned above.

[0162] In the embodiment of the present application, since the display screen starts to display the third image in response to the third Vsync signal with a frequency increase when the display of the second image times out, if the electronic device generates a new Vsync signal using the Vsync period corresponding to the third Vsync signal, and the image display driver of the electronic device receives the display data of the next frame of the third image before (or at the same time as) the electronic device generates the M+1th new Vsync signal, the image display driver responds to the new Vsync signal and writes the display data of the next frame of the third image to the display screen. That is, the display screen refreshes and displays the image of the next frame of the third image in response to the new Vsync signal. In this way, the display duration of the third image displayed on the display screen will be equal to the first display duration corresponding to the first Vsync period.

[0163] It should be noted that, in the embodiment of the present application, M is a multiple of the frequency of the Vsync signal output by the display screen after the boost, which is greater than 1 compared to the frequency of the Vsync signal output by the display screen before the boost.

[0164] For example, as shown in FIG12 , after time t4 (the time indicated by the vertical dashed line in the figure), the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 3 times the original frequency of 120 Hz (360 Hz). At a third time (t5), the display screen displays the third image (Image 2) in response to the third Vsync signal (the first Vsync signal a) after the frequency increase. Thereafter, the display screen continues to output the Vsync signal a at 360 Hz after the frequency increase. If the image display driver receives display data for Image 3, the next frame of Image 2, before the display screen triggers the fourth Vsync signal a at time t8, the image display driver writes the received display data for Image 3 to the display screen in response to the fourth Vsync signal a, thereby driving the display screen to display Image 3. Thus, the third display duration of Image 2 displayed by the display screen is equal to the first display duration of 8.3 ms for the first image (Image 0) displayed by the display screen.

[0165] It should be noted that the moments indicated by the dotted arrows in FIG12 are the moments when the image display driver does not respond to the Vsync signal a to send images to the display screen.

[0166] In a feasible embodiment, at a fourth moment after the second moment and before the third moment, the electronic device further generates a fourth Vsync signal. At this time, if the image display driver of the electronic device has not yet received display data of the third image, the image display driver will not write any image display data to the display screen in response to the fourth Vsync signal. As a result, the display screen will respond to the fourth Vsync signal and continue to display the second image currently being displayed for a timeout period.

[0167] For example, as shown in FIG11 or FIG12 , after the display screen begins displaying the second image (Image 1) in response to the second moment (t3), the display screen will continue to trigger a fourth Vsync signal at a fourth moment (t4) according to a second Vsync period of 8.3ms, which is equal to the first Vsync period. At this time, because the image display driver has not yet received the display data of the third image (Image 2) sent by the upper layer of the electronic device system, the image display driver will not respond to the fourth Vsync signal to write the display data of Image 2 to the display screen. Therefore, at time t4, the display screen can only continue to display Image 2 in response to the fourth Vsync signal. However, because the second display duration of the second image displayed by the display screen has reached 8.3ms at this time, the display screen displays the second image as a timed-out display after time t4. Then, at the third moment (t5), the display screen outputs a third Vsync signal (the first Vsync signal a) at the increased Vsync signal frequency of 360 Hz. Furthermore, the image display driver has received the display data for Image 2 before t5. Therefore, the image display driver can write the display data for Image 2 to the display screen in response to the first Vsync signal a. At t5, the display screen responds to the first Vsync signal a and begins refreshing the display of Image 2.

[0168] In a feasible embodiment, when the display screen outputs the Vsync signal using a 120 Hz frequency as the original frequency, the first Vsync period corresponding to the first Vsync signal generated by the electronic device through the display screen at the first moment is approximately 8.3 (1 / 120≈8.3) ms. Thereafter, if the electronic device increases the frequency of the Vsync signal output by the display screen by three times the original frequency of 120 Hz, that is, to 360 Hz, through the image display driver, then the third Vsync signal generated by the electronic device through the display screen at the third moment after the frequency of the Vsync signal is increased, the third Vsync period corresponding to the third Vsync signal is approximately 2.8 (1 / 360≈2.8) ms.

[0169] In a feasible embodiment, when the first Vsync cycle is approximately 8.3ms and the third Vsync cycle is approximately 2.8ms, the first display duration corresponding to the first Vsync cycle is also approximately 8.3ms, and the second display duration for the display screen to display the second image is approximately 8.3ms+2.78ms=11.1ms.

[0170] For example, assuming a display supporting a 360Hz base frequency initially outputs a Vsync signal at a base frequency of 120Hz, after displaying the first image for a first display duration of 8.3ms corresponding to the first Vsync period of 8.3ms (1 / 120≈8.3)ms), the display then responds to a new Vsync signal to display the second image, the next frame after the first image. During the display of the second image, if the display times out before displaying the second image (the second display duration is longer than the first display duration of 8.3ms), the image display driver controls the display to increase the frequency of the output Vsync signal to three times the base frequency of 120Hz, i.e., to 360Hz. In this manner, the display outputs a Vsync signal at a base frequency of 360Hz. In response to this Vsync signal, the image display driver writes display data for the third image, the next frame after the second image, to the display, driving the display to display the third image after a timeout of approximately 2.8ms for the second image. At this point, the display displays the entire second image for a second display duration of approximately 8.3ms + 2.78ms = 11.1ms.

[0171] In some feasible embodiments, when an image display driver of an electronic device increases the frequency of a Vsync signal output by a display screen to M times the original frequency of the Vsync signal, the image display driver may receive display data of a third image in the next frame of a second image displayed on the display screen before the display screen outputs an i-th Vsync signal with the increased frequency at the increased frequency, where i is a positive integer and i is less than M.

[0172] In this case, the image display driver writes the display data of the third image to the display screen in response to the Vsync signal with increased frequency. This may be: writing the display data of the third image to the display screen in response to the i-th Vsync signal with increased frequency.

[0173] Exemplarily, as shown in Figure 13, when the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 3 times (360Hz) of the original frequency of 120Hz after time t4 (the time indicated by the vertical dotted line in the figure), if the upper layer of the system of the electronic device sends the display data of the third image (image 2) of the next frame of the second image (image 1) displayed on the display screen to the image display driver before the display screen outputs the i = 1th frequency-increased Vsync signal a at 360Hz at the third time (t5), that is, the image display driver receives the display data of image 2 before time t5, then the image display driver writes the display data of image 2 to the display screen in response to the i = 1th Vsync signal a at time t5 to drive the display screen to display image 2. In this way, the image display driver displays Image 2 within 2.8ms after the display screen times out on Image 1. This reduces the traditional solution's requirement for the display screen to display Image 1 for at least two consecutive Vsync cycles (8.3ms + 8.3ms = 16.6ms) before displaying Image 2 to only 8.3ms + 2.8ms = 11.1ms after the display screen displays Image 1. This effectively reduces the duration of the display screen's timeout for Image 1 (from approximately 16.6ms in the traditional solution to only approximately 2.8ms).

[0174] For example, as shown in FIG14 , if the upper layer of the electronic device's system sends the display data for Image 2 to the image display driver after the third moment (t5), that is, the image display driver receives the display data for Image 2 before the display screen outputs the (i=2)th Vsync signal a at 360 Hz. In this case, the image display driver responds to the (i=2)th Vsync signal a and writes the received display data for Image 2 to the display screen, driving the display screen to display Image 2. In this case, the image display driver can also send Image 2 for display after the display screen has only timed out for approximately 5.4 ms. Compared to the conventional solution, which requires the display screen to display Image 1 for approximately 16.6 ms, the display screen still displays Image 1 for a shorter duration of approximately 8.3 ms + 5.4 ms = 13.9 ms. This effectively reduces the time the display screen displays Image 1 for a timeout (from approximately 16.6 ms in the conventional solution to only approximately 5.4 ms).

[0175] It should be noted that the moments indicated by the dotted arrows in FIG. 13 and FIG. 14 are the moments when the image display driver does not respond to the Vsync signal a to send images to the display screen.

[0176] In some other feasible embodiments, the above-mentioned M may not be a positive integer, but M is still greater than 1.

[0177] For example, as shown in FIG15 , after time t4 (as indicated by the vertical dashed line in FIG13 ), the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 1.5 times (180 Hz) the original frequency of 120 Hz. Thus, if the upper layer of the electronic device's system sends the display data of the third image (image 2) of the next frame after the second image (image 1) displayed on the display screen to the image display driver before the i = 1th Vsync signal a with the frequency increased at 180 Hz is triggered at the third time (t5), that is, the image display driver receives the display data of image 2 before time t5, then the image display driver writes the display data of image 2 to the display screen in response to the i = 1th Vsync signal a at time t5, thereby driving the display screen to display image 2. In this way, the image display driver can display image 2 approximately 5.5 ms after the display screen has timed out displaying image 1. This shortens the display time of image 1 by approximately 13.8 ms, compared to the conventional solution where the display screen displays image 1 for approximately 16.6 ms. That is, the time period for the display screen to overtime display the image 1 is still effectively reduced.

[0178] In an embodiment of the present application, the electronic device's image display driver receives display data for the third image before the display screen outputs the i-th Vsync signal after the frequency increase. Then, in response to the received i-th Vsync signal after the frequency increase, the display screen writes the display data for the third image to drive the display screen to display the third image. This ensures that the electronic device's image display driver responds to the Vsync signal after the frequency increase triggered by the display screen and sends the next frame of image for display within a short period of time after the display screen times out. This effectively reduces the duration of the display screen's timeout display of the second image.

[0179] In some feasible embodiments, in response to the display screen displaying the second image, an image display driver of the electronic device calculates a second display duration for the display screen to display the second image. Furthermore, the image display driver compares the second display duration with the first display duration. If the second display duration is greater than the first display duration, the image display driver sends a control instruction to the display screen in response to the second display duration being greater than the first display duration. In response to the control instruction, the display screen increases the frequency of the output Vsync signal and generates a third Vsync signal with the increased frequency at a third moment after the second moment.

[0180] For example, by configuring a delay detection module in the image display driver of the electronic device, and detecting whether the second display duration is greater than the first display duration through the delay detection module, the frequency of the output Vsync signal is increased when the delay detection module detects that the second display duration is greater than the first display duration. In this way, since the image display driver is located in the kernel layer of the entire system of the electronic device, whether the upper layer of the system (such as the application layer, the application framework layer or the hardware abstraction layer) causes the display of the second display duration to be greater than the first display duration, or the kernel layer itself causes the second display duration to be greater than the first display duration, it can be detected by the newly added delay detection module in the kernel layer. That is, the comprehensiveness and accuracy of detecting whether the second display duration is greater than the first display duration are improved.

[0181] In an embodiment of the present application, an electronic device can determine whether to increase the frequency of the output Vsync signal by combining improvements at the software level and the hardware level. That is, the electronic device adds a new hardware module to the system kernel layer, and detects whether the device display screen has a delay (that is, whether the duration of the display screen displaying the image has timed out) through the hardware module, so that when the hardware module detects that the device display screen has a delay, the display screen outputs the Vsync signal frequency to achieve the purpose of reducing the degree of delay of the device display screen. As shown in Figure 16, the electronic device newly configures a delay detection module in the image display driver of the kernel layer. Based on this, in response to the display screen starting to display the second image, the electronic device continuously calculates the second display duration of the display screen displaying the second image through the delay detection module, and detects whether the second display duration is greater than the first display duration. Afterwards, when the delay detection module detects that the second display duration is greater than the first display duration, it is determined that the device display screen has a delay, so that the image display driver sends a control instruction to the display screen to control the display screen to increase the frequency of the output Vsync signal.

[0182] It should be noted that in the embodiment of the present application, the image display driver continuously detects whether the display screen has timed out by using a delay detection module during the display screen's image display process. Specifically, if the image display driver in the electronic device's kernel layer, the applications in the application layer, the image rendering framework and image synthesis framework in the application framework layer, and the hardware abstraction layer miss the Vsync signal triggered by the display screen at its original frequency, the second display duration will be longer than the first display duration, thereby causing the image displayed on the display screen to be in a delayed state.

[0183] In an embodiment of the present application, when detecting whether the second display duration is greater than the first display duration, the image display driver of the electronic device can use a newly added delay detection module to detect whether the second display duration of the second image displayed by the display screen is greater than the first display duration corresponding to the first Vsync during the process of the display screen displaying the second image. If the delay detection module detects that the second display duration is greater than the first display duration, the image display driver determines that the display screen has timed out from displaying the second image, thereby placing the image displayed on the display screen in a delayed state.

[0184] When the image display driver determines that the second display duration is greater than the first display duration and thus increases the frequency of the display's output Vsync signal, it can issue a control instruction to the display via the display module's serial interface, which establishes a communication connection between the driver and the display. Upon receiving the control instruction, the display immediately responds by increasing the frequency of the output Vsync signal from the original frequency to the frequency indicated by the control instruction.

[0185] In an embodiment of the present application, when the delay detection module detects that the second display duration exceeds the first display duration, the image display driver of the electronic device immediately increases the frequency of the Vsync signal output by the display screen, and in response to the Vsync signal after the frequency increase, writes the display data of the third image to the display screen to drive the display screen to display the third image. In this way, it is possible to effectively reduce the duration of the display screen displaying the image overtime, thereby reducing the degree of delay in the device display screen, and it is also possible to improve the comprehensiveness of detecting whether the display screen displays the second image overtime, and to increase the frequency of the output Vsync signal so that the image display driver can immediately send the third image for display. Because the delay detection module is configured in the image display driver of the kernel layer of the electronic device system, whether the kernel layer where the delay detection module itself is located causes the display screen to time out, or the application layer, application framework layer or hardware abstraction layer of the system causes the display screen to time out, it can all be detected by the delay detection module.

[0186] In some feasible embodiments, the image display driver of the electronic device detects whether it responds to the Vsync signal triggered by the display screen at the original frequency before detecting whether the second display duration is greater than the first display duration through the delay detection module.

[0187] In an embodiment of the present application, the image display driver of the electronic device detects whether the display screen is in a delayed state for displaying an image through a delay detection module each time the display screen refreshes the displayed image. That is, in addition to detecting whether there is a delay in the display screen displaying an image through a delay detection module when the display screen displays the second image (the second display duration exceeds the first display duration, which indicates that there is a delay in the display screen displaying the second image), the image display driver also detects whether the display screen is in a delayed state for displaying the first image through a delay detection module when the display screen displays the first image. Afterwards, when the image display driver detects that the display screen displaying the first image is not in a delayed state through the delay detection module, it further detects whether there is a delay in the display screen displaying the second image through the delay detection module, that is, detects whether the second display duration exceeds the first display duration.

[0188] In an embodiment of the present application, the image display driver detects whether the display screen's display of the first image is in a delayed state through a delay detection module. This can be done by: detecting through the delay detection module whether the image display driver responds to the first Vsync signal triggered by the display screen at the original frequency at the first moment, and writing the display data of the second image to the display screen, thereby driving the display screen to display the second image when the display screen does not time out to display the first image. If it is detected that the image display driver responds to the first Vsync signal to drive the display screen to display the second image, it is determined that the display screen's display of the first image is not in a delayed state. If it is detected that the image display driver does not respond to the first Vsync signal (or misses the first Vsync signal), causing the display screen to time out to display the first image, it is determined that the display screen's display of the first image is in a delayed state.

[0189] In some feasible embodiments, if the image display driver detects, through the delay detection module, that the image display driver writes display data of the second image to the display screen in response to the first Vsync signal, thereby determining that the display screen displays the first image without delay, the image display driver then detects, through the delay detection module, whether the second display duration is greater than the first display duration, and thereby determines, based on the detection result, whether a delay occurs in displaying the second image on the display screen. If it is determined that a delay occurs in displaying the second image on the display screen, the image display driver controls the display screen to increase the frequency of the output Vsync signal.

[0190] Exemplarily, in combination with the system framework of the electronic device shown in Figure 16 and the electronic device shown in Figure 17, the control logic for image display using the method provided in the embodiment of the present application is assumed. Assuming that the display screen of the electronic device supports a 360Hz base frequency, when the display screen displays an image according to the first Vsync period of 8.3ms corresponding to a 120Hz refresh rate, while the display screen displays the second image, the browser application APP of the electronic device system application layer also synchronously draws the third image of the next frame of the second image, and sends the display data of the third image that has been drawn but needs to be rendered to the image rendering service in the application framework layer. After the image rendering service completes rendering of the display data, if the display data needs to be further synthesized, the rendered display data is further sent to the image synthesis service. After the image synthesis service synthesizes the display data, it is sent to the hardware abstraction layer as the display data of the third image to be displayed, so that the hardware abstraction layer performs hardware matching to send the display data of the third image to the image display driver of the kernel layer. The image display driver performs pre-image sending preparations after receiving the display data of the third image.

[0191] At this point, the image display driver obtains the result previously detected by the delay detection module. If the result is that the display screen is not in a delayed state when displaying the first image (the first display duration does not exceed 8.3ms), the delay detection module further detects whether the second display duration of the second image displayed by the display screen is greater than 8.3ms. Upon detecting that the second display duration is greater than 8.3ms, the image display driver immediately sends a command 1 to control the activation of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen. The display screen is then controlled to respond to the command 1 to activate the pre-set 360Hz-TE high-frequency synchronization scheme, thereby increasing the frequency of the display screen's output Vsync signal to 360Hz.

[0192] Alternatively, the image display driver obtains the result detected in advance by the delay detection module, but the result is that the display screen is already in a delayed state when displaying the first image (the first display duration exceeds 8.3ms), indicating that when the display screen displays the first image, the display screen has experienced a delay caused by image display timeout, and in order to reduce the degree of delay, the image display driver has controlled the display screen to increase the frequency of the output Vsync signal to 360Hz.

[0193] In some feasible embodiments, after the image display driver of the electronic device increases the frequency of the output Vsync signal, thereby driving the display screen to display an image in response to the Vsync signal with the increased frequency, in order to avoid the image display driver sending the next frame of the image for display in advance, thereby causing the display screen to only briefly display the image and then quickly display the next frame of the image, the electronic device can use the image display driver to not respond to the Vsync signal with the increased frequency output by the display screen within the display time of the display screen displaying the image, thereby forcing the display screen to display the image for an extended period of time.

[0194] In an embodiment of the present application, the electronic device can forcibly extend the duration of the display screen displaying the third image through steps S5 and S10 shown in FIG18 . After displaying the third image, the display screen executes step S5: feeding back a Vsync signal with a frequency increase. Upon receiving the Vsync signal with a frequency increase, if the third display duration of the third image displayed by the display screen is less than the difference between the first display duration and the third Vsync period, the image display driver executes step S6: stopping responding to the Vsync signal with a frequency increase. The display screen then continues to execute step S7: feeding back the Vsync signal with a frequency increase. After receiving the Vsync signal with a frequency increase, if the third display duration is greater than the difference between the first display duration and the third Vsync period, the image display driver executes step S8: resuming responding to the Vsync signal with a frequency increase. The display screen then executes step S9: feeding back the Vsync signal with a frequency increase. After receiving the Vsync signal, the image display driver executes step S10: writing display data for the next frame of the image to the display screen in response to the Vsync signal with a frequency increase. In this way, the display screen starts to display the next frame of image.

[0195] In an embodiment of the present application, after the image display driver of the electronic device writes the display data of the third image to the display screen to drive the display screen to display the third image, the image display driver stops responding to the Vsync signal with a frequency increase output by the display screen within the third display time duration when the display screen displays the third image, so as to refuse to write the display data of the next frame image of the third image to the display screen within the third display time duration.

[0196] Afterwards, when the third display time is greater than the difference between the first display time and the third Vsync period, the image display driver resumes responding to the Vsync signal with increased frequency output by the display screen, thereby writing the display data of the next frame of the third image to the display screen after the third display time reaches the first display time.

[0197] In the embodiment of the present application, the image display driver does not respond to the Vsync signal with a frequency increase triggered by the display screen during the third display duration of the display screen displaying the third image. This can prevent the image display driver from prematurely sending the next frame of the third image to the display screen during the display screen displaying the third image, causing the display screen to briefly display the third image. This further improves the stability of the electronic device in displaying the third image and subsequent images.

[0198] For example, as shown in FIG19 , assuming that the image display driver of the electronic device detects after time t4 that the display screen displays the second image at a 120 Hz refresh rate for a second display duration that is greater than the first display duration corresponding to the first Vsync period (1 / 120 Hz), which is approximately 8.3 ms, and at the time indicated by the dotted line between times t4 and t5 in the figure, controls the display screen to increase the frequency of the output vertical synchronization signal from the original frequency of 120 Hz to 360 Hz. Then, in response to the display screen outputting the third Vsync signal (Vsync signal a) with a frequency increase at a third time (t5) corresponding to a third Vsync period (1 / 360≈2.8 ms) of 360 Hz, the image display driver writes the third image (image 2) to the display screen to drive the display screen to display image 2 when the display screen only displays the second image (image 1) for approximately 2.8 ms.

[0199] Afterwards, since the display screen increases the frequency of the output Vsync signal to 360Hz, the display screen continues to output a new Vsync signal a at time t6, approximately 2.8ms after displaying image 2 (indicated by the dotted line at time t6 in the figure). At this time, since the display screen displays image 2 for only about 2.8ms, the image display driver stops responding to the Vsync signal a received at time t6 (the moments indicated by the dotted arrows in the figure are all moments when the image display driver does not respond to the Vsync signal a to send images to the display screen), thereby refusing to write the display data of the next frame of image 2 (image 3) to the display screen at time t6.

[0200] After that, at time t7, approximately 2.8 ms after displaying Image 2, the display screen again outputs a new Vsync signal a (indicated by the dotted line at time t7 in the figure). At this time, because the second display duration of the display screen for displaying Image 2 is still only 5.4 ms, that is, the second display duration has not yet reached the first display duration of approximately 8.3 ms, the image display driver still does not respond to the Vsync signal a at time t7, and therefore refuses to write the display data of Image 3 to the display screen at time t7.

[0201] However, after this, when the second display duration is greater than 5.5ms (the first display duration is 8.3ms minus the third Vsync period of approximately 2.8ms), the image display driver resumes responding to the Vsync signal a output by the display screen. Consequently, at time t8 (when the second display duration is now approximately 8.3ms), approximately 2.8ms after the display screen displays image 2, it continues to output a new Vsync signal a. At this point, since the second display duration has reached 8.3ms, the image display driver responds to Vsync signal a at time t8 and writes the display data of image 3 to the display screen.

[0202] This ensures that the display screen displays Image 2 for approximately 8.3ms. After this, as long as the display screen continues to trigger new Vsync signals a at a 360Hz frequency, the image display driver will send images to the display screen in response to Vsync signals a, following the same process as when the display screen displays Image 2, while displaying Image 3 and subsequent images (if any).

[0203] It should be noted that, in the embodiment of the present application, the process in which the image display driver does not respond to the Vsync signal a to send an image to the display screen during the process in which the display screen displays image 2, as shown in FIG19, can also be applied to the example scenarios shown in FIG12, FIG13 and FIG14 above, and to the example scenario described later in conjunction with FIG21. That is, in the example scenarios shown in FIG12, FIG13 and FIG14 above and FIG21 below, the image display driver continues to respond to the Vsync signal a with a higher frequency to write the display data of the next frame of the third image to the display screen during the process in which the display screen displays the third image and the images thereafter (if any). This is the same as the process in which the image display driver responds to the Vsync signal a to send image 3 to the display screen when the display screen displays image 2, as shown in FIG19, and will not be described in detail here.

[0204] In some feasible embodiments, when the image display method provided in the embodiments of the present application is executed by an electronic device, after the image display driver writes display data of the third image to the display screen to drive the display screen to immediately display the third image, the image display driver can further adaptively reduce the frequency of the Vsync signal. In this way, it is possible to avoid the wasteful power consumption caused by the display screen outputting the Vsync signal at an unnecessary high frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0205] In an embodiment of the present application, after the display screen of the electronic device displays the third image in response to the third Vsync signal, if the third display duration of the display screen displaying the third image is greater than a preset interval duration, the electronic device reduces the frequency of the output Vsync signal. The preset interval duration is equal to the first display duration minus the duration of time spent reducing the frequency of the output Vsync signal, that is, the preset interval duration is the difference between the first display duration and the duration of time spent reducing the frequency of the output Vsync signal.

[0206] It should be noted that, in the embodiment of the present application, the time required for reducing the frequency of the output Vsync signal can be an empirical value pre-added in the image display driver for the image display driver to flexibly read. Alternatively, the time taken can also be a value temporarily determined by the electronic device based on its own real-time system resource occupancy and performance when it is necessary to determine the preset interval time. The temporarily determined value can be obtained by the image display driver at any time. It should be understood that based on the different design requirements of actual applications, the time taken for reducing the frequency of the output Vsync signal can of course be different values. For example, the time taken can specifically be any value of 0.3ms, 0.5ms, 0.8ms or even 1ms. That is, the method provided in the embodiment of the present application does not limit the specific numerical value of the time taken to reduce the frequency of the output Vsync signal.

[0207] As shown in Figures 16 and 17, after the image display driver of the electronic device has controlled the display screen to increase the frequency of the Vsync signal output by the display screen to 360Hz, thereby reducing the degree of delay caused by the display screen displaying the image overtime, in order to avoid the device power consumption waste caused by the display screen still triggering the Vsync signal at 360Hz, the image display driver calculates the interval time b between the current moment and the moment when the image display driver writes the display data of the first image to the display screen, and compares the interval time b with the first display time of approximately 8.3ms minus the time spent reducing the Vsync signal (assuming it is 1ms) 7.3ms. Thus, when the comparison finds that the interval time b is greater than or equal to 7.3ms, the image display driver determines that the current operation of increasing the frequency of the output Vsync signal has reduced the delay that occurs when the display screen displays the second image, that is, the display screen's display of the third image has stabilized. Therefore, the image display driver sends instruction 2 to the display screen through DSI to control the shutdown of high-frequency TE, so as to control the display screen to respond to instruction 2 and shut down the preset 360Hz-TE high-frequency synchronization scheme, and reduce the frequency of the Vsync signal output by the display screen from 360Hz to 120Hz.

[0208] In some feasible embodiments, the image display driver may further obtain the current time of the electronic device system after the display screen displays the third image, and use the current time minus the image sending time of the Vsync signal (the time when the display data of the third image is written to the display screen) after the image display driver's response frequency is increased to calculate the duration as the third display duration for the display screen to display the third image. Thereafter, the third display duration is compared with the preset interval duration.

[0209] Alternatively, in other feasible embodiments, the image display driver may directly compare the duration obtained by subtracting the image sending time from the current time with a preset interval duration. If the duration obtained by subtracting the image sending time from the current time is greater than or equal to the preset interval duration, the previously increased frequency of the output Vsync signal is reduced.

[0210] In some feasible embodiments, after the display screen starts displaying the third image, the image display driver of the electronic device may reduce the frequency of outputting the Vsync signal if display data of a next frame of the third image is received within a third display duration of the display screen displaying the third image. In this way, the electronic device generates the fifth Vsync signal at a fifth moment after the third moment.

[0211] It should be noted that, in the embodiment of the present application, the fifth Vsync signal corresponds to the fifth Vsync period, which is equal to the first Vsync period mentioned above.

[0212] In some feasible embodiments, the display duration of the fourth image is greater than the preset interval duration; the fourth image is an image displayed in the previous frame at the fifth moment, the preset interval duration is the interval duration between the fifth moment and the sixth moment minus the time required to reduce the frequency of the output Vsync signal, and the sixth moment is the moment when the fourth image is written to the display screen.

[0213] In this embodiment of the present application, after the display screen begins displaying the third image, the electronic device reduces the frequency of the output Vsync signal in response to the fourth image being displayed for a duration greater than the interval between the fifth and sixth moments minus the duration required to reduce the frequency of the output Vsync signal. Thereafter, at a fifth moment after the third moment, the electronic device generates a fifth Vsync signal having a Vsync period equal to the first Vsync period.

[0214] It should be noted that, in the embodiment of the present application, the fourth image is the third image itself or a frame image after the third image. The sixth moment is the moment when the fourth image is written to the display screen, that is, when the fourth image is the third image itself, the sixth moment is the third moment when the display screen responds to the third Vsync signal and starts to display the third image (at this time, the third image is written to the display screen and starts to be displayed by the display screen), and when the fourth image is a frame image after the third image, the sixth moment is the moment when the display screen starts to display the frame image after the third image (at this time, the frame image after the third image is written to the display screen and starts to be displayed by the display screen). The interval between the fifth moment and the sixth moment is the first display duration corresponding to the above-mentioned first Vsync cycle.

[0215] For example, as shown in FIG20 , assuming that the fourth image is the third image itself and the sixth moment is the third moment itself, after the display screen begins displaying the third image (Image 2) at the third moment (t5), the electronic device calculates the third display duration of Image 2 in real time. If the third display duration is greater than the interval (8.3ms) between the fifth moment (t6) and t5 minus the time it takes to reduce the frequency of the output Vsync signal (the time it takes is the time between the moment indicated by the vertical dashed line on the right side of the figure and t6), the electronic device reduces the frequency of the output Vsync signal at the moment indicated by the vertical dashed line on the right side of the figure. Thus, at t6, the electronic device generates a fifth Vsync signal (Vsync signal 6) having a fifth Vsync period of 8.3ms (equal to the first Vsync period).

[0216] In some feasible embodiments, if the electronic device reduces the frequency of the Vsync signal output by the display screen during the process of displaying the third image on the display screen through the image display driver, the fifth moment when the electronic device generates the fifth Vsync signal through the display screen and the third moment when the display screen outputs the third Vsync signal are N = 1 8.3ms apart.

[0217] For example, as shown in FIG20 , when the electronic device detects, through the delay detection module, that the display screen has timed out displaying image 1 after time t4, it increases the frequency of the Vsync signal output by the display screen (the moment indicated by the vertical long dashed line on the left side of the figure is the moment of increasing the frequency of the output Vsync signal), so that the display screen outputs a third Vsync signal (Vsync signal a) with the increased frequency at a third time (t5). At time t5, the image display driver responds to Vsync signal a and writes the display data of the third image (image 2) synthesized by the GPU and sent to the image display driver to the display screen, so that the display screen begins displaying image 2 after the second display duration of the second image (image 1) has timed out by approximately 2.8ms. After the display screen displays image 2, if the image display driver receives the display data of image 3 sent by the GPU within 8.3ms of the display screen displaying image 2 (i.e., the display data of image 3 is received before time t6), it determines that the display screen's current display of image 2 has stabilized, and thus sends a control instruction to the display screen to reduce the frequency of the output Vsync signal (the moment indicated by the vertical long dashed line on the right side of the figure is the moment of reducing the output Vsync signal). In this way, the display screen can feedback the fifth Vsync signal (Vsync signal 6 of the original frequency) to the image display driver, APP, SF and GPU at the fifth moment (t6) about 8.3ms after t5, and the image display driver can respond to the Vsync signal 6 to write the display data of image 3 to the display screen, thereby driving the display screen to display image 3.

[0218] In an embodiment of the present application, the method provided in the embodiment of the present application receives display data of the next frame of the third image within the third display time of the display screen displaying the third image through the image display driver, thereby determining that the display screen's display of the third image has become stable, and then reducing the frequency of the Vsync signal output by the display screen. In this way, it can avoid the waste of power consumption caused by the display screen still outputting the Vsync signal at a higher frequency for a long time after the display screen has stabilized the display of the third image, thereby achieving the purpose of saving device power consumption.

[0219] It should be noted that the aforementioned Vsync signal at the original frequency is the Vsync signal that the display screen triggers at the original frequency before the image display driver increases the frequency of the output Vsync signal. For example, assume that the display screen initially triggers at a 120Hz frequency and feeds the Vsync signal back to the image display driver. Later, while the display screen is displaying a second image, because the display screen times out, the image display driver increases the frequency of the output Vsync signal to 360Hz. In response to a third Vsync signal triggered by the display screen at a 360Hz frequency at a third moment, the image driver sends an image to the display screen, driving the display screen to display the third image. At this point, the third Vsync signal triggered by the display screen at a 360Hz frequency is the Vsync signal with the increased frequency. Subsequently, upon determining that the display screen is displaying the third image stably, the image display driver sends a control instruction to the display screen to reduce the frequency of the output Vsync signal, i.e., from 360Hz to 120Hz. The fifth Vsync signal triggered by the display screen at a fifth moment, again at a 120Hz frequency, is the Vsync signal at the original frequency.

[0220] In other feasible embodiments, the image display driver of the electronic device may further reduce the frequency of the output Vsync signal after determining that the display screen has stabilized the display of the third image. Alternatively, the image display driver may further reduce the frequency of the output Vsync signal after determining that the display screen has stabilized the display of the third image and multiple frames of images thereafter. This can alleviate the continuous freeze that may occur during image display of the electronic device.

[0221] It should be noted that in the embodiments of the present application, the high temperature of the electronic device caused by long-term operation or insufficient system resources may cause the upper layer of the system and / or the image display driver to be unable to respond to the vertical synchronization signal in time to perform image processing, thereby causing the display screen to continuously freeze during the image display process.

[0222] In an embodiment of the present application, if the electronic device reduces the frequency of the Vsync signal output by the display screen during the display of the N-1th frame image after the third image through the image display driver, the fifth moment when the electronic device generates the fifth Vsync signal through the display screen and the third moment when the display screen outputs the third Vsync signal will be only N 8.3 ms apart. In this case, N is a positive integer greater than 1.

[0223] In an embodiment of the present application, after the display screen begins displaying the third image, the image display driver of the electronic device may detect, frame by frame, whether the image display driver has received display data for the Nth frame of image following the third image within the display duration of the N-1th frame of image following the third image. Thus, the image display driver reduces the frequency of the Vsync signal output by the display screen only when it is continuously detected that the image display driver has received display data for the Nth frame of image within the display duration of the N-1th frame of image following the third image.

[0224] It should be noted that, in the embodiment of the present application, N is a positive integer greater than 1. As with the above-mentioned reduction in the duration of the Vsync signal, the specific value of N can also be an empirical value pre-added to the image display driver, or N can also be a value temporarily determined by the electronic device based on its own real-time system resource usage, device energy reserve, and performance. It should be understood that based on the different design requirements of actual applications, N can of course be a different positive integer greater than 1. That is, the method provided in the embodiment of the present application is not limited to the specific value of N.

[0225] For example, as shown in FIG21 , when the electronic device detects, through the delay detection module, that the display screen has timed out displaying image 0 after time t1, the display screen increases the frequency of the Vsync signal output by the display screen (the moment indicated by the vertical long dashed line on the left side of the figure is the moment when the frequency of the output Vsync signal is increased). The display screen then outputs a third Vsync signal (Vsync signal a) with the increased frequency at a third time (t2). As a result, the image display driver responds to Vsync signal a at time t2 and writes the display data of the third image (image 1) to the display screen, causing the display screen to display image 1 after the display time of image 0 has timed out by approximately 2.8ms (the third Vsync period corresponding to the third Vsync is 1 / 360Hz). When the display screen displays image N-1 (the N-1th frame image after image 1), if the image display driver also receives the display data of image N sent by the GPU within 8.3ms of the display screen displaying image N-1, it determines that the display screen's current display of multiple consecutive frames of images has stabilized, and thus reduces the frequency of the output Vsync signal (the moment indicated by the vertical long dashed line on the right side of the figure is the moment when the output Vsync signal is reduced). In this way, the display screen can feedback the fifth Vsync signal to the image display driver, APP, SF and GPU at the fifth moment (tN+3) after the third moment, and the image display driver responds to the fifth Vsync signal to write the display data of image N to the display screen, thereby driving the display screen to display image N.

[0226] In an embodiment of the present application, after the display screen displays the third image, the image display driver of the electronic device continues to respond to the Vsync signal with a higher frequency triggered by the display screen, and writes the display data of the next frame of the third image to the display screen to drive the display screen to display the next frame of the image, until the display screen is driven to display the N-1 frame image after the third image. The image display driver detects whether it has received the display data of the N-1 frame image after the third image of the electronic device within the display duration of the N-1 frame image displayed by the display screen (the N-1 frame image is located after the N-1 frame image). In addition, after the image display driver detects that the display screen has received the display data of the N-1 frame image within the display duration of the N-1 frame image displayed by the display screen, the image display driver determines that the current display of the N-1 frame image after the third image has stabilized, thereby reducing the frequency of the Vsync signal output by the display screen.

[0227] In the embodiment of the present application, the electronic device reduces the frequency of the output Vsync signal after determining that the display screen has stabilized the display screen displaying the N-1th frame image after the third image. This can avoid the waste of power caused by the display screen outputting the Vsync signal at a higher frequency after the display screen has stabilized the image. Furthermore, reducing the frequency of the output Vsync signal after the display screen has stabilized the display screen displaying the N-1th frame image after the third image can also avoid the phenomenon of the image display driver frequently increasing and decreasing the frequency of the output Vsync signal, further saving the power consumption required by the device to frequently adjust the frequency of the output Vsync signal.

[0228] In other feasible embodiments, the image display driver of the electronic device can also detect, after the display screen displays the third image, whether the display data of the next frame image of the image displayed on the display screen has been received within the display time of the single frame image of the image displayed on the display screen. And continuously detect whether the image display driver has received the display data of the Nth frame image within the display time of the N-1th frame image displayed on the display screen during the process of the display screen displaying the third image to the N-1th frame image after the third image, so that the image display driver will reduce the frequency of the output Vsync signal only when it is detected that yes (the display data of the Nth frame image is received within the display time of the N-1th frame image displayed on the display screen). In this way, the phenomenon of the image display driver frequently increasing and decreasing the frequency of the output Vsync signal can be avoided more accurately, thereby saving the waste of device power consumption caused by frequently increasing and decreasing the frequency of the output Vsync signal.

[0229] In some embodiments, embodiments of the present application provide an electronic device that implements the image display methods described in the above embodiments. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0230] In some embodiments, an embodiment of the present application provides an electronic device, comprising: a processor and a memory; the memory is used to store computer program code, the computer program code includes computer execution instructions, and when the electronic device is running, the processor executes the computer execution instructions to enable the electronic device to perform the image display method described in the above embodiments.

[0231] In some embodiments, an embodiment of the present application provides an electronic device, comprising: a processor; the processor is used to couple with a memory, and after reading instructions in the memory, execute the image display method described in the above embodiments according to the instructions.

[0232] In some embodiments, an embodiment of the present application provides a computer-readable storage medium, including computer instructions. When the computer instructions are executed on an electronic device, the electronic device executes the wallpaper display method as described above.

[0233] In some embodiments, embodiments of the present application provide a computer program product. When the computer program product is run on an electronic device, the electronic device executes the image display method described in the above embodiments.

[0234] In some embodiments, the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the image display methods described in the above embodiments.

[0235] In some embodiments, embodiments of the present application provide a device (e.g., a display system) that includes a processor configured to support an electronic device in implementing the image display methods described in the various embodiments above. In one possible design, the device also includes a memory configured to store program instructions and data necessary for the electronic device.

[0236] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0237] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place, or they may be distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0238] In addition, the functional units in the various embodiments of the present application can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or in other words, the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0239] The above content is only a specific embodiment of this application, but the scope of protection of this application is not limited to this. Any changes or replacements within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An image display method, characterized in that, Applied to an electronic device, the electronic device includes a display screen, and the method includes: At a first moment, the electronic device generates a first Vsync signal. In response to the first Vsync signal, the display screen displays a first image. Wherein, the first Vsync signal corresponds to a first Vsync period, the first Vsync period corresponds to a first display duration, and the first display duration is the display duration of the first image; At a second moment, the electronic device generates a second Vsync signal. In response to the second Vsync signal, the display screen displays a second image. Wherein, the second Vsync signal corresponds to a second Vsync period, the second Vsync period is equal to the first Vsync period, and the second moment is after the first moment; At a third moment, in response to the second display duration being greater than the first display duration, the electronic device generates a third Vsync signal. Wherein, the third Vsync signal corresponds to a third Vsync period, the second display duration is the display duration of the second image, the third moment is after the second moment, and the third Vsync period is less than the first Vsync period.

2. The method according to claim 1, wherein The second image is the next frame image of the first image.

3. The method according to claim 2, wherein The second display duration is less than twice the first display duration.

4. The method according to claim 1 or 2, characterized in that, The method further includes: In response to the third Vsync signal, the display screen displays a third image, and the third image is the next frame image of the second image.

5. The method according to claim 4, characterized in that, The method further includes: The third display duration is less than the first display duration, where the third display duration is the display duration of the third image.

6. The method according to claim 4, wherein The method further includes: The third display duration is the same as the first display duration, where the third display duration is the display duration of the third image.

7. The method according to claim 4, wherein The method further includes: At a fourth moment, the electronic device generates a fourth Vsync signal, where the fourth moment is after the second moment and before the third moment.

8. The method according to claim 7, wherein The method further includes: In response to the fourth Vsync signal, the display screen continues to display the second image.

9. The method according to any one of claims 1 to 8, characterized in that, The first Vsync period is 8.3 ms, and the third Vsync period is 2.8 ms.

10. The method according to any one of claims 1 to 8, characterized in that, The first display duration is 8.3 ms, and the second display duration is 11.1 ms.

11. The method according to any one of claims 1 to 11, characterized in that, The method further includes: At a fifth moment, the electronic device generates a fifth Vsync signal. Wherein, the fifth Vsync signal corresponds to a fifth Vsync period, the fifth moment is after the third moment, and the fifth Vsync period is equal to the first Vsync period.

12. The method according to claim 11, wherein The display duration of the fourth image is greater than a preset interval duration; the fourth image is the image displayed in the previous frame at the fifth moment, and the preset interval duration is the interval duration between the fifth moment and the sixth moment minus the consumption duration required to reduce the frequency of the output Vsync signal, and the sixth moment is the moment when the fourth image is written to the display screen.

13. The method according to claim 11, characterized in that, The fifth moment is N 8.3 ms away from the third moment, where N is a positive integer greater than or equal to 1.

14. The method according to any one of claims 1 to 13, characterized in that, The electronic device further includes an image display driver; the method further includes: In response to the display screen displaying a second image, the image display driver calculates the second display duration; In response to the second display duration being greater than the first display duration, the image display driver sends a control instruction to the display screen, and the display screen generates the third Vsync signal.

15. An electronic device, characterized in that, The electronic device includes: a processor and a memory, the processor is coupled to the memory; the memory is used to store computer program code; the computer program code includes computer instructions, and when the processor executes the above computer instructions, the terminal device executes the method described in any one of claims 1-14.

16. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes computer instructions, and when the computer instructions run on an electronic device, the electronic device executes the method described in any one of claims 1-14.

Images