Double-end collaborative network-on-chip flow control method and device and electronic equipment
By setting counters at the source and destination ends and using fast signals to synchronize traffic counting information, combined with mechanisms such as token buckets, the problems of flow control delay and insufficient detection accuracy in existing technologies are solved, and fast and accurate traffic management and performance optimization are achieved in on-chip networks.
Patent Information
- Application Number
- CN202510667492.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-22
- Publication Date
- 2025-09-19
AI Technical Summary
Existing flow control methods in on-chip networks suffer from large delays and low detection accuracy, making it difficult to accurately and promptly detect and respond to network congestion problems on internal links.
A dual-end collaborative on-chip network flow control method is adopted. By setting counters at the source and destination ends, using fast signals to synchronously transmit flow counting information, and combining mechanisms such as token bucket, sliding window, leaky bucket and timer, the flow injection rate is controlled to achieve accurate estimation and timely adjustment of link status.
It achieves faster and more accurate traffic management, avoids traffic accumulation and waste of bandwidth resources, can monitor endpoints and network congestion in a timely and accurate manner, and improves system stability and performance.
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Figure CN120675960A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of traffic management technology, and in particular to a dual-end collaborative on-chip network traffic control method, device and electronic equipment. Background Art
[0002] With the increasing complexity of integrated circuit design, Network-on-Chip (NoC) has become the mainstream communication architecture in multi-core system-on-chips (SoCs). In NoCs, data packets are transmitted hop by hop between network nodes. To ensure that traffic injection does not overuse cache space, thereby affecting system performance or even causing packet loss, flow control mechanisms are often required.
[0003] Currently, a commonly used flow control method is hop-by-hop flow control. This mechanism maintains a balance between sending and receiving between upstream and downstream nodes by applying control to each hop, thereby preventing downstream buffer overflows and packet loss. Common hop-by-hop flow control implementations include Pause / Resume, Credit-Based, and Request-Reply. For example, in the credit-based flow control mechanism, the upstream node maintains a certain number of credits, which represent the current available buffer capacity of the downstream node. The upstream node is allowed to send packets only when the number of credits is greater than zero, and the transmission consumes a corresponding number of credits. When the downstream node removes a packet from its buffer, it sends a credit update to the upstream node, indicating the amount of data it can continue to send.
[0004] While hop-by-hop flow control can effectively prevent local buffer overflows, it suffers from several inherent drawbacks. First, overload information must be fed back to the source node via a hop-by-hop backpressure mechanism. During this process, the local node only sends a congestion signal to the upstream node after detecting that the buffer occupancy has exceeded a preset threshold. This results in long feedback paths and significant latency. This is particularly true in high-bandwidth, shallow-buffered NoC scenarios, where source nodes struggle to respond to congestion information promptly and cannot quickly adjust their sending rates, exacerbating congestion.
[0005] Secondly, the hop-by-hop flow control mechanism relies on changes in buffer occupancy to trigger back pressure, which can easily lead to head-of-line blocking (HoL blocking), negatively impacting traffic on non-congested paths. Furthermore, in certain network topologies, hop-by-hop back pressure can also cause deadlock, severely impacting system stability and reliability. Furthermore, because congestion information propagates hop by hop along the link, it can easily cause congestion to spread, impacting the normal transmission of non-related traffic. As network scale continues to expand, relying solely on hop-by-hop flow control is no longer sufficient to maintain optimal overall traffic flow.
[0006] To alleviate these issues, a straightforward improvement is to introduce end-to-end flow control. This method directly feeds network status information from the destination to the source, enabling the source to more quickly detect and respond to congestion, improving control efficiency. However, due to implementation limitations, end-to-end flow control often only detects network status on the end-side, making it difficult to obtain actual congestion information on internal links. Consequently, detection accuracy is limited.
[0007] For example, a control mechanism based on destination buffer allocation monitors the destination buffer usage to estimate the overall network load and adjust the data injection rate at the source. This approach is effective in addressing "endpoint congestion," meaning that when queues first accumulate at the destination, it can quickly trigger a speed reduction at the source. However, for "network congestion"—when queues accumulate at intermediate nodes without significant changes at the destination—this mechanism struggles to effectively detect and control congestion.
[0008] In summary, although the hop-by-hop flow control mechanism in existing technologies can prevent local buffer overflows to a certain extent, it has obvious shortcomings in terms of feedback delay, congestion spread, head-of-line blocking and deadlock risk; and although end-to-end control has better response speed, it is limited by detection accuracy and cannot fully reflect the true status of the network.
[0009] Therefore, how to solve the problems of large delays and low detection accuracy of existing flow control methods, which make it difficult to accurately and timely detect and respond to network congestion on internal links, is an important issue that needs to be urgently addressed in the field of flow management. Summary of the Invention
[0010] The present invention provides a dual-end collaborative on-chip network traffic control method, device and electronic device to overcome the defects of existing traffic control methods such as large delay, low detection accuracy, and difficulty in accurately and timely detecting and responding to network congestion of internal links, thereby achieving faster and more accurate traffic management.
[0011] On the one hand, the present invention provides a dual-end collaborative on-chip network traffic control method, which is applied to the source end, including: using a fast signal to receive first traffic counting information transmitted synchronously by the destination end, and determining second traffic counting information of the source end, the source end and the destination end are respectively the starting node and the ending node of the complete link in the on-chip network; based on the first traffic counting information and the second traffic counting information, estimating the link status of the on-chip network; and based on the link status, controlling the traffic injection rate of the source end.
[0012] Furthermore, the destination end is provided with a first counter, and the first counter is used to collect the first flow counting information; the source end is provided with a second counter, and the second counter is used to collect the second flow counting information.
[0013] Furthermore, the receiving of the first flow counting information synchronously transmitted by the destination end by using a fast signal includes: receiving the first flow counting information synchronously transmitted by the destination end based on a dedicated signal line between the source end and the destination end.
[0014] Furthermore, the method of using a fast signal to receive the first traffic counting information transmitted synchronously by the destination end includes: setting the transmission queue of the first traffic counting information to the highest priority; and receiving the first traffic counting information transmitted synchronously by the destination end according to the highest priority.
[0015] Furthermore, the method of receiving the first traffic counting information synchronously transmitted by the destination end by using a fast signal includes: creating a control signaling channel, which is a virtual channel; and receiving the first traffic counting information of the destination end through the control signaling channel.
[0016] Furthermore, the use of a fast signal to receive the first traffic counting information transmitted synchronously by the destination end includes: receiving the first traffic counting information transmitted synchronously by the destination end according to a preset period; or, when the first traffic counting information meets a preset trigger condition, receiving the first traffic counting information transmitted synchronously by the destination end; wherein the preset trigger condition includes: the cumulative traffic count in the first traffic counting information is greater than a preset counting threshold.
[0017] Furthermore, controlling the flow injection rate of the source end according to the link state includes controlling the flow injection rate of the source end through at least one of a token bucket, a sliding window, a leaky bucket, and a timer.
[0018] In the second aspect, the present invention also provides a dual-end collaborative on-chip network traffic control device, which is applied to the source end and includes: a traffic counting information acquisition module, which is used to use a fast signal to receive the first traffic counting information transmitted synchronously by the destination end, and determine the second traffic counting information of the source end, wherein the source end and the destination end are respectively the starting node and the ending node of the complete link in the on-chip network; an on-chip network link state estimation module, which is used to estimate the link state of the on-chip network based on the first traffic counting information and the second traffic counting information; and a traffic injection rate control module, which is used to control the traffic injection rate of the source end according to the link state.
[0019] In a third aspect, the present invention also provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the on-chip network traffic control method with dual-end collaboration as described in any one of the above is implemented.
[0020] In a fourth aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the above-described dual-end collaborative on-chip network traffic control methods.
[0021] The present invention provides a dual-end collaborative on-chip network flow control method. By using a fast signal to receive first flow counting information synchronously transmitted by a destination end, and determining second flow counting information from a source end, the method estimates the link state of the on-chip network based on the first and second flow counting information, and the source end and the destination end are respectively the starting node and the ending node of a complete link in the on-chip network. The method then controls the flow injection rate of the source end based on the link state. This method synchronizes the counting information of the source end and the destination end by utilizing the cheap and fast characteristics of the control signal in the on-chip network to accurately estimate the link state of the on-chip network. This process ensures that there is no obvious traffic accumulation on the path and does not waste bandwidth resources due to excessive speed limiting, thus supporting faster and more accurate flow management. At the same time, both endpoint congestion and network congestion can be accurately and timely monitored, eliminating the problem of flow control failure due to inaccurate local information, thereby achieving more timely and accurate flow regulation. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0023] Figure 1 This is a schematic diagram of hop-by-hop flow control provided by the existing technology.
[0024] Figure 2 This is a schematic diagram of end-to-end flow control provided by the existing technology.
[0025] Figure 3 It is a flow chart of a dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention.
[0026] Figure 4 It is a schematic diagram of the overall architecture of the dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention.
[0027] Figure 5 This is a schematic diagram of the experimental design of the dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention.
[0028] Figure 6 This is a schematic diagram comparing the dual-end collaborative on-chip network flow control method provided by an embodiment of the present invention and the hop-by-hop flow control in terms of network queue length and flow delay.
[0029] Figure 7 This is a schematic diagram of the performance improvement of the dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention.
[0030] Figure 8 It is a structural diagram of a dual-end collaborative on-chip network traffic control device provided by an embodiment of the present invention.
[0031] Figure 9 It is a schematic diagram of the physical structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0032] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0033] Figure 1 FIG. 1 shows a schematic diagram of hop-by-hop flow control provided by the prior art. Figure 1 As shown in Figure 2, hop-by-hop flow control can ensure that the buffer of each hop does not overflow, but the overload information needs to be fed back to the source node through hop-by-hop back pressure.
[0034] On the one hand, the hop-by-hop backpressure process will introduce a large delay, and it is difficult for the source node to quickly receive overload information, so as to respond in time and alleviate congestion. In the scenario of ultra-high bandwidth and extremely shallow cache of the on-chip network, this mechanism is difficult to effectively limit congested traffic. On the other hand, the hop-by-hop flow control mechanism relies on the buffering on the path nodes to exceed the preset threshold to achieve backpressure. The head-of-line blocking on the intermediate nodes may have a negative impact on the transmission of irrelevant traffic, and under certain conditions, there may even be a risk of deadlock. In addition, the use of hop-by-hop backpressure to implement flow control will cause congestion to spread, affecting the normal transmission of congestion-irrelevant flows. As the scale of the network continues to expand, relying solely on hop-by-hop flow control will not be able to control the flow at an appropriate level. Figure 2 The schematic diagram of the end-to-end flow control provided by the prior art is shown. By introducing fast and direct signal feedback, the detection and control of network congestion can be achieved more timely, but it faces the problem of detection accuracy.
[0035] Due to implementation cost considerations, network status detection can often only be performed on the end side, making it difficult to obtain information about internal links, making accurate detection and control impossible. Taking control based on destination buffer allocation as an example, it uses the destination buffer occupancy to estimate the overall network status and thus adjust the flow injection. This approach can effectively deal with endpoint congestion. When such congestion occurs, the queue first accumulates at the destination. End-to-end direct feedback can quickly trigger speed reduction adjustments at the source end. See Figure 2 In contrast, in another type of congestion: when network congestion occurs, queue accumulation occurs at internal nodes, while the destination queue does not change significantly, making it difficult to detect and adjust in a timely manner. Figure 2 (b) in the.
[0036] In view of this, the present invention proposes a dual-end collaborative on-chip network flow control method, which is applied to the source end. Specifically, Figure 3 A flow chart of a dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention is shown.
[0037] like Figure 3 As shown, the method includes: S310, using a fast signal to receive the first traffic counting information transmitted synchronously by the destination end, and determining the second traffic counting information of the source end; S320, estimating the link status of the on-chip network based on the first traffic counting information and the second traffic counting information; S330, controlling the traffic injection rate of the source end according to the link status.
[0038] The following will describe steps S310-S330 and related steps in detail.
[0039] S310, using a fast signal to receive first flow counting information synchronously transmitted by a destination end, and determining second flow counting information of a source end, wherein the source end and the destination end are respectively a start node and an end node of a complete link in the on-chip network.
[0040] A network on a chip (NoC) is a technical architecture used to enable communication between multiple processing units within a single chip. A NoC consists of nodes, links, and routers. Each node can be a processor core, memory controller, I / O interface, or other functional module, serving as the starting, intermediate, or final point for data transmission. Links are the physical communication paths connecting nodes. Routers, located between each node, are responsible for forwarding data packets to the next destination node.
[0041] In this embodiment, the source and destination are the starting and ending nodes, respectively, of a complete link in the NoC. Given the abundant interconnect resources and short distances between nodes in a NoC environment, direct transmission of network and load information between the source and destination is possible. Therefore, this embodiment sets corresponding counters at both the source and destination to count the amount of incoming and outgoing NoC traffic. This counter information is then synchronized with the source via fast signals.
[0042] Specifically, the destination end is provided with a first counter, which is used to count the amount of traffic flowing out of the on-chip network to collect first traffic counting information, and the first traffic counting information includes a cumulative count of traffic flowing out of the destination end. Similarly, the source end is provided with a second counter, which is used to count the amount of traffic injected into the on-chip network to collect second traffic counting information, and the second traffic counting information includes a cumulative count of traffic injected into the source end.
[0043] After the destination's first counter collects the first traffic count information, it synchronizes the first traffic count information to the source via a fast signal based on a pre-set synchronization trigger condition. The source then receives the first traffic count information synchronously transmitted by the destination. Simultaneously, the second traffic count information collected by the source's second counter can also be determined.
[0044] The fast signal may be implemented through a dedicated signal line, or through priority setting or virtual channel setting, which is not specifically limited here.
[0045] The synchronization trigger condition may be that the time reaches a preset time period, or that the accumulated traffic count reaches a preset count threshold, which is not specifically limited here.
[0046] It should be noted that the "dual-end collaboration" in the dual-end collaborative on-chip network traffic control method provided in this embodiment refers to the source end and the destination end synchronizing the first traffic counting information and the second traffic counting information.
[0047] Based on the step S310 of receiving the first flow counting information synchronously transmitted by the destination end and determining the second flow counting information of the source end, step S320 is further executed.
[0048] S320: Estimate the link status of the on-chip network according to the first traffic counting information and the second traffic counting information.
[0049] It is easy to understand that the source end includes a controller, which can comprehensively analyze the amount of traffic staying on the entire link and the rate at which traffic flows out of the link based on the first traffic counting information of the destination end and the second traffic counting information of the source end, thereby obtaining the link status of the on-chip network.
[0050] The link status of the on-chip network includes but is not limited to the current available bandwidth of the link, the current total queue length, the packet loss rate, and the target traffic injection rate.
[0051] The current available bandwidth of a link refers to the maximum rate at which the link can transmit data at a given point in time, excluding any already used bandwidth. The current total queue length refers to the number of packets waiting to be processed in the buffer of a network device (such as a router). The packet loss rate refers to the proportion of packets that fail to reach their destination due to various reasons during network transmission, compared to the total number of packets sent.
[0052] The target traffic injection rate refers to the rate at which the source sends data packets into the network during network communications. This can balance network utilization and congestion avoidance, reduce packet loss, lower latency, improve overall service quality, and ultimately optimize network performance.
[0053] It should be noted that compared with the single-end-dominated link status observation in the prior art, this embodiment comprehensively analyzes the traffic counting information of both ends (source and destination), which can achieve accurate control of the on-chip network link status.
[0054] On the basis of estimating the link status of the on-chip network according to the first traffic counting information and the second traffic counting information in step S320, step S330 is further performed.
[0055] S330: Control the traffic injection rate of the source end according to the link status.
[0056] It's easy to understand that the source also includes a speed regulator, which is connected to the source's controller. After the controller estimates the link status of the on-chip network, the speed regulator controls the source's traffic injection rate based on the link status of the on-chip network, so that the source's traffic injection rate reaches the target traffic injection rate. The source's traffic injection rate is also the traffic injection rate of the on-chip network.
[0057] Specifically, at the source, traffic is grouped and queued according to its destination. Each queue maintains independent rectification rules, and packets are allowed to be injected into the NoC only if they meet the rectification rules. The parameters involved in the rectification rules are adjusted by the controller.
[0058] The rectification rule may be a token bucket, a sliding window, a leaky bucket or a timer, which are not specifically limited here.
[0059] It should be noted that the dual-end collaborative on-chip network traffic control method provided in this embodiment uses the source end as the control end. In other words, the execution subject of the dual-end collaborative on-chip network traffic control method provided in this embodiment is the source end.
[0060] The source end in this embodiment includes a counter, a controller, and a speed regulator, wherein the counter is used to collect second flow counting information of the source end, the controller is used to estimate the link status of the on-chip network, and the speed regulator is used to control the flow injection rate of the source end.
[0061] In this embodiment, by using a fast signal to receive the first flow counting information synchronously transmitted by the destination end and determining the second flow counting information of the source end, the source end and the destination end are respectively the starting node and the ending node of the complete link in the on-chip network. Then, based on the first flow counting information and the second flow counting information, the link state of the on-chip network is estimated, thereby controlling the flow injection rate of the source end according to the link state. This method synchronizes the counting information of the source end and the destination end by utilizing the cheap and fast characteristics of the control signal in the on-chip network to accurately estimate the link state of the on-chip network. This process ensures that there is no obvious traffic accumulation on the path and does not waste bandwidth resources due to excessive speed limiting, supporting faster and more accurate traffic management. At the same time, both endpoint congestion and network congestion can be accurately and timely monitored, and the problem of flow control failure due to inaccurate local information will not occur, thus achieving more timely and accurate flow regulation.
[0062] On the basis of the above embodiment, the specific method of using a fast signal to receive the first traffic counting information synchronously transmitted by the destination end will be described in detail below.
[0063] It's easy to understand that in a NoC environment with ample interconnect resources and relatively close proximity between nodes, fast signaling is possible to transmit network and load status information. Fast signaling can be achieved in a variety of ways, such as introducing dedicated signal lines, setting priorities, and creating virtual channels.
[0064] In a specific embodiment, based on a dedicated signal line between the source end and the destination end, first flow counting information synchronously transmitted by the destination end is received.
[0065] As is readily understood, in a network-on-chip (NoC) environment, it is possible to introduce a dedicated signal line between the source port and the destination port to transmit the destination's first traffic count information. Compared to traditional hop-by-hop backpressure or multiplexing of data links for signal transmission, the use of dedicated signal lines in this embodiment significantly reduces the delay of hop-by-hop forwarding at intermediate nodes, thereby achieving fast and reliable signal synchronization at a relatively low cost. This fast and reliable signal synchronization makes dual-end collaborative control possible.
[0066] In another specific embodiment, the transmission queue of the first traffic counting information is set to the highest priority; and the first traffic counting information synchronously transmitted by the destination end is received according to the highest priority.
[0067] It's easy to understand that in a NoC, the transmission of different information has different latency sensitivities, reliability requirements, and impacts on network behavior. Therefore, when designing the NoC communication architecture, this embodiment prioritizes the transmission of information between the destination and source over the transmission of other traffic on the link, helping to improve overall network performance, stability, and responsiveness.
[0068] At the same time, after the source end receives the first traffic counting information from the destination end, the injection rate control of the link traffic is also highly delay-sensitive. Therefore, this embodiment can also set the control signaling of the source end controller to control the source end traffic injection rate as the highest priority.
[0069] Of course, other traffic transmissions in the on-chip network may also be assigned different priorities according to their importance and needs, which is not specifically limited here.
[0070] In another specific embodiment, a control signaling channel is created, where the control signaling channel is a virtual channel; and the first flow counting information of the destination end is received through the control signaling channel.
[0071] It is easy to understand that this embodiment establishes a dedicated virtual channel for data transmission between the source and destination, which is not shared with other data flows. This can significantly improve communication efficiency between the source and destination, reduce communication latency between the source and destination, and enhance network reliability. Furthermore, to ensure rapid response, a dedicated virtual channel can also be established for control signaling used by the source controller to control the source traffic injection rate, although this is not specifically limited here.
[0072] In addition, the timing for starting to receive the first traffic count information transmitted by the destination end can be determined according to a synchronization trigger condition. The synchronization trigger condition can be an event-driven condition or a period-driven condition.
[0073] Specifically, in one case, the first traffic counting information synchronously transmitted by the destination end may be received according to a preset period. In another case, the first traffic counting information synchronously transmitted by the destination end may be received when the traffic cumulative count in the first traffic counting information is greater than a preset count threshold.
[0074] The preset period and the preset counting threshold can be set according to actual conditions and are not specifically limited here.
[0075] In this embodiment, by introducing a dedicated signal line, setting a priority, and creating a virtual channel, the first traffic counting information transmitted by the destination is received, and the second traffic counting information of the source is determined. Then, based on the first traffic counting information and the second traffic counting information, the link state of the on-chip network is estimated, thereby controlling the traffic injection rate of the source end according to the link state. This method synchronizes the counting information of the source and the destination ends by utilizing the cheap and fast characteristics of the control signal in the on-chip network to accurately estimate the link state of the on-chip network. This process ensures that there is no obvious traffic accumulation on the path and does not waste bandwidth resources due to excessive speed limiting, supporting faster and more accurate traffic management. At the same time, both endpoint congestion and network congestion can be accurately and timely monitored, and the problem of traffic control failure due to inaccurate local information will not occur, thus achieving more timely and accurate traffic regulation.
[0076] On the basis of the above embodiments, the control method of the source end flow injection rate will be further described in detail below.
[0077] According to the link state, the flow injection rate of the source end is controlled, including: controlling the flow injection rate of the source end through at least one of a token bucket, a sliding window, a leaky bucket and a timer.
[0078] It is easy to understand that when controlling the traffic injection rate at the source end, it can be achieved through any one of the token bucket, sliding window, leaky bucket and timer, or through a combination of two or more of the token bucket, sliding window, leaky bucket and timer, and no specific limitation is made here.
[0079] About token bucket.
[0080] At the source, traffic is grouped and queued according to its destination. Each queue maintains a separate token bucket. Packets are injected into the network only when tokens are available, consuming the corresponding tokens. Token bucket parameters are regulated by the source controller and include the maximum bucket capacity and the token generation rate. The token generation rate corresponds to the traffic injection rate.
[0081] Specifically, the source controller adds one or more tokens to a token bucket at regular intervals. Each token represents the amount of data allowed to be transmitted (typically 1 byte). When a data packet arrives, if there are sufficient tokens in the token bucket, the corresponding number of tokens is removed and the packet is sent; otherwise, the packet is discarded or delayed. The token bucket has a maximum capacity limit; even if there is no data transmission for an extended period, the number of tokens in the token bucket will not exceed this limit.
[0082] About sliding windows.
[0083] The source (sender) maintains a sliding window. The window length represents the maximum amount of data that can be sent without waiting for acknowledgment. When the receiver successfully receives data, it sends an acknowledgment to the sender. Based on the acknowledgment received, the sender can move its window boundaries to allow for more data to be sent. The size of the sliding window can be dynamically adjusted by the controller based on network conditions.
[0084] About the leaky bucket.
[0085] Data injected at the source enters a virtual "bucket" and then flows out at a fixed rate. If the data inflow exceeds the outflow rate, the excess data is discarded or processed with a delay. This approach helps prevent system overload and protects downstream components from sudden traffic bursts.
[0086] About the timer.
[0087] The source is set with a timer that checks at the end of each time period whether the preset upper limit of data packets sent has been reached. If the upper limit has been reached, sending is suspended until the next period begins; otherwise, data packets continue to be sent.
[0088] In this embodiment, by using a fast signal to receive the first flow counting information synchronously transmitted by the destination end and determining the second flow counting information of the source end, the source end and the destination end are respectively the starting node and the ending node of the complete link in the on-chip network. Then, based on the first flow counting information and the second flow counting information, the link state of the on-chip network is estimated, thereby controlling the flow injection rate of the source end according to the link state. This method synchronizes the counting information of the source end and the destination end by utilizing the cheap and fast characteristics of the control signal in the on-chip network to accurately estimate the link state of the on-chip network. This process ensures that there is no obvious traffic accumulation on the path and does not waste bandwidth resources due to excessive speed limiting, supporting faster and more accurate traffic management. At the same time, both endpoint congestion and network congestion can be accurately and timely monitored, and the problem of flow control failure due to inaccurate local information will not occur, thus achieving more timely and accurate flow regulation.
[0089] In some embodiments, Figure 4 The figure shows the overall architecture of the dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention.
[0090] like Figure 4 As shown, the upper left corner is the source end, which includes a counter, a controller and a speed regulator. The cumulative count of the injected flow by the counter is 24 at this time; the lower right corner is the destination end, which includes a counter. The cumulative count of the outflow flow by the counter is 15 at this time. Figure 4 The monitor includes a counter at the source end and a counter at the destination end, as well as a signal synchronization link between the source end and the destination end.
[0091] When the on-chip network performs flow control, if the cumulative count of the outflow flow at the destination end reaches a preset count threshold, or if the current time is a preset period, the cumulative count of the outflow flow at the destination end is synchronized to the source end based on the signal synchronization link.
[0092] The source controller uses the synchronized cumulative counts of outbound traffic and its own cumulative counts of injected traffic to determine how much traffic remains on the entire link and the rate at which traffic leaves the link. Based on this information, the overall link status (bandwidth at the bottleneck and the total queue length of traffic along the path) can be accurately estimated.
[0093] Furthermore, the source-side speed regulator adjusts the source-side traffic injection rate to achieve the target rate. This target rate not only balances network utilization and congestion avoidance, minimizing packet loss, but also reduces latency, improving overall service quality, and ultimately optimizing network performance.
[0094] In some other embodiments, implementation and simulation were performed using an industry-recognized simulation tool (BookSim2). The results showed that the dual-end collaborative on-chip network flow control method provided by the embodiments of the present invention can quickly perform state feedback and control response compared to the hop-by-hop backpressure flow control mechanism, effectively avoid performance degradation caused by slow hop-by-hop flow control response, and prevent the spread of congestion caused by node cache filling within the network.
[0095] Specifically, Figure 5 FIG. 1 shows a schematic diagram of an experimental design of a dual-end collaborative on-chip network flow control method provided by an embodiment of the present invention. Figure 5 As shown in the figure, in a 64-node (8 rows x 8 columns) 2DMesh network, three flows are set up: victim flow f0, congested flow f1, and burst flow f2. During clock cycles 500-1000, burst flow f2 and f1 collide on the same link (19->27), causing congestion. Because victim flow f0 intersects with f1's upstream link, backpressure and head-of-line blocking affect performance.
[0096] Accordingly, Figure 6 A schematic diagram showing a comparison between the dual-end collaborative on-chip network flow control method provided by an embodiment of the present invention and hop-by-hop flow control in terms of network queue length and flow delay.
[0097] like Figure 6 As shown, simulation results demonstrate that the dual-end cooperative control mechanism (i.e., the dual-end cooperative on-chip network traffic control method provided by the embodiments of the present invention) can promptly detect congestion and effectively respond. Network queues are effectively controlled, limiting network queue growth during congestion to a very low level. Furthermore, the latency of congested traffic is effectively controlled, with the vast majority of packets experiencing no latency impact and only a very small number experiencing latency increases. Furthermore, thanks to timely and accurate congestion detection and control, backpressure and head-of-line blocking are effectively avoided, effectively protecting the performance of the victim traffic f0.
[0098] In addition, this embodiment also analyzes the performance improvement brought by the dual-end cooperative control mechanism in real scenarios by combining the network load of the PARSEC benchmark test. Figure 7 A schematic diagram showing the performance improvement of the dual-end collaborative on-chip network traffic control method provided by an embodiment of the present invention is shown.
[0099] Figure 7The horizontal axis represents different application names, including blackscholes, bodytrack, canneal, dedup, ferret, fluidanimate, swaptions, vips, and x264. Figure 7 As shown in the figure, compared to hop-by-hop flow control, dual-end cooperative control reduces network latency by an average of 6.91%, while reducing the average and peak queue lengths by 35.98% and 84.41%, respectively. This shows that the dual-end cooperative control mechanism is significantly effective in avoiding on-chip congestion.
[0100] Corresponding to the dual-end collaborative on-chip network traffic control method described in the above embodiments, the present invention also proposes a dual-end collaborative on-chip network traffic control device, which is applied to the source end.
[0101] Specifically, Figure 8 A schematic structural diagram of a dual-end collaborative on-chip network traffic control device provided by an embodiment of the present invention is shown.
[0102] like Figure 8 As shown, the device includes: a traffic counting information acquisition module 810, which is used to use a fast signal to receive the first traffic counting information transmitted synchronously by the destination end, and determine the second traffic counting information of the source end, wherein the source end and the destination end are respectively the starting node and the ending node of the complete link in the on-chip network; an on-chip network link state estimation module 820, which is used to estimate the link state of the on-chip network based on the first traffic counting information and the second traffic counting information; and a traffic injection rate control module 830, which is used to control the traffic injection rate of the source end according to the link state.
[0103] In this embodiment, the traffic counting information acquisition module 810 uses fast signals to receive first traffic counting information synchronously transmitted by the destination end and determines second traffic counting information from the source end. The source end and the destination end are the starting node and ending node of a complete link in the on-chip network, respectively. The on-chip network link state estimation module 820 then estimates the link state of the on-chip network based on the first and second traffic counting information, and the traffic injection rate control module 830 controls the traffic injection rate at the source end based on the link state. This device synchronizes the counting information between the source and destination ends by leveraging the inexpensive and fast control signals in the on-chip network to accurately estimate the link state of the on-chip network. This process ensures that there is no significant traffic accumulation on the path and avoids wasting bandwidth resources due to excessive rate limiting, thus supporting faster and more accurate traffic management. Furthermore, both endpoint congestion and network congestion can be accurately and timely monitored, eliminating the problem of flow control failure caused by inaccurate local information, thereby achieving more timely and accurate traffic regulation.
[0104] It should be noted that the dual-end collaborative on-chip network traffic control device provided in the embodiment of the present invention and the dual-end collaborative on-chip network traffic control method described in the above embodiments can be referred to each other, and will not be repeated here.
[0105] Figure 9 An example of a physical structure diagram of an electronic device is shown below. Figure 9 As shown, the electronic device may include: a processor 910, a communications interface 920, a memory 930, and a communication bus 940, wherein the processor 910, the communications interface 920, and the memory 930 communicate with each other via the communication bus 940. The processor 910 may call logic instructions in the memory 930 to execute a dual-end collaborative on-chip network traffic control method, the method comprising: receiving first traffic counting information synchronously transmitted by a destination end using a fast signal, and determining second traffic counting information of a source end, wherein the source end and the destination end are respectively the starting node and the ending node of a complete link in the on-chip network; estimating the link status of the on-chip network based on the first traffic counting information and the second traffic counting information; and controlling the traffic injection rate of the source end based on the link status.
[0106] Furthermore, the logic instructions in the aforementioned memory 930 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product, stored in a storage medium, includes instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.
[0107] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the dual-end collaborative on-chip network traffic control method provided by the above-mentioned methods, the method comprising: using a fast signal to receive first traffic counting information synchronously transmitted by the destination end, and determining second traffic counting information of the source end, the source end and the destination end being the starting node and the ending node of the complete link in the on-chip network, respectively; estimating the link status of the on-chip network based on the first traffic counting information and the second traffic counting information; and controlling the traffic injection rate of the source end based on the link status.
[0108] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.
[0109] Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented using software plus a necessary general-purpose hardware platform, or of course, hardware. Based on this understanding, the essence of the above technical solution, or the portion that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, or an optical disk, and includes a number of instructions for causing a computer device (such as a personal computer, server, or network device) to execute the methods described in each embodiment or certain portions of the embodiments.
[0110] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A dual-end collaborative on-chip network flow control method, applied to the source end, characterized in that: include: Receiving first flow counting information synchronously transmitted by a destination end using a fast signal, and determining second flow counting information of a source end, wherein the source end and the destination end are respectively a starting node and an ending node of a complete link in the on-chip network; estimating a link state of the on-chip network according to the first traffic counting information and the second traffic counting information; The flow injection rate of the source end is controlled according to the link status.
2. The dual-end collaborative on-chip network traffic control method according to claim 1, characterized in that: The destination end is provided with a first counter, and the first counter is used to collect the first flow counting information; The source end is provided with a second counter, and the second counter is used to collect the second flow counting information.
3. The dual-end collaborative on-chip network traffic control method according to claim 1, characterized in that: The receiving, by using a fast signal, first traffic counting information synchronously transmitted by a destination end includes: Based on a dedicated signal line between the source end and the destination end, first flow counting information synchronously transmitted by the destination end is received.
4. The dual-end collaborative on-chip network traffic control method according to claim 1, characterized in that: The receiving, by using a fast signal, first traffic counting information synchronously transmitted by a destination end includes: Setting the transmission queue of the first traffic counting information to the highest priority; According to the highest priority, first flow counting information synchronously transmitted by the destination end is received.
5. The dual-end collaborative on-chip network traffic control method according to claim 1, characterized in that: The receiving, by using a fast signal, first traffic counting information synchronously transmitted by a destination end includes: Creating a control signaling channel, where the control signaling channel is a virtual channel; The first flow counting information of the destination end is received through the control signaling channel.
6. The dual-end collaborative on-chip network traffic control method according to any one of claims 1 to 5, characterized in that: The receiving, by using a fast signal, first traffic counting information synchronously transmitted by a destination end includes: receiving first traffic counting information synchronously transmitted by the destination end according to a preset period; or, When the first traffic counting information meets a preset trigger condition, receiving the first traffic counting information synchronously transmitted by the destination end; The preset trigger condition includes: the accumulated traffic count in the first traffic counting information is greater than a preset count threshold.
7. The dual-end collaborative on-chip network traffic control method according to any one of claims 1 to 5, characterized in that: The controlling the flow injection rate of the source end according to the link state includes: The flow injection rate of the source end is controlled by at least one of a token bucket, a sliding window, a leaky bucket and a timer.
8. A dual-end collaborative on-chip network flow control device, applied to the source end, characterized in that: include: a flow counting information acquisition module, configured to receive first flow counting information synchronously transmitted by a destination end using a fast signal, and determine second flow counting information of a source end, wherein the source end and the destination end are respectively the starting node and the ending node of a complete link in the on-chip network; an on-chip network link state estimation module, configured to estimate the link state of the on-chip network according to the first traffic counting information and the second traffic counting information; The traffic injection rate control module is used to control the traffic injection rate of the source end according to the link status.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the dual-end collaborative on-chip network traffic control method as described in any one of claims 1 to 7 is implemented.
10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the dual-end collaborative on-chip network traffic control method as described in any one of claims 1 to 7 is implemented.
Citation Information
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Method for coordinated control of a gigabit network based on link state feedback
CN122698476A
