Manufacturing method of double-sided conduction superconducting quantum chip and superconducting quantum computer
By forming a blind hole with a moderate aspect ratio on the substrate of the superconducting quantum chip and connecting it to the superconducting film, the problem of difficult through-hole deposition was solved, and the stable preparation of superconducting circuits and low-cost double-sided superconducting connectivity were achieved.
Patent Information
- Application Number
- CN202410303744.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-18
- Publication Date
- 2025-09-19
AI Technical Summary
In the existing technology, the high aspect ratio of the through-holes in superconducting quantum chips makes deposition difficult, affecting the preparation and structure of superconducting circuits.
A first blind hole is formed in the thickness direction of the substrate and a first superconducting film is deposited on its inner wall. Then, an opening is formed on the superconducting circuit and connected to a second blind hole. The aspect ratio of the second blind hole does not exceed 2:1, and the aperture is smaller than the first blind hole. Finally, a second superconducting film is formed on the inner wall of the blind hole to achieve double-sided superconducting connectivity.
It reduces the difficulty of through-hole deposition, reduces the cost of the coating process, does not affect the preparation and structure of the superconducting circuit, and is compatible with the traditional through-hole deposition process.
Smart Images
Figure CN120676851A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a method for manufacturing a double-sided conductive superconducting quantum chip and a superconducting quantum computer. Background Art
[0002] Currently, the number of quantum bits on superconducting quantum chips is increasing. In order to improve the utilization of chip area and reduce loss and crosstalk, through-silicon via technology is increasingly used on superconducting quantum chips to achieve double-sided superconducting connectivity.
[0003] An important process of through-silicon via technology is to deposit metal in the through-hole. For superconducting quantum chips, superconducting metals (including aluminum, titanium nitride, etc.) are required for interconnection. Considering compatibility with conventional semiconductor processes, the deposition of superconducting metals usually adopts traditional through-hole deposition processes. In order to avoid the influence of through-holes on the preparation and structure of superconducting circuits, the aperture of the through-holes is designed to be very small, and the thickness of the chip substrate is usually very large, resulting in the aspect ratio of the through-holes generally being above 10:1, or even above 20:1. Under such conditions, if the traditional through-hole deposition process is used, the deposition of superconducting metals is very difficult due to poor step coverage. Therefore, how to reduce the difficulty of through-hole deposition without affecting the preparation of superconducting circuits is an urgent problem to be solved. Summary of the Invention
[0004] The purpose of the present invention is to provide a double-sided conductive superconducting quantum chip and its manufacturing method to solve the problem in the prior art that the aspect ratio of the through hole is too high, resulting in very difficult deposition. It can reduce the aspect ratio of the through hole without affecting the preparation and structure of the superconducting circuit, thereby reducing the deposition difficulty of the through hole.
[0005] To solve the above technical problems, the present invention provides a method for manufacturing a double-sided conductive superconducting quantum chip, comprising:
[0006] providing a substrate of a predetermined thickness;
[0007] forming a first blind hole on a first surface in a thickness direction of the substrate;
[0008] forming a first superconducting film on an inner wall of the first blind hole;
[0009] forming a superconducting wire on a second surface opposite to the first surface;
[0010] forming an opening on the superconducting circuit to expose the substrate, and forming a second blind hole on the substrate through the opening to communicate with the first blind hole, wherein the aspect ratio of the first blind hole and the second blind hole does not exceed 2:1, and the aperture of the second blind hole is smaller than that of the first blind hole;
[0011] A second superconducting film connected to the first superconducting film is formed on the opening and the inner wall of the second blind hole.
[0012] Preferably, the aspect ratios of the first blind hole and the second blind hole are both 1:1.
[0013] Preferably, the providing of a substrate with a preset thickness comprises:
[0014] providing a substrate having a thickness greater than a predetermined thickness;
[0015] The substrate is double-sided polished until the thickness of the substrate reaches the preset thickness.
[0016] Preferably, the first blind hole, the second blind hole and the opening are all formed by a dry etching process.
[0017] Preferably, after forming the first superconducting film on the inner wall of the first blind hole, the method further includes:
[0018] An insulating protective layer is formed on the surface of the first superconducting film.
[0019] Preferably, the first superconducting film and the second superconducting film are both formed by a physical vapor deposition process, the insulating protective layer is formed by a chemical vapor deposition process, and the insulating protective layer is made of polysilicon or silicon oxide.
[0020] Preferably, before forming a superconducting circuit on a second surface opposite to the first surface, the method further comprises:
[0021] A second surface of the substrate opposite to the first surface is cleaned using piranha solution and BOE cleaning solution in sequence.
[0022] Preferably, before forming the second superconducting film connected to the first superconducting film on the opening and the inner wall of the second blind hole, the method further includes:
[0023] IBE etching is performed on the superconducting wire and the first superconducting film in the opening to remove a natural oxide layer on the superconducting wire and the first superconducting film.
[0024] Preferably, the first superconducting film and the second superconducting film are made of aluminum, niobium or titanium nitride, and the substrate is made of silicon or sapphire.
[0025] To solve the above technical problems, the present invention further provides a superconducting quantum computer, comprising a double-sided conducting superconducting quantum chip obtained according to any of the aforementioned methods for manufacturing a double-sided conducting superconducting quantum chip.
[0026] Unlike the prior art, the method for manufacturing a double-sided superconducting quantum chip provided by the present invention forms a first blind hole with a large aperture and an aspect ratio of no more than 2:1 on the first surface of the substrate, forms a first superconducting film on the inner wall of the first blind hole, then forms a superconducting circuit on the second surface of the substrate, and then forms an opening in the superconducting circuit. Through the opening, a second blind hole with a small aperture and an aspect ratio of no more than 2:1 is formed on the substrate and connected to the first blind hole. Finally, a second superconducting film is formed on the opening and the inner wall of the second blind hole. The first superconducting film and the second superconducting film are connected to achieve double-sided superconducting connectivity. Since the aspect ratios of both blind holes are relatively small, the step coverage requirements are low, and a traditional through-hole deposition process can be used. The second blind hole is formed after the superconducting circuit is prepared, which will not affect the preparation of the superconducting circuit. Moreover, the small aperture of the second blind hole will not affect the structure of the superconducting circuit. Therefore, the aspect ratio of the through-hole can be reduced without affecting the preparation and structure of the superconducting circuit, thereby reducing the difficulty of through-hole deposition.
[0027] The superconducting quantum computer provided by the present invention includes a double-sided conductive superconducting quantum chip obtained by the aforementioned manufacturing method. It belongs to the same inventive concept as the aforementioned manufacturing method and has the same technical effects, and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A schematic flow chart of a method for manufacturing a double-sided conductive superconducting quantum chip according to an embodiment of the present invention.
[0029] Figure 2a to Figure 2e A schematic diagram of the process for manufacturing a double-sided conductive superconducting quantum chip provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0030] The following describes a specific embodiment of the present invention in more detail with reference to schematic diagrams. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are greatly simplified and not to exact scale, and are intended solely to facilitate and clearly illustrate the embodiments of the present invention.
[0031] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.
[0032] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.
[0033] Please refer to Figure 1 and Figures 2a to 2e The present invention provides a method for manufacturing a double-sided conductive superconducting quantum chip. The manufacturing method includes the following steps:
[0034] S1: providing a substrate with a preset thickness.
[0035] The substrate may be made of silicon or sapphire.
[0036] S2: forming a first blind hole on the first surface in the thickness direction of the substrate.
[0037] The first blind hole can be formed by ultraviolet lithography and dry etching. The photoresist has good performance in film forming, imprinting performance (such as hardness and viscosity, curing speed, interface properties, etc.), and corrosion resistance.
[0038] The specific preparation process of the first blind hole is as follows: spin-coating ultraviolet photoresist on the first surface of the substrate, then photolithography and development of the ultraviolet photoresist to form an etching window exposing the substrate, then performing Bosch dry etching on the substrate in the etching window to form the first blind hole, and finally stripping the ultraviolet photoresist. Figure 2a , which is a schematic diagram after forming a first blind hole on the first surface of the substrate. The thickness of the substrate 100 is a preset thickness H, and the first blind hole 101 is formed on the first surface A of the substrate 100. The depth of the first blind hole is H1 and the aperture is D1.
[0039] S3: forming a first superconducting film on the inner wall of the first blind hole.
[0040] The first superconducting film can be formed using a physical vapor deposition process, such as thermal evaporation, electron beam evaporation, magnetron sputtering, etc. These processes can be applied to through-holes with low aspect ratios. The first superconducting film can be made of aluminum, niobium, or titanium nitride.
[0041] like Figure 2b , which is a schematic diagram of a first superconducting film formed in the first blind hole 101. The first superconducting film 200 is formed on the inner wall of the first blind hole 101 and the surface of the substrate 100 by electron beam evaporation.
[0042] S4: forming a superconducting wire circuit on a second surface opposite to the first surface.
[0043] The superconducting circuit includes components such as Josephson junctions, resonant cavities, capacitors, and air bridges. These components constitute the quantum bits and are the key structure of a superconducting quantum chip. Superconducting circuits can be formed using photolithography and etching processes. Because the first blind via is located on the first surface, while the second surface is intact, the shape has no impact on the fabrication of the superconducting circuit. The superconducting circuit at least partially corresponds to the location of the first blind via.
[0044] like Figure 2c FIG2 is a schematic diagram of a superconducting circuit formed on the second surface of the substrate. Superconducting circuit 300 is formed on second surface B of substrate 100. The middle portion of superconducting circuit 300 corresponds to the position of first blind via 101. That is, the projection of superconducting circuit 300 on substrate 100 at least partially overlaps with the projection of first blind via 101 on substrate 100.
[0045] S5: forming an opening on the superconducting circuit to expose the substrate, and forming a second blind hole on the substrate through the opening to communicate with the first blind hole, wherein the aspect ratio of the first blind hole and the second blind hole does not exceed 2:1, and the aperture of the second blind hole is smaller than the aperture of the first blind hole.
[0046] The opening and the second blind via can also be fabricated using ultraviolet photolithography and dry etching processes. The specific fabrication process is as follows: UV photoresist is coated on the superconducting circuit, and then the UV photoresist is photolithographed and developed to form an etch window exposing the superconducting circuit. The superconducting circuit within the etch window is then subjected to ICP dry etching to form an opening exposing the substrate. The substrate within the opening is then subjected to deep silicon etching until the first superconducting film is cut off, forming the second blind via. Since the second blind via is formed after the superconducting circuit is fabricated, it does not affect the fabrication of the superconducting circuit. Furthermore, the aperture of the second blind via is smaller than that of the first blind via, and therefore does not affect the structure of the superconducting circuit.
[0047] Taking into account the compatibility of the conventional through-hole deposition process and the improvement of through-hole deposition effect, in this embodiment, the aspect ratio of the first blind hole and the second blind hole are both 1:1.
[0048] like Figure 2d Figure 2 shows a schematic diagram of a second blind via formed on the second surface of the substrate. An opening 302 is formed in the superconducting circuit 300, and a second blind via 102 is formed in the substrate 100 within the opening 302. The second blind via 102 has a depth H2 and a diameter D2. The aspect ratios of the first blind via 101 and the second blind via 102 are both approximately 1:1, and the diameter D2 of the second blind via 102 is smaller than the diameter D1 of the first blind via 101. That is, H1 / D1 and H2 / D2 are equal to 1:1, and D2 is smaller than D1.
[0049] S6: forming a second superconducting film connected to the first superconducting film on the opening and the inner wall of the second blind hole.
[0050] The second superconducting film can be formed using a physical vapor deposition process, such as thermal evaporation, electron beam evaporation, or magnetron sputtering. These processes are applicable to low aspect ratio through-holes and have good moldability. The second superconducting film can be made of aluminum, niobium, or titanium nitride.
[0051] The second superconducting film can be formed using a photolithography process. The specific process involves first applying a photoresist, then performing photolithography and development on the photoresist to expose the opening and a certain area around the opening that surrounds the superconducting circuit. Then, superconducting material is deposited on the inner wall of the opening, the inner wall of the second blind via, and the superconducting circuit within a certain area around the opening to form the second superconducting film. Because the first and second blind vias neither affect the fabrication nor damage the superconducting circuit structure, and have a low aspect ratio, the step coverage requirements of the through-hole deposition process are reduced. This allows the through-hole aspect ratio to be reduced without affecting the fabrication and structure of the superconducting circuit, thereby reducing the difficulty of through-hole deposition.
[0052] like Figure 2e , which is a schematic diagram after forming a second superconducting film within the second blind hole. The second superconducting film 400 is formed on the inner wall of the second blind hole 102 and the inner wall of the opening 302 using an electron beam evaporation process. Since the first superconducting film 200 is exposed in the second blind hole 102, the second superconducting film 400 within the second blind hole 102 is combined with the first superconducting film 200, thereby connecting the second superconducting film 400 and the first superconducting film 200, achieving double-sided superconducting connectivity.
[0053] The method for manufacturing a double-sided conductive superconducting quantum chip according to an embodiment of the present invention has the following effects:
[0054] 1. Two connected blind vias are formed on two surfaces of the substrate, with different apertures and aspect ratios of no more than 2:1. Superconducting films are then formed in the two blind vias. Since the aspect ratios of the two blind vias are small, the deposition difficulty of the through-hole can be reduced. In addition, the depth of each blind via is also reduced compared to a single through-hole, so the etching difficulty of the two blind vias is also reduced.
[0055] 2. Since the connection between the two blind holes only requires the connection of two superconducting films, the two superconducting films do not need to completely fill the entire blind hole, thus reducing the coating process cost;
[0056] 3. The preparation of the first blind hole will not damage the other surface of the substrate, is fully compatible with the subsequent preparation process of various devices of the superconducting quantum chip, and has no adverse effects on other structures of the superconducting quantum chip.
[0057] In some embodiments of the present application, the step of providing a substrate of a predetermined thickness includes:
[0058] S11: providing a substrate having a thickness greater than a preset thickness;
[0059] S12: performing double-side polishing on the substrate until the thickness of the substrate reaches a preset thickness.
[0060] Among them, double-sided polishing can not only improve the smoothness of the substrate surface, but also remove dirt on the substrate surface.
[0061] In some embodiments of the present application, after forming the first superconducting film on the inner wall of the first blind hole, the method further includes: forming an insulating protective layer on the surface of the first superconducting film.
[0062] Because superconducting quantum chips use superconducting metals in their fabrication, which are typically chemically active and easily oxidized when exposed to air, and because superconducting metals are typically deposited at micron-nano thicknesses, they are easily damaged by movement or collisions. The insulating protective layer prevents oxidation of the first superconducting film and protects it from subsequent damage. The insulating protective layer can be formed using chemical vapor deposition (CVD) and is made of polysilicon or silicon oxide.
[0063] Please refer again Figure 2b An insulating protection layer 210 is also formed on the surface of the first superconducting film 200 .
[0064] Furthermore, before forming the superconducting circuit on the second surface opposite to the first surface, the method further includes: sequentially cleaning the second surface of the substrate opposite to the first surface using piranha solution and BOE cleaning solution.
[0065] The purpose of cleaning with piranha solution and BOE (buffered oxide etch) is to remove dirt and the native oxide layer from the substrate surface, resulting in a high-quality, clean secondary surface that facilitates the fabrication of high-quality superconducting circuits. Because the primary superconducting film is protected by an insulating layer during cleaning, the substrate remains unaffected even if completely immersed in the piranha solution or BOE cleaning solution.
[0066] In some embodiments of the present application, before forming a second superconducting film connected to the first superconducting film on the opening and the inner wall of the second blind hole, it also includes: performing IBE etching on the superconducting circuit and the first superconducting film in the opening to remove the natural oxide layer on the superconducting circuit and the first superconducting film.
[0067] Among them, the superconducting circuit needs to achieve reliable electrical connection with the second superconducting film, and the second superconducting film needs to achieve reliable electrical connection with the first superconducting film. The superconducting circuit and the first superconducting film are easily oxidized on the surface to form a natural oxide layer after being exposed to the air. By performing IBE (Ion Beam Etching) on the superconducting circuit and the first superconducting film in the opening, the natural oxide layer on the surface of the superconducting circuit and the first superconducting film can be removed from the second surface, so that after the second superconducting film is deposited, the second superconducting film achieves good contact with the superconducting circuit and the first superconducting film.
[0068] An embodiment of the present invention further provides a superconducting quantum computer, comprising a double-sided conduction superconducting quantum chip obtained according to the method for manufacturing a double-sided conduction superconducting quantum chip according to the aforementioned embodiment.
[0069] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "example," or "specific example" means that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. Furthermore, those skilled in the art may combine and reconcile different embodiments or examples described in this specification.
[0070] The above description is merely a preferred embodiment of the present invention and does not limit the present invention in any way. Any person skilled in the art who, without departing from the scope of the present invention, makes any equivalent substitution, modification, or other changes to the technical solution and technical content disclosed in the present invention shall be deemed to be within the scope of the present invention and still fall within the scope of protection of the present invention.
Claims
1. A method for manufacturing a double-sided conductive superconducting quantum chip, characterized in that: include: providing a substrate of a predetermined thickness; forming a first blind hole on a first surface in a thickness direction of the substrate; forming a first superconducting film on the inner wall of the first blind hole; forming a superconducting wire on a second surface opposite to the first surface; forming an opening on the superconducting circuit to expose the substrate, and forming a second blind hole on the substrate through the opening to communicate with the first blind hole, wherein the aspect ratio of the first blind hole and the second blind hole does not exceed 2:1, and the aperture of the second blind hole is smaller than that of the first blind hole; A second superconducting film connected to the first superconducting film is formed on the opening and the inner wall of the second blind hole.
2. The manufacturing method according to claim 1, characterized in that The aspect ratios of the first blind hole and the second blind hole are both 1:
1.
3. The manufacturing method according to claim 1, characterized in that The method of providing a substrate with a preset thickness comprises: providing a substrate having a thickness greater than a predetermined thickness; The substrate is double-sided polished until the thickness of the substrate reaches the preset thickness.
4. The manufacturing method according to claim 1, characterized in that The first blind hole, the second blind hole and the opening are all formed by a dry etching process.
5. The manufacturing method according to claim 1, characterized in that After forming the first superconducting film on the inner wall of the first blind hole, the method further includes: An insulating protective layer is formed on the surface of the first superconducting film.
6. The manufacturing method according to claim 5, characterized in that The first superconducting film and the second superconducting film are both formed by a physical vapor deposition process, the insulating protective layer is formed by a chemical vapor deposition process, and the insulating protective layer is made of polysilicon or silicon oxide.
7. The manufacturing method according to claim 5, characterized in that Before forming a superconducting circuit on a second surface opposite to the first surface, the method further comprises: A second surface of the substrate opposite to the first surface is cleaned using piranha solution and BOE cleaning solution in sequence.
8. The manufacturing method according to claim 1, characterized in that Before forming a second superconducting film connected to the first superconducting film on the opening and the inner wall of the second blind hole, the method further includes: IBE etching is performed on the superconducting wire and the first superconducting film in the opening to remove a natural oxide layer on the superconducting wire and the first superconducting film.
9. The manufacturing method according to claim 1, characterized in that The first superconducting film and the second superconducting film are made of aluminum, niobium or titanium nitride, and the substrate is made of silicon or sapphire.
10. A superconducting quantum computer, characterized in that: A double-sided conduction superconducting quantum chip obtained by the method for manufacturing a double-sided conduction superconducting quantum chip according to any one of claims 1 to 9.