Method for repairing failure of server single board and electronic equipment

Abstract

The application discloses a server single-board fault repair method and electronic equipment, and relates to the field of server hardware reliability, comprising: scanning a plurality of target signal links of a server single-board by using a time domain reflectometer; comparing new impedance values and new reflection waveform features in a scanning result with initial impedance values and initial reflection waveform features respectively; determining at least one fault link of the server single-board when the comparison result is inconsistent; performing multi-modal analysis in combination with running state data of the server single-board; determining a fault level of the at least one fault link of the server single-board; and correspondingly generating a fault repair strategy to switch the fault link to a backup link. The application solves the problems of single detection dimension, composite fault monitoring blind area and high-frequency signal monitoring failure in the related art, and realizes fault prediction, accurate positioning and lossless self-repair of the target signal links of the server single-board through time domain reflectometer monitoring, multi-modal data fusion analysis and redundant switching.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of server hardware reliability, and particularly relates to a server single board fault repair method and an electronic device. BACKGROUND

[0002] With the development of 5G, artificial intelligence and industrial internet, the technical paradigm and reliability standard of the server single board are facing revolutionary reconstruction, including the challenges of high-density integration technology, high-frequency signal integrity and the demand for multi-protocol heterogeneous interconnection. However, the main causes of hardware failure, such as PCB (Printed Circuit Board) solder joint aging / micro-cracks, high-frequency crosstalk and insufficient power transient response, are increasingly prominent.

[0003] In the related art, the reliability of the server single board is mainly improved through software monitoring schemes, hardware redundancy schemes and online detection technologies. However, the above schemes have some technical bottlenecks, such as single detection dimension, composite fault monitoring blind area, high-frequency signal monitoring failure and the like, which need to be solved urgently. SUMMARY

[0004] The present application provides a server single board fault repair method to at least solve the problems of single detection dimension, composite fault monitoring blind area and high-frequency signal monitoring failure in the related art.

[0005] The present application provides a server single board fault repair method, comprising:

[0006] Based on a preset scanning period, a plurality of target signal links of a server single board are scanned, and new impedance values and new reflection waveform features in a scanning result are respectively compared with initial impedance values and initial reflection waveform features in a pre-constructed fault diagnosis prior database one by one, and when the comparison result is inconsistent, at least one fault link of the server single board is determined;

[0007] Based on the at least one fault link and running state data of the server single board, a preset multi-modal intelligent diagnosis model is used for multi-modal analysis, and based on the analysis result, a fault level of the at least one fault link in the server single board is determined;

[0008] According to the fault level of the at least one fault link, a corresponding fault repair strategy is generated, and based on the fault repair strategy, a fault link of a target signal link in the server single board is switched to a backup link.

[0009] The present application also provides a server single board fault repair device, comprising:

[0010] The comparison module is used to scan multiple target signal links of the server board based on a preset scanning cycle, and compare the new impedance values ​​and new reflection waveform characteristics in the scanning results with the initial impedance values ​​and initial reflection waveform characteristics in the pre-built fault diagnosis prior database one by one. When the comparison results are inconsistent, at least one faulty link of the server board is determined.

[0011] The multimodal analysis module is used to perform multimodal analysis based on the operating status data of the at least one faulty link and the server board using a preset multimodal intelligent diagnostic model, and to determine the fault level of at least one faulty link in the server board based on the analysis results.

[0012] The link switching module is used to generate a corresponding fault repair strategy based on the fault level of the at least one faulty link, and based on the fault repair strategy, switch the faulty link of the target signal link in the server board to the backup link.

[0013] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described server board fault repair methods.

[0014] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described server board fault repair methods.

[0015] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described server board fault repair methods.

[0016] This application utilizes a time-domain reflectometer to scan multiple target signal links on a server board. The new impedance values ​​and new reflected waveform characteristics from the scan results are compared with the initial impedance values ​​and initial reflected waveform characteristics. If the comparison results are inconsistent, at least one faulty link on the server board is identified. Simultaneously, multimodal analysis is performed using the server board's operational status data to determine the fault level of at least one faulty link and generate a corresponding fault repair strategy to switch the faulty link to a backup link. This solves problems in related technologies such as single detection dimensions, blind spots in composite fault monitoring, and failure of high-frequency signal monitoring. Through time-domain reflectometer monitoring, multimodal data fusion analysis, and redundant switching, fault prediction, precise location, and non-destructive self-repair of target signal links on the server board are achieved. Attached Figure Description

[0017] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described in the following embodiments are only some of the embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.

[0018] Figure 1 A flowchart of a server single board fault repair method provided by an embodiment of the present application is shown in the figure.

[0019] Figure 2 A hardware architecture diagram of a fault pre-check and self-repair circuit provided by an embodiment of the present application is shown in the figure.

[0020] Figure 3 A multi-modal intelligent diagnosis system diagram provided by an embodiment of the present application is shown in the figure.

[0021] Figure 4 A multi-modal intelligent diagnosis flowchart provided by an embodiment of the present application is shown in the figure.

[0022] Figure 5 An impedance anomaly detection and self-repair flowchart provided by an embodiment of the present application is shown in the figure.

[0023] Figure 6 A block diagram of a server single board fault repair device according to an embodiment of the present application is shown in the figure.

[0024] Figure 7 A structural diagram of an electronic device according to an embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative effort belong to the protection scope of the present application.

[0026] It should be noted that, in the description of the present application, the terms “include”, “contain” or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0027] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0028] Specifically, before introducing the embodiments of the present application, first introduce the fault repair strategy of the related art server single board. The current server single board technology evolution trend shows that the server single board technology is undergoing three paradigm shifts, which are (1) high-density integration technology: through 3D packaging and micro-processing, the integration density per unit area presents an order of magnitude increase, typical performance is: (a) computing unit integration: cooperative packaging of CPU (Central Processing Unit) + accelerator (such as NPU (Neural Processing Unit) / GPU (Graphics Processing Unit)) under heterogeneous architecture; (b) PCB process breakthrough: the number of layers jumps from the conventional 8-12 layers to 16-20 layers, 50 μm level fine line is realized (1) Interconnection density; (2) High-frequency signal integrity challenges: Interface standard iteration: PCIe (Peripheral Component Interconnect Express) 5.0 / 6.0 (32-64 GT / s) and DDR (Double Data Rate) 5 (6400 MT / s) become the benchmark configuration; Channel characteristic requirements: Insertion loss needs to be controlled within -3 dB / inch, and near-end crosstalk is lower than -40 dB; (3) Multi-protocol heterogeneous interconnection: Protocol stack integration: Ethernet (200G / 400G), CXL (Computing Xpress Link) (2.0 / 3.0), NVLink, and other protocols coexist in a single board level implementation; Signal mixed processing: Mixed layout requirements of NRZ (Non-Return-to-Zero) / PAM (Pulse Amplitude Modulation) 4 modulation signals need to be met, wherein the application boundary has broken through the traditional data center category, forming a key task type deployment matrix: (a) Financial technology: High-frequency trading system MTTF (Mean Time To Failure) needs to be > 100,000 hours, RTO (Recovery Time Objective) < 10 ms; (b) Intelligent transportation: ASIL-D (Automotive Safety Integrity Level D) level functional safety requirements hardware fault detection coverage rate ≥ 77%; (c) Aerospace electronics: Meet the MIL-STD-883G (MILitary STDandard 883, Revision G) anti-radiation standard.

[0029] Further, with the wide application of high-speed interfaces (PCIe 5.0+ / DDR5, etc.), signal integrity and power integrity problems have become the core factors affecting system reliability. According to the global data center hardware failure analysis report, the main causes of hardware failure can be quantified as follows: (1) 35% caused by PCB solder joint aging / micro-cracks, manifested as impedance mismatch (such as BGA (Ball Grid Array) solder ball fatigue induced ΔZ>10%); (2) 28% caused by high-frequency crosstalk (such as PCIe channel NEXT>-30dB), which in turn leads to excessive bit error rate; (3) 17% caused by insufficient power transient response (such as LDO (Low Dropout Regulator) delay>1μs), causing chip supply voltage drop to exceed the safety threshold. Such failures usually show gradual degradation characteristics: for example, under thermal cycle stress, the initial impedance deviation may be only 2%-3%, but eventually it will cause complete signal interruption. Traditional operation and maintenance rely on post-detection (log analysis / manual troubleshooting), with an average repair time of 8-24 hours, while financial transactions, autonomous driving and other scenarios require 77.777% availability (annual downtime<5 minutes), and passive maintenance mode cannot meet the demand.

[0030] In the related art, the main technical solution is:

[0031] (1) Software monitoring solution, mainly based on existing system interfaces to implement fault detection, including BMC (Baseboard Management Controller) / IPMI (Intelligent Platform Management Interface) hardware monitoring, wherein the monitoring mechanism: real-time acquisition of key parameters through on-board sensor network, including: voltage monitoring (such as CPU core power supply, error threshold ±5%) and temperature monitoring (junction temperature TJmax triggers dynamic frequency reduction); protocol support: SMART (Self-Monitoring Analysis and Reporting Technology); typical solution: Intel Node Manager (sampling accuracy ±1%); limitations: insufficient sensor layout density, difficult to cover key areas of the entire board (such as high-speed signal traces, BGA solder joints, etc.).

[0032] (2) Hardware redundancy scheme: Hardware redundancy improves system availability through physical layer backup. The mainstream implementation methods include: (a) Dual-board hot backup: CPLD (Complex Programmable Logic Device) / FPGA (Field-Programmable Gate Array) is used to realize the state synchronization of the main and backup single boards (such as Xilinx Zynq series supporting μs-level synchronization), and the voting circuit is used for switching when a fault occurs. The typical switching delay is 50-200 ms (depending on the complexity of the synchronization protocol). In telecommunication equipment, this scheme can improve the system availability to 77.777% (five 7s), but it brings a 40%-60% increase in hardware cost; (b) Channel-level redundancy: Backup lines are deployed for critical signals (such as PCIe Gen4 clock lines and DDR4 command buses), and high-speed relays (such as 1 ns switching relays from TE Connectivity) are used to isolate faults. Tests show that this method can reduce signal integrity degradation by 70%, but the transient interruption (>3 ns) during switching may cause protocol layer resynchronization.

[0033] (3) Online detection technology: Online detection technology attempts to achieve early fault warning through active monitoring, including: external impedance testing: TDR (Time-Domain Reflectometry) instruments (such as Keysight DCA-X with a resolution of 10 ps) are used to periodically scan the impedance changes of PCB traces, which can detect abnormalities of 0.5Ω (corresponding to about 100 μm of cracks), but limited by the instrument interface rate, a single board full scan takes 2-5 minutes, which cannot meet the real-time requirements.

[0034] However, based on the analysis of the above technical problems, there are the following defects:

[0035] (1) Detection blind area of compound faults: Actual faults are often the result of the coupling of electric-thermal-mechanical multi-physical fields. For example, PCB warping (mechanical stress) may change the trace impedance (electrical property) and exacerbate poor heat dissipation of chips (thermal property). However, in current solutions, temperature sensors (such as RTD (Resistance Temperature Detector)), voltage monitoring chips (such as INA226), and strain gauges (such as Microchip strain gauge) data are isolated from each other, lacking a correlation analysis framework. Experiments show that the false negative rate of multi-field coupling faults is as high as 67%;

[0036] (2) High-frequency signal monitoring failure: the bandwidth of traditional voltage sensors is generally lower than 1MHz (for example, the sampling rate of the built-in ADC (Analog-to-Digital Converter) of BMC is usually 100kS / s), while the base frequency component of PCIe 5.0 signal reaches 8GHz (Nyquist frequency needs to be greater than or equal to 16GHz), which will cause: (a) ringing effect: the overshoot and oscillation caused by impedance mutation (the frequency is usually 1-5GHz) cannot be captured; (b) crosstalk-induced timing offset: the crosstalk of adjacent channels (such as near-end crosstalk NEXT>-35dB) may cause eye closure, but the existing scheme lacks real-time quantification capability for timing jitter.

[0037] Therefore, based on the above-mentioned problems, the embodiments of the present application can realize the fault prediction, accurate positioning and lossless self-repair of the target signal link (PCIe / DDR / USB (Universal Serial Bus)) of the server single board through the time domain reflectometry monitoring, multi-modal data fusion analysis and nanosecond-level redundant switching three core technologies.

[0038] The embodiments of the present application provide a fault repair method of a server single board, which is described in detail in combination with the execution process of the fault repair method of the server single board.

[0039] Specifically, Figure 1 A flowchart of a fault repair method of a server single board provided by the embodiments of the present application is shown in the figure.

[0040] As Figure 1 shown, in the fault repair method of the server single board, the following steps are included:

[0041] In step S101, based on a preset scanning period, a plurality of target signal links of the server single board are scanned, and the new impedance value and the new reflection waveform feature in the scanning result are respectively compared with the initial impedance value and the initial reflection waveform feature in the pre-constructed fault diagnosis prior database one by one, and when the comparison result is inconsistent, at least one fault link of the server single board is determined.

[0042] According to an embodiment of the present application, before the new impedance value and the new reflection waveform feature in the scanning result are respectively compared with the initial impedance value and the initial reflection waveform feature in the pre-constructed fault diagnosis prior database one by one, it further includes: judging whether the server single board satisfies the initialization condition; if the server single board satisfies the initialization condition, the time domain reflectometry module is used to scan the plurality of target signal links of the server single board, and the initial impedance value and the initial reflection waveform feature of the server single board are recorded; and the fault diagnosis prior database is constructed based on the initial impedance value and the initial reflection waveform feature.

[0043] The preset scanning period can be set by a person skilled in the art according to actual detection requirements, or can be obtained by a limited number of simulations, and is not specifically limited here.

[0044] Specifically, as shown in Figure 2 The system hardware structure of the application is first introduced, mainly including a core monitoring layer, an execution layer and a decision layer. The core monitoring layer is a TDR module, which adopts ultrafast pulse excitation, emits a high-speed pulse at the starting point of a signal chain, and detects impedance abnormalities (such as disconnection and poor contact) through reflected waveforms. The device is a SiGe process avalanche transistor (MACOM MAAP-011202). The performance parameters are as follows: (a) rise time: 32 ps ± 5 ps, (b) bandwidth: ≥ 12 GHz (-3 dB), (c) amplitude: 1.2 Vpp, (d) integrated position: starting end of a signal chain (such as the sending end of a PCIe controller), (e) signal coupling: directional coupler injection into a differential pair to be tested; high-precision reflected signal acquisition: ADC selection: TI ADC12DJ5200RF (16-bit resolution, 10.4 GS / s sampling rate), real-time analysis: special ASIC performs impedance calculation, algorithm enhancement: PCB dielectric constant temperature drift compensation, positioning accuracy: ± 0.3 mm; high-frequency signal integrity guarantee; layout rules: TDR injection point is ≤ 15 mm away from a chip pin, serpentine wiring matches the main channel impedance (such as PCIe 5.0: 85 Ω ± 5%), and the circuit form is fully embedded.

[0045] The execution layer is a redundant channel switching matrix, which adopts a GaN radio frequency switch array. The core device includes an E-mode GaN HEMT (EPC2053). The channel configuration is as follows (for each differential pair): switch driving circuit optimization: shutdown isolation: > 60 dB @ 10 GHz (negative voltage shutdown: -5 V bias + Miller compensation); dynamic performance: on-resistance: 28 mΩ, switching time: 2.3 ns @ 5 V drive (actual measurement without ringing); backup channel pre-emphasis: + 3 dB @ 8 GHz; real-time monitoring and response: switching mechanism: optocoupler isolation instruction to FPGA (Field-Programmable Gate Array, Field-Programmable Gate Array) control to complete fault switching within 100 ns; state monitoring: current mirror real-time detection to abnormal trigger BMC alarm.

[0046] Table 1

[0047]

[0048] The decision layer adopts a multi-modal intelligent diagnosis system, and the hardware carrier is an on-board FPGA. The data processing pipeline is as follows: Figure 3The core algorithm shown: hardware-accelerated multi-modal fusion (delay: microsecond level).

[0049] (4) Power supply and integrated design: power supply architecture: key modules are independently powered: TDR pulse generator adopts a dedicated LDO, anti-interference design: maintains monitoring accuracy, energy efficiency and integration under full load conditions: total system power consumption: <5W, thermal compatibility: directly embedded in existing single boards without affecting heat dissipation layout.

[0050] Specifically, first, initialization and baseline establishment are performed to determine whether the server single board meets the initialization condition, which is the trigger condition for target signal link scanning. When the server single board is in a power-on startup state, it can be determined that the server single board meets the initialization condition. At this time, the time domain reflectometer module is used to scan the multiple target signal links (such as PCIe, DDR, USB) of the server single board, and the initial impedance baseline of the server single board is recorded, i.e. the initial impedance value (such as PCIe 5.0: 85Ω±2%) and the initial reflection waveform characteristics, and then a fault diagnosis prior database is constructed based on the initial impedance value and the initial reflection waveform characteristics.

[0051] Secondly, the preset scanning period (such as 24h) can be used for scanning, that is, the time domain reflectometer module can be used to automatically scan the multiple target signal links of the server single board every 24h, and the new impedance value and the new reflection waveform characteristics in the scanning result are compared with the initial impedance value and the initial reflection waveform characteristics in the pre-constructed fault diagnosis prior database respectively, and when the comparison result is inconsistent, at least one fault link of the server single board is determined.

[0052] Thus, the embodiment of the present application determines that the server single board is in a known, healthy and stable state, and uses the time domain reflectometer module to scan the multiple target signal links of the server single board, thereby ensuring the high quality and reliability of the constructed "fault diagnosis prior database", and accurately locating the specific link that occurs abnormally by accurately matching and comparing the "new impedance value" and "new reflection waveform characteristics" of each scanned target signal link with the "initial impedance value" and "initial reflection waveform characteristics" in the database, avoiding misjudgment or omission, greatly improving the accuracy and efficiency of fault detection, and providing a reliable basis for subsequent accurate repair (such as redundancy switching).

[0053] According to an embodiment of the present application, scanning the multiple target signal links of the server single board comprises: determining whether the server single board meets the target signal link scanning trigger condition; if the server single board meets the target signal link scanning trigger condition, using the time domain reflectometer module to scan the multiple target signal links of the server single board.

[0054] According to one embodiment of the present application, determining whether the server board meets the target signal link scanning trigger condition comprises: receiving an impedance change rate of at least one faulty link, temperature data of a temperature sensor in the server board, and vibration data of a vibration sensor in the server board; determining whether the impedance change rate is greater than a first target value for a target number of times in succession, or whether the temperature data of the temperature sensor is greater than a preset temperature threshold, or whether the acceleration of the vibration sensor is greater than a second target value; and determining that the server board meets the target signal link scanning trigger condition if the impedance change rate is greater than the first target value for the target number of times in succession, or if the temperature data of the temperature sensor is greater than the preset temperature threshold, or if the acceleration of the vibration sensor is greater than the second target value.

[0055] Specifically, in the embodiments of the present application, in addition to periodic triggering of scanning of multiple target signal links, event-triggered scanning can also be performed, i.e., multiple target signal links can be scanned when a certain event is triggered.

[0056] Specifically, as shown in Table 2, the impedance change rate ΔZ of at least one faulty link, the temperature data ΔT of a temperature sensor in the server board, and the vibration data of a vibration sensor in the server board are received, and the server board is determined to meet the target signal link scanning trigger condition if the impedance change rate is greater than a first target value (e.g., 2%) for a target number of times (e.g., 3 times) in succession, or if the temperature data of the temperature sensor is greater than a preset temperature threshold (e.g., 10℃), or if the acceleration of the vibration sensor is greater than a second target value (e.g., 5g). That is, when ΔZ is greater than 2% for 3 times in succession, or ΔT is greater than 10℃, or the acceleration is greater than 5g, the server board meets the target signal link scanning trigger condition, and the multiple target signal links of the server board are scanned by the time domain reflectometer module.

[0057] Table 2

[0058]

[0059] Therefore, based on event-triggered scanning, waste of system resources (such as power consumption of the TDR module and computing resources) is avoided, so that scanning is only performed when necessary, thereby significantly improving the energy efficiency and resource utilization efficiency of the system. At the same time, the system can also adapt to different application scenarios and requirements.

[0060] In step S102, based on at least one faulty link and running state data of the server board, a preset multi-modal intelligent diagnosis model is used for multi-modal analysis, and a fault level of the at least one faulty link in the server board is determined based on an analysis result.

[0061] According to one embodiment of the application, based on at least one failed link and the running state data of the server board, a preset multi-modal intelligent diagnosis model is used for multi-modal analysis, including: calculating the impedance change rate of at least one failed link; determining whether there is a target impedance change rate greater than or equal to a third target value in the impedance change rates of multiple failed links; if there is a target impedance change rate greater than or equal to the third target value in the impedance change rates of multiple failed links, starting a fault diagnosis process and determining the target impedance change rate corresponding to the target failed link; extracting the reflection waveform features of the target failed link, and performing time domain analysis and frequency domain analysis on the extracted reflection waveform features respectively, and determining the time-frequency domain features of the target failed link according to the analysis results; based on the time-frequency domain features of the target failed link, the temperature data of the server board and the vibration data of the server board, multi-modal analysis is performed to obtain the fault feature vector of the server board; using a preset inference engine rule to perform probability reasoning on the fault feature vector to obtain the fault type of at least one failed link in the server board and the confidence degree corresponding to the fault type.

[0062] Among them, the preset inference engine rule and the preset multi-modal intelligent diagnosis model can be set by those skilled in the art according to actual detection needs, which are not limited here.

[0063] Specifically, after detecting that there are multiple target signal links in the above-mentioned failed links, fault diagnosis and classification need to be performed, such as Figure 4 As shown, first, the impedance change rate of at least one failed link is calculated, and it is determined whether there is a target impedance change rate greater than or equal to a third target value (for example, 30%) in the impedance change rates of multiple failed links. If there is a target impedance change rate greater than or equal to the third target value in the impedance change rates of multiple failed links, the fault diagnosis process is started, that is, when the impedance change rate ≥ 30%, it means that the impedance change rate is out of standard, and there is an anomaly, so the fault diagnosis process needs to be started, and the target impedance change rate corresponding to the target failed link is determined.

[0064] Secondly, the reflection waveform features of the target failed link are extracted, and the extracted reflection waveform features are subjected to time domain analysis and frequency domain analysis respectively to determine the time-frequency domain features of the target failed link, wherein the time domain: reflection pulse rise time (such as typical value of solder crack: 45ps), the frequency domain: 3rd harmonic distortion rate (oxidation failure > 5%), the spatial domain: thermal imaging local temperature difference (virtual solder ΔT > 8℃), and the decision speed: hardware acceleration realizes <1μs to complete diagnosis.

[0065] Thirdly, multi-modal analysis is performed based on the time-frequency domain features of the target fault link, the temperature data of the server board and the vibration data of the server board, and a fault feature vector of the server board is obtained, that is, heterogeneous data from different physical dimensions are integrated to generate a unified high-dimensional fault feature vector, so that ambiguity can be eliminated and the fault root cause can be more accurately determined.

[0066] Finally, a preset inference engine rule (for example, a Bayesian inference engine) is used to perform probability inference on the fault feature vector, and the fault type of the at least one fault link in the server board and the confidence of the fault type are obtained.

[0067] Therefore, by constructing a preset multi-modal intelligent diagnosis model that integrates electrical abnormalities and system running states, a leap from extensive fault detection to fine fault type recognition is achieved, which greatly improves the accuracy, reliability and intelligent level of diagnosis, can cope with complex compound faults, and at the same time provides a solid and reliable decision basis for subsequent precise operation and automatic self-healing operation.

[0068] According to an embodiment of the present application, based on the running state data of at least one fault link and a server board, a preset multi-modal intelligent diagnosis model is used for multi-modal analysis, and based on the analysis result, the fault level of at least one fault link in the server board is determined, including: based on the impedance change rate of at least one fault link, the temperature data of the server board and the vibration data of the server board, a machine learning assisted diagnosis technology is used to identify the fault level of at least one fault link in the server board.

[0069] According to an embodiment of the present application, based on the analysis result, the fault level of at least one fault link in the server board is determined, including: if the impedance change rate of the fault link is less than a fourth target value, it is determined that the fault level of the fault link is a first fault level; if the impedance change rate of the fault link is less than a third target value and greater than or equal to the fourth target value, it is determined that the fault level of the fault link is a second fault level; if the impedance change rate of the fault link is greater than or equal to the third target value, or the confidence of the fault type corresponding to the fault link is greater than or equal to a fifth target value, it is determined that the fault level of the fault link is a third fault level.

[0070] Specifically, after the fault type of the fault link is diagnosed, the fault level of at least one fault link is further determined, which can be based on the impedance change rate of at least one fault link, the temperature data of the server board and the vibration data of the server board, and a machine learning assisted diagnosis technology is used to identify the fault level of at least one fault link in the server board.

[0071] Specifically, as Figure 5As shown, if the impedance change rate of the fault link is less than a fourth target value (for example, 10%), it is determined that the fault level of the fault link is a first fault level, if the impedance change rate of the fault link is less than a third target value and greater than or equal to the fourth target value, it is determined that the fault level of the fault link is a second fault level, and if the impedance change rate of the fault link is greater than or equal to the third target value, or the confidence of the fault link corresponding to the fault type is greater than or equal to a fifth target value (for example, 80%), it is determined that the fault level of the fault link is a third fault level, that is, when the impedance change rate of the fault link is less than 10%, it is determined that the fault level of the fault link is the first fault level, when the impedance change rate of the fault link is 10%≤ΔZ<30%, it is determined that the fault level of the fault link is the second fault level, and when the impedance change rate of the fault link is ΔZ≥30% or the confidence is ≥80%, it is determined that the fault level of the fault link is the third fault level.

[0072] Therefore, by judging the fault level, the server board can take the most appropriate response measures according to the severity of the fault, thereby maximizing the availability of the server board, while minimizing the operation and maintenance cost and the risk of business interruption.

[0073] In step S103, a corresponding fault repair strategy is generated according to the fault level of at least one fault link, and the fault link of the target signal link in the server board is switched to the standby link based on the fault repair strategy.

[0074] According to an embodiment of the present application, a corresponding fault repair strategy is generated according to the fault level of at least one fault link, and the fault link of the target signal link in the server board is switched to the standby link based on the fault repair strategy, comprising: if the impedance change rate of the fault link is less than a fourth target value, directly recording the fault log of the fault link; if the impedance change rate of the fault link is greater than or equal to a third target value, activating the redundant switching matrix based on the fault repair strategy, simultaneously disconnecting the fault link of the target signal link, and switching the fault link to the standby link; determining whether the impedance change rate of the fault link meets a preset threshold; if the impedance change rate of the fault link meets the preset threshold, directly removing the fault link from the current working path and switching the fault link to the standby link, otherwise, marking the fault link as a failure state.

[0075] According to an embodiment of the present application, a corresponding fault repair strategy is generated according to the fault level of at least one fault link, and the fault link of the target signal link in the server board is switched to the standby link based on the fault repair strategy, comprising: if the impedance change rate of the fault link is greater than or equal to a fourth target value, and the impedance change rate of the fault link is less than a third target value, controlling the target link to run from a first standard to a second standard, and generating a corresponding alarm reminder.

[0076] The preset threshold value can be set by a person skilled in the art according to actual detection requirements, or based on a limited number of computer simulations, and is not limited here.

[0077] Specifically, after detecting the fault level of the at least one faulty link, the embodiment of the application can generate a fault repair strategy corresponding to the fault level of the at least one faulty link.

[0078] Specifically, as Figure 5 As shown in Table 3, if the impedance change rate of the faulty link is less than the fourth target value (i.e., ΔZ < 10%), the fault log of the faulty link can be directly recorded, and a notification can be sent through the BMC, at this time, there is no impact on the service; if the impedance change rate of the faulty link is greater than or equal to the third target value (i.e., ΔZ ≥ 30%), at this time, the redundant switching matrix (for example, a GaN radio frequency switch array) is activated based on the fault repair strategy, the faulty link of the target signal link is disconnected, the faulty link is switched to the standby link, and scanning verification is performed again, whether the impedance change rate of the faulty link meets the preset threshold value is judged again, if the impedance change rate of the faulty link meets the preset threshold value, the faulty link is directly removed from the current working path, and the faulty link is switched to the standby link, otherwise, the faulty link is marked as a failure state, at this time, the service may have a microsecond-level flash-off; if the impedance change rate of the faulty link is greater than or equal to the fourth target value and less than the third target value (i.e., 10% ≤ ΔZ < 30%), the target link (for example, a PCIe link) can be controlled to run from the first standard to the second standard, for example, from the PCIe 5.0 standard to the PCIe 4.0 standard, and a corresponding alarm reminder is generated, at this time, the service may have a 20% broadband drop impact.

[0079] Table 3

[0080]

[0081] The redundant switching matrix can automatically jump to the standby channel using an E-mode GaN HEMT switch array, the switching time is <100ns (actual measurement value), the on-resistance is 28mΩ, the isolation degree is >60dB@10GHz, and the channel verification is to perform secondary TDR scanning immediately after switching, and the new channel ΔZ <10% is required.

[0082] Therefore, the embodiment of the application directly converts the diagnostic result of "fault level judgment" into an executable "fault repair strategy", forming a complete "perception, analysis, decision, and execution" automatic closed loop, reducing the delay of fault handling, and improving the autonomy and intelligent level of the system.

[0083] Further, after repairing the faulty link, the embodiments of the present application can perform repair verification, compare the impedance change rate before and after repair, and generate an impedance recovery rate report (such as 98.7%), continuously monitor the new channel for 48 hours to confirm stability, and simultaneously update the fault diagnosis priori database, for example, add fault characteristics (waveform / temperature / vibration fingerprint) to the fault diagnosis priori database, and optimize the Bayesian prior probability model.

[0084] It should be noted that, in order to improve the application value of the server single board in extreme environments such as aerospace, the embodiments of the present application can perform the following technical evolution: chip-level integrated monitoring is realized through silicon optical interconnection and 3D packaging technology, quantum sensors are introduced to extend the prediction window to thousands of hours, AI is combined to realize nanosecond-level repair strategy optimization, the server single board can be expanded into a data center-level health management network, and self-repairing materials are expected to be developed, and finally the "zero downtime" goal is achieved.

[0085] In summary, the embodiments of the present application can achieve the following beneficial effects:

[0086] (1) Active prediction capability: defect positioning with ±0.3mm precision is realized through miniaturized TDR monitoring circuit, combined with multi-modal data analysis, false positive rate is reduced to 1.8%, and BGA solder joint crack and other faults can be predicted 732 hours in advance;

[0087] (2) Non-destructive self-healing function: GaN HEMT switching matrix is adopted to complete fault channel switching at nanosecond level, signal integrity degradation is controlled within 0.5dB, and zero interruption of PCIe 5.0 / 6.0 and other high-speed link services is ensured;

[0088] (3) Intelligent diagnosis system: precise identification of single / complex faults is realized through probabilistic analysis (confidence output), and full automation is realized at 4.3W ultra-low power consumption, this system can be directly deployed in existing server architecture, single board downtime time is shortened from hours to microseconds, chip-level reliability guarantee is provided for key scenarios such as finance and autonomous driving, and data center TCO can be reduced by more than 15%.

[0089] According to the server single board fault repair method provided in the embodiment of the present application, a time domain reflectometer is used to scan a plurality of target signal links of a server single board, new impedance values and new reflection waveform features in the scanning results are compared with initial impedance values and initial reflection waveform features respectively, and at least one fault link of the server single board is determined when the comparison results are inconsistent. Meanwhile, multi-modal analysis is performed in combination with running state data of the server single board, a fault level of the at least one fault link of the server single board is determined, and a fault repair strategy is generated correspondingly, so as to switch the fault link to a backup link. The problems such as single detection dimension, composite fault monitoring blind area and high-frequency signal monitoring failure in the related art are solved, and through time domain reflectometer monitoring, multi-modal data fusion analysis and redundancy switching, fault prediction, accurate positioning and lossless self-repair of the target signal link of the server single board are realized.

[0090] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, of course, it can also be realized by hardware, but in many cases the former is a better embodiment.

[0091] The embodiment of the present application also provides a server single board fault repair device.

[0092] Figure 6 is a block diagram of a server single board fault repair device according to an embodiment of the present application.

[0093] As shown in Figure 6 , the server single board fault repair device 10 comprises a comparison module 100, a multi-modal analysis module 200 and a link switching module 300.

[0094] The comparison module 100 is configured to scan a plurality of target signal links of a server single board based on a preset scanning period, and compare new impedance values and new reflection waveform features in the scanning results with initial impedance values and initial reflection waveform features in a pre-constructed fault diagnosis prior database one by one, and determine at least one fault link of the server single board when the comparison results are inconsistent.

[0095] The multi-modal analysis module 200 is configured to perform multi-modal analysis by using a preset multi-modal intelligent diagnosis model based on the at least one fault link and running state data of the server single board, and determine a fault level of the at least one fault link of the server single board based on the analysis results.

[0096] The link switching module 300 is configured to generate a corresponding fault repair strategy according to the fault level of the at least one fault link, and switch the fault link of the target signal link of the server single board to a backup link based on the fault repair strategy.

[0097] According to one embodiment of the present application, before the new impedance value and the new reflection waveform feature in the scanning result are compared with the initial impedance value and the initial reflection waveform feature in the pre-constructed fault diagnosis prior database respectively, the comparison module 100 further comprises:

[0098] The first judging unit is configured to judge whether the server board satisfies an initialization condition.

[0099] The first scanning unit is configured to, if the server board satisfies the initialization condition, scan a plurality of target signal links of the server board by using a time domain reflectometer module, and record an initial impedance value and an initial reflection waveform feature of the server board.

[0100] The constructing unit is configured to construct a fault diagnosis prior database based on the initial impedance value and the initial reflection waveform feature.

[0101] According to one embodiment of the present application, the comparison module 100 comprises:

[0102] The second judging unit is configured to judge whether the server board satisfies a target signal link scanning trigger condition.

[0103] The second scanning unit is configured to, if the server board satisfies the target signal link scanning trigger condition, scan a plurality of target signal links of the server board by using a time domain reflectometer module.

[0104] According to one embodiment of the present application, the second judging unit comprises:

[0105] The receiving sub-unit is configured to receive an impedance change rate of at least one fault link, temperature data of a temperature sensor in the server board, and vibration data of a vibration sensor in the server board.

[0106] The judging sub-unit is configured to judge whether the impedance change rate is greater than a first target value for a continuous target number of times, or whether the temperature data of the temperature sensor is greater than a preset temperature threshold, or whether an acceleration of the vibration sensor is greater than a second target value.

[0107] The determining sub-unit is configured to, if the impedance change rate is greater than the first target value for the continuous target number of times, or the temperature data of the temperature sensor is greater than the preset temperature threshold, or the acceleration of the vibration sensor is greater than the second target value, determine that the server board satisfies the target signal link scanning trigger condition.

[0108] According to one embodiment of the present application, the multi-modal analysis module 200 comprises:

[0109] The identification unit is configured to identify a fault level of at least one fault link in the server board by using a machine learning aided diagnosis technology based on a rate of impedance change of the at least one fault link, temperature data of the server board, and vibration data of the server board.

[0110] According to an embodiment of the present application, the multi-modal analysis module 200 comprises:

[0111] The computing unit is configured to calculate the rate of impedance change of the at least one fault link.

[0112] The third judging unit is configured to judge whether there is a target rate of impedance change greater than or equal to a third target value in the rates of impedance change of the plurality of fault links.

[0113] The first determining unit is configured to start a fault diagnosis process and determine a target fault link corresponding to the target rate of impedance change if there is a target rate of impedance change greater than or equal to the third target value in the rates of impedance change of the plurality of fault links.

[0114] The second determining unit is configured to extract a reflected waveform feature of the target fault link, and perform time domain analysis and frequency domain analysis on the extracted reflected waveform feature respectively, and determine a time-frequency domain feature of the target fault link according to the analysis results.

[0115] The multi-modal analysis unit is configured to perform multi-modal analysis based on the time-frequency domain feature of the target fault link, the temperature data of the server board, and the vibration data of the server board to obtain a fault feature vector of the server board.

[0116] The reasoning unit is configured to perform probabilistic reasoning on the fault feature vector by using a preset reasoning engine rule to obtain a fault type of the at least one fault link in the server board and a confidence degree corresponding to the fault type.

[0117] According to an embodiment of the present application, the multi-modal analysis module 200 comprises:

[0118] The first determining unit is configured to determine that the fault level of the fault link is a first fault level if the rate of impedance change of the fault link is less than a fourth target value.

[0119] The second determining unit is configured to determine that the fault level of the fault link is a second fault level if the rate of impedance change of the fault link is less than the third target value and greater than or equal to the fourth target value.

[0120] The third determining unit is configured to determine that the fault level of the fault link is a third fault level if the rate of impedance change of the fault link is greater than or equal to the third target value, or a confidence degree of a fault type corresponding to the fault link is greater than or equal to a fifth target value.

[0121] According to one embodiment of the present application, the link switching module 300 comprises:

[0122] The recording unit is configured to directly record a fault log of the fault link if the impedance change rate of the fault link is less than a fourth target value.

[0123] The first switching unit is configured to activate the redundancy switching matrix based on a fault recovery strategy, disconnect the fault link of the target signal link, and switch the fault link to the backup link if the impedance change rate of the fault link is greater than or equal to a third target value.

[0124] The second switching unit is configured to determine whether the impedance change rate of the fault link meets a preset threshold value; if the impedance change rate of the fault link meets the preset threshold value, directly remove the fault link from the current working path and switch the fault link to the backup link, otherwise, mark the fault link as a failure state.

[0125] According to one embodiment of the present application, the link switching module 300 further comprises:

[0126] The control unit is configured to control the target link to run from the first standard to the second standard if the impedance change rate of the fault link is greater than or equal to a fourth target value and the impedance change rate of the fault link is less than a third target value, and generate a corresponding alarm prompt.

[0127] In summary, the features of the embodiments of the server board fault prediction and repair device can be referred to the related descriptions of the embodiments of the server board fault prediction and repair method, which will not be repeated here.

[0128] The embodiments of the present application also provide an electronic device, which can comprise:

[0129] The memory 701, the processor 702, and the computer program stored in the memory 701 and executable on the processor 702.

[0130] The processor 702 executes the program to implement the server board fault repair method provided in the above embodiments.

[0131] Further, the electronic device further comprises:

[0132] The communication interface 703 is configured to communicate between the memory 701 and the processor 702.

[0133] The memory 701 is configured to store the computer program executable on the processor 702.

[0134] The memory 701 can include a high-speed RAM memory, and can also include a non-volatile memory, such as at least one disk memory.

[0135] If the memory 701, the processor 702 and the communication interface 703 are implemented independently, the communication interface 703, the memory 701 and the processor 702 can be connected with each other through a bus and complete communication with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, Figure 7 In the figure, only one thick line is used to represent the bus, but it does not mean that there is only one bus or only one type of bus.

[0136] Optionally, in a specific implementation, if the memory 701, the processor 702 and the communication interface 703 are integrated on a chip, the memory 701, the processor 702 and the communication interface 703 can complete communication with each other through an internal interface.

[0137] The processor 702 can be a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present application.

[0138] Embodiments of the present application also provide a computer readable storage medium, which stores a computer program, and the computer program is configured to execute steps in any of the above-mentioned server single board fault repairing method embodiments when running.

[0139] In an example embodiment, the above-mentioned computer readable storage medium can include, but is not limited to, a U disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0140] Embodiments of the present application also provide a computer program product, which includes a computer program, and the computer program is executed by a processor to implement steps in any of the above-mentioned server single board fault repairing method embodiments.

[0141] Those skilled in the art will further realize that the mere concepts, teachings, and embodiments described herein are merely meant to provide an enabling description of the claimed invention and are not intended to limit the scope of the claimed invention to these embodiments. Therefore, embodiments described herein are not meant to be limiting, but merely representative. Further, the routines executed to implement the embodiments of the invention, individually or collectively, need not be limited to any specific combination of hardware and software. Various embodiments can also be implemented using more conventional components, as well as hardware and software that are not expressly identified herein. To clearly illustrate this interchangeability of hardware and software, various embodiments have been depicted in the form of specific examples. Those skilled in the art will appreciate that the concepts and teachings described herein are applicable to a variety of other platforms and applications. Accordingly, the present invention is not intended to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the claims, the principles and the practices described herein.

[0142] The above has carried out the detailed introduction to the method for repairing the fault of the server single board provided by the present application. The principle and the implementation mode of the present application are described by applying the specific examples in the present text. The above example description is only for helping to understand the method of the present application and its core idea. It should be pointed out that, for the ordinary skilled in the art, some improvements and modifications can be made to the present application without departing from the principle of the present application. These improvements and modifications also fall into the protection scope of the claims of the present application.

Claims

1. A method for repairing a failure of a server single board, characterized by, The method comprises the following steps: Based on the preset scanning period, scan the multiple target signal links of the server single board, and compare the new impedance value and the new reflection waveform feature in the scanning result with the initial impedance value and the initial reflection waveform feature in the pre-constructed fault diagnosis prior database one by one, and when the comparison result is inconsistent, determine at least one fault link of the server single board; Based on the at least one fault link and the running state data of the server single board, use a preset multi-modal intelligent diagnosis model for multi-modal analysis, and determine the fault level of the at least one fault link in the server single board based on the analysis result; According to the fault level of the at least one fault link, generate a corresponding fault repair strategy, and based on the fault repair strategy, switch the fault link of the target signal link in the server single board to a backup link; Wherein, based on the at least one fault link and the running state data of the server single board, using a preset multi-modal intelligent diagnosis model for multi-modal analysis, and determining the fault level of the at least one fault link in the server single board based on the analysis result, comprising: based on the impedance change rate of at least one fault link, the temperature data of the server single board, the vibration data of the server single board, using machine learning assisted diagnosis technology to identify the fault level of at least one fault link in the server single board.

2. The method of claim 1, wherein, Before comparing the new impedance value and the new reflection waveform feature in the scanning result with the initial impedance value and the initial reflection waveform feature in the pre-constructed fault diagnosis prior database one by one, it also includes: Determine whether the server single board meets the initialization condition; If the server single board meets the initialization condition, use the time domain reflectometer module to scan the multiple target signal links of the server single board, and record the initial impedance value and the initial reflection waveform feature of the server single board; Based on the initial impedance value and the initial reflection waveform feature, construct a fault diagnosis prior database.

3. The method of claim 1, wherein the server board is a server board of a server. The method comprises the following steps: Determine whether the server single board meets the target signal link scanning trigger condition; If the server single board meets the target signal link scanning trigger condition, use the time domain reflectometer module to scan the multiple target signal links of the server single board.

4. The method of claim 3, wherein the server board is a server board of a server. The method comprises the following steps: Receive the impedance change rate of the at least one fault link, the temperature data of the temperature sensor in the server single board, and the vibration data of the vibration sensor in the server single board; Determine whether the impedance change rate is greater than a first target value for a continuous target number of times, or whether the temperature data of the temperature sensor is greater than a preset temperature threshold, or whether the acceleration of the vibration sensor is greater than a second target value; If the impedance change rate is greater than the first target value for a continuous target number of times, or the temperature data of the temperature sensor is greater than the preset temperature threshold, or the acceleration of the vibration sensor is greater than the second target value, it is determined that the server single board meets the target signal link scanning trigger condition.

5. The method of claim 1, wherein the server board is a server board of a server. Based on the at least one failed link and the running state data of the server board, a preset multi-modal intelligent diagnosis model is used for multi-modal analysis, including: calculating the impedance change rate of at least one failed link; determining whether there is a target impedance change rate greater than or equal to a third target value in the impedance change rate of multiple failed links; if there is a target impedance change rate greater than or equal to the third target value in the impedance change rate of multiple failed links, starting a fault diagnosis process and determining the target fault link corresponding to the target impedance change rate; extracting the reflection waveform features of the target fault link, and performing time domain analysis and frequency domain analysis on the extracted reflection waveform features respectively, and determining the time-frequency domain features of the target fault link according to the analysis results; based on the time-frequency domain features of the target fault link, the temperature data of the server board and the vibration data of the server board, multi-modal analysis is performed to obtain the fault feature vector of the server board; using a preset inference engine rule to perform probability inference on the fault feature vector to obtain the fault type of at least one failed link in the server board and the confidence of the fault type.

6. The method of claim 1, wherein the server board is a server board of a server. The fault level of at least one failed link in the server board is determined based on the analysis results, including: if the impedance change rate of the failed link is less than a fourth target value, the fault level of the failed link is determined to be a first fault level; if the impedance change rate of the failed link is less than a third target value and greater than or equal to the fourth target value, the fault level of the failed link is determined to be a second fault level; if the impedance change rate of the failed link is greater than or equal to the third target value, or the confidence of the fault type corresponding to the failed link is greater than or equal to a fifth target value, the fault level of the failed link is determined to be a third fault level.

7. The method of claim 1, wherein the server board is a server board of a server. According to the fault level of the at least one failed link, a corresponding fault repair strategy is generated, and based on the fault repair strategy, the failed link of the target signal link in the server board is switched to a backup link, including: if the impedance change rate of the failed link is less than a fourth target value, the fault log of the failed link is directly recorded; if the impedance change rate of the failed link is greater than or equal to a third target value, the redundant switching matrix is activated based on the fault repair strategy, the failed link of the target signal link is disconnected, and the failed link is switched to a backup link; determining whether the impedance change rate of the failed link meets a preset threshold; if the impedance change rate of the failed link meets the preset threshold, the failed link is directly removed from the current working path and switched to a backup link, otherwise, the failed link is marked as a failure state.

8. The method of claim 7, wherein the server board is a server board of a server system. According to the fault level of the at least one failed link, a corresponding fault repair strategy is generated, and based on the fault repair strategy, the failed link of the target signal link in the server board is switched to a backup link, including: If the impedance change rate of the faulty link is greater than or equal to a fourth target value and the impedance change rate of the faulty link is less than the third target value, the target link is controlled to run from the first standard to the second standard, and a corresponding alarm reminder is generated.

9. An electronic device, comprising: Comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the program to implement the steps of the method for repairing faults of a server single board according to any one of claims 1 to 8.

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