Hidden data security storage method, device and system based on mode authentication

Abstract

The invention provides a hidden data security storage method, device and system based on mode authentication, and the method comprises the steps: reading verification data generated by a complementary pair storage unit based on a physical unclonable parameter through a reading module if a mode type is an authentication mode, the complementary pair storage unit comprises a first magnetic tunnel junction and a second magnetic tunnel junction; and if the mode type is a non-authentication mode, switching the resistance state or the magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction into a hidden state. According to the method, the current mode type can be judged, the verification data are hidden in the non-authentication mode, the verification data can be output only in the authentication mode, and the safety of the verification data is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device and system for securely storing hidden data based on pattern authentication. Background Art

[0002] The Physical Unclonable Function (PUF) acts as the "fingerprint" of a security chip. It extracts random process variations during chip manufacturing, such as variations in feature scale caused by lithography and fluctuations in threshold voltage due to random doping, to generate a secret key with properties such as randomness, uniqueness, and unclonability. This makes it suitable for improving chip security. In practical applications, a PUF exists as a stimulus-response pair. Given an input stimulus, each PUF instance generates a corresponding output based on its physical characteristics.

[0003] In terms of information security and hardware security, physically unclonable functions (PUFs) provide a hardware-level security mechanism for generating encryption keys, device authentication, and anti-counterfeiting data. Because PUF responses are unique and unclonable, they are more difficult for attackers to copy or tamper with than traditional software-based security measures. However, existing PUF protocols require stable output of PUF responses, which poses a risk of side-channel leakage during non-authentication phases. Summary of the Invention

[0004] One object of the present application is to provide a method for securely storing hidden data based on pattern authentication, which determines the current pattern type, hides verification data in non-authentication mode, and outputs verification data only in authentication mode, thereby improving the security of verification data. Another object of the present application is to provide a device for securely storing hidden data based on pattern authentication. Yet another object of the present application is to provide a system for securely storing hidden data based on pattern authentication.

[0005] To achieve the above objectives, the present application discloses a method for securely storing hidden data based on pattern authentication, comprising:

[0006] If the mode type is the authentication mode, reading verification data generated by a complementary pair of storage units based on a physical unclonable parameter through a reading module, the complementary pair of storage units including a first magnetic tunnel junction and a second magnetic tunnel junction;

[0007] If the mode type is a non-authentication mode, the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction is switched to a hidden state.

[0008] Optionally, reading verification data generated by the complementary pair of storage units based on the physical unclonable parameter by the reading module includes:

[0009] Writing the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in the complementary pair of memory cells as being the same;

[0010] Comparing the response difference between the first magnetic tunnel junction and the second magnetic tunnel junction under the action of a read signal based on a physical unclonable parameter to obtain the verification data; or,

[0011] Writing the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in the complementary pair of memory cells as being the same;

[0012] Comparing the response difference between the first magnetic tunnel junction and the second magnetic tunnel junction under the action of a read signal based on a physical unclonable parameter to obtain the verification data and write the verification data back to the complementary pair of storage cells;

[0013] The verification data stored in the complementary pair of memory cells is read.

[0014] Optionally, switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state includes:

[0015] Writing the storage data to be stored in the first magnetic tunnel junction and the second magnetic tunnel junction; or,

[0016] Random data or preset data is written into the first magnetic tunnel junction and the second magnetic tunnel junction.

[0017] Optionally, the first magnetic tunnel junction and the second magnetic tunnel junction are provided on the spin-orbit moment layer;

[0018] The method further includes an initialization process before switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state:

[0019] Select a target complementary pair of memory cells whose verification data is a preset value, and input a SOT initialization signal to the spin-orbit moment layer of the magnetic tunnel junction of the target complementary pair of memory cells, wherein the SOT initialization signal can change the polarity of the magnetic tunnel junction reference layer; or

[0020] A target complementary pair of memory cells having verification data as a preset value is selected, and an STT initialization signal is input to the spin-orbit moment layer of the magnetic tunnel junction of the target complementary pair of memory cells. The STT initialization signal can change the polarity of the magnetic tunnel junction reference layer.

[0021] Optionally, switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state includes:

[0022] Inputting STT write signals to the first magnetic tunnel junction and the second magnetic tunnel junction respectively, so that the two magnetic tunnel junctions in all the complementary pair storage cells store the same data in the form of complementary pairs; or

[0023] A SOT write signal is inputted to the first magnetic tunnel junction and the second magnetic tunnel junction respectively, so that the two magnetic tunnel junctions in all the complementary pair memory cells store the same data in the form of a complementary pair.

[0024] Optionally, reading verification data generated by the complementary pair of storage units based on the physical unclonable parameter by the reading module includes:

[0025] Inputting a SOT recovery signal to the spin-orbit moment layer through a reading module makes the magnetic moment direction of the free layer of the magnetic tunnel junction in all complementary pairs of storage cells opposite to the magnetic moment direction of the free layer of the magnetic tunnel junction in the complementary pairs of storage cells after self-writeback corresponding to the verification data being a preset value and the same as the magnetic moment direction of the free layer of the magnetic tunnel junction in the complementary pairs of storage cells after self-writeback corresponding to the verification data being a non-preset value, and feeding back correct verification data when reading verification data; or

[0026] An STT recovery signal is input to the spin-orbit moment layer through a reading module to make the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in all complementary pairs of storage cells the same, and verification data generated by the complementary pairs of storage cells based on physical unclonable parameters is read.

[0027] Optionally, the first magnetic tunnel junction and the second magnetic tunnel junction are respectively provided on two spin-orbit moment layers; or,

[0028] The first magnetic tunnel junction and the second magnetic tunnel junction are arranged on the same spin-orbit moment layer, and the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction can be switched to the same resistance state or opposite resistance states at the same time.

[0029] Optionally, when the first magnetic tunnel junction and the second magnetic tunnel junction are provided on the same spin-orbit moment layer;

[0030] The spin-orbit moment layer includes three signal transmission terminals, which are respectively arranged at two ends of the spin-orbit moment layer and a position on the spin-orbit moment layer corresponding to a position between the first magnetic tunnel junction and the second magnetic tunnel junction, and the first magnetic tunnel junction and the second magnetic tunnel junction are arranged in the same direction; or;

[0031] The spin-orbit moment layer includes two signal transmission channels in the transverse direction and the longitudinal direction of the spin-orbit moment layer, and the first magnetic tunnel junction and the second magnetic tunnel junction are symmetrically arranged.

[0032] The present application also discloses a hidden data security storage device based on pattern authentication, which is configured to read verification data generated by a complementary pair of storage units based on physical unclonable parameters through a reading module if the mode type is an authentication mode, and the complementary pair of storage units includes a first magnetic tunnel junction and a second magnetic tunnel junction; if the mode type is a non-authentication mode, the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction is switched to a hidden state.

[0033] The present application also discloses a hidden data security storage system based on pattern authentication, including the hidden data security storage device based on pattern authentication and a magnetic unit as described above, wherein the magnetic unit includes a complementary pair of storage units, and the complementary pair of storage units includes a first magnetic tunnel junction and a second magnetic tunnel junction.

[0034] In the present invention's method for secure hidden data storage based on pattern authentication, when the mode type is authentication mode, a reading module reads verification data generated by the first and second magnetic tunnel junctions in the complementary pair of storage cells based on physically unclonable parameters. Due to static entropy sources such as magnetic device process variations, the read results of different complementary pairs of storage cells should be random. When the mode type is non-authentication mode, the resistive or magnetic state of the first and second magnetic tunnel junctions is switched to a hidden state. At this point, the complementary pair of storage cells no longer responds to external read results based on differences in the physically unclonable parameters, and external read operations cannot receive a correct response. This achieves the purpose of hiding the verification data based on the physically unclonable parameters and improves the security of the verification data. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0036] Figure 1 A flowchart showing a specific embodiment of the hidden data secure storage method of the present application;

[0037] Figure 2 One of the flow charts showing a specific embodiment S100 of the hidden data secure storage method of the present application;

[0038] Figure 3 The second flowchart of the specific embodiment S100 of the hidden data secure storage method of the present application is shown;

[0039] Figure 4One of the schematic diagrams showing the arrangement of complementary pairs of storage units in a specific embodiment of the hidden data secure storage method of the present application;

[0040] Figure 5 A second schematic diagram showing the arrangement of complementary pairs of storage units in a specific embodiment of the hidden data secure storage method of the present application;

[0041] Figure 6 Schematic diagram 3 showing the arrangement of complementary pairs of storage units in a specific embodiment of the hidden data secure storage method of the present application;

[0042] Figure 7a to Figure 7e One of the schematic diagrams showing the magnetic tunnel junction arrangement of a specific embodiment of the hidden data secure storage method of the present application;

[0043] Figure 8 and Figure 9 A schematic diagram showing a spin-orbit moment layer in a specific embodiment of the hidden data secure storage method of the present application;

[0044] Figure 10 A schematic diagram showing the structure of a computer device including an embodiment of the hidden data secure storage method of the present application is shown.

[0045] Reference numerals:

[0046] D1, spin-orbit moment layer, MTJ1, first magnetic tunnel junction, MTJ2, second magnetic tunnel junction, B1, free layer, B2, barrier layer, B3, reference layer. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0048] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0049] In this application, terms such as "upper," "lower," "left," "right," "front," "back," "top," "bottom," "inner," "outer," "center," "vertical," "horizontal," "transverse," and "longitudinal" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are primarily intended to better describe this application and its embodiments and are not intended to limit the devices, elements, or components indicated to having a specific orientation, or to being constructed or operated in a specific orientation.

[0050] Positional relationships such as “parallel” or “perpendicular” include not only completely “parallel” or “perpendicular” positional relationships, but also positional relationships with angular deviations relative to completely “parallel” or “perpendicular” within a preset deviation range.

[0051] Furthermore, some of the above terms may be used to express other meanings besides indicating a position or location. For example, the term "on" may also be used to indicate a dependency or connection in certain circumstances. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0052] Furthermore, the terms "installed," "disposed," "provided with," "connected," "connected," and "socketed" should be interpreted broadly. For example, they can refer to fixed connections, removable connections, or integral structures; mechanical connections or electrical connections; direct connections, indirect connections through an intermediary, or internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0053] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in this application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0054] According to one aspect of the present application, this embodiment discloses a method for securely storing hidden data based on pattern authentication. Figure 1 As shown, in this embodiment, the method includes:

[0055] S100: If the mode type is the authentication mode, verification data generated by a complementary pair of memory cells based on a physical unclonable parameter is read by a reading module, where the complementary pair of memory cells includes a first magnetic tunnel junction MTJ1 and a second magnetic tunnel junction MTJ2.

[0056] S200: If the mode type is a non-authentication mode, the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 is switched to a hidden state.

[0057] In the present invention's method for secure hidden data storage based on pattern authentication, when the mode type is authentication mode, a reading module reads verification data generated based on physical unclonable parameters by the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 in the complementary pair of storage cells. Due to static entropy sources such as magnetic device process deviations, the read results of different complementary pairs of storage cells should be random. When the mode type is non-authentication mode, the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 is switched to a hidden state. At this time, the complementary pair of storage cells no longer responds to external read results based on differences in the physical unclonable parameters, and external read operations cannot obtain a correct response, thereby achieving the purpose of hiding the verification data based on the physical unclonable parameters and improving the security of the verification data.

[0058] In an optional embodiment, if Figure 2 As shown, the S100 reads verification data generated by the complementary pair of storage units based on the physical unclonable parameters through the reading module, including:

[0059] S111: The resistance states of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 in the complementary pair of memory cells are written to be the same.

[0060] S112: Compare the response difference between the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 under the action of a read signal based on a physical unclonable parameter to obtain the verification data.

[0061] Specifically, since the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are usually manufactured through the same process flow, the difference in physical unclonable parameters between the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 due to process deviation may be small, resulting in a smaller reading margin of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2, and further leading to misreading of verification data.

[0062] Based on this, when obtaining verification parameters, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are first written to the same resistance state, and at the same time are in a high resistance state or a low resistance state. Then, the difference in the change of the read signal after the read signal is input between the magnetic tunnel junctions depends on the difference in the physical unclonable parameters of the magnetic tunnel junctions. The verification data can be obtained by comparing the response difference of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 based on the physical unclonable parameters under the action of the read signal.

[0063] In another optional embodiment, as Figure 3 As shown, the S100 reads verification data generated by the complementary pair of storage units based on the physical unclonable parameters through the reading module, including:

[0064] S121: The resistance states of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 in the complementary pair of memory cells are written to be the same.

[0065] S122: Compare the response difference between the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 under the action of a read signal based on a physical unclonable parameter to obtain the verification data and write it back to the complementary pair of memory cells.

[0066] S123: Read the verification data stored in the complementary pair of storage units.

[0067] In this optional embodiment, in order to improve the accuracy of subsequent verification data reading, the generated verification data can be written back to the complementary pair of storage units, and then the verification data is determined by reading the resistance state of the data stored in the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to ensure the accuracy of the verification data reading.

[0068] For example, if the verification data of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 based on the physical unclonable parameters read by the reading module is "0", it means that the magnetic resistance of the first magnetic tunnel junction MTJ1 is smaller than that of the second magnetic tunnel junction MTJ2 under the same resistance state. The data stored in the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can be preset to be "0" and "1" respectively to represent the verification data "0", so that the data stored in the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are respectively "1" and "0" to represent the verification data "1". When the verification data is "0", "0" and "1" are written back to the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 respectively, and the corresponding verification data can be determined by subsequently reading the data stored in the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2.

[0069] It is understood that the magnetic tunnel junction includes a reference layer B3, a barrier layer B2, and a free layer B1 arranged in sequence from top to bottom. The bottom surface of the free layer B1 is fixedly connected to the spin-orbit moment layer D1. The resistance of the magnetic tunnel junction depends on the magnetization direction of the reference layer B3 and the free layer B1, and the magnetization direction of the free layer B1 and the reference layer B3 is determined by the direction of the magnetic moment. Among them, when the magnetic moment directions of the reference layer B3 and the free layer B1 are the same, the magnetic tunnel junction is in a low resistance state (low resistance state); when the magnetic moment directions of the reference layer B3 and the free layer B1 are opposite, the magnetic tunnel junction is in a high resistance state (high resistance state). The high resistance state and low resistance state of the magnetic tunnel junction can be pre-assigned to different data. For example, the high resistance state can be pre-assigned to data "1" and the low resistance state can be pre-assigned to data "0". Then, a current or voltage is input to the magnetic tunnel junction through a reading circuit. Based on the change in current or voltage, it can be determined whether the resistance state of the magnetic tunnel junction is a high resistance state or a low resistance state. Based on the resistance state of the magnetic tunnel junction, it can be determined whether the data stored in the magnetic tunnel junction is "1" or "0". Among them, determining the range of the high resistance state and the low resistance state is a common technical means in the field. Those skilled in the art can determine the resistance value range of the high resistance state and the low resistance state of the magnetic tunnel junction based on common knowledge, and this application will not elaborate on it here.

[0070] In an optional embodiment, the step S200 of switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state includes:

[0071] S210 : Writing the storage data to be stored into the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 .

[0072] Specifically, it can be understood that the two magnetic tunnel junctions of the complementary pair of storage units also have the function of data storage. In the non-authentication mode, the verification data is no longer stored in the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2. The complementary pair of storage units can be used to store the data that needs to be stored, realizing the multiple functions of PUF output verification data and data storage.

[0073] In another optional embodiment, the step S200 of switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state includes:

[0074] S220: Writing random data or preset data into the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2.

[0075] Specifically, the two magnetic tunnel junctions of the complementary pair of storage units also have the function of data storage. In the non-authentication mode, in order to hide the verification data, random data or preset data can be written into the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2, so that the reading instruction of the verification data cannot read the correct verification data, thereby improving the security of the verification data.

[0076] In order to hide the verification data, the data written can be random data, that is, random data generated in real time, or preset data, that is, other data that is preset but not verification data. In the non-authentication mode, the preset data is written to the complementary pair storage unit, which is used to write the complementary pair storage unit to hide the correct verification data.

[0077] In an optional embodiment, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are provided on the spin-track moment layer D1. The method further includes an initialization process before switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state at S200:

[0078] S231: Select a target complementary pair memory cell whose verification data is a preset value, and input a SOT initialization signal to the spin-orbit moment layer D1 of the magnetic tunnel junction of the target complementary pair memory cell, wherein the SOT initialization signal can change the polarity of the magnetic tunnel junction reference layer B3.

[0079] Specifically, in order to hide the verification data, the magnetism of the magnetic layers of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can be interfered with, and the complementary pair storage unit whose verification data is a preset value is selected as the target complementary pair storage unit. Before hiding the verification data in the target complementary pair storage unit, the magnetic moment direction of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 reference layer B3 of the target complementary pair storage unit is flipped through the SOT initialization signal, so that in the authentication mode, the target complementary pair storage unit with the reference layer B3 flipped in the initialization phase can be distinguished from other complementary pair storage units through the recovery signal, and the verification data that all complementary pair storage units can respond to can be restored to accurate verification data, which can prevent the leakage of verification data in the non-authentication mode and can also correctly obtain the verification data in the authentication mode.

[0080] For example, in a specific example, when the storage system includes magnetic cells arranged in an array, a read module obtains the resistance comparison result of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 of the complementary pair of storage cells in each magnetic cell. If the resistance of the first magnetic tunnel junction MTJ1 is less than or equal to the resistance of the second magnetic tunnel junction MTJ2, the corresponding verification data is defined as "0". Conversely, if the resistance of the first magnetic tunnel junction MTJ1 is greater than the resistance of the second magnetic tunnel junction MTJ2, the corresponding verification data is "1". Based on all the verification data and their positions in the array, a verification data map can be obtained.

[0081] Optionally, it can be defined that when the magnetic moments of the free layer B1 and the reference layer B3 are in the same direction as the low resistance state, the corresponding data is stored "0", and when the magnetic moments of the free layer B1 and the reference layer B3 are in opposite directions as the high resistance state, the corresponding data is stored "1".

[0082] After reading the verification data generated by the complementary pair of storage cells based on the physical unclonable parameters through the read module, the verification data can be written back to the complementary pair of storage cells to determine the verification data through the complementary pair of data stored by the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2. For example, after writing back, when the verification data is "0", the first magnetic tunnel junction MTJ1 can be written to a low resistance state, corresponding to the storage data "0", and the second magnetic tunnel junction MTJ2 can be written to a high resistance state, corresponding to the storage data "1". Conversely, when the verification data is "1", the first magnetic tunnel junction MTJ1 can be written to a high resistance state, corresponding to the storage data "1", and the second magnetic tunnel junction MTJ2 can be written to a low resistance state, corresponding to the storage data "0".

[0083] It should be noted that the correspondence between verification data and complementary pair data, as well as the high and low resistance states of the magnetic tunnel junction and the stored data can be set by those skilled in the art according to actual needs. This is only used as an example and is not limited in this application.

[0084] Assume that when the magnetic tunnel junction is in a low-resistance state, the magnetic moment directions of the free layer B1 and the reference layer B3 are parallel and face the first direction; when the magnetic tunnel junction is in a high-resistance state, the magnetic moment directions of the free layer B1 and the reference layer B3 are antiparallel, the reference layer B3 faces the first direction, and the free layer B1 faces the opposite second direction.

[0085] During the initialization phase, when the preset value is 1, an SOT initialization signal is input to the magnetic tunnel junctions of the complementary pair of memory cells whose verification data in the map is "1." This causes the magnetic moments of the reference layers B3 of the magnetic tunnel junctions of the target complementary pair of memory cells whose verification data is "1" to change to the second direction, while the magnetic moments of the reference layers B3 of the magnetic tunnel junctions of the target complementary pair of memory cells whose verification data is "0" remain in the first direction.

[0086] Based on the same principle, in another embodiment, the method further includes an initialization process before switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state at S200:

[0087] S232: Select a target complementary pair of memory cells whose verification data is a preset value, and input an STT initialization signal to the spin-orbit moment layer D1 of the magnetic tunnel junction of the target complementary pair of memory cells, wherein the STT initialization signal can change the polarity of the magnetic tunnel junction reference layer B3.

[0088] In this embodiment, the STT initialization signal also flips the magnetic moment direction of the reference layer B3 in the target complementary pair memory cell whose verification data is the preset value. The difference is that the SOT initialization signal is input through the spin-orbit moment layer D1 corresponding to the magnetic tunnel junction, changing the magnetic moment direction of the reference layer B3 via the SOT method. The STT initialization signal, on the other hand, is input in the longitudinal direction through the magnetic tunnel junction, changing the magnetic moment direction of the reference layer B3 via the STT method.

[0089] In an optional embodiment, switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state includes:

[0090] S241: Inputting STT write signals to the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 respectively, so that the two magnetic tunnel junctions in all the complementary pair storage cells store the same data in the form of complementary pairs.

[0091] Specifically, during the hidden phase, the verification data corresponding to all complementary pairs of memory cells is written to "0" or "1" via the STT write signal. That is, in all complementary pairs of memory cells, the first magnetic tunnel junction MTJ1 is in a low-resistance state and the second magnetic tunnel junction MTJ2 is in a high-resistance state, or in all complementary pairs of memory cells, the first magnetic tunnel junction MTJ1 is in a high-resistance state and the second magnetic tunnel junction MTJ2 is in a low-resistance state. At this point, in the non-authentication mode, all verification data obtained by reading the map feedback is either "0" or "1." The correct map cannot be read in non-authentication mode, thus achieving the purpose of hiding the actual verification data map.

[0092] Based on the same principle, in another embodiment, switching the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state includes:

[0093] S242: Inputting SOT write signals to the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 respectively, so that the two magnetic tunnel junctions in all the complementary pair storage cells store the same data in the form of complementary pairs.

[0094] In this embodiment, similar to S241, in the hidden stage, the verification data corresponding to all complementary pairs of storage cells are written as "0" or "1" through the SOT write signal, so that in the non-authentication mode, all verification data obtained by reading the map feedback are "0" or "1". The correct map cannot be read in the non-authentication mode, thereby achieving the purpose of hiding the actual verification data map.

[0095] In an optional embodiment, the step S100 of reading verification data generated by the complementary pair storage unit based on the physical unclonable parameter by the reading module includes:

[0096] S121: Input a SOT recovery signal to the spin-orbit moment layer D1 through a reading module so that the magnetic moment direction of the magnetic tunnel junction free layer B1 in all complementary pairs of storage cells is opposite to the magnetic moment direction of the magnetic tunnel junction free layer B1 in the complementary pairs of storage cells after self-write back corresponding to the verification data being a preset value, and is the same as the magnetic moment direction of the magnetic tunnel junction free layer B1 in the complementary pairs of storage cells after self-write back corresponding to the verification data being a non-preset value, and correct verification data is fed back when the verification data is read.

[0097] Specifically, a high-intensity SOT initialization signal is input, for example, a SOT initialization signal of 4 times the SOT write voltage, to change the polarity of the magnetic tunnel junction reference layer B3, causing the direction of the magnetic moment of the reference layer B3 to flip. This causes the data generated by the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 based on the physical unclonable parameters to no longer be verification data, thereby interfering with the reading of the verification data in the non-authentication mode and hiding the verification data. When the authentication mode needs to be restored, a SOT recovery signal of the same polarity is input to all complementary pairs of memory cells to align the magnetic moments of the magnetic tunnel junction free layer B1. That is, after self-writeback, the magnetic moments of the magnetic tunnel junction free layer B1 in the complementary pair of memory cells corresponding to the preset verification data are opposite in direction, while the magnetic moments of the magnetic tunnel junction free layer B1 in the complementary pair of memory cells corresponding to the non-preset verification data are aligned after self-writeback. The verification data is a preset value, and the magnetic moment direction of the free layer B1 and the magnetic moment direction of the reference layer B3 of the magnetic tunnel junction in the complementary pair of storage cells are opposite to the original magnetic tunnel junction of the self-written back data. At this time, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 in all complementary pairs of storage cells are restored to correspond to the verification data, and the correct verification data can be fed back when the verification data is read.

[0098] For example, in the above specific example, the magnetic moment of the reference layer B3 of the magnetic tunnel junction of the complementary pair of memory cells with the preset value of 1 is changed to the second direction, while the magnetic moment of the reference layer B3 of the magnetic tunnel junction of the target complementary pair of memory cells with the verification data of "0" remains in the first direction. In the target complementary pair of memory cells whose initial verification data is "0", the magnetic moment direction of the free layer B1 of the first magnetic tunnel junction MTJ1 is in the first direction, and the magnetic moment direction of the free layer B1 of the second magnetic tunnel junction MTJ2 is in the second direction.

[0099] The SOT recovery signal is input to set the magnetic moment direction of the free layer B1 of the first magnetic tunnel junction MTJ1 of all complementary pairs of memory cells to the first direction, and the magnetic moment direction of the free layer B1 of the second magnetic tunnel junction MTJ2 to the second direction. The target complementary pair of memory cells representing verification data "0" is restored to the state storing verification data "0" after self-writeback processing. Since the reference layer B3 direction of the complementary pair of memory cells with verification data "1" is flipped to the opposite direction, when the magnetic moment direction of the free layer B1 is the same as that of the complementary pair of memory cells with verification data "0" and after self-writeback processing, all complementary pairs of memory cells with opposite reference layer B3 magnetic moments are correspondingly represented as storing verification data "1". In other words, all complementary pairs of memory cells with verification data "1" are also restored, and correct verification data can be generated.

[0100] Based on the same principle, in another embodiment, the step S100 of reading verification data generated by the complementary pair of storage units based on the physical unclonable parameters by the reading module includes:

[0101] S122: Inputting an STT recovery signal to the spin-orbit moment layer D1 through a reading module to make the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in all complementary pairs of storage cells the same, and reading verification data generated by the complementary pairs of storage cells based on physical unclonable parameters.

[0102] In this embodiment, during the recovery phase, STT recovery signals of the same polarity are input to all complementary pairs of storage cells so that the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in all complementary pairs of storage cells are the same, both are low resistance states or both are high resistance states. When the first magnetic tunnel junction and the second magnetic tunnel junction are in the same resistance state, the verification data generated by the first magnetic tunnel junction and the second magnetic tunnel junction based on the physical unclonable parameter difference is read by the reading module, that is, the hidden state of the complementary pair of storage cells is removed in the authentication mode, and the verification data can be accurately read normally.

[0103] In an optional embodiment, if Figure 4 As shown, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are respectively arranged on two spin-orbit moment layers D1; ​​or Figure 5 and Figure 6As shown, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are arranged on the same spin-orbit moment layer D1, and the resistance states of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can be switched to the same resistance state or opposite resistance state at the same time.

[0104] Specifically, it is understandable that the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are respectively arranged on two spin-orbit moment layers D1, so as to facilitate the respective writing and reading operations of the two magnetic tunnel junctions. Figure 7a 、 Figure 7b and Figure 7c In the embodiment, a magnetic tunnel junction is provided on a spin-orbit moment layer D1, and the magnetic moment direction of the magnetic tunnel junction can be set according to requirements, and the manufacturing process of the magnetic tunnel junction is flexible.

[0105] In order to reduce the device size and improve the storage density, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can also be set on the same spin-orbit moment layer D1. However, in order to ensure the writing and reading operations required by the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2, each magnetic tunnel junction needs to be able to operate independently, and the resistance states of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can be switched to the same resistance state or the opposite resistance state at the same time. For example, Figure 7d and Figure 7e In the figure, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are arranged on the same spin-orbit moment layer D1, and can share the spin-orbit moment layer D1. A signal transmission end is set at the spin-orbit moment layer D1 corresponding to the middle position of the two magnetic tunnel junctions, and the signal transmission end at both ends of the spin-orbit moment layer D1 serves as a signal transmission port. By setting the signal polarity and direction, the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 on the same spin-orbit moment layer D1 can be written as a complementary pair.

[0106] In an optional embodiment, when the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are arranged on the same spin-orbit moment layer D1; the spin-orbit moment layer D1 includes three signal transmission ends, which are respectively arranged at both ends of the spin-orbit moment layer D1 and at a position on the spin-orbit moment layer D1 corresponding to the middle of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2, and the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are arranged in the same direction; or; the spin-orbit moment layer D1 includes two signal transmission channels in the horizontal and vertical directions along the spin-orbit moment layer D1, and the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are symmetrically arranged.

[0107] When the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are set on the same spin-orbit moment layer D1, in order to realize that the resistance states of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 can be switched to the same resistance state or opposite resistance state at the same time, operations such as reading and writing back of verification data can be realized by setting the shape of the spin-orbit moment layer D1 or the signal transmission channel of the spin-orbit moment layer D1 input signal.

[0108] For example, Figure 8 As shown, in a specific example, the shape of the spin-orbit moment layer D1 can be set to be Y-shaped, and the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 are set on the two branches of the Y-type spin-orbit moment layer D1, and the two ends of the Y-type spin-orbit moment layer D1 can be used as three signal transmission ports. By controlling the signal transmission ports and directions between the three signal transmission ports, operations such as data writing and reading of the same resistance state and opposite resistance state of the two magnetic tunnel junctions can be realized, and operations such as data writing and reading of a single magnetic tunnel junction can also be realized.

[0109] like Figure 9 As shown, in another specific example, the spin-orbit moment layer D1 can be set to include two signal transmission channels in the transverse and longitudinal directions along the spin-orbit moment layer D1, and the directions of the easy magnetic axes of the two magnetic tunnel junctions are set so that the two magnetic tunnel junctions can achieve resistance state changes between the same resistance state and the opposite resistance state under the action of signals from the signal transmission channels in two directions.

[0110] Since the present application is based on a hidden data security storage method based on pattern authentication, in some embodiments, in order to ensure that the ratio and distribution of data 0 and 1 in the obtained verification data map meet the requirements of being close to 50% and randomly distributed, flexible verification data can be generated through hardware or software measures to improve the quality of the generated verification data map.

[0111] In an optional embodiment, verification data corresponding to the complementary pair of storage cells can be preset, that is, a high-quality map can be preset so that the numbers stored in the complementary pair of storage cells correspond to the map. For example, two magnetic tunnel junctions correspond to the numbers "0" and "1", then a sequence of "0" and "1" or "1" and "0" that is consistent with the number of magnetic tunnel junction pairs in the complementary pair of storage cells can be obtained. According to the sequence, the preset condition is that the magnetic tunnel junction in each complementary pair of storage cells stores a number.

[0112] In an optional embodiment, when the two magnetic tunnel junctions whose resistance values ​​are compared are disposed on different spin-orbit moment layers D1 , the resistance values ​​of the two spin-orbit moment layers D1 may be compared to generate verification data.

[0113] In an optional embodiment, after comparing the resistance values ​​of the two magnetic tunnel junctions in a magnetic tunnel junction pair, post-processing operations such as XOR and Von Neumann Extractor can be performed based on the resistance comparison result and other resistance comparison results or other data to generate verification data. For example, if the resistance comparison result is that the first magnetic tunnel junction MTJ1 is greater than the second magnetic tunnel junction MTJ2, which corresponds to the number "0", if the resistance comparison result with the other magnetic tunnel junction pairs is subjected to a logical post-processing operation and the result is "1", the post-processed "1" is used as the verification data.

[0114] In an optional embodiment, before performing resistance comparison, all magnetic tunnel junction pairs can be randomized so that the "0" and "1" of all magnetic tunnel junction pairs in the magnetic unit array are evenly distributed. For example, during the chip initialization stage, the magnetic tunnel junctions are made to store random numbers. These random numbers can be randomly generated or manually set to satisfy the data array that satisfies the uniform distribution of "0" and "1"; or, during the annealing process of chip preparation, a stepped pinning field is used to randomize the SAF layer in the array.

[0115] In some embodiments, a via is formed at the bottom electrode of the SOT-MTJ, and the writing mechanism is a spin-orbit torque current or a Rashba current.

[0116] In some embodiments, a loop is formed on one side of the SOT-MTJ by a bottom electrode and a top electrode, and the writing mechanism is the coordinated regulation of spin-orbit torque current and spin transfer torque and / or VCMA effect.

[0117] In some embodiments, two pulses are applied to one side of the bottom electrode and the other side of the top electrode, respectively, while the other side of the bottom electrode is connected to a fixed potential. These pulses can be synchronized or asynchronous (allowing for timing differences), and co-modulated. The writing mechanism is the coordinated regulation of spin-orbit torque current, spin transfer torque, and / or VCMA effect.

[0118] In some embodiments, two pulse paths are generated on either side of the bottom electrode, while the top electrode is connected to a fixed potential. These two pulse paths can be synchronized or asynchronous (timing differences are permitted) and modulated together. The writing mechanism is a coordinated regulation of spin-orbit torque current, spin transfer torque, and / or VCMA effect.

[0119] In some embodiments, the layout design of the device allows for matching design of the common source waveguide.

[0120] In some embodiments, the write transistor and / or the read transistor may be connected in series with a calibration resistor. The order of the transistors and the calibration resistor in a single path is not limited.

[0121] In some embodiments, the magnetic tunnel junction MTJ has anisotropy, including but not limited to perpendicular magnetic anisotropy, in-plane magnetic anisotropy, T-shaped design and other anisotropies.

[0122] In some embodiments, voltage is an external stimulus that can produce probabilistic behavior. Theoretically, temperature field, magnetic field, voltage-controlled field, current, thermal field, light field such as laser, microwave field and other stimulus methods with energy input can also achieve functions.

[0123] In some embodiments, the magnetic tunnel junction MTJ has a shape capable of forming a shape anisotropic field (non-uniform demagnetization field) for providing the external magnetic field. For example, the magnetic tunnel junction MTJ can be in the shape of a rectangle, an ellipse, an isosceles right angle, etc. Taking the ellipse as an example, the demagnetization field in the long axis direction is weaker than that in the short axis direction, and the demagnetization field can be equivalent to the external magnetic field. In some embodiments, the available shapes of the magnetic tunnel junction MTJ include but are not limited to ellipses, diamonds, rectangles, triangles, etc. In some embodiments, the available shapes of the magnetic tunnel junction MTJ include tilted semicircles, isosceles triangles, and other shapes that do not have x / y axis symmetry after tilting.

[0124] In some embodiments, in authentication mode, all MTJs can be written to the same resistance state, and verification data generated by the complementary pair of storage cells based on the physical unclonable parameters can be read through the read module. In non-authentication mode, an external reference resistor can be set, and the MTJs of the complementary pair of storage cells are compared with the external reference resistor to return data. In this case, the returned data is not accurate verification data, so the resistance state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 is switched to a hidden state. Optionally, the external reference resistor can be a resistor with a resistance greater than or less than the MTJ resistance range, so that the data returned in non-authentication mode are all the same data, and no hidden verification data is returned.

[0125] In some embodiments, in authentication mode, the first magnetic tunnel junction MTJ1 and / or the second magnetic tunnel junction MTJ2 may be compared with an external comparison resistor or further calculated to generate verification data, while in non-authentication mode, the first magnetic tunnel junction MTJ1 and / or the second magnetic tunnel junction MTJ2 may be compared with an external reference resistor to return data. At this time, the data returned is not accurate verification data, so that the resistance state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 is switched to a hidden state. Optionally, the external comparison resistor may select a resistance value within a resistance range formed when all magnetic tunnel junctions are in the same resistance state to generate verification data that meets the "0" and "1" distribution conditions; the external reference resistor may be a resistor with a resistance value greater than or less than the MTJ resistance range, so that the data returned in non-authentication mode are all the same data and no hidden verification data is returned.

[0126] Optionally, to ensure the reliability of generated verification data, reliability enhancement technology can be used. For example, one form of reliability enhancement technology is to use time voting technology to select the verification data that appears the most times among the verification data generated multiple times as the final verification data output; another form of reliability enhancement technology is to use shielding technology to remove the verification data that is inconsistent among the verification data generated multiple times or select a default value. Only the data that is the same each time can be output as the final verification data. Through this combination of one or more technologies, the accuracy of the verification data map output during the authentication mode is guaranteed. Of course, technicians can also use other reliability enhancement technologies based on common knowledge, which will not be described in detail at this time.

[0127] In some embodiments, the spin-orbit moment layer D1 can be used as an electrode layer by selecting antiferromagnetic, two-dimensional materials, van der Waals, topological insulators and other carriers that can generate probabilistic behavior or torque or provide an equivalent magnetic field, and adopts the process optimization of embedding, intercalation, doping, injection, annealing and other processes of multiple materials.

[0128] In some embodiments, the spin-track moment layer D1 may be located above the MTJ as a bottom electrode; if there are multiple MTJs, at least two of the multiple MTJs may be located on different planes of the spin-track moment layer D1 .

[0129] In some embodiments, the magnetic tunnel junction MTJ may include a plurality of free layers B1 , barrier layers B2 , insertion layers, seed layers, capping layers, and the like.

[0130] In some embodiments, the bottom electrode widths of different MTJs may be different; different MTJs may have different sizes; different MTJs may have different spacings; and multiple MTJs may be placed on the same heavy metal layer.

[0131] In some embodiments, the spin-track moment layer D1 serves as a bottom electrode, and its shape can be a stripe type, a cross type, a Y-shaped branch type, a 6P electrode type, an 8P electrode type, etc.

[0132] In some embodiments, the actual connection is made by bottom-side vias / top-side vias of the SOT channel, etc.

[0133] In some embodiments, the SOT channel may be above the MTJ, that is, from top to bottom are the SOT channel, the free layer B1 , the barrier layer B2 , the reference layer B3 , and the pinned layer.

[0134] In some embodiments, the electronic device should also include a reading circuit, a writing circuit, and a peripheral conversion circuit (decoder, etc.).

[0135] In some embodiments, different materials of the bottom spin-orbit moment layer D1 result in different signs of the spin Hall angle, and thus different polarization directions of the generated spin currents.

[0136] In some embodiments, a toggle design may be used, and the implementation carrier may be a toggle MRAM.

[0137] In some embodiments, the data generation device is tested using fully integrated chip testing, board-level packaging testing, piece-by-piece integration testing, bare die testing, software and hardware combination, and the like.

[0138] In some embodiments, NAND devices form a PUF array, reducing the area compared to a single MTJ design. Furthermore, this array can be integrated with SOT-MRAM, reducing process complexity while providing PUF functionality and improving storage security.

[0139] The multifunctional magnetic unit, method, and device based on a physical unclonable function provided by the present invention can be used to implement Ising machines, perform Monte Carlo Markov sampling, and be used in probabilistic devices. They can be used in random injection algorithms, random processes, genetic algorithms, Ising machines, decision algorithms, Monte Carlo Markov chain sampling, probabilistic synapses in neuromorphic hardware, Bayesian inference, simulated annealing algorithms, Bayesian networks, and other algorithms requiring probabilistic data.

[0140] In the present application, the magnetic tunnel junction MTJ includes a reference layer B3, a barrier layer B2, and a free layer B1 arranged in sequence from top to bottom. The material of the spin-orbit moment layer D1 is an antiferromagnetic material. The spin-orbit moment layer D1 and the free layer B1 form an exchange bias field for providing the equivalent external magnetic field;

[0141] In an optional embodiment, in order to adjust the perpendicular anisotropy of the magnetic tunnel junction MTJ and the smoothness of each layer and other characteristics, the magnetic tunnel junction MTJ may also include at least one of the layer structures such as an insertion layer, a pinning layer, a seed layer and a capping layer. Among them, the setting of each layer structure can be set to one or more layers according to actual needs, and those skilled in the art can set the top-down setting order of each layer structure of the magnetic tunnel junction MTJ according to needs, and this application does not limit this. In some embodiments, a top-pin structure can be adopted, and the structural order (from bottom to top) is bottom electrode, free layer B1 (Free Layer), tunnel barrier layer B2 (MgO), reference layer B3 (Reference Layer), pinned layer (Pinned Layer); a bottom-pin structure, the structural order from bottom to top is pinned layer (Pinned Layer), reference layer B3 (Reference Layer), tunnel barrier layer B2 (MgO), free layer B1 (Free Layer)

[0142] In an optional embodiment, a top electrode may be provided on top of the magnetic tunnel junction (MTJ), and current input and output electrodes may be provided on opposite sides of the spin-orbit moment layer (D1) for detecting the input of current and spin-orbit moment current. Preferably, the electrode material may be any one of tantalum (Ta), aluminum (Al), gold (Au), or copper (Cu).

[0143] Preferably, the material of the free layer B1 and the reference layer B3 may be a ferromagnetic metal, and the material of the barrier layer B2 may be an oxide. The ferromagnetic metal may be a mixed metal material formed by at least one of cobalt-iron (CoFe), cobalt-iron-boron (CoFeB), or nickel-iron (NiFe), and the proportions of the mixed metal materials may be the same or different. The oxide may be one of oxides such as magnesium oxide (MgO) or aluminum oxide (Al2O3), used to generate a tunneling magnetoresistance effect. In practical applications, the ferromagnetic metal and the oxide may also be made of other feasible materials, which is not limited in this application.

[0144] The free layer B1 of the magnetic tunnel junction MTJ is in contact and fixed with the spin-orbit moment layer D1. The layers of the magnetic tunnel junction MTJ and the spin-orbit moment layer D1 can be deposited on the substrate in sequence from bottom to top through traditional methods such as ion beam epitaxy, atomic layer deposition or magnetron sputtering, and then two or more magnetic tunnel junctions MTJs can be prepared through traditional nanodevice processing techniques such as lithography and etching.

[0145] In a preferred embodiment, the spin-orbit moment layer D1 is a spin-orbit moment layer D1 composed of a heavy metal film, an antiferromagnetic film, or other materials. The top area of ​​the heavy metal film or antiferromagnetic film of each branch is preferably larger than the bottom area of ​​the outline formed by all the magnetic tunnel junctions MTJ, so that two or more magnetic tunnel junctions MTJ can be set, and the bottom surface shape of the magnetic tunnel junction MTJ is completely embedded in the top surface shape of the heavy metal film or antiferromagnetic film. Preferably, the material of the spin-orbit moment layer D1 can be selected from one of platinum Pt, tantalum Ta, or tungsten W. In practical applications, the spin-orbit moment layer D1 can also be formed of other feasible materials, which is not limited in this application.

[0146] In this embodiment, the magnetic tunnel junction (MTJ) includes a top reference layer B3, a free layer B1 in contact with a spin-orbit moment layer D1, and a barrier layer B2 disposed between the reference layer B3 and the free layer B1. The MTJ has a three-layer structure and includes only one free layer B1. In other embodiments, the free layer B1 may be provided as multiple layers, i.e., more than two free layers B1. The MTJ then includes a top reference layer B3, multiple free layers B1, and a barrier layer B2 disposed between each two adjacent layers, with the bottommost free layer B1 disposed in contact with the spin-orbit moment layer D1. For example, in a specific example, when two free layers B1 are included, the magnetic storage cell structure may include a spin-orbit moment layer D1, a second free layer B1 disposed sequentially on the spin-orbit moment layer D1, a barrier layer B2, a first free layer B1, a barrier layer B2, and a reference layer B3.

[0147] Based on the same principle, the present application also discloses a hidden data security storage device based on mode authentication. The hidden data security storage device is configured to read verification data generated by a complementary pair of storage cells based on physical unclonable parameters through a reading module if the mode type is an authentication mode, wherein the complementary pair of storage cells includes a first magnetic tunnel junction MTJ1 and a second magnetic tunnel junction MTJ2; and to switch the resistance state or magnetic state of the first magnetic tunnel junction MTJ1 and the second magnetic tunnel junction MTJ2 to a hidden state if the mode type is a non-authentication mode.

[0148] Since the principle of solving the problem by this device is similar to that of the above method, the implementation of this device can refer to the implementation of the method and will not be repeated here.

[0149] Based on the same principle, the present application also discloses a hidden data security storage system based on pattern authentication. The hidden data security storage system includes the hidden data security storage device based on pattern authentication as in the present embodiment and a magnetic unit, wherein the magnetic unit includes a complementary pair of storage cells, and the complementary pair of storage cells includes a first magnetic tunnel junction MTJ1 and a second magnetic tunnel junction MTJ2.

[0150] Since the principle of solving the problem by this system is similar to that of the above method, the implementation of this system can refer to the implementation of the method and will not be repeated here.

[0151] The present application may be used to constitute a memory in a computer device or a readable medium, and the memory includes permanent and non-permanent, removable and non-removable media and may be implemented by any method or technology to store information. The information may be computer-readable instructions, data structures, program modules or other data. Examples of applications of multifunctional magnetic random access memory include, but are not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device.

[0152] Since the principle of solving the problem of the multifunctional magnetic random access memory is similar to that of the multifunctional magnetic random access memory unit, the implementation of the multifunctional magnetic random access memory can refer to the implementation of the multifunctional magnetic random access memory unit, which will not be repeated here.

[0153] Based on the same principle, this embodiment also discloses a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor.

[0154] The processor and / or the memory include the multifunctional magnetic random access memory unit as described in this embodiment.

[0155] The multifunctional magnetic random access memory unit described in the above embodiments can be provided in a product device having a certain function. A typical implementation device is a computer device. Specifically, the computer device can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0156] In a typical example, a computer device specifically includes a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor and / or the memory include the multifunctional magnetic random access memory unit as described in this embodiment.

[0157] Reference below Figure 10 , which shows a structural diagram of a computer device 600 suitable for implementing an embodiment of the present application.

[0158] like Figure 10As shown, the computer device 600 includes a central processing unit (CPU) 601, which can perform various appropriate tasks and processes according to a program stored in a read-only memory (ROM) 602 or a program loaded from a storage portion 608 into a random access memory (RAM) 603. Various programs and data required for the operation of the computer device 600 are also stored in the RAM 603. The CPU 601, ROM 602, and RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0159] The following components are connected to the I / O interface 605: an input section 606 including a keyboard, a mouse, and the like; an output section 607 including devices such as a cathode ray tube (CRT), a liquid crystal display (LCD), and a speaker; a storage section 608 including devices such as a hard disk; and a communication section 609 including a network interface card such as a LAN card or a modem. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the I / O interface 605 as needed. Removable media 611, such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, is installed in the drive 610 as needed, so that computer programs read from the media can be installed in the storage section 608 as needed.

[0160] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0161] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0162] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0163] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0164] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may be applied in the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0165] The present application may be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected through a communications network. In a distributed computing environment, program modules may be located in local and remote computer storage media, including storage devices.

[0166] The various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences between the other embodiments. In particular, the system embodiments are generally similar to the method embodiments, so the description is relatively simple. For relevant parts, refer to the description of the method embodiments.

[0167] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A method for secure storage of hidden data based on pattern authentication, characterized in that: include: If the mode type is the authentication mode, reading verification data generated by a complementary pair of storage units based on a physical unclonable parameter through a reading module, the complementary pair of storage units including a first magnetic tunnel junction and a second magnetic tunnel junction; If the mode type is a non-authentication mode, the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction is switched to a hidden state.

2. The method for securely storing hidden data according to claim 1, wherein: The reading of verification data generated by the complementary pair of storage units based on the physical unclonable parameters by the reading module includes: Writing the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in the complementary pair of memory cells as being the same; Comparing the response difference between the first magnetic tunnel junction and the second magnetic tunnel junction under the action of a read signal based on the physical unclonable parameter to obtain the verification data; or writing the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in the complementary pair of memory cells to be the same; Comparing the response difference between the first magnetic tunnel junction and the second magnetic tunnel junction under the action of a read signal based on a physical unclonable parameter to obtain the verification data and write the verification data back to the complementary pair of storage cells; The verification data stored in the complementary pair of memory cells is read.

3. The hidden data security storage method according to claim 1, characterized in that: Switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state includes: The storage data to be stored is written into the first magnetic tunnel junction and the second magnetic tunnel junction; or, random data or preset data is written into the first magnetic tunnel junction and the second magnetic tunnel junction.

4. The hidden data security storage method according to claim 1, characterized in that: The first magnetic tunnel junction and the second magnetic tunnel junction are arranged on the spin-orbit moment layer; The method further includes an initialization process before switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state: A target complementary pair of storage cells whose verification data is a preset value is selected, and a SOT initialization signal is input into the spin-orbit moment layer of the magnetic tunnel junction of the target complementary pair of storage cells, wherein the SOT initialization signal can change the polarity of the magnetic tunnel junction reference layer; or a target complementary pair of storage cells whose verification data is a preset value is selected, and an STT initialization signal is input into the spin-orbit moment layer of the magnetic tunnel junction of the target complementary pair of storage cells, wherein the STT initialization signal can change the polarity of the magnetic tunnel junction reference layer.

5. The hidden data security storage method according to claim 4, characterized in that: Switching the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state includes: Inputting STT write signals to the first magnetic tunnel junction and the second magnetic tunnel junction respectively, so that the two magnetic tunnel junctions in all the complementary pair storage cells store the same data in the form of complementary pairs; or A SOT write signal is inputted to the first magnetic tunnel junction and the second magnetic tunnel junction respectively, so that the two magnetic tunnel junctions in all the complementary pair memory cells store the same data in the form of a complementary pair.

6. The hidden data security storage method according to claim 5, characterized in that: The reading of verification data generated by the complementary pair of storage units based on the physical unclonable parameters by the reading module includes: Inputting a SOT recovery signal to the spin-orbit moment layer through a reading module makes the magnetic moment direction of the free layer of the magnetic tunnel junction in all complementary pairs of storage cells opposite to the magnetic moment direction of the free layer of the magnetic tunnel junction in the complementary pairs of storage cells after self-writeback corresponding to the verification data being a preset value and the same as the magnetic moment direction of the free layer of the magnetic tunnel junction in the complementary pairs of storage cells after self-writeback corresponding to the verification data being a non-preset value, and feeding back correct verification data when reading verification data; or An STT recovery signal is input to the spin-orbit moment layer through a reading module to make the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction in all complementary pairs of storage cells the same, and verification data generated by the complementary pairs of storage cells based on physical unclonable parameters is read.

7. The hidden data security storage method according to claim 1, characterized in that: The first magnetic tunnel junction and the second magnetic tunnel junction are respectively arranged on two spin-orbit moment layers; or, The first magnetic tunnel junction and the second magnetic tunnel junction are arranged on the same spin-orbit moment layer, and the resistance states of the first magnetic tunnel junction and the second magnetic tunnel junction can be switched to the same resistance state or opposite resistance states at the same time.

8. The hidden data security storage method according to claim 7, characterized in that: When the first magnetic tunnel junction and the second magnetic tunnel junction are arranged on the same spin-orbit moment layer; The spin-orbit moment layer includes three signal transmission terminals, which are respectively arranged at two ends of the spin-orbit moment layer and a position on the spin-orbit moment layer corresponding to a position between the first magnetic tunnel junction and the second magnetic tunnel junction, and the first magnetic tunnel junction and the second magnetic tunnel junction are arranged in the same direction; or; The spin-orbit moment layer includes two signal transmission channels in the transverse direction and the longitudinal direction of the spin-orbit moment layer, and the first magnetic tunnel junction and the second magnetic tunnel junction are symmetrically arranged.

9. A hidden data security storage device based on pattern authentication, characterized in that: It is configured to read verification data generated by a complementary pair of storage units based on physical unclonable parameters through a reading module if the mode type is an authentication mode, and the complementary pair of storage units includes a first magnetic tunnel junction and a second magnetic tunnel junction; if the mode type is a non-authentication mode, switch the resistance state or magnetic state of the first magnetic tunnel junction and the second magnetic tunnel junction to a hidden state.

10. A hidden data security storage system based on pattern authentication, characterized in that: The method comprises the pattern authentication-based hidden data security storage device according to claim 9 and a magnetic unit, wherein the magnetic unit comprises a complementary pair of storage cells, and the complementary pair of storage cells comprises a first magnetic tunnel junction and a second magnetic tunnel junction.

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