Coding device, system and method for transmitting identifier

By using the lookup table module and mapping module in SoC design to optimize the mapping processing of transmission identifiers, the performance bottleneck caused by concurrent access by multiple master devices is resolved, the performance of the AXI4 bus is improved, and it is suitable for high-bandwidth, low-latency chip design.

CN120743818AActive Publication Date: 2025-10-03ZHIHE COMPUTING TECHNOLOGY (HANGZHOU) CO LTD
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Patent Information

Application Number
CN202511270286.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-08
Publication Date
2025-10-03
Estimated Expiration
2045-09-08

AI Technical Summary

Technical Problem

In SoC design, as complexity increases, concurrent access by multiple master devices causes transmission identifier management to become a performance bottleneck, and traditional encoding methods cannot meet the requirements of high bandwidth and low latency.

Method used

Provided are a transmission identifier encoding device and system, which uses a lookup table module to store and dynamically update mapping information between a master port and a slave port, and utilizes a mapping module to perform mapping processing between M-bit and N-bit transmission identifiers, thereby optimizing bus resource allocation and data transmission efficiency.

Benefits of technology

Without changing the AXI4 protocol standard, the bus performance is significantly improved, solving the problems of low transmission identifier management efficiency, high critical path latency, and large storage overhead. It is suitable for chip design with low latency and high bandwidth requirements.

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Abstract

The embodiment of the invention provides a coding device, system and method for transmission identifiers, the coding device, system and method are applied to data transmission between a master port and a slave port of an AXI4 protocol, the master port is connected with a single external host, the slave port is connected with a single external slave, and the device comprises a lookup table module, a coding module and a coding module, the storage module is used for storing mapping information of an M-bit transmission identifier of a master port and an N-bit transmission identifier of a slave port, and dynamically updating distribution and release of the transmission identifiers; and the mapping module is used for carrying out mapping processing on the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, and M and N are natural numbers. According to the embodiment of the invention, the problems of low transmission identifier management efficiency, high key path delay, high storage overhead and the like of a traditional AXI4 bus during concurrent access of multiple master devices are solved, the bus performance is remarkably improved on the premise of not changing the AXI4 protocol standard, and the method is suitable for chip design with strict requirements on low delay and high bandwidth.
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Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of system-on-chip technology, and more particularly to an encoding device, system, and method for transmitting an identifier. Background Art

[0002] The AMBA AXI4 protocol is a high-performance on-chip bus standard widely used in SoC designs, connecting modules such as processors, memory controllers, DMA, and accelerators. In the AXI4 protocol, transaction transfer identifiers (IDs) are used to identify different transfer transactions, ensuring that transactions with the same ID are completed in sequence, while transactions with different IDs can be executed out of order. However, as SoC complexity increases, concurrent access by multiple master devices causes transfer identifier management to become a performance bottleneck. This is especially true in high-bandwidth, low-latency applications, where traditional transfer identifier encoding methods may not meet these requirements. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide an encoding device, system, and method for transmitting an identifier to at least solve or alleviate the above-mentioned problems.

[0004] According to a first aspect of an embodiment of the present disclosure, a transmission identifier encoding device is provided, which is applied to data transmission between a master port and a slave port of an AXI4 protocol, wherein the master port is connected to a single external host, and the slave port is connected to a single external slave. The device includes: a lookup table module for storing mapping information between an M-bit transmission identifier of the master port and an N-bit transmission identifier of the slave port, and dynamically updating allocation and release of the transmission identifier; and a mapping module for performing mapping processing between the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, where M and N are natural numbers.

[0005] According to a second aspect of an embodiment of the present disclosure, a transmission identifier encoding system is provided, comprising: the encoding device provided in the first aspect, and a master port and a slave port applied to the AXI4 protocol for data transmission, wherein the master port is connected to a single external host, and the slave port is connected to a single external slave.

[0006] According to a third aspect of an embodiment of the present disclosure, a method for encoding a transmission identifier is provided, the method comprising: storing mapping information between an M-bit transmission identifier of a master port and an N-bit transmission identifier of a slave port, and dynamically updating the allocation and release of the transmission identifier; and performing mapping processing between the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, where M and N are natural numbers.

[0007] According to the transmission identifier encoding scheme provided by the embodiment of the present disclosure, the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port is stored, and the allocation and release of the transmission identifier is dynamically updated. According to the mapping information, the embodiment of the present disclosure performs encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port, where M and N are natural numbers. The embodiment of the present disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead in the traditional AXI4 bus when multiple master devices are accessed concurrently. Without changing the AXI4 protocol standard, the bus performance is significantly improved, and it is suitable for chip design with strict requirements on low latency and high bandwidth. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0009] Figure 1 is a schematic diagram of an encoding device for transmitting an identifier according to an embodiment of the present disclosure; Figure 2 is a schematic diagram of an encoding device for transmitting an identifier according to another embodiment of the present disclosure; Figure 3 is a flowchart of a processing flow of a first mapping unit of an encoding device for transmitting an identifier according to another embodiment of the present disclosure; Figure 4 is a flowchart of a processing flow of a second mapping unit of an encoding device for transmitting an identifier according to another embodiment of the present disclosure; Figure 5 is a schematic diagram of a lookup table module of an encoding device for transmitting an identifier according to yet another embodiment of the present disclosure; Figure 6 is a schematic diagram of a coding system for transmitting an identifier according to yet another embodiment of the present disclosure; Figure 7 A flowchart of a method for encoding a transmission identifier according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0010] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0011] It should be noted that the titles of any section / subsection provided herein are not limiting. Various embodiments are described throughout this document, and any type of embodiment may be included under any section / subsection. Furthermore, the embodiments described in any section / subsection may be combined in any manner with any other embodiments described in the same section / subsection and / or in different sections / subsections.

[0012] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The term "some embodiments" should be understood as "at least some embodiments". Other explicit and implicit definitions may be included below. The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may be included below.

[0013] The embodiments of the present disclosure may involve user data, data acquisition and / or use, etc. These aspects shall comply with the corresponding laws, regulations and relevant provisions. In the embodiments of the present disclosure, all data collection, acquisition, processing, processing, forwarding, use, etc. are carried out on the premise that the user is aware of and confirms them. Accordingly, when implementing the various embodiments of the present disclosure, the types, scope of use, and usage scenarios of the data or information that may be involved should be informed to the user and the user's authorization should be obtained in an appropriate manner in accordance with the relevant laws and regulations. The specific notification and / or authorization method may vary according to the actual situation and application scenario, and the scope of the present disclosure is not limited in this respect.

[0014] Where this specification and the solutions in the examples involve the processing of personal information, such processing will be conducted with a legitimate basis (e.g., with the consent of the personal information subject or as necessary for the performance of a contract) and only within the prescribed or agreed scope. A user's refusal to process personal information other than that required for basic functions will not affect their use of these functions.

[0015] First, some nouns or terms that appear in the process of describing the embodiments of the present disclosure are subject to the following explanations.

[0016] Primary Port: This is the port of the master device (Master), which is the party that initiates data transfer requests, such as the processor (CPU) or DMA controller. The master device sends addresses, control signals, and write data to the slave device (Slave) through the primary port, and receives read data from the slave device.

[0017] Slave Port: A slave device is a device that responds to requests from a master device, such as a memory controller or peripheral. The slave device receives the address, control signals, and write data from the master device through the slave port, and sends read data and response signals to the master device.

[0018] Transaction Transfer Identifier (ID): A unique identifier assigned to each transaction by the master. It is used to distinguish different transactions and ensure that the response to each transaction is correctly returned to the master.

[0019] The main features of the encoding method of AXI4 transaction transfer identifiers are: Transaction transfer identifier bit width expansion: The transaction transfer identifier bit width generated by the host is narrow (such as 2-4 bits). The interconnect expands the transaction transfer identifier bit width (such as 6-8 bits) during the transmission process to support more concurrent transactions.

[0020] Address decoding is performed in the interconnect: In traditional architectures, the address decoding logic is located in the interconnect matrix and is used to select the target slave device.

[0021] Order-preserving dependency cache: Transactions with the same transaction transfer identifier must be returned in order. Transactions with different transaction transfer identifiers can be returned out of order, but the order must be managed by the cache mechanism in the interconnect.

[0022] However, the common encoding method of AXI4 transaction transfer identifiers has the following defects: The transaction transfer identifier extension method is inefficient: the step-by-step expansion of the transaction transfer identifier bit width (e.g., 2 bits on the host → 6 bits on the interconnect) complicates transaction transfer identifier management and may introduce redundant coding.

[0023] Lack of flexible transaction transfer identifier encoding strategy: The master number and slave address mapping are not fully utilized for optimization, resulting in low transaction transfer identifier encoding efficiency.

[0024] In order to overcome the above-mentioned defects, the embodiment of the present disclosure stores the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port through the lookup table module 101, and the lookup table module 101 dynamically updates the allocation and release of the transmission identifier. The mapping module 102 performs encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port based on the mapping information. The embodiment of the present disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead in the traditional AXI4 bus when multiple master devices are accessed concurrently. Without changing the AXI4 protocol standard, the bus performance is significantly improved, and it is suitable for chip design with strict requirements on low latency and high bandwidth.

[0025] The following describes in detail the encoding scheme of the transmission identifier provided by the embodiment of the present disclosure in conjunction with the accompanying drawings.

[0026] Encoding device See also Figure 1 An embodiment of the present disclosure provides an encoding device for a transmission identifier, which is applied to data transmission between a master port and a slave port of an AXI4 protocol, wherein the master port is connected to a single external host and the slave port is connected to a single external slave.

[0027] The device includes: The lookup table module 101 is used to store mapping information between the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port, and dynamically update the allocation and release of the transmission identifier.

[0028] The mapping module 102 is configured to perform mapping processing between an M-bit transmission identifier and an N-bit transmission identifier between the master port and the slave port according to the mapping information, where M and N are natural numbers.

[0029] The disclosed embodiment reconstructs the transmission identifier mapping logic through the lookup table module 101 and the mapping module 102 to solve the resource waste problem caused by the redundant bit width of the transmission identifier in the multi-device system. It is used to optimize the bus resource allocation and data transmission efficiency under the multi-master and multi-slave architecture, and is suitable for improving the bus performance of artificial intelligence chips, multi-core processors and high-bandwidth storage systems.

[0030] In some specific implementations of the present disclosure, see Figure 2 , the mapping module 102 includes: The first mapping unit 1021 is configured to map an M-bit transfer identifier to an N-bit transfer identifier in a read address channel or a write address channel, and attach the mapped N-bit transfer identifier to a valid payload to be sent to the slave port.

[0031] The second mapping unit 1022 is configured to map the N-bit transfer identifier back to the corresponding M-bit transfer identifier in the read response channel or the write response channel, and attach the mapped M-bit transfer identifier to the payload to be sent to the master port.

[0032] Specifically, see Figure 3 , the processing flow of the first mapping unit 1021 in the embodiment of the present disclosure includes: Step 301: A payload with an M-bit transmission identifier is received from a host via a primary port, and mapping information in the lookup table module 101 is used to query whether a corresponding N-bit transmission identifier has been allocated to the M-bit transmission identifier.

[0033] Step 302: If not, select an N-bit transmission identifier that has not been assigned, and assign the M-bit transmission identifier to the N-bit transmission identifier.

[0034] Step 303: If yes, skip the above steps, attach the allocated N-bit transmission identifier to the payload, and transmit it to the slave through the slave port.

[0035] Specifically, see Figure 4 , the processing flow of the second mapping unit 1022 in the embodiment of the present disclosure includes: Step 401: A valid payload with an N-bit transmission identifier is received from a slave device via a slave port, and the corresponding M-bit transmission identifier allocated to the N-bit transmission identifier is searched through mapping information in the lookup table module 101 .

[0036] Step 402: Attach the allocated M-bit transmission identifier to the payload and transmit it to the host through the primary port.

[0037] In some specific implementations of the embodiments of the present disclosure, the specific situation in which the lookup table module 101 stores the mapping information between the M-bit transmission identifier and the N-bit transmission identifier of the slave port is as follows: When M is greater than N, the lookup table module 101 supports one of the following allocation modes: Dynamic allocation mode, dynamically allocates and releases N-bit transfer identifiers corresponding to M-bit transfer identifiers during operation; In the hash allocation mode, an M-bit transmission identifier is subjected to an XOR operation to determine an N-bit transmission identifier corresponding to the M-bit transmission identifier.

[0038] Specifically, if the lookup table module 101 supports the dynamic allocation mode, the lookup table module 101 is used to: Set the index bit width to IDXW, take the low IDXW bits of the N-bit transmission identifier as the index, and divide the storage structure of the mapping information into 2 IDXW Group; Each group includes a plurality of storage rows, and each storage row stores a mapping relationship between an M-bit transmission identifier and an N-bit transmission identifier and an allocation status of the N-bit transmission identifier.

[0039] In the embodiment of the present disclosure, the index width is set to IDXW, and the storage structure of the mapping information is divided into two IDXW Each storage row stores the encoding relationship from the M-bit transmission identifier to the N-bit transmission identifier and its allocation status, so that the mapping relationship and allocation status can be quickly found through the index structure, reducing the search delay and improving the speed and efficiency of transaction processing.

[0040] The storage row includes: The first field stores the remaining transmission identifier after removing the low IDXW bits of the N-bit transmission identifier; The second field stores the M-bit transmission identifier corresponding to the N-bit transmission identifier in the storage mapping information, after removing the low IDXW bits; The third field stores the allocation status (ostd) of the N-bit transfer identifier of the storage row in the storage mapping information.

[0041] In the embodiment of the present disclosure, the first field only stores the transmission identifier remaining after removing the low IDXW bits (the low IDXW bits can be obtained through the index); the second field only stores the M-bit transmission identifier after removing the low IDXW bits, thereby reducing the occupation of storage resources.

[0042] If the third field is equal to the first value, it indicates that the N-bit transmission identifier of the storage row has not been allocated or has been released; if the third field is greater than the first value, it indicates that the N-bit transmission identifier of the storage row has been allocated to the M-bit transmission identifier.

[0043] For example, the first value may be set to 0.

[0044] The embodiment of the present disclosure obtains the allocation status of the N-bit transmission identifier of the storage row in the mapping information through the third field, and can manage whether the N-bit transmission identifier is allocated or released.

[0045] In some specific implementations of the present disclosure, see Figure 5 , the lookup table module 101 includes: The allocation unit 1011 is used to receive an M-bit transmission identifier from a master port and select an N-bit transmission identifier that has not yet been allocated, store the transmission identifier after removing the low IDXW bits of the M-bit transmission identifier into the second field of the storage row corresponding to the N-bit transmission identifier, and set the third field of the storage row from the first value to be greater than the first value.

[0046] For example, the table lookup module 101 selects an unassigned N-bit transmission identifier from top to bottom in the order of the storage rows.

[0047] a release unit 1012 configured to receive an N-bit transmission identifier from a slave port, set a third field of a storage row where the N-bit transmission identifier is located from a value greater than the first value to the first value until the N-bit transmission identifier is allocated again, and then update the M-bit transmission identifier stored in the second field of the storage row with the lower IDXW bits removed; The updating unit 1013 is configured to update the third field from the first value to a value greater than the first value or from a value greater than the first value to the first value.

[0048] The following describes in detail the allocation, release, and update of the dynamic update transmission identifier by the lookup table module 101 according to the embodiment of the present disclosure through process operations.

[0049] Exemplarily, the embodiment of the present disclosure sets the first value to 0.

[0050] For each storage row (i.e., each N-bit transfer identifier), there are three operations: 1) An M-bit transmission identifier is assigned a corresponding N-bit transmission identifier.

[0051] When receiving an unassigned M-bit transmission identifier from a master port, the table lookup module 101 selects the first unassigned N-bit transmission identifier from top to bottom.

[0052] The index of the storage row is the lower IDXW bits of the N-bit transmission identifier. The remaining transmission identifier after removing the lower IDXW bits of the N-bit transmission identifier is stored in the first field of the storage row.

[0053] The M-bit transmission identifier is removed from the lower IDXW bits and filled into the second field of the storage row, and the allocation state of the third field is changed from 0 to greater than 1.

[0054] 2) Release of the N-bit transfer identifier.

[0055] When an N-bit transmission identifier is received from a slave port and the third field of its storage row is equal to 1, the lookup table module 101 changes the allocation state of the third field from 1 to 0.

[0056] The lookup table module 101 will not update the M-bit transmission identifier stored in the second field of the storage row after removing the low IDXW bits until the storage row is reallocated.

[0057] 3) Update of N-bit transmission identifier.

[0058] Perform an increment or decrement operation on the third field.

[0059] For example, when a transaction is completed, the third field is decremented by 1; when a new transaction uses the mapping, the third field is incremented by 1.

[0060] The embodiment of the present disclosure can support multiple concurrent transactions and improve system performance by mapping and managing transmission identifiers. Through the third field count, the status of each transaction can be effectively tracked to ensure the correct completion of the transaction.

[0061] In some specific implementations of the embodiments of the present disclosure, if the lookup table module supports the hash allocation mode, the lookup table module 101 sets the third field corresponding to the unallocated or released N-bit transmission identifier to be equal to the first value, and after determining the N-bit transmission identifier corresponding to the M-bit transmission identifier through an XOR operation of the M-bit transmission identifier, sets the third field of the storage row where the corresponding N-bit transmission identifier is located from the first value to a value greater than the first value.

[0062] Coding system for transmission identifiers See also Figure 6 The embodiment of the present disclosure also provides an encoding system for transmitting an identifier, comprising: any of the above-mentioned encoding devices 601, and a master port 602 and a slave port 603 applied to the AXI4 protocol for data transmission, wherein the master port is connected to a single external host, and the slave port is connected to a single external slave.

[0063] According to the transmission identifier encoding scheme provided by the embodiment of the present disclosure, the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port is stored, and the allocation and release of the transmission identifier is dynamically updated. According to the mapping information, the embodiment of the present disclosure performs encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port, where M and N are natural numbers. The embodiment of the present disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead in the traditional AXI4 bus when multiple master devices are accessed concurrently. Without changing the AXI4 protocol standard, the bus performance is significantly improved, and it is suitable for chip design with strict requirements on low latency and high bandwidth.

[0064] Encoding method for transmission identifier Figure 7 FIG1 is a flow chart showing a method for encoding a transmission identifier according to an embodiment of the present disclosure, and the method for encoding a transmission identifier can be executed by the encoding device in the above embodiment. Figure 7 As shown, the method includes the following steps: Step 701: Store mapping information between the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port, and dynamically update allocation and release of the transmission identifier.

[0065] Step 702: According to the mapping information, a mapping process is performed between the master port and the slave port between the M-bit transmission identifier and the N-bit transmission identifier, where M and N are natural numbers.

[0066] According to the transmission identifier encoding scheme provided by the embodiment of the present disclosure, the mapping information of the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port is stored, and the allocation and release of the transmission identifier is dynamically updated. According to the mapping information, the embodiment of the present disclosure performs encoding processing of the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port, where M and N are natural numbers. The embodiment of the present disclosure solves the problems of low transmission identifier management efficiency, high critical path delay, and large storage overhead in the traditional AXI4 bus when multiple master devices are accessed concurrently. Without changing the AXI4 protocol standard, the bus performance is significantly improved, and it is suitable for chip design with strict requirements on low latency and high bandwidth.

[0067] It should be noted that, since the details of the timestamp synchronization method have been described in detail in the timestamp synchronization device part of the above embodiment in conjunction with the structural diagram, the specific process can be found in the description of the above timestamp synchronization device embodiment, and will not be repeated here.

[0068] It should be understood that the various embodiments in this specification are described in a progressive manner. References to the same or similar parts of the various embodiments will be sufficient. Each embodiment focuses on the differences from the other embodiments. In particular, the method embodiments are generally similar to the methods described in the device and system embodiments, so their description is relatively simple. For relevant details, references to the descriptions of the other embodiments will suffice.

[0069] It should be understood that the foregoing description of this specification is based on specific embodiments. Other embodiments are within the scope of the claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0070] It should be understood that an element described herein in the singular or shown in the drawings as only one does not limit the number of the element to one. In addition, modules or elements described or shown herein as separate may be combined into a single module or element, and modules or elements described or shown herein as single may be split into multiple modules or elements.

[0071] It should also be understood that the terms and expressions used herein are for descriptive purposes only, and the one or more embodiments of this specification should not be limited to these terms and expressions. The use of these terms and expressions does not mean to exclude any equivalent features of the illustrations and descriptions (or portions thereof), and it should be recognized that various modifications that may exist should also be included within the scope of the claims. Other modifications, variations, and substitutions may also exist. Accordingly, the claims should be deemed to cover all such equivalents.

Claims

1. A transmission identifier encoding device, applied to data transmission between a master port and a slave port of an AXI4 protocol, wherein the master port is connected to a single external host and the slave port is connected to a single external slave, the device comprising: A lookup table module, configured to store mapping information between the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port, and dynamically update allocation and release of the transmission identifier; A mapping module is used to perform mapping processing between the M-bit transmission identifier and the N-bit transmission identifier between the master port and the slave port according to the mapping information, where M and N are natural numbers.

2. The device according to claim 1, wherein The mapping module includes: a first mapping unit, configured to map the M-bit transmission identifier to the N-bit transmission identifier in a read address channel or a write address channel, and attach the mapped N-bit transmission identifier to a payload to be sent to the slave port; The second mapping unit is used to map the N-bit transmission identifier back to the corresponding M-bit transmission identifier in the read response channel or the write response channel, and attach the mapped M-bit transmission identifier to the effective payload to send it to the master port.

3. The device according to claim 2, wherein The first mapping unit is specifically configured to: If the N-bit transmission identifier corresponding to the M-bit transmission identifier is stored in the lookup table module, attaching the corresponding N-bit transmission identifier to the payload to be sent to the slave port; If the N-bit transmission identifier corresponding to the M-bit transmission identifier is not stored in the lookup table module, allocating an unallocated N-bit transmission identifier to the M-bit transmission identifier, and attaching the allocated N-bit transmission identifier to a payload to be sent to the slave port; The second mapping unit is specifically configured to: The M-bit transmission identifier corresponding to the N-bit transmission identifier stored in the lookup table module is searched, and the corresponding M-bit transmission identifier is attached to a payload to be sent to the primary port.

4. The device according to any one of claims 1 to 3, wherein: When M is greater than N, the lookup table module supports one of the following allocation modes: Dynamic allocation mode, dynamically allocating and releasing the N-bit transmission identifier corresponding to the M-bit transmission identifier during operation; Hash allocation mode, performing an XOR operation on the M-bit transmission identifier to determine the N-bit transmission identifier corresponding to the M-bit transmission identifier.

5. The device according to claim 4, wherein If the lookup table module supports the dynamic allocation mode, the lookup table module is configured to: Set the index bit width to IDXW, take the lower IDXW bits of the N-bit transmission identifier as the index, and divide the storage structure of the mapping information into 2 IDXW Group; Each group includes a plurality of storage rows, and each storage row stores a mapping relationship between the M-bit transmission identifier and the N-bit transmission identifier and an allocation status of the N-bit transmission identifier.

6. The device according to claim 5, wherein The storage row includes: The first field stores the transmission identifier remaining after removing the low IDXW bits of the N-bit transmission identifier; The second field stores the M-bit transmission identifier corresponding to the N-bit transmission identifier in the mapping information, after removing the low IDXW bits; The third field stores the allocation status of the N-bit transmission identifier of the storage row in the mapping information.

7. The device according to claim 6, wherein If the third field is equal to the first value, it indicates that the N-bit transmission identifier of the storage row has not been allocated or has been released; if the third field is greater than the first value, it indicates that the N-bit transmission identifier of the storage row has been allocated to the M-bit transmission identifier.

8. The device according to claim 7, wherein The lookup table module includes: an allocating unit, configured to receive an M-bit transmission identifier from the master port and select an N-bit transmission identifier that has not been allocated, store the M-bit transmission identifier after removing the lower IDXW bits in the second field of the storage row corresponding to the N-bit transmission identifier, and set the third field of the storage row from the first value to a value greater than the first value; a releasing unit, configured to receive an N-bit transmission identifier from the slave port, set the third field of the storage row where the N-bit transmission identifier is located from a value greater than the first value to the first value until the N-bit transmission identifier is reallocated, and then update the M-bit transmission identifier stored in the second field of the storage row to remove the lower IDXW bits; An updating unit is configured to update the third field from the first value to a value greater than the first value or from a value greater than the first value to the first value.

9. The device according to claim 4, wherein If the lookup table module supports the hash allocation mode, the lookup table module sets the third field corresponding to the unallocated or released N-bit transmission identifier to be equal to the first value, and after determining the N-bit transmission identifier corresponding to the M-bit transmission identifier through an XOR operation of the M-bit transmission identifier, sets the third field of the storage row where the corresponding N-bit transmission identifier is located from the first value to be greater than the first value.

10. A coding system for transmitting an identifier, comprising: The device according to any one of claims 1 to 9, and a master port and a slave port for data transmission using the AXI4 protocol, wherein the master port is connected to a single external host and the slave port is connected to a single external slave.

11. A method for encoding a transmission identifier, the method comprising: Storing mapping information between the M-bit transmission identifier of the master port and the N-bit transmission identifier of the slave port, and dynamically updating the allocation and release of the transmission identifier; According to the mapping information, a mapping process of the M-bit transmission identifier and the N-bit transmission identifier is performed between the master port and the slave port, where M and N are natural numbers.

Citation Information

Patent Citations

  • Transaction management

    CN102428742A

  • Mapping first identifier to second identifier

    CN111026680A

  • ID compression device and method of AXI bus

    CN115658588A

  • Transmission information matching method and device based on AXI protocol, chip and medium

    CN116881190A

  • Novel transaction ID coding method applied to AXI protocol

    CN119311621A