Automatic testing and burning integrated equipment

Abstract

The invention provides integrated equipment integrating automatic testing and burning, a control host is configured to run a test control program, and the test control program comprises the following steps: acquiring unique identification information of a PCB to be tested through a code scanning device to activate a test sequence; and executing a test process which at least comprises firmware burning, resistance parameter detection, voltage parameter detection, application program burning and real-time recording of the use condition of the quick-wear part in the full life cycle of the equipment. And when the abnormality is detected, the current test control program is automatically terminated, and a diagnosis report containing the abnormal data, the corresponding identification information and the PCB position information is generated.

Description

TECHNICAL FIELD

[0001] The present application relates to electronic device production test equipment, in particular to an integrated automatic test and burning all-in-one device. BACKGROUND

[0002] With the rapid development of electronic manufacturing industry, the production quality and efficiency of PCB (printed circuit board) are increasingly required. The traditional manual testing method has problems such as low efficiency, high misjudgment rate, and difficult data management. To solve this pain point, a highly automated ICT (in-circuit test) host computer system needs to be developed, which integrates intelligent testing, data tracing and cloud management functions to ensure the reliability, consistency and traceability of the production process. SUMMARY

[0003] To solve the technical problems in the background art, the present application provides an integrated automatic test and burning all-in-one device, which includes:

[0004] A control host configured to run a test control program, the test control program including: obtaining the unique identification information of the PCB board to be tested through the code scanning device to activate the test sequence; executing a test process including at least firmware burning, resistance parameter detection, voltage parameter detection, application program burning and real-time recording of the use of vulnerable parts in the whole life cycle of the device, and automatically terminating the current test control program and generating a diagnostic report containing abnormal data, corresponding identification information and PCB board location information when an abnormality is detected;

[0005] A multi-channel switching module in communication connection with the control host, containing a matrix relay array, used for realizing dynamic switching of the test channel in the parameter detection stage;

[0006] A parameter detection module in communication connection with the control host and configured to perform resistance parameter detection and voltage parameter detection on the PCB board;

[0007] A burning module in communication connection with the control host and configured to perform application program writing operation on the PCB board;

[0008] A data management module in communication connection with the control host, containing at least one of a local storage and a cloud communication unit, used for encrypting and binding the test data with the PCB board identification and distributed storage.

[0009] Further, the multi-channel switching module includes:

[0010] An MxN matrix relay array, whose row address line is connected to a plurality of test points (P1-P m ) of the PCB board, and whose column address line is connected to the input port of the parameter detection module;

[0011] The multiplexer is connected with the control host through a digital signal bus, and is configured to parse a switching instruction sent by the control host and drive attraction of the target row-column relay;

[0012] The control host is internally provided with a switching timing control unit, which is configured to send a test point coordinate instruction sequence to the multiplexer at a preset scanning period in the resistance parameter detection stage, and to generate a dynamic test path based on circuit topology data of the PCB in the voltage parameter detection stage and control the plurality of relays to be synchronously turned on.

[0013] Further, the parameter detection module specifically includes:

[0014] The resistance detection unit is configured to apply a calibration current to the PCB after the multiplexing module turns on the target test point, and to calculate a resistance value;

[0015] The voltage detection unit is configured to perform voltage detection when the multiplexing module switches to the circuit node to be measured.

[0016] Further, the contacts of the matrix relay array are connected in parallel with a debounce circuit, and the control host starts parameter detection after a preset debounce time after sending the switching instruction.

[0017] Further, the control host is internally provided with an exception handling unit, and the execution logic of the exception handling unit is: continuously collecting measurement data flow of the parameter detection module, write state code of the burning module, and relay contact feedback signal of the multiplexing module; dynamically comparing the collected data with a preset threshold value, and triggering an exception event when the resistance measurement value / voltage measurement value exceeds the threshold value, continuously exceeds a set fault tolerance time, or the relay contact state feedback abnormality number reaches a warning threshold value.

[0018] Further, the execution logic of the exception handling unit further includes: starting a corresponding disposal strategy according to an exception type code, and the disposal strategy specifically includes: determining an exception type, when the exception type is a recoverable fault, suspending the test process and re-executing the test item after resetting the related module; when the exception type is a hardware fault, cutting off the power supply of the device and locking the fault module.

[0019] Further, the generation process of the diagnosis report includes: after the abnormality is triggered, the current test data snapshot is captured and cached, the snapshot contains the measurement waveform of several seconds before the abnormality, the state register value of each module of the device and the environmental sensor data; the snapshot data is timestamped and packaged with the PCB board identification information and the physical coordinates output by the position encoder; the packaged data packet is encrypted, and a two-dimensional code tracking label is attached; the encrypted data packet is executed by the distributed storage unit of the data management module to perform double-channel backup, and is written into the abnormality log partition of the local storage and the fault tracking database of the cloud communication unit at the same time.

[0020] Further, the control host is also configured with a dynamic treatment optimization unit, and the running mechanism thereof includes: establishing a mapping relationship library of abnormal events and treatment strategies, and automatically promoting the treatment priority when the same type of abnormality repeatedly occurs; after the secondary abnormality is processed, a module self-checking instruction sequence is automatically generated, and the sequence includes: controlling the multi-way switching module to perform a full-channel conduction test to detect the contact impedance of the relay array; driving the parameter detection module to perform a self-calibration cycle to verify the output stability of the constant current source and the sampling accuracy of the ADC; writing test firmware to the verification chip through the burning module to confirm the integrity of the communication protocol; dynamically updating the device health status score according to the self-checking result, and adjusting the parameter tolerance range of the subsequent test process.

[0021] Beneficial effects: based on the industrial automation test framework and real-time control technology, the automatic test and burning of the PCB board are realized through the cooperation of multiple modules. The system adopts the architecture of event triggering-process control-data closed loop, takes the code scanning identification as the starting point, dynamically schedules the test resources, executes the rapid response when the abnormality occurs, and can realize the encrypted storage and tracing of the whole process data. DETAILED DESCRIPTION

[0022] The application provides an integrated device for automatic testing and burning, comprising a control host, a multi-path switching module, a parameter detection module, a burning module and a data management module. In the embodiment, the control host adopts an industrial ARM processor and runs a Windows 10 real-time operating system, and communicates through a Modbus-RTU protocol. The control host is configured to run a test control program, which comprises obtaining unique identification information of a PCB to be tested through a code scanning device to activate a test sequence, wherein the activation of the test sequence adopts an event-driven mechanism: the code scanning device reads a two-dimensional code → triggers a GPIO interrupt → loads a test configuration file of the corresponding product; the test control program is used to execute a test process comprising at least firmware burning, resistance parameter detection, voltage parameter detection, application program burning and real-time recording of the use of vulnerable parts in the whole life cycle of the device, and the software will perform a foolproof process on the use of the vulnerable parts of the device. The main measures are as follows: the software will automatically record the test times, and when the maximum test times are reached, the software will be automatically locked, and after the vulnerable parts are replaced, the software times are reset to 0, and then the device can be continuously used. The device can solve the unstable test quality caused by the loss of vulnerable parts. When an abnormality is detected, the control host automatically terminates the current test control program and generates a diagnosis report containing abnormal data, corresponding identification information and PCB position information.

[0023] The multi-path switching module is in communication connection with the control host, and comprises a matrix relay array. The multi-path switching module is used to realize dynamic switching of a test channel in the parameter detection stage.

[0024] The parameter detection module is in communication connection with the control host, and is configured to perform resistance parameter detection and voltage parameter detection on the PCB. The burning module is in communication connection with the control host, and is configured to perform application program writing operation on the PCB.

[0025] The data management module is in communication connection with the control host, and comprises at least one of a local storage and a cloud communication unit. The data management module is used to encrypt and bind test data and PCB identification, and store the data in a database. The database storage adopts a local SQLite database and a cloud MES system server storage. The application provides an integrated device for automatic testing and burning, which is constructed based on an industrial automatic testing framework and real-time control technology, and realizes automatic testing and burning of the PCB through multi-module cooperation. The system adopts an event triggering-flow control-data closed loop architecture, takes code scanning identification as a starting point, dynamically schedules test resources, executes rapid response when an abnormality occurs, and can realize encrypted storage and tracing of all-process data.

[0026] Further, the multi-path switching module comprises: an M*N matrix relay array, a multiplexer, the row address line of the M*N matrix relay array is connected to a plurality of test points (P1-P m ) of a PCB board, the column address line is connected to the input port of the parameter detection module; the multiplexer is connected with the control host through a digital signal bus, and is configured to parse the switching instruction sent by the control host and drive the attraction of the target row and column relay; wherein the control host is built-in with a switching time sequence control unit, the switching time sequence control unit is configured to send a test point coordinate instruction sequence to the multiplexer at a preset scanning period in the resistance parameter detection stage; the switching time sequence control unit is further configured to generate a dynamic test path based on the circuit topology data of the PCB board in the voltage parameter detection stage, and control a plurality of relays to be turned on synchronously. The multi-path switching module realizes efficient utilization of the core connection resources in the automatic test system through the combination of hardware topology reconstruction and intelligent path planning, and significantly improves the test coverage and production efficiency of complex PCB boards.

[0027] Further, the parameter detection module specifically comprises: a resistance detection unit and a voltage detection unit, the resistance detection unit is configured to apply a calibration current to the PCB board after the multi-path switching module turns on the target test point, and calculate the resistance value; the voltage detection unit is configured to detect the voltage when the multi-path switching module switches to the circuit node to be measured.

[0028] Further, the contact of the matrix relay array is connected in parallel with a debounce circuit, and the control host starts the parameter detection after a preset debounce time after sending the switching instruction. The debounce circuit can effectively suppress the contact bounce interference, and the preset debounce time can improve the measurement stability.

[0029] Further, the control host is configured with an exception handling unit, and the execution logic of the exception handling unit is: continuously collecting the measurement data stream of the parameter detection module, the write state code of the burning module and the relay contact feedback signal of the multi-path switching module; dynamically comparing the collected data with a preset threshold, and triggering an exception event when the resistance measurement value / voltage measurement value exceeds the limit or continuously exceeds the set fault tolerance time, or the continuous matching failure of the burning verification code or the number of relay contact state feedback exceptions reaches the warning threshold. After accurate classification, multi-dimensional scoring is performed through the model, so as to realize the improvement of fault classification accuracy, reduce the misjudgment rate, improve the efficiency of data management, and guarantee the availability of key modules, greatly reduce the downtime of the production line, and optimize the resource utilization rate by delaying the queue processing, and reduce the CPU load peak value.

[0030] Further, the execution logic of the exception processing unit further comprises: starting a corresponding handling strategy according to the exception type code, and the handling strategy specifically comprises: determining the exception type, when the determined exception type is a recoverable fault, suspending the test process and re-executing the test item after resetting the related module; and when the determined exception type is a hardware fault, cutting off the power supply of the device and locking the fault module. The recoverable fault and the hardware fault are processed separately, which can reduce downtime and loss.

[0031] Further, the generation process of the diagnosis report comprises: after the exception is triggered, capturing and caching a current test data snapshot, the snapshot containing measurement waveforms of several seconds before the exception, device module state register values and environmental sensor data; timestamping and packaging the snapshot data with PCB board identification information and physical coordinates output by the position encoder; encrypting the packaged data packet and attaching a two-dimensional code tracking label; performing double-channel backup of the encrypted data packet through the distributed storage unit of the data management module, and simultaneously writing the encrypted data packet into the exception log partition of the local storage and the fault tracking database of the cloud communication unit.

[0032] Further, the control host is further configured with a dynamic handling optimization unit, and the operation mechanism of the dynamic handling optimization unit comprises: establishing a mapping relationship library of exception events and handling strategies, and automatically promoting the handling priority when the same type of exception repeatedly occurs; after the secondary exception processing, automatically generating a module self-check instruction sequence, the sequence comprising: controlling the multi-way switching module to perform a full-channel conduction test to detect the contact impedance of the relay array; driving the parameter detection module to perform a self-calibration cycle to verify the output stability of the constant current source and the sampling accuracy of the ADC; writing test firmware into the verification chip through the burning module to confirm the integrity of the communication protocol; dynamically updating the device health state score according to the self-check result, and adjusting the parameter tolerance range of the subsequent test process. The self-check process is standardized, the health score can quantify the device state and predict the fault in advance to implement maintenance on the device, the adaptive tolerance can improve the yield rate and reduce the misjudgment rate.

[0033] The above is only a preferred specific embodiment of the present application, but the protection scope of the present application is not limited thereto, any person skilled in the art can make equivalent replacement or change according to the technical solution and the inventive concept of the present application within the technical range disclosed by the present application, which should be covered within the protection scope of the present application.

Claims

1. An integrated device for automated testing and programming, characterized in that: include: The control host is configured to run a test control program, which includes: obtaining unique identification information of a PCB to be tested through a code scanning device to activate a test sequence; executing a test process including at least firmware burning, resistance parameter detection, voltage parameter detection, and application program burning, and real-time recording of usage of consumable parts throughout the life cycle of the device; and automatically terminating the current test control program when an abnormality is detected and generating a diagnostic report including abnormal data, corresponding identification information, and PCB board location information. The multi-channel switching module is connected to the control host and includes a matrix relay array for realizing dynamic switching of test channels during the parameter detection stage; A parameter detection module is connected to the control host and is configured to perform resistance parameter detection and voltage parameter detection on the PCB board; The burning module is connected to the control host and is configured to execute an application writing operation on the PCB board; The data management module is connected to the control host and includes at least one of a local memory and a cloud communication unit, and is used to encrypt and bind the test data with the PCB board identification and store them in a distributed manner.

2. The integrated automated testing and programming device according to claim 1, wherein: The multi-way switching module includes: The M×N matrix relay array has row address lines connected to multiple test points (P1-P m ), the column address line is connected to the input port of the parameter detection module; The multiplexer is connected to the control host through a digital signal bus and is configured to parse the switching instructions sent by the control host and drive the target row and column relays to be attracted; Among them, the control host has a built-in switching timing control unit, which is configured to send a test point coordinate instruction sequence to the multiplexer according to a preset scanning cycle during the resistance parameter detection stage; the switching timing control unit is also configured to generate a dynamic test path based on the circuit topology data of the PCB board during the voltage parameter detection stage, and control multiple relays to be turned on synchronously.

3. The integrated automated testing and programming device according to claim 2, wherein: The parameter detection module specifically includes: The resistance detection unit is configured to apply a calibration current to the PCB board and calculate the resistance value after the multi-channel switching module conducts the target test point; The voltage detection unit is configured to perform voltage detection when the multi-way switching module switches to the circuit node to be tested.

4. The integrated device for automated testing and programming as claimed in claim 2, characterized in that: A debounce circuit is connected in parallel at both ends of the contacts of the matrix relay array. After the control host sends a switching command, it delays the preset debounce time before starting parameter detection.

5. The integrated automated testing and programming device according to claim 1, wherein: The control host is equipped with an exception handling unit. The execution logic of the exception handling unit is as follows: continuously collect the measurement data stream of the parameter detection module, the write status code of the burning module, and the relay contact feedback signal of the multi-channel switching module; dynamically compare the collected data with the preset threshold value, and trigger an exception event when the resistance measurement value / voltage measurement value exceeds the limit or continuously exceeds the set fault tolerance time, or the burning verification code fails to match continuously, or the number of abnormal relay contact status feedback reaches the warning threshold.

6. The integrated automated testing and programming device according to claim 5, characterized in that: The execution logic of the exception handling unit also includes: starting the corresponding handling strategy according to the exception type code. The handling strategy specifically includes: determining the exception type. When the exception type is determined to be a recoverable fault, pausing the test process and re-executing the test item after resetting the relevant modules; when the exception type is determined to be a hardware fault, cutting off the power supply of the equipment and locking the faulty module.

7. The integrated automated testing and programming device according to claim 1, wherein: The diagnostic report generation process includes: after an anomaly is triggered, capturing a snapshot of the current test data and caching it. The snapshot includes the measurement waveforms, status register values ​​of each module of the device, and environmental sensor data several seconds before the anomaly; aligning and packaging the snapshot data with the PCB board identification information and the physical coordinates output by the position encoder; encrypting the encapsulated data packet and attaching a QR code tracking tag; performing dual-channel backup of the encrypted data packet through the distributed storage unit of the data management module, and simultaneously writing it to the anomaly log partition of the local memory and the fault tracking database of the cloud communication unit.

8. The integrated automated testing and programming device according to claim 7, characterized in that: The control host is also equipped with a dynamic handling optimization unit, whose operating mechanism includes: establishing a mapping relationship library between abnormal events and handling strategies, and automatically increasing the handling priority when similar abnormalities occur repeatedly; automatically generating a module self-test instruction sequence after secondary abnormality processing, the sequence includes: controlling the multi-channel switching module to perform a full-channel conduction test and detecting the contact impedance of the relay array; driving the parameter detection module to perform a self-calibration cycle to verify the output stability of the constant current source and the ADC sampling accuracy; writing test firmware to the verification chip through the burning module to confirm the integrity of the communication protocol; dynamically updating the equipment health status score according to the self-test results, and adjusting the parameter tolerance range of the subsequent test process.