Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a plurality of fan-out lines, and the plurality of fan-out lines comprise a first fan-out line group. The display panel comprises a fan-out area, the fan-out area comprises a first fan-out area, and fan-out lines in the first fan-out line group extend and pass through the first fan-out area. In the first fan-out area, fan-out lines in the first fan-out line group comprise at least one first straight line segment and at least one second straight line segment, the first straight line segments extend in the first direction, the second straight line segments extend in the second direction, and the first straight line segments are connected with the second straight line segments. The first direction intersects with the second direction, and the first direction and the second direction are parallel to the plane where the display panel is located. Therefore, the fan-out lines in the first fan-out line group are arranged in a broken line mode in the first fan-out area. The broken line type wiring mode can increase the space utilization rate of the first fan-out area, so that a large space is vacated for arrangement of other circuits below the first fan-out area, and overall wiring layout is facilitated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] With the development of display technology, the display panel on the market is required to have the characteristics of ultra-narrow frame or even frameless. With the compression of the frame area, the wires and circuits in the frame area are concentrated in the fan-out area of the display panel, so that the wires and circuits in the fan-out area are distributed complexly, leading to wiring difficulty. SUMMARY

[0003] The present application provides a display panel and a display device, by setting the wiring mode of the fan-out lines in the first fan-out line group in the first fan-out area as a zigzag type, the space utilization rate of the first fan-out area can be increased, so that a larger space is left below the first fan-out area for the arrangement of other circuits, facilitating the overall wiring layout.

[0004] In a first aspect, the present application provides a display panel, comprising: a plurality of fan-out lines, the plurality of fan-out lines comprising a first fan-out line group;

[0005] The display panel comprises a fan-out area, the fan-out area comprising a first fan-out area; the fan-out lines in the first fan-out line group extend through the first fan-out area;

[0006] In the first fan-out area, the fan-out lines in the first fan-out line group comprise at least one first straight line segment and at least one second straight line segment, the first straight line segment extends along a first direction, the second straight line segment extends along a second direction, and the first straight line segment and the second straight line segment are connected; the first direction intersects the second direction, and the first direction and the second direction are parallel to the plane on which the display panel is located.

[0007] In a second aspect, the present application also provides a display device, comprising the display panel of any one of the first aspect.

[0008] In the technical solution of the present application, in the first fan-out area, the fan-out lines in the first fan-out line group comprise at least one first straight line segment and at least one second straight line segment, the first straight line segment extends along a first direction, the second straight line segment extends along a second direction, and the first straight line segment and the second straight line segment are connected. In this way, in the first fan-out area, the first straight line segment extending along the first direction is connected with the second straight line segment extending along the second direction, forming a zigzag wiring mode. The zigzag wiring mode can increase the space utilization rate of the first fan-out area, and by adjusting the length ratio of the first straight line segment and the second straight line segment, a larger space can be left below the first fan-out area to provide a design space for the arrangement of other circuits, facilitating the overall wiring layout. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 is a partial schematic view of a display panel in the prior art;

[0010] Figure 2 is a partial schematic view of a display panel provided by an embodiment of the present application;

[0011] Figure 3 is a structural schematic view of a circuit region provided by an embodiment of the present application;

[0012] Figure 4 is a partial schematic view of another display panel provided by an embodiment of the present application;

[0013] Figure 5 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0014] Figure 6 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0015] Figure 7 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0016] Figure 8 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0017] Figure 9 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0018] Figure 10 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0019] Figure 11 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0020] Figure 12 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0021] Figure 13 is a partial schematic view of yet another display panel provided by an embodiment of the present application;

[0022] Figure 14 is a structural schematic view of a display device provided by an embodiment of the present application;

[0023] Figure 15 is a structural schematic view of another display device provided by an embodiment of the present application;

[0024] Figure 16 is a structural schematic view of yet another display device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to make the objects, technical solutions and advantages of the present application clearer, the following will be combined with the accompanying drawings for brief description of the technical solutions of the present application by specific working examples. Obviously, the described examples are only a part of the examples of the present application, and not all the examples of the present application. Various modifications and variations can be made to the present application without departing from the spirit or scope of the present application, which will be apparent to one of ordinary skill in the art. Therefore, the present application is intended to cover the modifications and variations of the present application falling within the scope of the corresponding claims (the technical solutions claimed to be protected) and their equivalents.

[0026] Also, the "first", "second", and similar words used in the embodiments of the present disclosure do not mean any order, number, or importance, but are only used to distinguish different components. Similarly, "one", "a", or "the" and similar words do not mean a number limitation, but mean that there is at least one. "Include" or "contain" and similar words mean that the elements or objects before the word cover the elements or objects listed after the word and their equivalents, and do not exclude other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right", and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships can also change accordingly. In addition, the same, equal, and the like described in the embodiments of the present disclosure do not mean that the two objects are exactly the same in size and exactly the same in shape, but allow them to be approximately the same and approximately equal within a certain error range. It should be noted that the embodiments provided by the present application can be combined with each other without contradiction.

[0027] Figure 1 is a partial schematic view of a display panel in the prior art. Referring to Figure 1 , the display panel includes a circuit area D' and a fan-out area S'. The fan-out area S' is located at a position close to the edge of the display panel in the circuit area D'. At present, the display panel is required to have a narrow frame or even a frameless feature. With the compression of the frame area and the increase of the resolution of the display panel, a large number of traces and circuits are concentrated in the fan-out area S'. For example Figure 1As shown, the fan-out lines 10' in the current fan-out area S' usually adopt a diagonal wiring mode. The diagonal wiring mode is diagonal from the initial point to the terminal point, so that the fan-out line 10' occupies a larger space on the left side of the fan-out area S' in the longitudinal direction (diagonal position) and a smaller space on the right side of the fan-out area S' in the longitudinal direction (S1'), that is, the space utilization on the right side of the fan-out area S' in the longitudinal direction (S1') is low, and the overall space occupation in the longitudinal direction is large, so that there is not enough space for the design of other circuits, and as shown in the S2' area, the diagonal wiring mode makes the space vacated below a triangular area, so that the arrangement of other circuits is limited. Figure 1

[0028] To solve the above technical problems, the embodiment of the present application provides a first fan-out area, and a fan-out line in a first fan-out line group includes at least one first straight line segment and at least one second straight line segment, the first straight line segment extends in a first direction, the second straight line segment extends in a second direction, and the first straight line segment and the second straight line segment are connected. In this way, in the first fan-out area, the first straight line segment extending in the first direction is connected with the second straight line segment extending in the second direction to form a zigzag wiring mode, which can increase the space utilization of the first fan-out area, and by adjusting the length ratio of the first straight line segment and the second straight line segment, a larger space can be vacated below the first fan-out area to provide design space for the arrangement of other circuits, facilitate overall wiring layout, and compared with the diagonal line, the zigzag line can vacate a more square space or area to facilitate the arrangement of regular circuit structures.

[0029] The above is the core idea of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application. The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the accompanying drawings of the embodiments of the present application.

[0030] Figure 2 is a partial schematic view of a display panel provided by an embodiment of the present application. Referring to Figure 2 The display panel includes a plurality of fan-out lines 10, and the plurality of fan-out lines 10 include a first fan-out line group 110. The display panel includes a fan-out area S, and the fan-out area S includes a first fan-out area S1, and the fan-out lines 10 in the first fan-out line group 110 extend through the first fan-out area S1. In the first fan-out area S1, the fan-out lines 10 in the first fan-out line group 110 include at least one first straight line segment 111 and at least one second straight line segment 112, the first straight line segment 111 extends in a first direction X, the second straight line segment 112 extends in a second direction Y, the first straight line segment 111 and the second straight line segment 112 are connected, the first direction X intersects the second direction Y, and the first direction X and the second direction Y are parallel to the plane on which the display panel is located. ​

[0031] Specifically, as shown in Figure 2 The display panel can include a circuit region D, the circuit region D including a plurality of pixel circuits 100, a plurality of shift register circuits 200, a plurality of gate signal lines 300 and a plurality of data signal lines 400. The plurality of pixel circuits 100 can be arranged in an array, and the output end of the shift register circuit 200 is electrically connected with the gate signal line 300. The plurality of gate signal lines 300 can extend along a first direction X, and the plurality of data signal lines 400 can extend along a second direction Y. The orthogonal projection of the plurality of gate signal lines 300 and the plurality of data signal lines 400 on the display panel can intersect to form a plurality of circuit regions, and one pixel circuit 100 can be arranged in each circuit region. The plurality of data signal lines 400 are electrically connected with the plurality of pixel circuits 100, and the plurality of data signal lines 400 can be configured to provide data signals to the plurality of pixel circuits 100. One end of the plurality of gate signal lines 300 is electrically connected with the shift register circuit 200, and the other end is electrically connected with the plurality of pixel circuits 100. The plurality of gate signal lines 300 can be configured to provide gate control signals to the plurality of pixel circuits 100. The gate control signals can include scan signals, or can include scan signals and light-emitting control signals.

[0032] It should be noted that, Figure 2 Only the shift register circuit 200 located at the edge region of the circuit region D is described by way of example, but this is not limiting. In other embodiments, Figure 3 is a structural schematic diagram of a circuit region provided by an embodiment of the present application. As shown in Figure 3 The arrayed pixel circuits 100 include a plurality of pixel circuit rows and a plurality of pixel circuit columns, and the shift register circuit 200 can also be located between the pixel circuit columns. It can be understood that in yet another embodiment, the shift register circuit 200 can also be located between the pixel circuit rows, which can be arranged as needed by those skilled in the art.

[0033] In addition, the display panel further comprises a first fan-out line group 110, a first fan-out area S1 and a driving chip (not shown in the figure), and the fan-out lines 10 in the first fan-out line group 110 extend through the first fan-out area S1. For example, the fan-out lines 10 in the first fan-out line group 110 extend through the first fan-out area S1 and are finally coupled with the driving chip, so that the driving chip can provide driving signals for various signal lines in the circuit area D through the fan-out lines 10. For example, one end of the fan-out line 10 can be electrically connected with the data signal line 400 in the circuit area D, and the other end is coupled with the driving chip, so that the driving chip provides data signals for the data signal line 400 through the corresponding fan-out line 10, or one end of the fan-out line 10 can be electrically connected with the shift register circuit 200, and the other end is coupled with the driving chip, so that the driving chip provides various signals (such as VGH, VGL and STV signals) for the shift register circuit 200 through the corresponding fan-out line 10, so that the shift register circuit 200 can output the gate control signal to the gate signal line 300.

[0034] The embodiment of the present application also comprises a fan-out area S, and the fan-out area S comprises a first fan-out area S1. In the first fan-out area S, the fan-out lines 10 in the first fan-out line group 110 comprise at least one first straight line segment 111 and at least one second straight line segment 112. The first straight line segment 111 extends along the first direction X, the second straight line segment 112 extends along the second direction Y, and the first straight line segment 111 and the second straight line segment 112 are connected. In the first fan-out area S, the first straight line segment 111 extending along the first direction X is connected with the second straight line segment 112 extending along the second direction Y, that is, the wiring mode of the fan-out lines 10 in the first fan-out line group 110 in the first fan-out area S comprises a zigzag type. The wiring mode of the zigzag type is bent and extended below the left side and above the right side of the connection line between the initial point and the terminal point. By controlling the extension length of the first straight line segment 111 along the first direction X and the extension length of the second straight line segment 112 along the second direction Y, the fan-out lines 10 can be more distributed above the right side of the first fan-out area S1, that is, the space utilization rate of the right upper area in the first fan-out area S1 is increased, so that a larger space below the first fan-out area S1 can be released, providing a design space for the arrangement of other circuits, facilitating the overall wiring layout, and compared with the diagonal type, the wiring mode of the zigzag type can release a relatively square space or area, facilitating the arrangement of regular circuit structures.

[0035] In summary, the embodiment of the present application sets the first straight segment extending along the first direction and the second straight segment extending along the second direction in the first fan-out area, that is, the wiring mode of the fan-out lines of the first fan-out line group in the first fan-out area includes a broken line type. The broken line type wiring mode can increase the space utilization of the first fan-out area, and by adjusting the length ratio of the first straight segment and the second straight segment, a larger space can be left below the first fan-out area to provide a design space for the arrangement of other circuits, facilitate the overall wire arrangement layout, and compared with the diagonal line type, the broken line type wiring mode can leave a relatively square space or area to facilitate the arrangement of regular circuit structures.

[0036] Optionally, based on the above-mentioned embodiment, Figure 4 is another partial schematic view of a display panel provided by the embodiment of the present application, Figure 5 is still another partial schematic view of a display panel provided by the embodiment of the present application. Referring to Figure 4 and Figure 5 The plurality of fan-out lines 10 further include a second fan-out line group 120, and the fan-out area S further includes a second fan-out area S2, and the fan-out lines 10 in the second fan-out line group 120 extend through the second fan-out area S2. In the second fan-out area S2, the fan-out lines 10 in the second fan-out line group 120 include a first diagonal segment 121, and the first diagonal segment 121 extends along a third direction Z, and the third direction Z has an acute angle with the first direction X and the second direction Y, respectively, and / or in the second fan-out area S2, the fan-out lines 10 in the second fan-out line group 120 include at least two third straight segments 123 and at least two fourth straight segments 124, the third straight segments 123 extend along the first direction X, the fourth straight segments 124 extend along the second direction Y, and the third straight segments 123 and the fourth straight segments 124 are connected.

[0037] Specifically, as Figure 4In the illustrated embodiment, the display panel further comprises a second fan-out region S2 and a second fan-out line group 120, the fan-out lines 10 in the second fan-out line group 120 extend through the second fan-out region S2. The first fan-out region S1 and the second fan-out region S2 are arranged adjacent along the first direction X. In this embodiment, the first fan-out region S1 can be an edge region of the display panel along the first direction X, and the second fan-out region S2 can be a central region of the display panel along the first direction X. The fan-out lines 10 in the first fan-out region S1 include the fan-out lines 10 electrically connected to the shift register circuit 200 and the fan-out lines 10 electrically connected to the data signal lines 400, while the fan-out lines 10 in the second fan-out region S2 include the fan-out lines 10 electrically connected to the data signal lines 400, i.e., the number of the fan-out lines 10 in the first fan-out region S1 is greater than that in the second fan-out region S2. In other words, compared with the first fan-out region S1, the number of the fan-out lines 10 in the second fan-out region S2 is smaller, so that the second fan-out region S2 occupies a smaller space, and a larger space can be left below the second fan-out region S2. At this time, in the second fan-out region S2, the fan-out lines 10 in the second fan-out line group 120 include first diagonal line segments 121, the first diagonal line segments 121 extend along a third direction Z, the third direction Z has an acute angle with the first direction X and the second direction Y, respectively, so that the wiring mode of the second fan-out region S2 is diagonal, thereby ensuring that the arrangement mode of the fan-out lines 10 in the second fan-out region S2 is simple.

[0038] It should be noted that, Figure 4 It should be noted that, Figure 5As shown, when the number of fan-out lines 10 in the second fan-out area S2 is similar to the number of fan-out lines 10 in the first fan-out area S1, that is, the number of fan-out lines 10 in the first fan-out area S1 and the second fan-out area S2 is large, thereby occupying a large space in the second direction Y, the fan-out line 10 in the second fan-out line group 120 in the second fan-out area S2 can include at least two third straight line segments 123 and at least two fourth straight line segments 124, the third straight line segment 123 extends along the first direction X, the fourth straight line segment 124 extends along the second direction Y, and the third straight line segment 123 and the fourth straight line segment 124 are connected. That is, the wiring mode of the fan-out line 10 in the second fan-out line group 120 in the second fan-out area S2 is a broken line type, by controlling the extension length of the third straight line segment 123 in the first direction X and the extension length of the fourth straight line segment 124 in the second direction Y, the fan-out line 10 can be more distributed in the upper right of the second fan-out area S2, that is, the space utilization rate of the upper right area in the second fan-out area S2 is increased, thereby a larger space can be left below the second fan-out area S2, providing design space for the arrangement of other circuits, facilitating overall wiring layout, and compared with the diagonal line type, the broken line type can leave a relatively square space or area, facilitating the arrangement of regular circuit structures. In addition, in another embodiment, the fan-out line 10 in the second fan-out line group 120 can simultaneously include the first diagonal line segment 121, at least two third straight line segments 123 and at least two fourth straight line segments 124. Among them, the first diagonal line segment 121 extends along the third direction Z, and the third straight line segment 123 and the fourth straight line segment 124 are connected, that is, the wiring mode of the fan-out line 10 in the second fan-out area S2 includes a diagonal line type and a broken line type, and the present application does not limit this, and those skilled in the art can set it according to the needs.

[0039] Optionally, based on the above-mentioned embodiments, Figure 6 is another partial schematic view of a display panel provided by an embodiment of the present application, Figure 7 is another partial schematic view of a display panel provided by an embodiment of the present application. Referring to Figure 6 and Figure 7The display panel further comprises a third fan-out area S3, and the fan-out lines 10 in the first fan-out line group 110 and the second fan-out line group 120 all extend through the third fan-out area S3. In the third fan-out area S3, the fan-out lines 10 in the first fan-out line group 110 comprise at least one fifth straight line segment 115 and at least one sixth straight line segment 116, the fifth straight line segment 115 extends along the first direction X, the sixth straight line segment 116 extends along the second direction Y, and the fifth straight line segment 115 and the sixth straight line segment 116 are connected. And / or, in the third fan-out area S3, the fan-out lines 10 in the first fan-out line group 110 comprise a second oblique line segment 117, the second oblique line segment 117 extends along a fourth direction M, and the fourth direction M has an acute angle with the first direction X and the second direction Y respectively. In the third fan-out area S3, the fan-out lines 10 in the second fan-out line group 120 comprise at least one seventh straight line segment 127 and at least one eighth straight line segment 128, the seventh straight line segment 127 extends along the first direction X, the eighth straight line segment 128 extends along the second direction Y, and the seventh straight line segment 127 and the eighth straight line segment 128 are connected. And / or, in the third fan-out area S3, the fan-out lines 10 in the second fan-out line group 120 comprise a third oblique line segment 129, the third oblique line segment 129 extends along a fifth direction N, and the fifth direction N has an acute angle with the first direction X and the second direction Y respectively.

[0040] Specifically, as shown in Figure 6 and Figure 7 , the fan-out area S further comprises a third fan-out area S3, and the fan-out lines 10 of the first fan-out line group 110 extend through the first fan-out area S1 and the third fan-out area S3. The fan-out lines 10 of the second fan-out line group 120 extend through the second fan-out area S2 and the third fan-out area S3. The fan-out lines 10 of the first fan-out line group 110 and the second fan-out line group 120 all extend through the third fan-out area S3, so the third fan-out area S3 can be located below the first fan-out area S1 and the second fan-out area S2, that is, along the second direction Y, the first fan-out area S1 and the second fan-out area S2 both overlap with the third fan-out area S3, so that the fan-out lines 10 of the first fan-out line group 110 and the second fan-out line group 120 are coupled with the driving chip through the third fan-out area S3.

[0041] On the basis of the above, as shown in Figure 6As shown, in the third fan-out area S3, the fan-out lines 10 in the first fan-out line group 110 include a fifth straight line segment 115 extending along the first direction X and a sixth straight line segment 116 extending along the second direction Y, and the fifth straight line segment 115 and the sixth straight line segment 116 are connected, so that the wiring mode of the fan-out lines 10 in the first fan-out line group 110 in the third fan-out area S3 is a zigzag line type. By controlling the extension length of the fifth straight line segment 115 along the first direction X and the extension length of the sixth straight line segment 116 along the second direction Y, the space utilization of the third fan-out area S3 in the second direction Y can be increased, so that a larger space above the third fan-out area S3 can be vacated, and a larger space between the first fan-out area S1 and the third fan-out area S3 can be vacated, thereby providing a design space for the arrangement of other circuits. Similarly, in the third fan-out area S3, the fan-out lines 10 in the second fan-out line group 120 include a seventh straight line segment 127 extending along the first direction X and an eighth straight line segment 128 extending along the second direction Y, and the seventh straight line segment 127 and the eighth straight line segment 128 are connected, so that the wiring mode of the fan-out lines 10 in the second fan-out line group 120 in the third fan-out area S3 is a zigzag line type. By controlling the extension length of the seventh straight line segment 127 along the first direction X and the extension length of the eighth straight line segment 128 along the second direction Y, the space utilization of the third fan-out area S3 in the second direction Y can be increased, so that a larger space above the third fan-out area S3 can be vacated, and a larger space between the second fan-out area S2 and the third fan-out area S3 can be vacated, thereby providing a design space for the arrangement of other circuits.

[0042] In addition, as Figure 7 As shown, in the third fan-out area S3, the fan-out lines 10 in the first fan-out line group 110 can also include a second diagonal line segment 117 extending along a fourth direction M, and the fourth direction M has an acute angle with the first direction X and the second direction Y, respectively. That is, the wiring mode of the fan-out lines 10 in the first fan-out line group 110 in the third fan-out area S3 is a diagonal line type, so as to ensure that the arrangement mode of the fan-out lines 10 in the first fan-out line group 110 in the third fan-out area S3 is simple. Similarly, in the third fan-out area S3, the fan-out lines 10 in the second fan-out line group 120 include a third diagonal line segment 129 extending along a fifth direction N, and the fifth direction N has an acute angle with the first direction X and the second direction Y, respectively. That is, the wiring mode of the fan-out lines 10 in the second fan-out line group 120 in the third fan-out area S3 is a diagonal line type, so as to ensure that the arrangement mode of the fan-out lines 10 in the second fan-out line group 120 in the third fan-out area S3 is simple.

[0043] It should be noted that Figure 7 In the embodiments shown, the fourth direction M and the fifth direction N are the same as an example for illustration, but this is not limited thereto. In other embodiments, the fourth direction M and the fifth direction N can also be different, which can be set as needed by those skilled in the art.

[0044] It should be further noted that, on the basis of the above-mentioned embodiments, in the third fan-out area S3, the fan-out lines 10 in the first fan-out line group 110 can include the second diagonal line segment 117, while the fan-out lines in the second fan-out line group 120 can include the seventh straight line segment 127 extending along the first direction X and the eighth straight line segment 128 extending along the second direction Y. Alternatively, in the third fan-out area S3, the fan-out lines 10 of the first fan-out line group 110 can include the fifth straight line segment 115 extending along the first direction X and the sixth straight line segment 116 extending along the second direction Y, while the fan-out lines in the second fan-out line group 120 can include the third diagonal line segment 129, that is, the third fan-out area S3 can also simultaneously include the zigzag type and the diagonal type of the wiring mode, and the present application does not limit this, and those skilled in the art can set it according to the needs.

[0045] Optionally, on the basis of the above-mentioned embodiments, Figure 8 is another partial schematic view of a display panel provided by an embodiment of the present application, referring to Figure 8 , the display panel further includes a plurality of anti-static circuits 130, and the plurality of anti-static circuits 130 includes a first anti-static circuit group 131. The display panel further includes an anti-static circuit area T, and the anti-static circuit area T includes a first anti-static circuit area T1, and the first anti-static circuit group 131 is located in the first anti-static circuit area T1. The first anti-static circuit area T1 is located between the first fan-out area S1 and the third fan-out area S3 in the second direction Y. At least part of the fan-out lines 10 in the first fan-out line group 110 extends from the first fan-out area S1 to the third fan-out area S3 through the first anti-static circuit area T1.

[0046] Specifically, as shown in Figure 8 , the display panel further includes an anti-static circuit area T, and the anti-static circuit area T includes a first anti-static circuit area T1, and the first anti-static circuit area T1 is located between the first fan-out area S1 and the third fan-out area S3 in the second direction Y. Further, when the wiring mode of the fan-out lines 10 of the first fan-out line group 110 in the first fan-out area S1 is the zigzag type, and the wiring mode of the fan-out lines 10 of the first fan-out line group 110 in the third fan-out area S3 is the zigzag type, a larger space can be left between the first fan-out area S1 and the third fan-out area S3, so as to provide a design space for the arrangement of the first anti-static circuit group 131 in the first anti-static circuit area T1. In addition, since the overall shape of the first anti-static circuit area T1 is square, the zigzag type leaves a relatively square space or area, which can facilitate the arrangement of the first anti-static circuit group 131.

[0047] Optionally, continuing to refer to Figure 8In the first anti-static circuit region T1, the fan-out lines 10 in the first fan-out line group 110 include the ninth straight line segments 119, the ninth straight line segments 119 extend along the second direction Y, and the ninth straight line segments 119 are connected to the anti-static circuits 130 one by one.

[0048] Specifically, the fan-out lines 10 in the first fan-out line group 110 include the ninth straight line segments 119, the ninth straight line segments 119 are located in the first anti-static circuit region T1, and are connected to the anti-static circuits 130 in the first anti-static circuit region T1 one by one. For example, the fan-out lines 10 in the first fan-out line group 110 can include a sixth fan-out line which needs to be protected against static electricity, the sixth fan-out line includes the ninth straight line segments 119 extending to the first anti-static circuit region T1, and the sixth fan-out line and the signal lines connected to the sixth fan-out line are protected against static electricity by connecting the ninth straight line segments 119 to the anti-static circuits 130 in the first anti-static circuit region T1, thereby ensuring the reliability of the display panel.

[0049] Optionally, based on the above-mentioned embodiments, Figure 9 is another partial schematic view of a display panel provided by an embodiment of the present application. Referring to Figure 9 The plurality of anti-static circuits 130 further include a second anti-static circuit group 132. The anti-static circuit region T further includes a second anti-static circuit region T2, the second anti-static circuit group 132 is located in the second anti-static circuit region T2, and the second anti-static circuit region T2 is located between the second fan-out region S2 and the third fan-out region S3 in the second direction Y. In the second fan-out line group 120, at least part of the fan-out lines 10 extend from the second fan-out region S2, pass through the second anti-static circuit region T2, and reach the third fan-out region S3, and at least part of the fan-out lines 10 extend from the second fan-out region S2 and reach the second anti-static circuit region T2.

[0050] Specifically, as Figure 9As shown, the anti-static circuit region T further comprises a second anti-static circuit region T2, the second anti-static circuit region T2 is located between the second fan-out region S2 and the third fan-out region S3 along the second direction Y, and when the routing mode of the fan-out lines 10 of the second fan-out line group 120 in the second fan-out region S2 is a zigzag type and the routing mode of the fan-out lines 10 of the second fan-out line group 120 in the third fan-out region S3 is a zigzag type, a larger space can be left between the second fan-out region S2 and the third fan-out region S3 to provide a larger design space for the arrangement of the second anti-static circuit group 132 in the second anti-static circuit region T2, facilitating the arrangement of the second anti-static circuit group 132. In addition, in the second fan-out line group 120, at least part of the fan-out lines 10 extend from the second fan-out region S2 through the second anti-static circuit region T2 to the third fan-out region S3, and are coupled to the driving chip through the third fan-out region S3, so that the driving chip provides driving signals for the signal lines electrically connected to the fan-out lines 10 through the third fan-out region S3, the second anti-static circuit region T2 and the second fan-out region S2. In addition, there are also part of the fan-out lines 10 extending from the second fan-out region S2 to the second anti-static circuit region T2 and electrically connected to the anti-static circuits 130 in the second anti-static circuit region T2.

[0051] Continuing to refer to Figure 9 The part of the fan-out lines 10 extending from the second fan-out region S2 through the second anti-static circuit region T2 to the third fan-out region S3 comprises a tenth straight line segment 1210, the tenth straight line segment 1210 is located in the second anti-static circuit region T2 and extends along the second direction Y. The tenth straight line segment 1210 is insulated from the anti-static circuits 130 and alternately arranged in the first direction X. The part of the fan-out lines 10 extending from the second fan-out region S2 to the second anti-static circuit region T2 comprises a tenth straight line segment 1211, the tenth straight line segment 1211 is located in the second anti-static circuit region T2 and extends along the second direction Y, and the tenth straight line segment 1211 is connected to the anti-static circuits 130 one by one.

[0052] Specifically, as Figure 9As shown, the fan-out lines of the second fan-out line group 120 include a third fan-out line (not shown in the figure) and a fourth fan-out line (not shown in the figure). The third fan-out line extends from the second fan-out area S2 through the second anti-static circuit area T2 to the third fan-out area S3, and the part of the third fan-out line in the second anti-static circuit area T2 includes a tenth straight line segment 1210, which is insulated from the anti-static circuit 130 and is arranged alternately in the first direction X. One end of the third fan-out line is electrically connected to the driving chip through the third fan-out area S3, and the other end is electrically connected to the signal line in the circuit area D, so that the driving chip transmits signals to the signal line in the circuit area D through the third fan-out line. It can be understood that the signal line electrically connected to the third fan-out line can be a line that does not need to be protected against static electricity, and therefore the tenth straight line segment 1210 of the third fan-out line is insulated from the anti-static circuit 130. The fourth fan-out line extends from the second fan-out area S2 to the second anti-static circuit area T2, and the part of the fourth fan-out line in the second anti-static circuit area T2 includes a tenth straight line segment 1211, which is connected to the anti-static circuit 130 one by one. Therefore, the signal line electrically connected to the fourth fan-out line can be a line that needs to be protected against static electricity, and the tenth straight line segment 1211 is connected to the anti-static circuit 130 one by one to protect the fourth fan-out line and the signal line electrically connected to the fourth fan-out line against static electricity, thereby ensuring the reliability of the display panel.

[0053] Optionally, based on the above-mentioned embodiments, Figure 10 is another local schematic diagram of a display panel provided by an embodiment of the present application. Referring to Figure 10 The fan-out area S further includes a fourth fan-out area S4 between the first anti-static circuit area T1 and the second anti-static circuit area T2 in the first direction X. In the first fan-out line group 110, at least part of the fan-out lines 10 extend from the first fan-out area S1 through the fourth fan-out area S4 to the third fan-out area S3.

[0054] Specifically, as Figure 10In the illustrated embodiment, the fan-out lines of the first fan-out line group 110 include a sixth fan-out line and a seventh fan-out line, wherein the sixth fan-out line extends through the first fan-out area S1 and the first anti-static circuit area T1 and finally reaches the third fan-out area S3. The sixth fan-out line can be a fan-out line that needs to be protected against static electricity. By arranging the sixth fan-out line to extend through the first anti-static circuit area T1 and be electrically connected to the anti-static circuit 130 in the first anti-static circuit area T1, the sixth fan-out line and the signal lines connected to the sixth fan-out line are protected against static electricity. The seventh fan-out line extends through the first fan-out area S1 and the fourth fan-out area S4 and finally reaches the third fan-out area S3. The fourth fan-out area S4 is located between the first anti-static circuit area T1 and the second anti-static circuit area T2 in the first direction X and between the first fan-out area S1 and the third fan-out area S3 in the second direction Y. The seventh fan-out line can be a fan-out line that does not need to be protected against static electricity. By arranging the seventh fan-out line to avoid the first anti-static circuit area T1 and the second anti-static circuit area T2, interference between the anti-static circuit 130 and the seventh fan-out line is avoided.

[0055] Optionally, continuing to refer to Figure 10 , the first fan-out line group 110 includes a twelfth straight line segment 1112 and a thirteenth straight line segment 1113. The twelfth straight line segment 1112 and the thirteenth straight line segment 1113 are located in the fourth fan-out area S4. The twelfth straight line segment 1112 extends in the first direction X, and the thirteenth straight line segment 1113 extends in the second direction Y. The twelfth straight line segment 1112 and the thirteenth straight line segment 1113 are connected, and both the twelfth straight line segment 1112 and the thirteenth straight line segment 1113 are connected to the fan-out lines 10 in the first fan-out area S1 and the third fan-out area S3.

[0056] Specifically, as Figure 10 shown, the fan-out lines of the first fan-out line group 110 extending to the fourth fan-out area S4 include a twelfth straight line segment 1112 extending in the first direction X and a thirteenth straight line segment 1113 extending in the second direction Y. Both the twelfth straight line segment 1112 and the thirteenth straight line segment 1113 are connected to the fan-out lines 10 in the first fan-out area S1 and the third fan-out area S3, thereby ensuring that the driving chip can transmit driving signals to the signal lines of the circuit area D through the third fan-out area S3, the fourth fan-out area S4, and the first fan-out area S1. In addition, by adjusting the length of the twelfth straight line segment 1112 in the first direction X, the position where the seventh fan-out line extends to the third fan-out area S3 can be adjusted, facilitating overall layout of the fan-out lines.

[0057] Optionally, on the basis of the above-mentioned embodiments, Figure 11 is another partial schematic view of a display panel provided by an embodiment of the present application, referring to Figure 11The fan-out area S further includes a fifth fan-out area S5. The fifth fan-out area S5 is located on the side of the second anti-static circuit area T2 away from the first anti-static circuit area T1 in the first direction X. In the second fan-out line group 120, at least part of the fan-out lines 10 extend through the fifth fan-out area S5 from the second fan-out area S2 to the third fan-out area S3.

[0058] Specifically, as shown in Figure 10 , the fan-out lines in the second fan-out line group 120 further include fifth fan-out lines, which extend through the second fan-out area S2 and the fifth fan-out area S5 and finally reach the third fan-out area S3. The fifth fan-out area S5 is located between the second anti-static circuit area T2 and the first anti-static circuit area T1 in the first direction X, i.e., the fifth fan-out area S5 is located outside the anti-static circuit area T, and is located between the first fan-out area S1 and the third fan-out area S3 in the second direction Y, so that the fifth fan-out lines can be fan-out lines that do not need to be protected against static electricity. By arranging the fifth fan-out lines to avoid the first anti-static circuit area T1 and the second anti-static circuit area T2, interference between the anti-static circuit 130 and the fifth fan-out lines can be avoided.

[0059] Continuing to refer to Figure 11 , in the fifth fan-out area S5, the fan-out lines 10 that extend through the fifth fan-out area S5 from the second fan-out area S2 to the third fan-out area S3 include a fourteenth straight line segment 1214 that extends in the second direction Y and is connected to the fan-out lines 10 of the second fan-out area S2 and the third fan-out area S3, respectively. Specifically, the fan-out lines of the second fan-out line group 120 that extend to the fifth fan-out area S5 include the fourteenth straight line segment 1214 that extends in the second direction Y and is connected to the fan-out lines 10 of the second fan-out area S2 and the third fan-out area S3, respectively, so that the driving chip can transmit driving signals to the signal lines of the circuit area D through the third fan-out area S3, the fifth fan-out area S5, and the second fan-out area S2.

[0060] Optionally, on the basis of the above-mentioned embodiments, Figure 12 is another partial schematic view of a display panel provided by an embodiment of the present application. Referring to Figure 12The display panel further includes a plurality of pads 310 arranged in sequence along the first direction X. The display panel further includes a pad area 30, and the pads 310 are located in the pad area 30. The pad area 30 is located on a side of the third fan-out area S3 away from the first fan-out area S1 and the second fan-out area S2, and is located between the third fan-out area S3 and an edge of the display panel. The fan-out lines 10 in the first fan-out line group 110 and the second fan-out line group 120 extend to the pad area 30 through the third fan-out area S3 and are connected with the pads 310. Specifically, the display panel further includes the pad area 30 between the edge of the display panel and the third fan-out area S3. The fan-out lines 10 in the first fan-out line group 110 extend through the first fan-out area S1 and the third fan-out area S3, and finally extend to the pad area 30 and are electrically connected with the pads 310 one by one. The pads 310 can be coupled with the driving chip, so that the driving chip provides driving signals for the signal lines connected with the pads 310 and the first fan-out line group 110. The fan-out lines 10 in the second fan-out line group 120 extend through the second fan-out area S2 and the third fan-out area S3, and finally extend to the pad area 30 and are electrically connected with the pads 310 one by one, so that the driving chip provides driving signals for the signal lines connected with the pads 310 and the first fan-out line group 110, to ensure normal transmission of signals in the display panel.

[0061] Optionally, based on the above-mentioned embodiments, Figure 13 is another partial schematic view of a display panel provided by an embodiment of the present application, referring to Figure 13 The display panel further includes a plurality of shift register circuits 200 cascaded and a plurality of pixel circuits 100 arranged in an array. The display panel further includes a circuit area D, and the shift register circuits 200 and the pixel circuits 100 are located in the circuit area D. The display panel further includes a plurality of light emitting elements 40 arranged in an array and a display area AA, and the light emitting elements 40 are located in the display area AA. The fan-out area S, the anti-static circuit area T and the circuit area D do not overlap with each other in the thickness direction of the display panel, and the fan-out area S and the anti-static circuit area T are located on the same side of the circuit area D in the second direction Y. The fan-out area S, the anti-static circuit area T and the circuit area D are all located in the display area AA, and the fan-out area S, the anti-static circuit area T and the circuit area D respectively overlap with at least part of the light emitting elements 40 in the thickness direction of the display panel.

[0062] Specifically, as Figure 13In the shown embodiment, the display panel can be a frameless display panel. After removing the frame region, the fan-out region S and the anti-static circuit region T originally located in the frame region are concentrated in the area close to the edge of the display region AA, i.e. the fan-out region S, the anti-static circuit region T and the circuit region D are all located in the display region AA. In addition, the fan-out region S, the anti-static circuit region T and the circuit region D are respectively overlapped with at least part of the light emitting elements 40 in the thickness direction of the display panel, i.e. the light emitting elements 40 include light emitting elements 40 located in the circuit region D and light emitting elements 40 located in the non-circuit region D. The pixel circuit 100 located in the circuit region D is directly electrically connected with the light emitting elements 40 located in the circuit region D, and drives the corresponding electrically connected light emitting elements 40 to emit light by the gate control signal provided by the shift register circuit 200 for the gate signal line 300 and the data signal provided by the data signal line 400. The light emitting elements 40 located in the non-circuit region D, i.e. the light emitting elements 40 located in the fan-out region S and the anti-static circuit region T, can be coupled with the pixel circuit 100 located in the circuit region D, so as to ensure that the light emitting elements 40 in the fan-out region S and the anti-static circuit region T can normally emit light.

[0063] Optionally, continuing to refer to Figure 13 , the pixel circuit 100 includes a first pixel circuit 101 and a second pixel circuit 102, the first pixel circuit 101 is overlapped with the first fan-out region S1 in the second direction Y, and the second pixel circuit 102 is overlapped with the second fan-out region S2 in the second direction Y. The width of the first pixel circuit 101 in the second direction Y is smaller than the width of the second pixel circuit 102 in the second direction Y.

[0064] Specifically, the first fan-out area S1 can be an edge area of the display panel, and the second fan-out area S2 can be a central area of the display panel. The fan-out lines 10 in the first fan-out area S1 include the fan-out lines 10 electrically connected to the shift register circuit 200 and the fan-out lines 10 electrically connected to the data signal line 400, and the fan-out lines 10 in the second fan-out area S2 include the fan-out lines 10 electrically connected to the data signal line 400. In other words, the number of the fan-out lines 10 in the first fan-out area S1 is greater than that in the second fan-out area S2. In other words, the first fan-out area S1 occupies a larger space than the second fan-out area S2. The first pixel circuit 101 overlaps the first fan-out area S1 in the second direction Y, i.e., the first pixel circuit 101 is located above the first fan-out area S1. The second pixel circuit 102 overlaps the second fan-out area S2 in the second direction Y, i.e., the second pixel circuit 102 is located above the second fan-out area S2. Further, by setting the width of the first pixel circuit 101 in the second direction Y to be smaller than that of the second pixel circuit 102 in the second direction Y, the first pixel circuit 101 occupies a smaller space in the second direction Y, thereby leaving a larger space below the first pixel circuit 101, so as to avoid that the first fan-out area S1 occupies a larger space and causes insufficient space for the design of other circuits.

[0065] On the basis of the above-mentioned embodiments, further referring to Figure 13 In the first fan-out area S1, the fan-out lines 10 of the first fan-out line group 110 include a terminal line segment 50, and the terminal line segment 50 extends outward from the first fan-out area S1. The terminal line segment 50 is a second straight line segment 112. The fan-out lines 10 of the first fan-out line group 110 include a first fan-out line 10a and a second fan-out line 10b. The terminal line segment 50 of the first fan-out line 10a is a first terminal line segment 510, and the terminal line segment 50 of the second fan-out line 10b is a second terminal line segment 520. Wherein, (D1-D2)×(L1-L2)>0; D1 and D2 are the distances from the first fan-out line 10a and the second fan-out line 10b at the same position in the first direction X to the anti-static circuit area T, L1 is the length of the first terminal line segment 510, and L2 is the length of the second terminal line segment 520. Specifically, by setting the distances D1 and D2 from the first fan-out line 10a and the second fan-out line 10b at the same position in the first direction X to the anti-static circuit area T, the length L1 of the first terminal line segment 510, and the length L2 of the second terminal line segment 520 to satisfy (D1-D2)×(L1-L2)>0, the length of the terminal line segment 50 of the fan-out line 10 closer to the anti-static circuit area T is smaller at the same position in the first direction X, and the length of the terminal line segment 50 of the fan-out line 10 farther from the anti-static circuit area T is larger, thereby simplifying the wiring arrangement mode of the first fan-out area S1 and the anti-static circuit area T.

[0066] Optionally, based on the above embodiment, referring to Figure 13 , the number of fan-out lines 10 in the first fan-out area S1 is greater than the number of fan-out lines 10 in the second fan-out area S2. Then, the space occupied by the first fan-out area S1 is greater than the space occupied by the second fan-out area S2. By setting the wiring mode of the first fan-out area S1 to be a zigzag type, the fan-out lines 10 can be distributed more in the upper right of the first fan-out area S1, that is, the space utilization of the upper right area of the first fan-out area S1 is increased, so that a larger space is left below the first fan-out area S1, thereby providing a design space for the arrangement of other circuits and facilitating the overall layout of the wiring.

[0067] It should be noted that, referring to Figure 13 , the display panel further includes a plurality of shift register circuits 200 connected in cascade, and at least part of the fan-out lines 10 in the first fan-out area S1 are connected to the shift register circuits 200. Then, the first fan-out area S1 also needs to transmit signals related to the shift register circuits 200, so the number of fan-out lines 10 in the first fan-out area S1 is greater than the number of fan-out lines 10 in the second fan-out area S2.

[0068] Optionally, referring to Figure 13 , along the second direction Y, the first fan-out area S1 at least partially overlaps the shift register circuits 200. Then, the signals required by the shift register circuits 200 can be transmitted through the fan-out lines 10 in the first fan-out area S1 overlapping the shift register circuits 200, thereby reducing the wiring and facilitating the overall layout of the wiring. In addition, along the second direction Y, the second fan-out area S2 does not overlap the shift register circuits 200, so the fan-out lines 10 in the second fan-out area S2 do not need to transmit the signals required by the shift register circuits 200, and the number of fan-out lines 10 in the second fan-out area S2 can be reduced, thereby leaving a larger design space below the second fan-out area S2.

[0069] Optionally, based on the above embodiment, referring to Figure 13 , the adjacent two fan-out lines 10 in the first fan-out area S1 have a gap, and the adjacent two fan-out lines 10 in the second fan-out area S2 have a gap. In the extension direction perpendicular to the fan-out lines 10, the gap width between the adjacent two fan-out lines 10 in the first fan-out area S1 is less than the gap width between the adjacent two fan-out lines 10 in the second fan-out area S2.

[0070] Specifically, when the space occupied by the first fan-out area S1 is greater than the space occupied by the second fan-out area S2, the gap width between the adjacent two fan-out lines 10 in the first fan-out area S1 can be set to be less than the gap width between the adjacent two fan-out lines 10 in the second fan-out area S2, thereby reducing the gap width between the two fan-out lines 10 in the first fan-out area S1 and further increasing the space utilization of the first fan-out area S1 to leave a larger space below the first fan-out area S1.

[0071] Based on the above inventive concept, the embodiments of the present application further provide a display device. Figure 14 is a structural schematic diagram of a display device provided by an embodiment of the present application. As shown in Figure 14 , the display device comprises the display panel 01 in the above embodiments. The display device comprises the display panel 01 of any embodiment of the present application, and therefore the display device provided by the embodiments of the present application has the beneficial effects of the display panel 01 provided by the embodiments of the present application, which will not be repeated here. In addition, Figure 15 is a structural schematic diagram of another display device provided by an embodiment of the present application. As shown in Figure 15 , the display device can be a frameless display device. In other embodiments, Figure 16 is a structural schematic diagram of still another display device provided by an embodiment of the present application. As shown in Figure 16 , the display device can also be a spliced display device formed by splicing at least two sub-display devices. Exemplarily, the display device can be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device, and the embodiments of the present application are not limited thereto.

[0072] Note that the above are only the preferred embodiments of the present application and the principles of the applied technology. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and those skilled in the art can make various obvious changes, readjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the inventive concept, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: comprising a plurality of fan-out lines, wherein the plurality of fan-out lines comprises a first fan-out line group; The display panel includes a fan-out area, and the fan-out area includes a first fan-out area; the fan-out lines in the first fan-out line group extend through the first fan-out area; In the first fan-out area, the fan-out lines in the first fan-out line group include at least one first straight line segment and at least one second straight line segment, the first straight line segment extends along a first direction, the second straight line segment extends along a second direction, and the first straight line segment and the second straight line segment are connected; the first direction intersects with the second direction, and the first direction and the second direction are parallel to the plane where the display panel is located.

2. The display panel according to claim 1, wherein: The plurality of fan-out lines further include a second fan-out line group, the fan-out region further includes a second fan-out region, and the fan-out lines in the second fan-out line group extend through the second fan-out region; In the second fan-out area, the fan-out lines in the second fan-out line group include a first oblique line segment, the first oblique line segment extends along a third direction, and the third direction has an acute angle with the first direction and the second direction respectively; and / or, In the second fan-out area, the fan-out lines in the second fan-out line group include at least two third straight line segments and at least two fourth straight line segments, the third straight line segments extend along the first direction, the fourth straight line segments extend along the second direction, and the third straight line segments are connected to the fourth straight line segments.

3. The display panel according to claim 2, wherein: The display panel further includes a third fan-out area, and the fan-out lines in the first fan-out line group and the second fan-out line group both extend through the third fan-out area; In the third fan-out area, the fan-out lines in the first fan-out line group include at least one fifth straight line segment and at least one sixth straight line segment, the fifth straight line segment extends along the first direction, the sixth straight line segment extends along the second direction, and the fifth straight line segment and the sixth straight line segment are connected; and / or, in the third fan-out area, the fan-out lines in the first fan-out line group include a second oblique line segment, the second oblique line segment extends along a fourth direction, and the fourth direction forms an acute angle with the first direction and the second direction respectively; In the third fan-out area, the fan-out lines in the second fan-out line group include at least one seventh straight line segment and at least one eighth straight line segment, the seventh straight line segment extends along the first direction, the eighth straight line segment extends along the second direction, and the seventh straight line segment and the eighth straight line segment are connected; and / or, in the third fan-out area, the fan-out lines in the second fan-out line group include a third oblique line segment, the third oblique line segment extends along a fifth direction, and the fifth direction has an acute angle with the first direction and the second direction, respectively.

4. The display panel according to claim 3, wherein: The display panel further includes a plurality of anti-static circuits, wherein the plurality of anti-static circuits include a first anti-static circuit group; The display panel further includes an anti-static circuit area, the anti-static circuit area includes a first anti-static circuit area, the first anti-static circuit group is located in the first anti-static circuit area, and the first anti-static circuit area is located between the first fan-out area and the third fan-out area in the second direction; At least some of the fan-out lines in the first fan-out line group extend from the first fan-out area through the first anti-static circuit area to the third fan-out area.

5. The display panel according to claim 4, wherein: In the first anti-static circuit area, the fan-out lines in the first fan-out line group include a ninth straight line segment extending along the second direction; and the ninth straight line segment is connected to the anti-static circuit in a one-to-one correspondence.

6. The display panel according to claim 4, wherein: The plurality of anti-static circuits further includes a second anti-static circuit group; The anti-static circuit area further includes a second anti-static circuit area, the second anti-static circuit group is located in the second anti-static circuit area, and the second anti-static circuit area is located between the second fan-out area and the third fan-out area in the second direction; In the second fan-out line group, at least some of the fan-out lines extend from the second fan-out area through the second anti-static circuit area to the third fan-out area, and at least some of the fan-out lines extend from the second fan-out area to the second anti-static circuit area.

7. The display panel according to claim 6, wherein: The portion of the fan-out line extending from the second fan-out area through the second anti-static circuit area to the third fan-out area includes a tenth straight line segment, the tenth straight line segment is located in the second anti-static circuit area, and the tenth straight line segment extends along the second direction; the tenth straight line segment is insulated from the anti-static circuit and is alternately arranged in the first direction; The portion of the fan-out line extending from the second fan-out area to the second anti-static circuit area includes an eleventh straight line segment, the eleventh straight line segment is located in the second anti-static circuit area, and the eleventh straight line segment extends along the second direction; the eleventh straight line segment is connected to the anti-static circuit in a one-to-one correspondence.

8. The display panel according to claim 6, wherein: The fan-out area further includes a fourth fan-out area; the fourth fan-out area is located between the first anti-static circuit area and the second anti-static circuit area in the first direction; In the first fan-out line group, at least some of the fan-out lines extend from the first fan-out area through the fourth fan-out area to the third fan-out area.

9. The display panel according to claim 8, wherein: The first fan-out line group includes a twelfth straight line segment and a thirteenth straight line segment; The twelfth straight line segment and the thirteenth straight line segment are located in the fourth fan-out area, the twelfth straight line segment extends along the first direction, the thirteenth straight line segment extends along the second direction, the twelfth straight line segment and the thirteenth straight line segment are connected, and the twelfth straight line segment and the thirteenth straight line segment are both connected to the fan-out lines in the first fan-out area and the third fan-out area.

10. The display panel according to claim 6, wherein: The fan-out area further includes a fifth fan-out area; the fifth fan-out area is located on a side of the second anti-static circuit area away from the first anti-static circuit area in the first direction; In the second fan-out line group, at least some of the fan-out lines extend from the second fan-out area through the fifth fan-out area to the third fan-out area.

11. The display panel according to claim 10, wherein: In the fifth fan-out area, the fan-out line extending from the second fan-out area through the fifth fan-out area to the third fan-out area includes a fourteenth straight line segment, the fourteenth straight line segment extends along the second direction, and the fourteenth straight line segment is respectively connected to the fan-out lines of the second fan-out area and the third fan-out area.

12. The display panel according to claim 3, wherein: The display panel further includes a plurality of pads, and the plurality of pads are sequentially arranged along the first direction; The display panel further includes a pad area, wherein the pad is located in the pad area, the pad area is located on a side of the third fan-out area away from the first fan-out area and the second fan-out area, and is located between the third fan-out area and an edge of the display panel; The fan-out lines in the first fan-out line group and the second fan-out line group extend through the third fan-out area to the pad area and are connected to the pads.

13. The display panel according to claim 4, wherein: The display panel further includes a plurality of cascaded shift register circuits and a plurality of pixel circuits arranged in an array; The display panel further includes a circuit area, and the shift register circuit and the pixel circuit are located in the circuit area; The display panel further includes a plurality of light-emitting elements arranged in an array and a display area, wherein the light-emitting elements are located in the display area; The fan-out area, the anti-static circuit area, and the circuit area do not overlap with each other in the thickness direction of the display panel, and the fan-out area and the anti-static circuit area are located on the same side of the circuit area in the second direction; The fan-out area, the anti-static circuit area, and the circuit area are all located in the display area, and the fan-out area, the anti-static circuit area, and the circuit area respectively overlap with at least part of the light-emitting element in the thickness direction of the display panel.

14. The display panel according to claim 13, wherein: The pixel circuit includes a first pixel circuit and a second pixel circuit, the first pixel circuit overlaps with the first fan-out area in the second direction, and the second pixel circuit overlaps with the second fan-out area in the second direction; A width of the first pixel circuit in the second direction is smaller than a width of the second pixel circuit in the second direction.

15. The display panel according to claim 4, wherein: In the first fan-out area, the fan-out line of the first fan-out line group includes an end line segment, the end line segment extends outward from the first fan-out area, and the end line segment is the second straight line segment; The fan-out lines of the first fan-out line group include a first fan-out line and a second fan-out line, the end line segment of the first fan-out line is a first end line segment, and the end line segment of the second fan-out line is a second end line segment; Wherein, (D1-D2)×(L1-L2)>0; D1 and D2 are the distances between the first fan-out line and the second fan-out line and the electrostatic circuit area at the same position in the first direction, respectively; L1 is the length of the first end line segment, and L2 is the length of the second end line segment.

16. The display panel according to claim 2, wherein: The number of the fan-out lines in the first fan-out area is greater than the number of the fan-out lines in the second fan-out area.

17. The display panel according to claim 16, wherein: The display panel further includes a plurality of cascaded shift register circuits, and at least some of the fan-out lines in the first fan-out area are connected to the shift register circuits.

18. The display panel according to claim 17, wherein: Along the second direction, the first fan-out region at least partially overlaps with the shift register circuit.

19. The display panel according to claim 18, wherein: Along the second direction, the second fan-out area does not overlap with the shift register circuit.

20. The display panel according to claim 2, wherein: There is a gap between two adjacent fan-out lines in the first fan-out area, and there is a gap between two adjacent fan-out lines in the second fan-out area; in the extension direction perpendicular to the fan-out lines, the gap width between two adjacent fan-out lines in the first fan-out area is smaller than the gap width between two adjacent fan-out lines in the second fan-out area.

21. A display device, characterized in that: Comprising the display panel according to any one of claims 1-20.

Images