Program instruction optimization method and device and related product

Through the compiler optimization method, the associated variables in the target instruction are replaced and the copy instruction is deleted under the preset conditions, which solves the problem that the traditional compiler cannot eliminate redundant copy instructions and improves the program running performance.

CN120832147APending Publication Date: 2025-10-24SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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Patent Information

Application Number
CN202410503920.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-04-24
Publication Date
2025-10-24

AI Technical Summary

Technical Problem

Traditional compilers cannot effectively eliminate redundant copy instructions in application code, causing memory access operations to become a bottleneck in computer performance.

Method used

Through compiler optimization methods, the copy instructions and target instructions in the program code are obtained. When the preset conditions are met, the associated variables in the target instructions are replaced and the copy instructions are deleted, including the control flow dominance relationship, active state and variable unchanged conditions.

Benefits of technology

The program code is optimized, the running performance is improved and normal operation is guaranteed, and redundant copy instructions are deleted by merging copy instructions and target instructions.

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Abstract

The invention provides a program instruction optimization method, which is characterized in that the method can obtain a copy instruction and at least one target instruction in a program code; and if the copy instruction is received and a preset condition is satisfied between the copy instruction and the at least one target instruction, replacing the associated variables in the target instruction according to the copy instruction, and deleting the copy instruction. According to the method and the device, the purpose of deleting redundant copy instructions is achieved through combination of the copy instructions and the target instructions, optimization of the program codes is achieved, and therefore normal operation of the program codes can be guaranteed while the operation performance of the program codes is improved.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and particularly relates to a program instruction optimization method and device and related products. BACKGROUND

[0002] In the computer technology, a computer device usually contains a processor and a memory, and the processing efficiency of the processor is much higher than the access speed of the memory, so that the processor often needs to wait for the access data, which makes the access operation increasingly become the bottleneck of the computer performance.

[0003] Generally, the computer device often has multiple access operations for data interaction, which will cause a large number of copy instructions in the application program code. Using the compiler to optimize the access of the application program code is an important optimization technology, but the compiler in the traditional technology cannot eliminate the copy instructions in the specific scene, and how to use the compiler to eliminate the copy instructions in the application program code is a problem worth paying attention to. SUMMARY

[0004] Based on the existing technology, the present disclosure provides a program instruction optimization method, and the compiler can delete the redundant copy instructions in the program code by executing the program instruction optimization method, so as to optimize the program code.

[0005] In one aspect, the present disclosure provides a program instruction optimization method, which comprises:

[0006] obtaining a copy instruction and at least one target instruction in a program code; wherein the copy instruction comprises an associated variable and a replacement variable, and the target instruction contains the associated variable;

[0007] if a preset condition is met between the copy instruction and the at least one target instruction, replacing the associated variable in the target instruction according to the copy instruction, and deleting the copy instruction.

[0008] The replacing the associated variable in the target instruction according to the copy instruction further comprises:

[0009] replacing the associated variable in the target instruction with the replacement variable in the copy instruction.

[0010] The preset condition comprises the following condition:

[0011] the copy instruction and the at least one target instruction have a dominance relationship in the control flow;

[0012] the replacement variable of the copy instruction is in an active state at the target instruction;

[0013] The variable of the copy instruction remains unchanged at the copy instruction and the target instruction.

[0014] The method further comprises:

[0015] The must-reached constant value of the variable in the copy instruction at the copy instruction and the must-reached constant value at the target instruction are obtained.

[0016] If the must-reached constant value of the variable in the copy instruction at the copy instruction is consistent with the must-reached constant value of the variable at the target instruction, it is determined that the variable of the copy instruction remains unchanged at the copy instruction and the target instruction.

[0017] The associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction.

[0018] The method further comprises:

[0019] If the program instruction is a use instruction of the associated variable, the program instruction is determined as a target instruction.

[0020] The method further comprises:

[0021] The alias set of the associated variable of the copy instruction and the constant value range of the associated variable by the copy instruction are obtained.

[0022] If there is a program instruction that performs a read operation on the alias set of the associated variable, and the program instruction is within the constant value range of the associated variable by the copy instruction, the program instruction is determined as a use instruction of the associated variable.

[0023] The associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction.

[0024] The method further comprises:

[0025] If the program instruction is a constant value instruction of the associated variable, the program instruction is determined as a target instruction.

[0026] The method further comprises:

[0027] The alias set of the associated variable of the copy instruction and the constant value range of the associated variable by the copy instruction are obtained.

[0028] If there is a program instruction that performs a write operation on the alias set of the associated variable, and the program instruction belongs to the reached constant value of the variable at the copy instruction, the program instruction is determined as a constant value instruction of the associated variable.

[0029] The preset conditions also include:

[0030] There is no designated program instruction between the target instruction and the copy instruction; wherein the designated program instruction is an instruction using the destination operand of the copy instruction, and the designated program instruction subsequently controls the copy instruction.

[0031] On the other hand, the present disclosure further provides a program instruction optimization device, which includes a processor and a memory, wherein the memory is used to store computer programs or instructions, and when the processor executes the computer program in the memory, the above-mentioned program instruction optimization method is implemented.

[0032] In another aspect, the present disclosure provides a computer-readable storage medium for storing computer programs or instructions. When the computer program in the computer-readable storage medium is executed by one or more processors, the program instruction optimization method as described above is implemented.

[0033] In yet another aspect, the present disclosure provides a computer program product, which includes a computer program or instructions. When the computer program or instructions are executed by a processor, the program instruction optimization method described above is implemented.

[0034] The present disclosure provides a program instruction optimization method, which can replace the associated variables in the target instruction according to the copy instruction and delete the copy instruction when a preset condition is met between the copy instruction and the target instruction, thereby achieving the purpose of deleting redundant copy instructions by merging the copy instruction and the target instruction, realizing the optimization of the program code, thereby improving the program code running performance while ensuring the normal operation of the program code. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A schematic diagram of an application scenario of a program instruction optimization method according to an embodiment;

[0036] Figure 2 for Figure 1 A schematic structural diagram of an embodiment of a computing device;

[0037] Figure 3 A control flow diagram of an embodiment;

[0038] Figure 4 A flowchart of a program instruction optimization method according to an embodiment;

[0039] Figure 5 A flowchart of a program instruction optimization method according to another embodiment;

[0040] Figure 6A flowchart of a procedure for optimizing program instructions of another embodiment. DETAILED DESCRIPTION

[0041] In order to make the objectives, technical solutions and advantages of the present disclosure clearer, the present disclosure is further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are merely intended to explain the present disclosure and not to limit the present disclosure.

[0042] The terms used in the embodiments of the present disclosure are merely for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The singular forms "a," "an," and "the" used in the embodiments of the present disclosure and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0043] It should be understood that the term "and / or" used herein is merely to describe the same field of associated objects, which means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0044] It should be understood that although the terms first, second, third, etc. may be used in the embodiments of the present disclosure to describe the preset ranges, etc., these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from each other. For example, without departing from the scope of the embodiments of the present disclosure, the first preset range can also be referred to as the second preset range, and similarly, the second preset range can also be referred to as the first preset range.

[0045] Depending on the context, the word "if" as used herein can be interpreted to mean "when" or "while" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if it is determined" or "if (a stated condition or event) is detected" can be interpreted to mean "when it is determined" or "in response to determining" or "when (a stated condition or event) is detected" or "in response to detecting (a stated condition or event)".

[0046] In order to better understand the technical solutions of the present disclosure, the application scenarios of the embodiments of the present disclosure are described.

[0047] Figure 1 An application scenario of the technical solutions of the present disclosure is exemplarily provided. As shown in Figure 1 The computer system 100 can be a heterogeneous computer system including a computing device 110 and a processing device 130, which have different instruction set architectures.

[0048] The computing device 110 is configured to perform user-specified operations for performing deep learning or machine learning computations, which can interact with the processing device 130 through the interface device 120 to collectively accomplish user-specified tasks (including but not limited to image recognition, speech recognition, etc.).

[0049] The processing device 130 is a general-purpose processing device, which performs basic controls including but not limited to data transfer, starting and / or stopping of the computing device, etc. Depending on the implementation, the processing device 130 can be one or more types of processors of central processing unit (CPU), graphics processing unit (GPU), or other general-purpose and / or computing devices, including but not limited to digital signal processor (DSP), application specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc., and the number thereof can be determined according to actual needs. As mentioned above, only in terms of the computing device of the present disclosure, it can be considered as having a single-core structure or a homogeneous multi-core structure. However, when the computing device 110 and the processing device 130 are considered together, they are considered to form a heterogeneous multi-core structure.

[0050] The interface device 120 is used to transmit data and control instructions between the computing device 110 and the processing device 130, and the interface device 120 can be PCIE. The storage device 140 is used to store data to be processed, which can be DDR memory (DRAM), and is used to save data of the computing device 110 and / or the processing device 130. The storage device 140 can be referred to as an external storage resource of the computing device 110.

[0051] Further, the computing device 110 described above can be a multi-core processor having a plurality of processor cores, each processor core being used to implement a variety of different tensor computation operations such as vector operations and matrix operations, for example. Each processor core can include a vector operation module and a matrix operation module to implement corresponding operations, for example. Further, the plurality of processor cores of the computing device can form a plurality of clusters, and the plurality of clusters can communicate data with each other. For example, Figure 2As shown, four clusters 210 are exemplarily shown in the figure, in which four clusters are respectively labeled as cluster 1 to cluster 4. With the development of hardware, the clusters of the computing device of the present disclosure can also include 8, 16, 64 or even more clusters. Each cluster 210 includes a plurality of processor cores 220 and a memory core 230, and the present disclosure does not limit the number of processor cores 320. The memory core 230 can be used to realize data interaction between a plurality of processor cores in the same cluster, and can also be used to realize data interaction between clusters or between the cluster and an external storage device (such as the storage device 140 shown in the figure). Figure 1 Further, each processor core can also include a storage module for storing data required for operation. The storage module in the processor core can interact with external storage resources through a memory access module, or interact with other processor cores on the computing device.

[0052] Optionally, a compiler can be run on the processing device. The compiler can be implemented as a computer program for converting a source program written by a user into an executable file (such as a binary file) that can be executed by the computing device and the processing device. The executable file can include memory access instructions. In the actual operation process, the driver can move the executable file corresponding to the computing device from the processing device to the computing device, so that the computing device can implement the corresponding operation task.

[0053] When the above-mentioned heterogeneous computer system is used to execute an operation task, there will be a large number of data access operations between the computing device 110 and the processing device 130, between the processor cores in the computing device, and between the clusters, in order to realize data interaction between the components. The above-mentioned data access operation can be represented as a corresponding copy instruction at the program code level. These copy instructions obtain corresponding memory access instructions that can be executed on the computing device and the processing device after being compiled by the compiler. In the case of a large number of copy instructions, how to use the compiler to optimize and delete the copy instructions in the program code to realize memory optimization in the computer system is a technical problem concerned by the present disclosure.

[0054] Based on the above technical problem, the present disclosure provides a program instruction optimization method, which can be applied to a compiler to delete copy instructions in program code and improve the running performance of the program code on the computer system. The program code can include a series of program instructions, including but not limited to copy instructions, operation instructions, etc.

[0055] In order to facilitate understanding of the scheme, some concepts that can be involved in the embodiments of the present disclosure are explained as follows.

[0056] Operand: An important field of a program instruction, used to indicate the data involved in the program instruction. According to the use of the operand in the instruction, the operand can be divided into source operand and destination operand. The operand of the program instruction can be represented by the memory space of the corresponding data, and in the scenario where the program instruction involves tensor data, the operand of the program instruction can be a storage space; for example, the operand of the program instruction can be a variable x, and the storage space required by x is [0, X], where X represents an unknown number.

[0057] Dataflow analysis: A technique for collecting values computed by a computer program at different program points.

[0058] Alias: If multiple variables can point to the same address space, the multiple variables are aliases of each other. In the scenario where the variable is a tensor, if the storage space occupied by the variable overlaps, the multiple variables are aliases of each other. For example, if variable x1 points to storage space [0, 31] and variable x2 points to storage space [0, 64], then variable x1 and variable x2 are aliases of each other.

[0059] Live variable: For a variable x and a program instruction p, if the value of the variable x at the program instruction p will be referenced along a certain path from the program instruction p in the control flow graph, then the variable x is live at the program instruction p, otherwise the variable x is dead at the program instruction p.

[0060] Def: A def of a variable x is a statement that (possibly) assigns a value to x. In the scenario where the variable x is a tensor, the def of the variable x can be a statement that assigns a value to part or all of the storage space of the tensor. For example, if variable x points to storage space [0, 31], program instruction p1 assigns a value to storage space [0, 15] of the variable x, and program instruction p2 assigns a value to storage space [16, 31] of the variable x, then the def of the variable x can be program instruction p1 and program instruction p2.

[0061] Use: A statement that uses variable x in an operation. For example, if program instruction p is used to complete the accumulation of variable x, then the use of variable x is program instruction p.

[0062] Def-use: Program instruction q can assign a value to variable x before program instruction p, and the possible def of variable x by program instruction q can reach program instruction p, then program instruction q is the def-use of program instruction p.

[0063] Co-definition: If the definition of a variable x in a program instruction p is from two program instructions q1 and q2, then program instructions q1 and q2 co-define the variable x in program instruction p. For example, the variable x is a tensor, and its corresponding storage space is [0, 63]; program instruction q1 defines [0, 15] of the storage space, and program instruction q2 defines [16, 32] of the storage space at the same time, then program instructions q1 and q2 co-define the variable x in program instruction p. If program instructions q1 and q2 come from different control flows, then the different definitions of the same memory space by program instructions q1 and q2 are not co-definition.

[0064] Must-define: If a program instruction q defines a variable x before a program instruction p, and the definition of the variable x by program instruction q can reach program instruction p, then program instruction q is a must-define of program instruction p. For example, before program instruction p, the last definition instruction of the variable x is a must-define of program instruction p.

[0065] Definition range of a variable x in a program instruction p: used to indicate the effective range of the definition of the variable x by program instruction p.

[0066] Control flow graph: a directed graph used to describe the control flow in a program process, which is composed of nodes and the relationships between the nodes, and the node can be a basic block.

[0067] Basic block: a node in a control flow graph, which is a sequence of statements that is executed in the maximum limit of order in a program, and each basic block has only one entrance and one exit, and is executed from the entrance to the exit.

[0068] Dominating node: in a control flow graph, if node X is a necessary node of node Y, then node X is a dominating node of node Y.

[0069] Successor dominating node: in a control flow graph, if every path from node Y to the exit node exit passes through node X, then node X is a successor dominating node of node Y.

[0070] Figure 3For an exemplary control flow graph, each node of the control flow graph is a basic block. Taking node H as an example, the path starts from node A, and then passes through node E. After node E, there is a branch, which can go to node F or node G. Regardless of going to node F or node G, the end will pass through node H. A dominating node refers to a basic block that must be passed through from the start of the control flow graph to a certain specific basic block. To reach node H, A node, E node and H node itself must be passed through, so A node, E node and H node are all dominating nodes of H node. A successor dominating node refers to a node that is passed through on each path from a node to an exit node. Taking node F as an example, after node F, there is a branch, which can go to node D or node H. Regardless of going to node D or node H, node M is passed through from node F to the exit node, so node M is a successor dominating node of node F.

[0071] Optionally, the compiler can perform a constant value analysis and an active variable analysis on the program code based on a data flow to obtain constant value information and active state information of the tensors in each program instruction, so as to determine whether to delete the copy instruction in the program code according to the constant value information and the active state information of the tensors. The variable in the program instruction can be defined by an operand of the program instruction.

[0072] In the scenario where the variable in the program instruction is a tensor data, since each variable points to a storage space, the storage spaces of different variables can have intersections, which leads to the fact that each variable can be assigned a constant value by multiple program instructions, and the constant value analysis of the variable in the program instruction becomes complex. Moreover, the memory space of some variables can be unknown at the time of compilation, which also brings difficulties to the constant value analysis of the variable in the program instruction.

[0073] Based on this, the program instruction optimization method of the present disclosure can obtain a control flow graph corresponding to the program code, and traverse each basic block in a reverse postorder, calculate the constant value information of each variable in each basic block, and loop until the constant value information of the variable in each basic block is unchanged.

[0074] Specifically, in a traversal process, the compiler can traverse each program instruction in the basic block, and process each program instruction as follows to obtain the constant value information and usage information of each variable (i.e., operand) at each program instruction:

[0075] 1) For the destination operand of each program instruction, i.e., the constant value of each variable

[0076] The compiler can determine that the variable corresponding to the program instruction must reach a fixed value, and determine the variable corresponding to the program instruction reaches a fixed value by considering all possible program instructions that can assign a value to the variable. The variable corresponding to the program instruction reaches a fixed value can include all possible program instructions that can assign a value to the variable before the program instruction. When the variable is a tensor, the variable corresponding to the program instruction reaches a fixed value includes all possible program instructions that can assign a value to part or all of the storage space corresponding to the tensor before the program instruction, i.e., the program instruction assigns a value to any subset or the whole set of the storage space corresponding to the tensor.

[0077] 2) For each source operand of each program instruction, i.e., the use of each variable

[0078] For the use of each variable, the variable can have been assigned a value by at least one previous program instruction of the program instruction, for example, the value of the variable can be assigned by two previous program instructions together, but since each program instruction can only assign a value to part of the storage space of the variable, the embodiments of the present disclosure can determine the active state of each variable at each program instruction. Specifically,

[0079] If the variable has been assigned a value by a previous program instruction of the program instruction, and the value of the variable is not completely overwritten (i.e., killed) by the value assigned by other program instructions after the previous program instruction at the program instruction, i.e., the value assigned to the variable by other program instructions is a subinterval of the value assigned to the variable by the previous program instruction, it means that the value assigned to the variable by the previous program instruction is valid, and at this time, the value assigned to the variable by the previous program instruction can be active at the program instruction, and thus the value assigned to the variable by the previous program instruction can reach the program instruction. The previous program instruction can be a program instruction executed before the program instruction.

[0080] If the variable has been assigned a value by a previous program instruction of the program instruction, and the value of the variable has been completely overwritten (i.e., killed) by the value assigned by other program instructions before reaching the program instruction, i.e., the value assigned to the variable by other program instructions completely contains the value assigned to the variable by the previous program instruction, it means that the value assigned to the variable by the previous program instruction is invalid, and at this time, the value assigned to the variable by the previous program instruction is not active at the program instruction, and the value assigned to the variable by the previous program instruction cannot reach the program instruction. Thus, the previous program instruction is no longer the value assignment instruction of the variable at the program instruction.

[0081] For example, at least one program instruction can assign value to the same variable x for multiple times, and the storage spaces of the same variable x can be represented as: MD1[0, 31], MD2[0, 15]; MD3[0, 64]. Since the storage spaces of MD1, MD2 and MD3 have intersection, when the program instruction IN1 assigns value to MD1, it can also assign value to MD2 and MD3. Similarly, when the program instruction IN3 assigns value to MD2, it can also assign value to MD1 and MD3. When the program instruction IN2 uses MD1, it can also use MD2 and MD3. Specifically as follows:

[0082] IN1: def; must def: MD1[0, 31], may def: {MD2, MD3};

[0083] IN2: use; must use: MD1[0, 31], may use: {MD2, MD3};

[0084] IN3: def; must def: MD2[0, 15], may def: {MD1, MD3};

[0085] IN4: def; must def: MD3[0, 64], may def: {MD1, MD2};

[0086] Wherein, must def represents the must reach value of the variable at the program instruction, may def represents the reach value of the variable at the program instruction. Must use represents that the program instruction must use the variable, and may use represents that the program instruction can use the variable.

[0087] At the program instruction IN1, the program instruction IN1 assigns value to the storage space MD1 of the variable x. The value information at the program instruction IN1 is represented as follows:

[0088] The reach value of the variable x is {IN1}, and the must reach value of the variable x is {IN1}. The value range of the variable x at the program instruction IN1 is {IN1}.

[0089] At the program instruction IN2, the program instruction IN2 uses the storage space MD1 of the variable x, and the value information of MD1 exists, but MD1 is not covered by the value of other program instructions. Therefore, the value information at the program instruction IN2 can be recorded as follows:

[0090] The reach value of the variable x is {IN1}, and the must reach value of the variable x is {IN1}. The value range of the variable x at the program instruction IN1 is {IN1, IN2}.

[0091] At program instruction IN3: Program instruction IN3 assigns a value to the storage space MD2 of variable x; at this time, consider the list of all possible values {MD1, MD3}, in which only MD1 has been assigned a value, and the value assigned by program instruction IN3 to MD2 coincides with the value assigned by program instruction IN1 to MD1. That is, the value assigned by program instruction IN1 to the part of storage space MD1 [0, 15] has become invalid, but since the value assigned by program instruction IN1 to storage space MD1 is not completely invalid, at program instruction IN3, program instruction IN1 is still the value assignment instruction of variable x. The value assignment information at program instruction IN3 can be recorded as follows:

[0092] The reached value corresponding to the variable x is {IN1, IN3}, and the must-reached value corresponding to the variable x is {IN3};

[0093] The value assignment range of program instruction IN1 to the variable x is {IN1, IN2, IN3}, and the value assignment range of program instruction IN3 to the variable x is {IN3}.

[0094] At program instruction IN4: Program instruction IN4 assigns a value to the storage space MD4 of variable x, at this time, consider the list of all possible values {MD1, MD2}, in which MD1 has been assigned a value by program instruction IN1, and MD2 has been assigned a value by program instruction IN3, but the value assigned by program instruction IN4 to MD3 completely covers the value assigned by program instruction IN1 to MD1 and the value assigned by program instruction IN3 to MD2.

[0095] It can be seen that MD1 and MD2 have been completely killed by the value assignment of program instruction IN4 to MD3, and therefore, the value assignment of program instruction IN1 to the storage space MD1 of variable x and the value assignment of program instruction IN3 to the storage space MD2 of variable x have both become invalid, and the value assignment of program instruction IN1 to the variable x and the value assignment of program instruction IN3 to the variable x cannot reach program instruction IN4. The value assignment information at program instruction IN4 can be recorded as follows:

[0096] The reached value corresponding to the variable x is {IN4}, and the must-reached value corresponding to the variable x is {IN4}; the value assignment range of program instruction IN1 to the variable x is {IN1, IN2, IN3}, the value assignment range of program instruction IN3 to the variable x is {IN3}, and the value assignment range of program instruction IN4 to the variable x is {IN4}.

[0097] In addition, at program instruction IN4, since the value assignment of program instruction IN1 to the storage space MD1 of variable x and the value assignment of program instruction IN3 to the storage space MD2 of variable x have both become invalid, the corresponding storage spaces MD1 and MD2 of variable x are no longer active.

[0098] Based on the reach constant analysis and the live variable analysis of the program code, the program instruction optimization method of the present disclosure can optimize the copy instruction in the program code. Alternatively, the compiler can determine the target instruction of the copy instruction according to the reach constant information and the use information of each variable in the program instruction. Further, the compiler can modify the target instruction according to the copy instruction and delete the copy instruction when the copy instruction meets a preset condition. The preset condition can also be determined based on the live variable analysis and the reach constant analysis. For details, please refer to the following.

[0099] Figure 4 The flowchart of the program instruction optimization method of an embodiment of the present disclosure is shown in FIG. 4. As shown in FIG. 4, the program instruction optimization method of an embodiment of the present disclosure can include the following steps. Figure 4

[0100] S410, obtaining a copy instruction and at least one target instruction in the program code.

[0101] The program code can include a series of program instructions, which include but are not limited to copy instructions and operation instructions. In the method of the present disclosure, the compiler can traverse the plurality of program instructions of the program code and obtain all the copy instructions therefrom.

[0102] Each copy instruction is used to complete the transfer of data between storage spaces. The copy instruction can include a source operand and a destination operand. Alternatively, the source operand and the destination operand can be used to indicate the variable involved in the copy instruction, which can be a vector or a matrix or other tensor data. The source operand and the destination operand are represented using the storage space of the corresponding tensor data.

[0103] Alternatively, the source operand and the destination operand have the same data type, and the source operand and the destination operand have the same tensor shape, but the source operand and the destination operand can have different strides. The tensor shape is used to describe the data size of the tensor data. For example, the tensor data is two-dimensional matrix data, and the tensor shape thereof can be represented as row x column. Alternatively, the source operand can also be scalar data, such as an immediate number.

[0104] The target instruction can be a copy instruction or an operation instruction in the program code, etc. The target instruction can include a destination operand and at least one source operand, which are used to indicate the variable involved in the target instruction, which can be a vector or a matrix or other tensor data. The source operand and the destination operand are represented using the storage space of the corresponding variable. Alternatively, the source operand can also be scalar data, such as an immediate number.

[0105] ​The target instruction and the copy instruction can have a data dependency, for example, the target instruction is a use instruction or a constant value instruction of an operand in the copy instruction. For ease of illustration, the present disclosure records a variable overlapped in the target instruction and the copy instruction as an associated variable. The target instruction can be a constant value instruction or a use instruction of the associated variable in the copy instruction. If a program instruction needs to use the associated variable for relevant operation, that is, the associated variable is a source operand of the program instruction, then the program instruction is a use instruction of the associated variable. If a program instruction is used to assign a value to the associated variable, that is, the associated variable is a destination operand of the program instruction, then the program instruction is a constant value instruction of the associated variable.

[0106] Optionally, the associated variable can be a variable indicated by a source operand of the copy instruction, or a variable indicated by a destination operand of the copy instruction. When the associated variable is a variable indicated by a source operand of the copy instruction, a variable indicated by a destination operand of the copy instruction can be recorded as a replacement variable. When the associated variable is a variable indicated by a destination operand of the copy instruction, a variable indicated by a source operand of the copy instruction can be recorded as a replacement variable.

[0107] Specifically, if the program instruction is a use instruction of the associated variable in the copy instruction, the program instruction can be used as the target instruction. If the program instruction is a constant value instruction of the associated variable in the copy instruction, the program instruction can be used as the target instruction. For details, see the following.

[0108] S420, if a preset condition is met between the copy instruction and the at least one target instruction, the associated variable in the target instruction is replaced according to the copy instruction, and the copy instruction is deleted.

[0109] The method of the present disclosure replaces the associated variable in the target instruction according to the copy instruction under the condition that the program code is normally run. After the modification of the target instruction is completed, the redundant copy instruction can be deleted, so as to realize the optimization of memory access by deleting the copy instruction.

[0110] Optionally, when the preset condition is met between the copy instruction and the target instruction, it indicates that deleting the copy instruction will not affect the normal operation of the program code, the associated variable in the target instruction can be replaced by the replacement variable of the copy instruction, and the copy instruction can be deleted.

[0111] For example, when the associated variable is a variable indicated by a source operand of the copy instruction, the variable indicated by a destination operand of the copy instruction can be referred to as a replacement variable; if a preset condition is met between the copy instruction and the target instruction, the compiler can replace the associated variable in the target instruction as the replacement variable of the copy instruction, i.e., replace the corresponding destination operand in the target instruction as the source operand of the copy instruction. For another example, when the associated variable is a variable indicated by a destination operand of the copy instruction, the variable indicated by a source operand of the copy instruction can be referred to as a replacement variable; if a preset condition is met between the copy instruction and the target instruction, the compiler can replace the associated variable in the target instruction as the replacement variable of the copy instruction, i.e., replace the corresponding source operand in the target instruction as the destination operand of the copy instruction.

[0112] Optionally, the preset condition includes the following conditions:

[0113] (1) At least one target instruction has a dominance relationship with the copy instruction in the control flow, which can be that the copy instruction dominates the at least one target instruction, i.e., in the control flow graph, the node where the copy instruction is located is a dominance node of all nodes where the target instructions are located; or the copy instruction successively dominates the at least one target instruction, i.e., in the control flow graph, the node where the copy instruction is located is a successively dominant node of all nodes where the target instructions are located.

[0114] (2) The replacement variable of the copy instruction is in an active state at the target instruction, i.e., the replacement variable of the copy instruction is active at the target instruction; wherein the compiler can perform active variable analysis on the variables in the copy instruction and determine the active state of the replacement variable of the copy instruction at the target instruction. The active state analysis of the variables in the compiler instruction can be referred to in the above.

[0115] If the compiler determines that the replacement variable of the copy instruction is not active at the target instruction, it indicates that the value of the replacement variable of the copy instruction can be modified by other program instructions, at which time the compiler can determine that the copy instruction does not meet the preset condition and cannot perform replacement modification of the target instruction and deletion of the copy instruction, so as to avoid program code running errors.

[0116] (3) The variable in the copy instruction remains unchanged at the copy instruction and the target instruction. For example, the target instruction is a use instruction of the variable in the copy instruction, which needs to meet that the replacement variable of the copy instruction is not modified by other program instructions, and the associated variable in the copy instruction is also not modified by other program instructions. For another example, the target instruction is a value setting instruction of the variable in the copy instruction, which needs to meet that the replacement variable of the copy instruction remains unchanged at the copy instruction and the target instruction.

[0117] The compiler can perform a reaching constant analysis to determine whether the variable of the copy instruction is changed at the copy instruction and the target instruction. If the compiler determines that the variable of the copy instruction is changed at the copy instruction and the target instruction, it indicates that the value of the variable of the copy instruction can be modified by other program instructions, and the compiler can determine that the copy instruction and the target instruction do not meet the preset condition, and the replacement modification of the target instruction and the deletion of the copy instruction cannot be performed to avoid program code running errors.

[0118] Alternatively, the compiler can obtain the necessary reaching constants at the copy instruction and the target instruction, so as to obtain the necessary reaching constant corresponding to each variable in the copy instruction at the copy instruction and the necessary reaching constant corresponding to each variable in the copy instruction at the target instruction. At the copy instruction, the necessary reaching constant corresponding to each variable in the copy instruction can be the last program instruction that performs the constant setting on the variable. At the target instruction, the necessary reaching constant corresponding to each variable in the copy instruction can be the last program instruction that performs the constant setting on the variable before the target instruction. The calculation method of the necessary reaching constant corresponding to each variable at the copy instruction and the necessary reaching constant corresponding to each variable at the target instruction can refer to the reaching constant analysis in the foregoing description. At the copy instruction, the necessary reaching constant corresponding to each variable can be the necessary reaching constant at the entry of the copy instruction or the necessary reaching constant at the exit of the copy instruction. The present embodiment of the present application can determine appropriate conditions according to actual application scenarios.

[0119] If the necessary reaching constant of each variable in the copy instruction at the copy instruction is consistent with the necessary reaching constant corresponding to the variable at the target instruction, it indicates that the constant setting of the variable is not killed by other program instructions when the constant setting of the variable is transmitted between the copy instruction and the target instruction, so that the compiler can determine that the variable remains unchanged at the copy instruction and the target instruction. If the necessary reaching constant of the variable at the copy instruction is inconsistent with the necessary reaching constant of the variable at the target instruction, it indicates that the variable is changed at the copy instruction and the target instruction. If the associated variable in the target instruction is replaced by the replacement variable of the copy instruction, the operation of the target instruction will be incorrect, and the compiler can determine that the copy instruction does not meet the preset condition and the deletion of the copy instruction cannot be performed.

[0120] Specifically, if at least one target instruction has a dominance relationship with the copy instruction in the control flow, and the replacement variable of the copy instruction is in an active state at the target instruction, and the variable of the copy instruction remains unchanged at the copy instruction and the target instruction, the compiler can determine that the preset condition is met between the copy instruction and the target instruction. At this time, the compiler can modify the associated variable in the target instruction to the replacement variable of the copy instruction, and delete the redundant copy instruction. In this way, the method of the present disclosure will not cause a running error of the program code after deleting the copy instruction, and can optimize the memory access of the program code.

[0121] In one embodiment, the method of the embodiments of the present application can implement a forward copy deletion process, that is, according to the execution order of the program instructions, the replacement of the variable in the target instruction after the copy instruction is implemented according to the copy instruction, and the copy instruction is deleted. Wherein, the associated variable of the copy instruction is the destination operand of the copy instruction, and the replacement variable of the copy instruction is the source operand of the copy instruction. The target instruction is the using instruction of the destination operand in the copy instruction. In the embodiments of the present disclosure, the compiler can determine the target instruction of the copy instruction according to the arrival constant value of each program instruction, and replace the use of the destination operand in the target instruction with the use of the source operand when the copy instruction meets the preset condition, so as to realize the replacement of the associated variable in the target instruction, and delete the redundant copy instruction.

[0122] Specifically, the compiler can obtain the alias set of the destination operand of the copy instruction and the constant value range of the destination operand of the copy instruction, and determine whether the at least one program instruction that reads the destination operand of the copy instruction exists by judging whether there is at least one program instruction that reads the destination operand of the copy instruction, and the program instruction is within the constant value range of the destination operand of the copy instruction, to determine whether the program instruction is the using instruction of the destination operand of the copy instruction. Wherein, the constant value range of the destination operand of the copy instruction is used to indicate the effective range of the constant value of the variable of the copy instruction. Optionally, the compiler can obtain the storage space of the destination operand of the copy instruction, and the operand of other program instructions that overlaps with the storage space of the destination operand of the copy instruction is regarded as the alias of the destination operand of the copy instruction.

[0123] If there is at least one program instruction that reads the destination operand of the copy instruction, and the at least one program instruction is within the constant value range of the destination operand of the copy instruction, it is determined that the at least one program instruction is the using instruction of the associated variable of the copy instruction. Further, if the at least one program instruction is the using instruction of the destination operand of the copy instruction, the at least one program instruction is determined as the target instruction.

[0124] Optionally, the preset condition required to be met by the copy instruction and the at least one target instruction can include:

[0125] The copy instruction dominates all target instructions;

[0126] the replacement variables of the copy instruction are active at the at least one target instruction; in particular, the source operand of the copy instruction is active at all target instructions;

[0127] the replacement variables of the copy instruction remain unchanged at the copy instruction and the at least one target instruction; in particular, the source operand of the copy instruction remains unchanged at all target instructions and the copy instruction; that is, the required reaching definite value of the source operand of the copy instruction at the copy instruction and the required reaching definite value of the source operand at all target instructions are consistent.

[0128] the replacement variables of the copy instruction remain unchanged at the copy instruction and the at least one target instruction; in particular, the source operand of the copy instruction remains unchanged at all target instructions and the copy instruction; that is, the required reaching definite value of the source operand of the copy instruction at the copy instruction and the required reaching definite value of the source operand at all target instructions are consistent.

[0129] As shown in Figure 5 the method of the present disclosure can perform program instruction optimization according to the following steps:

[0130] S510, traversing the program code to obtain at least one copy instruction, wherein each copy instruction is used to complete the copying of tensor data of the same data type.

[0131] S520, obtaining all aliases of the destination operand in the copy instruction;

[0132] S530, determining whether there is at least one program instruction that performs a read operation on the alias set of the destination operand, and the at least one program instruction is within the definite value range of the destination operand of the copy instruction; if yes, determining that the at least one program instruction is a use instruction of the destination operand in the copy instruction, and determining the at least one program instruction as a target instruction, and continuing to perform step S540; if no, determining that the at least one program instruction is not a use instruction of the destination operand in the copy instruction.

[0133] S540, determining whether the at least one target instruction is dominated by the copy instruction; if yes, continuing to perform step S550; if no, determining that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0134] S550, determine whether the must-reached constant value corresponding to the destination operand of the copy instruction at any target instruction is only the copy instruction; if yes, it indicates that there is no other program instruction to set the value of the destination operand of the copy instruction between the copy instruction and all target instructions, the destination operand of the copy instruction remains unchanged at the copy instruction and all target instructions, and the step S560 is continued; if no, it is determined that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0135] S560, determine whether the source operand of the copy instruction is active at all target instructions; if yes, it is determined that the copy instruction and the target instruction meet the preset condition, and the step S570 is continued; if no, it is determined that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0136] S570, determine whether the must-reached constant value corresponding to the source operand of the copy instruction at the copy instruction and the must-reached constant value corresponding to the source operand of the copy instruction at any target instruction are consistent; if yes, it indicates that there is no other program instruction to set the value of the source operand of the copy instruction between the copy instruction and all target instructions, the source operand of the copy instruction remains unchanged at the copy instruction and all target instructions, and the step S580 is continued; if no, it is determined that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0137] S580, replace the use of the destination operand in the target instruction with the use of the source operand in the copy instruction, and delete the copy instruction. Repeat the above operation until the optimization processing of all copy instructions is completed.

[0138] For example, the program code can include the following program instructions:

[0139] IN1: A = alloc (x);

[0140] IN2: D = alloc (y);

[0141] IN3: def; A1 = B * C;

[0142] IN4: def; D = A1;

[0143] IN5: use; E = F + D.

[0144] The program instruction IN1 is used to allocate storage space for the variable A, and the storage space x corresponding to the variable A can be [0, 127]. Similarly, the program instruction IN2 is used to allocate storage space for the variable D, and the storage space y corresponding to the variable D can be [128, 256]. The program instruction IN3 is used to assign the product of the tensor data B and C to A, that is, the program instruction IN3 is a value assignment instruction for the variable A1, the program instruction IN3 is a value assignment instruction for the variable A1, and the storage space corresponding to the variable A1 can be a subset of the storage space corresponding to the variable A, for example, the variable A1 points to the storage space [0, 63]. The program instruction IN4 is a copy instruction used to assign the value of the variable A1 to the variable D, the copy instruction IN4 is a value assignment instruction for the variable D, and the copy instruction IN4 is a use instruction for the variable A1; wherein A1 is a source operand of the copy instruction (that is, A1 is a replacement variable of the copy instruction), and D is a destination operand of the copy instruction (that is, D is an associated variable of the copy instruction). The program instruction IN5 is a use instruction for the variables D and F, and is also a value assignment instruction for the variable E.

[0145] The compiler can obtain the value assignment information of each variable in the program instruction based on the above reaching value analysis, and determine the reaching value and the must reaching value at each program instruction and the like. Specifically,

[0146] At the program instruction IN3, the reaching value corresponding to the variable A1 is {IN3}, and the must reaching value corresponding to the variable A1 is {IN3}; and the value assignment range of the variable A1 by the program instruction IN3 is {IN3}.

[0147] At the program instruction IN4, since no other program instruction assigns a value to the variable A1 before the program instruction IN3, at the program instruction IN4, the must reaching value corresponding to the variable A1 is {IN3}, the reaching value corresponding to the variable A1 is {IN3}, and the value assignment range of the variable A1 by the program instruction IN3 is {IN3, IN4}.

[0148] At the program instruction IN4, the must reaching value corresponding to the variable D is {IN4}, the reaching value corresponding to the variable D is {IN4}, and the value assignment range of the variable D by the program instruction IN4 is {IN4}.

[0149] At the program instruction IN5, since no other program instruction assigns a value to the variable D before the program instruction IN5, the must reaching value corresponding to the variable D is {IN4}, the reaching value corresponding to the variable D is {IN4}, and the value assignment range of the variable D by the program instruction IN5 is {IN4, IN5}.

[0150] At the program instruction IN5, since no other program instruction modifies the variable A1 before the program instruction IN5, the must-reached value of the variable A1 corresponding to the variable A1 is {IN3}, the reached value of the variable A1 corresponding to the variable A1 is {IN3}, and the variable A1 is in the range of the value of the program instruction IN3, the reached value of the variable A1 corresponding to the variable A1 is {IN3}, the reached value of the variable A1 corresponding to the variable A1 is {IN3}, and the variable A1 is in the range of the value of the program instruction IN3.

[0151] The compiler can obtain the aliases of the variables A1 and D in the copy instruction, denoted as {group-alias-A1} and {group-alias-D} respectively. The alias of the variable A1, {group-alias-A1}, can be denoted as {A, A1}. Then, the compiler can determine the data dependence relationship between the program instructions according to the above-mentioned aliases of the variables A1 and D and the value information of each variable in the program code, to determine the target instruction corresponding to the copy instruction.

[0152] Specifically, if the compiler determines that the read operation of the {group-alias-D} of the copy instruction is in the range of the value of the variable D of the copy instruction, the program instruction is recorded as a use instruction of the variable D {use-D}, and the program instruction is determined as the target instruction. As shown in the above program code, the read operation of the variable D of the program instruction IN5 is in the range of the value of the variable D of the copy instruction IN4 {IN4, IN5}, the program instruction IN5 is recorded as a use instruction of the variable D, and the program instruction IN5 is determined as the target instruction.

[0153] Further, the compiler can also determine whether the preset condition is met between the copy instruction and the target instruction. Referring to the above-mentioned value information of the variables, at the copy instruction IN4, the must-reached value of the variable A1 is {IN3}; at the program instruction IN5, the must-reached value of the variable A1 is also {IN3}, which indicates that the variable A1 remains unchanged at the copy instruction IN4 and the target instruction IN5. And at the copy instruction IN4 and the target instruction IN5, the must-reached value of the variable D is {IN4}, which indicates that the variable D remains unchanged at the copy instruction IN4 and the target instruction IN5. And the variable A1 is not "killed" by the value of other program instructions between the target instruction IN5 and the copy instruction IN4, that is, the variable A1 is still in an active state at the target instruction IN5. At the same time, in the control flow graph, the copy instruction IN4 dominates the target instruction IN5, and at this time, the compiler can determine that the preset condition is met between the copy instruction IN4 and the target instruction IN5.

[0154] Further, the compiler can replace the variable D in the program instruction IN5 when the copy instruction and the target instruction meet the above-mentioned preset condition, that is, replace the use of the associated variable D in the target instruction with the use of the replacement variable A1, and delete the redundant copy instruction IN4.

[0155] The program instructions after the above optimization can be represented as follows:

[0156] IN1 : def; A = alloc (x);

[0157] IN2 : def; D = alloc (y);

[0158] IN3 : def; A1 = B * C;

[0159] IN4 : use; E = F + A1.

[0160] For another example, the program code includes the following program instructions:

[0161] IN1 : A = alloc (x);

[0162] IN2 : D = alloc (y);

[0163] IN3 : def; A1 = B * C;

[0164] IN4 : D = A1;

[0165] IN5 : def; A2 = B + C;

[0166] IN6 : use; E = F + D.

[0167] The program instruction IN1 is used to allocate storage space for the variable A, and the storage space x corresponding to the variable A can be [0, 127]. Similarly, the program instruction IN2 is used to allocate storage space for the variable D, and the storage space y corresponding to the variable D can be [128, 256]. The program instruction IN3 is used to assign a value to the variable A1, and the program instruction IN3 is a value assignment instruction for the variable A1. The storage space corresponding to the variable A1 can be a subset of the storage space corresponding to the variable A, for example, the variable A1 points to the storage space [0, 63]. The program instruction IN6 is a use instruction for the variable D, and the copy instruction IN4 dominates the program instruction IN6. Different from the above embodiment, the program instruction IN5 is added after the copy instruction IN4. The program instruction IN5 is used to assign the sum of the tensor data B and C to A2, that is, the program instruction IN5 is used to assign a value to the variable A2, and the program instruction IN5 is a value assignment instruction for the variable A2. The storage space corresponding to the variable A2 can be [0, 128]. Since the value assignment of the variable A2 by the program instruction IN5 (value assignment storage space [0, 128]) partially coincides with the value assignment of the variable A1 by the program instruction IN3 (value assignment storage space [0, 63]), the value assignment of the variable A1 by the program instruction IN3 is killed. Thus, the value assignment of the variable A1 by the program instruction IN3 cannot reach the target instruction IN6, and the variable A1 is no longer active at the target instruction IN6. At this time, the compiler can determine that the preset condition between the copy instruction and the target instruction IN6 is not met, and the copy instruction cannot be deleted.

[0168] In the above embodiment, the target instruction must be dominated by the copy instruction, but in some scenarios, the above condition is difficult to meet. Furthermore, in some scenarios, the replacement variable may not survive to the target instruction, which leads to the fact that the copy instruction cannot be deleted and optimized according to the above optimization method. For example,

[0169]

[0170]

[0171] The variable %0 points to a block of memory space, and the variable %1 points to a part of the storage space of the variable %0, which is denoted as a sub-storage space. The copy instruction copy %1 <- %res is used to assign the value of the variable %res to the variable %1, and the copy instruction can be executed multiple times in a loop to complete the assignment of the variable %0. The copy instruction copy %2 <- %0 is used to assign the value of the variable %0 to the variable %2.

[0172] According to the optimization method of the above embodiment, it is difficult to complete the optimization and deletion of the copy instruction in the above program code. Based on this, the program instruction optimization method of the embodiment of the present disclosure can also determine the target instruction by searching for the constant value instruction of the copy instruction, and modify the variable to which the copy instruction is valued when the preset condition is met between the copy instruction and the target instruction, and delete the redundant copy instruction accordingly.

[0173] Based on the above example, the program instruction optimization method of the embodiment of the present disclosure can optimize the program instructions in the above program code, and the optimized program code can be represented as follows:

[0174]

[0175] In one embodiment, the method of the embodiment of the present application can also implement a reverse copy deletion process, that is, according to the execution order of the program instructions, the variable in the target instruction is replaced according to the copy instruction, and the copy instruction after the target instruction is deleted. Wherein, the associated variable of the copy instruction is the source operand of the copy instruction, and the replacement variable of the copy instruction is the destination operand of the copy instruction. The target instruction is the constant value instruction of the source operand in the copy instruction. In the embodiment of the present disclosure, the compiler can replace the constant value of the destination operand of the target instruction to the constant value of the source operand of the copy instruction when the preset condition is met between the copy instruction and the target instruction, so as to realize the replacement of the associated variable in the target instruction, and delete the redundant copy instruction.

[0176] Specifically, the compiler can obtain at least one program instruction for writing the alias set of the source operand in the copy instruction, and the arrival constant value of the source operand in the copy instruction at the copy instruction; if there is at least one program instruction for writing the alias set of the source operand in the copy instruction, and the at least one program instruction belongs to the arrival constant value of the alias set of the source operand in the copy instruction at the copy instruction, the program instruction is determined as the constant value instruction of the source operand in the copy instruction, and the program instruction is determined as the target instruction. Wherein, the compiler can obtain the storage space of the source operand of the copy instruction, and the operand of other program instructions which overlaps with the storage space of the source operand as the alias of the source operand of the copy instruction.

[0177] In the embodiment of the present application, the preset condition required to be met between the copy instruction and the target instruction can include:

[0178] The copy instruction is followed by all target instructions;

[0179] The replacement variable of the copy instruction is in an active state at least one target instruction; specifically, the destination operand of the copy instruction is in an active state at all target instructions.

[0180] The replacement variable of the copy instruction remains unchanged at the copy instruction and the at least one target instruction. Specifically, the destination operand of the copy instruction remains unchanged at the copy instruction and all target instructions, i.e., the must-reach constant value corresponding to the destination operand of the copy instruction at the copy instruction entry is consistent with the must-reach constant value at the target instruction, which indicates that there is no other program instruction to effectively define the value of the replacement variable between the target instruction and the copy. The must-reach constant value at the target instruction and the must-reach constant value at the copy instruction entry can be an empty set.

[0181] There is no specified program instruction between the at least one target instruction and the copy instruction, where the specified program instruction is a use instruction of the destination operand of the copy instruction, and the copy instruction successively dominates the specified program instruction. Specifically, there is no specified program instruction between the copy instruction and all target instructions, which indicates that there is no other program instruction using the destination operand of the copy instruction between all target instructions and the copy instruction.

[0182] As shown in Figure 6 The method of the present disclosure can perform program instruction optimization according to the following steps:

[0183] S610, traverse the program code to obtain at least one copy instruction, each copy instruction being used to complete the copy of tensor data of the same data type.

[0184] S620, obtain all aliases of the source operand in the copy instruction;

[0185] S630, determine whether there is at least one program instruction that performs a write operation on all aliases of the source operand, and the at least one program instruction belongs to the reach constant value of all aliases of the source operand at the copy instruction; if yes, determine that the at least one program instruction is the constant instruction of the source operand in the copy instruction, and determine the at least one program instruction as the target instruction, and continue to perform step S640; if no, determine that the program instruction is not the constant instruction of the source operand in the copy instruction.

[0186] S640, determine whether the at least one target instruction is successively dominated by the copy instruction; if yes, continue to perform step S650; if no, determine that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0187] S650, determine whether the destination operand of the copy instruction is active at the target instruction; if yes, continue to perform step S660, if no, determine that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0188] S660, determine whether the must-reach constant corresponding to the source operand of the copy instruction at the copy instruction entry and the must-reach constant corresponding to the target instruction remain consistent, if yes, it indicates that there is no other program instruction to effectively define the replacement variable between the target instruction and the copy, so that it can be determined that the source operand of the copy instruction remains consistent at the copy instruction and the target instruction, continue to execute step S670, if not, it is determined that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted.

[0189] S670, determine whether there is a specified program instruction between the copy instruction and the target instruction, if yes, it is determined that the copy instruction and the target instruction do not meet the preset condition, and the copy instruction cannot be deleted, if not, it is determined that the copy instruction and the target instruction meet the preset condition, and continue to execute step S680.

[0190] Specifically, the compiler can determine that there is a specified program instruction between the copy instruction and the target instruction when it is determined that there is a use instruction of the destination operand in the copy instruction, and the use instruction of the destination operand in the copy instruction is subsequently dominated by the copy instruction.

[0191] S680, replace the definition of the source operand in the target instruction with the definition of the destination operand in the copy instruction, and delete the copy instruction. Repeat the above operation until the optimization processing of all copy instructions is completed.

[0192] For example, the program code can include the following program instructions:

[0193] IN1: D = alloc ( ) ;

[0194] IN2: A = alloc ( ) ;

[0195] IN3: def; A1 = B * C;

[0196] IN4: def; A2 = B + 1;

[0197] IN5: D = A.

[0198] The program instruction IN1 is used to allocate storage space for the variable D, and the storage space of the variable D can be [128, x], where x is an unknown number. The program instruction IN2 is used to allocate storage space for the variable A, and the storage space corresponding to the variable A can be [0, 127]. The program instruction IN3 is used to assign the product of the tensor data B and C to A1, that is, the program instruction IN3 is a value assignment instruction for the variable A1, and the storage space corresponding to the variable A1 can be a subset of the storage space corresponding to the variable A, for example, the variable A1 points to the storage space [0, 63]. Similarly, the program instruction IN4 is used to assign the sum of the tensor data B and 1 to A2, that is, the program instruction IN4 is a value assignment instruction for the variable A2, and the storage space corresponding to the variable A2 can be a subset of the storage space corresponding to the variable A, for example, the variable A2 points to the storage space [64, 127]. The program instruction IN5 is a copy instruction, which is used to assign the value of the variable A to the variable D, and the copy instruction IN4 is a value assignment instruction for the variable D, and the copy instruction IN5 is a use instruction for the variable A; where A is the source operand of the copy instruction (that is, A is the replacement variable of the copy instruction), and D is the destination operand of the copy instruction (that is, D is the associated variable of the copy instruction).

[0199] The compiler can obtain the value assignment information of each variable in the program instruction. Specifically as follows:

[0200] At the program instruction IN3, the variable A1 must reach the value assignment {IN3}, and the variable A1 reaches the value assignment {IN3}.

[0201] At the program instruction IN4, the variable A2 must reach the value assignment {IN4}, the variable A2 reaches the value assignment {IN4}, and the variable A1 reaches the value assignment {IN3}.

[0202] At the program instruction IN5, the variable D must reach the value assignment {IN5}, the variable D reaches the value assignment {IN5}, the variable A2 reaches the value assignment {IN4}, and the variable A1 reaches the value assignment {IN3}.

[0203] The compiler can obtain the aliases of the variables A and D in the copy instruction, which are denoted as {group-alias-A} and {group-alias-D} respectively, where {group-alias-A} can include {A, A1, A2}. Then, the compiler can determine the data dependency relationship between the program instructions according to the above aliases of the variables A and D and the value assignment information of each variable in the program code, to determine the target instruction corresponding to the copy instruction.

[0204] Specifically, if the compiler determines that there is a program instruction performing a write operation on {group-alias-A} and the program instruction belongs to the reaching definition of {group-alias-A} at the copy instruction, the program instruction is recorded as a definition instruction {define-A} of the variable A, and the definition instruction is determined as a target instruction. As shown in the above program code, the program instructions IN3 and IN4 perform a write operation on the variable of {group-alias-A}, and at the copy instruction IN5, the reaching definition of the variable A1 is {IN3} and the reaching definition of the variable A2 is {IN4}, the program instructions IN3 and IN4 are recorded as the definition instructions of the variable A, and the program instructions IN3 and IN4 are target instructions.

[0205] Further, the compiler can also determine whether a preset condition is met between the copy instruction and the at least one target instruction. Referring to the reaching definition information of the variable, at the entry of the copy instruction IN5, the reaching definition of the variable D corresponding to the entry is a null set, and the reaching definition of the variable D corresponding to all the target instructions IN3 and IN4 is also a null set, which indicates that the variable D remains unchanged at the entry of the copy instruction and at all the target instructions. Further, the variable D is in an active state at the target instructions IN3 and IN4. Further, there is no use instruction of the variable D between any target instruction IN3, IN4 and the copy instruction IN5, and the use instruction of the variable D succeeds the copy instruction IN5; and there is also no definition instruction of the variable D between any target instruction IN3, IN4 and the copy instruction IN5. Meanwhile, on the control flow graph, the copy instruction IN5 succeeds the target instructions IN3 and IN4, and at this time, the compiler can determine that the preset condition is met between the copy instruction IN5 and the target instructions IN3 and IN4.

[0206] Further, the compiler can replace the aliases A1 and A2 of the variable A in the target instructions IN3 and IN4 when the preset condition is met between the copy instruction and the target instructions, that is, replace the definition of the variable A1 and A2 in the target instructions with the definition of the replacement variable D, and delete the redundant copy instruction IN5.

[0207] The program instructions after the above optimization can be represented as follows:

[0208] IN1: D = alloc();

[0209] IN2: A = alloc();

[0210] IN3: def; D1 = B * C;

[0211] IN4: def; D2 = B + 1.

[0212] As can be seen from the above, the program instruction IN2 redefines the variable D after optimization.

[0213] For another example, the program code includes the following program instructions:

[0214] IN1: D = alloc();

[0215] IN2: A = alloc();

[0216] IN3: def; A1 = B * C;

[0217] IN4: def; A2 = B + 1;

[0218] IN5: use; E = D - F;

[0219] IN6: D = A.

[0220] The program instruction IN1 is used to allocate storage space for the variable D, and the storage space of the variable D can be [128, x], where x is an unknown number. The program instruction IN2 is used to allocate storage space for the variable A, and the storage space corresponding to the variable A can be [0, 127]. The program instruction IN3 is a constant assignment instruction for the variable A1, and the storage space corresponding to the variable A1 can be a subset of the storage space corresponding to the variable A, for example, the variable A1 points to the storage space [0, 63]. The program instruction IN4 is a constant assignment instruction for the variable A2, and the storage space corresponding to the variable A2 can be a subset of the storage space corresponding to the variable A, for example, the variable A2 points to the storage space [64, 127]. Different from the above embodiment, the program instruction IN5 is added before the copy instruction IN6, the program instruction IN5 is a use instruction for the variable D, and the copy instruction IN6 is a successor of the program instruction IN5 in the control flow graph. At this time, the compiler can determine that there is a specified program instruction between the copy instruction IN6 and the target instructions IN3 and IN4, so that it is determined that the preset condition is not met between the copy instruction and the target instruction, and the copy instruction cannot be deleted.

[0221] The method of the present disclosure can replace the associated variables in the target instructions according to the copy instruction under the condition that the program code is normally run, and after the modification of the target instructions is completed, the redundant copy instruction can be deleted, so as to realize the optimization of memory access by deleting the copy instruction.

[0222] The present disclosure also provides a program instruction optimization device, which includes a processor and a memory, the memory is used to store a computer program or instructions, and the processor implements the program instruction optimization method of the above embodiment when executing the computer program in the memory. The specific implementation of the program instruction optimization method can be referred to the description above.

[0223] The present disclosure also provides a computer program product comprising computer programs or instructions, which, when executed by a processor, implement the program instruction optimization method of the above embodiments. Optionally, the computer program product can be a compiler. The compiler can run on a processor to convert the above program code into hardware instructions executable by computer hardware.

[0224] The present disclosure also provides a computer readable storage medium for storing computer programs or instructions, which, when executed by one or more processors, implement the program instruction optimization method of the above embodiments.

[0225] It should be clear that the computer program product and the computer program stored in the storage medium work in a manner basically consistent with the execution process of the method steps in the above embodiments, and the specific description can be referred to in the above description.

[0226] The storage medium can be a computer readable storage medium, such as a ferroelectric memory (FRAM, Ferromagnetic Random Access Memory), a read-only memory (ROM, Read Only Memory), a programmable read-only memory (PROM, Programmable Read Only Memory), an erasable programmable read-only memory (EPROM, Erasable Programmable Read Only Memory), an electrically erasable programmable read-only memory (EEPROM, Electrically Erasable Programmable Read Only Memory), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM, Compact Disk-Read Only Memory) memory, etc. It can also be various devices including one or any combination of the above memories.

[0227] The technical features of the above embodiments can be combined in any manner. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described, however, as long as the combinations of the technical features do not exist contradictions, they should be considered as the scope of the present disclosure.

[0228] The above-described embodiments are merely illustrative of several embodiments of the present disclosure, which are described in a more specific and detailed manner, but should not be construed as limiting the scope of the patent. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present disclosure, and these are all within the scope of the present disclosure. Therefore, the scope of protection of the patent of the present disclosure should be subject to the appended claims.

Claims

1. A method of optimizing program instructions, characterized by, The method comprises: obtaining a copy instruction and at least one target instruction in program code; wherein the copy instruction comprises an associated variable and a replacement variable, and the target instruction contains the associated variable; if a preset condition is met between the copy instruction and the at least one target instruction, replacing the associated variable in the target instruction according to the copy instruction, and deleting the copy instruction.

2. The method of claim 1, wherein, The replacing the associated variable in the target instruction according to the copy instruction further comprises: replacing the associated variable in the target instruction with the replacement variable in the copy instruction.

3. The method according to claim 1 or 2, characterized in that, The preset condition comprises the following condition: the copy instruction and the at least one target instruction have a dominance relationship in a control flow; the replacement variable of the copy instruction is in an active state at the target instruction; the variable of the copy instruction remains unchanged at the copy instruction and the target instruction.

4. The method of claim 3, wherein, The method further comprises: obtaining a must-reached constant value of a variable in the copy instruction at the copy instruction and a must-reached constant value of the variable at the target instruction; if the must-reached constant value of the variable at the copy instruction is consistent with the must-reached constant value of the variable at the target instruction, determining that the variable of the copy instruction remains unchanged at the copy instruction and the target instruction.

5. The method according to any one of claims 1 to 4, characterized in that, The associated variable of the copy instruction is a destination operand of the copy instruction, and the replacement variable of the copy instruction is a source operand of the copy instruction.

6. The method of claim 5, wherein, The method further comprises: if the program instruction is a use instruction of the associated variable, determining the program instruction as a target instruction.

7. The method of claim 6, wherein, The method further comprises: obtaining an alias set of the associated variable of the copy instruction and a constant value range of the associated variable of the copy instruction; if there is a program instruction that reads the alias set of the associated variable, and the program instruction is within the constant value range of the associated variable of the copy instruction, determining the program instruction as a use instruction of the associated variable.

8. The method of claim 3, wherein, The associated variable of the copy instruction is a source operand of the copy instruction, and the replacement variable of the copy instruction is a destination operand of the copy instruction.

9. The method of claim 8, wherein, The method further comprises: if the program instruction is a constant value instruction of the associated variable, determining the program instruction as a target instruction.

10. The method of claim 9, wherein, The method further comprises: obtaining an alias set of the associated variable of the copy instruction and a constant value range of the associated variable of the copy instruction; if there is a program instruction that writes the alias set of the associated variable, and the program instruction is a reached constant value of the variable at the copy instruction, determining the program instruction as a constant value instruction of the associated variable.

11. The method of claim 8, wherein, The preset condition further comprises: there is no specified program instruction between the target instruction and the copy instruction; wherein the specified program instruction is a use instruction of a destination operand of the copy instruction, and the specified program instruction is subsequently dominant to the copy instruction.

12. A program instruction optimization apparatus characterized by comprising: A computer readable storage medium storing a computer program or instructions, which when executed by one or more processors, implement the program instruction optimization method of any one of claims 1-11.

13. A computer-readable storage medium, characterized in that, A computer readable storage medium storing a computer program or instructions, which when executed by one or more processors, implement the program instruction optimization method of any one of claims 1-11.

14. A computer program product, characterised in that, A computer program product comprising a computer program or instructions, which when executed by a processor, implement the program instruction optimization method of any one of claims 1-11.