Chip programming device and chip programming system

Abstract

The invention relates to a chip programming device and a chip programming system. The chip programming device comprises a communication interface module, an MCU (Microprogrammed Control Unit) main control module, a single-bus signal conditioning circuit, an encryption and decryption circuit and an extensible multi-path interface circuit, the communication interface module is connected with an upper computer; the MCU main control module is connected with the communication interface module; the single bus signal conditioning circuit is connected with the MCU main control module; the encryption and decryption circuit is connected with the single-bus signal conditioning circuit; and the extensible multi-interface circuit is connected with the single-bus signal conditioning circuit, the encryption and decryption circuit and the chip to be programmed. According to the chip programming device disclosed by the invention, the single-bus signal conditioning circuit and the extensible multi-channel interface circuit are arranged, so that multi-channel programming of a single-bus interface of a special chip can be realized; and by arranging the encryption and decryption circuit, the confidentiality is greatly enhanced, the data is prevented from being stolen, the economic loss and safety accidents of customers are avoided, and the safety is higher.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, in particular to a chip burning device and a chip burning system. BACKGROUND

[0002] The burner is actually a tool for writing data into programmable integrated circuits. The burner is mainly used for programming (or writing) chips such as single-chip microcomputers (including embedded) and memories (including BIOS, Basic Input-Output System). Generally speaking, embedded chips such as single-chip microcomputers have blank internal memories when they are shipped, and the corresponding program code files need to be burned by the user before they can be used. When burning, a burner is generally used to burn files.

[0003] The mainstream chip burners in the traditional market are basically configured with ordinary burning interfaces. For example, the commonly used burning interfaces for ARM chips are SWD (Serial Wire Debug) interface and JTAG (Joint Test Action Group) interface, or the commonly used serial burning interface for ordinary small single-chip microcomputers. The above burning interfaces can fully meet the functional requirements when burning the chips of commonly used single-chip microcomputers, but cannot meet the multi-channel burning of the single bus interface of special chips (such as ASIC chips). In addition, the communication process of the mainstream chip burners in the market when burning chips is basically plaintext communication, which can easily lead to the theft of communication data, causing double losses in economy and security. SUMMARY

[0004] Therefore, it is necessary to provide a chip burning device and a chip burning system to solve the problems in the above background art. The single bus signal conditioning circuit and the expandable multi-channel interface circuit in the chip burning device can realize multi-channel burning of the single bus interface of special chips. By setting the encryption and decryption circuit, the confidentiality is greatly enhanced, the data theft is avoided, the economic loss and safety accidents of customers are avoided, and the security is higher.

[0005] In order to solve the above technical problems and other problems, in a first aspect, the present application provides a chip burning device, which comprises:

[0006] A communication interface module is connected to an upper computer, and the upper computer is provided with a burning program;

[0007] An MCU master control module is connected to the communication interface module, and is used to download and store the burning program from the upper computer via the communication interface module. The MCU master control module stores at least one downloaded burning program as a target burning program;

[0008] The single bus signal conditioning circuit is connected with the MCU master module and is used for generating a single bus communication timing signal based on a target burning program stored by the MCU master module.

[0009] The encryption and decryption circuit is connected with the single bus signal conditioning circuit and is used for encrypting and decrypting the single bus communication timing signal.

[0010] The extensible multi-channel interface circuit is connected with the single bus signal conditioning circuit, the encryption and decryption circuit and the chip to be burned, and is used for burning the chip to be burned based on the encrypted single bus communication timing signal.

[0011] In the chip burning device in the above embodiment, the single bus signal conditioning circuit and the extensible multi-channel interface circuit are arranged. The single bus signal conditioning circuit can be used for burning based on a single data line. The extensible multi-channel interface circuit can be used for realizing multi-channel burning based on a single data line, so that multi-channel burning of a single bus interface of a special chip can be realized. The encryption and decryption circuit is arranged, so that the security is greatly enhanced, data theft is avoided, economic loss and safety accidents of customers are avoided, and the security is higher.

[0012] In some embodiments, the communication interface module includes a USB serial port circuit or a first wireless communication module. When the communication interface module includes the first wireless communication module, the upper computer includes a second wireless communication module. The second wireless communication module is wirelessly connected with the first wireless communication module, and the burning program is wirelessly sent to the first wireless communication module.

[0013] In some embodiments, the MCU master module includes:

[0014] The single chip microcomputer is connected with the communication interface module and is used for downloading at least one burning program from the upper computer via the communication interface module and storing the at least one burning program.

[0015] The SWD download interface is connected with the single chip microcomputer.

[0016] The reset circuit is connected with the single chip microcomputer.

[0017] The peripheral crystal oscillator circuit is connected with the single chip microcomputer.

[0018] In some embodiments, the single bus signal conditioning circuit includes:

[0019] The timing control circuit is connected with the MCU master module.

[0020] The timing signal generation circuit is connected with the timing control circuit and the MCU master module.

[0021] In some embodiments, the extensible multi-channel interface circuit includes a plurality of groups of multi-channel interface circuits, and each group of multi-channel interface circuits includes:

[0022] The multi-channel analog switch circuit is connected with the single bus signal conditioning circuit and the chip to be programmed.

[0023] The multi-channel driving circuit is connected with the single bus signal conditioning circuit and the chip to be programmed.

[0024] In some embodiments, the chip programming device further comprises a key and display module, which comprises:

[0025] The programming file selection unit is connected with the MCU master module and is used to determine the target programming file from the at least one programming file stored in the MCU master module.

[0026] The display unit is connected with the programming file selection unit and the MCU master module, and is used to display the file name of the target programming file after the programming file selection unit determines the target programming file.

[0027] The start programming unit is connected with the MCU master module, the programming file selection unit and the display unit, and is used to generate a start programming instruction; after the MCU master module receives the start programming instruction, the target programming file is fed back to the single bus signal conditioning circuit; the display unit is further used to display first information, and the first information comprises whether the chip to be programmed is in a programming state or whether the chip to be programmed is successfully programmed.

[0028] In some embodiments, if the MCU master module does not store the at least one programming file, the display unit is further used to display second information, and the second information is used to prompt that the MCU master module needs to download the programming file.

[0029] In some embodiments, the chip programming device further comprises:

[0030] The metal shell has a containing cavity in the metal shell; the communication interface module, the MCU master module, the single bus signal conditioning circuit, the encryption and decryption circuit and the expandable multi-channel interface circuit are located in the containing cavity.

[0031] In some embodiments, the chip programming device further comprises a power supply module, which comprises a power supply circuit and an electronic controllable switch.

[0032] The power supply circuit is connected with the MCU master module, the single bus signal conditioning circuit and the expandable multi-channel interface circuit through the electronic controllable switch; and the electronic controllable switch is used to cut off the connection between the power supply circuit and the MCU master module, the single bus signal conditioning circuit and the expandable multi-channel interface circuit after programming.

[0033] In a second aspect, the present application further provides a chip programming system, which comprises:

[0034] The chip to be programmed;

[0035] The host computer is used for providing the burning program.

[0036] The chip burning device as described in the first aspect; the extensible multi-channel interface circuit is connected with the chip to be burned; and the MCU master module is connected with the host computer.

[0037] In the chip burning system of the above embodiment, the single bus signal conditioning circuit and the extensible multi-channel interface circuit are arranged in the chip burning device. The single bus signal conditioning circuit can be used for burning based on a single data line. The extensible multi-channel interface circuit can be used for multi-channel burning based on a single data line. Thus, the multi-channel burning of the single bus interface of a special chip can be realized. The encryption and decryption circuit is arranged, which greatly enhances the security, avoids data theft, avoids economic losses and safety accidents of customers, and is safer. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings of other embodiments can be obtained by those skilled in the art without creative labor.

[0039] Figure 1 The block diagram of the chip burning device provided in an embodiment of the present application.

[0040] Figure 2 The circuit diagram of the MCU master module in the chip burning device provided in an embodiment of the present application.

[0041] Figure 3 The circuit diagram of the single bus signal conditioning circuit in the chip burning device provided in an embodiment of the present application.

[0042] Figure 4 The circuit diagram of the extensible multi-channel interface circuit in the chip burning device provided in an embodiment of the present application.

[0043] Figure 5 The circuit diagram of the USB serial port circuit in the chip burning device provided in an embodiment of the present application.

[0044] Figure 6 The circuit diagram of the key and display module in the chip burning device provided in an embodiment of the present application.

[0045] Figure 7 The circuit diagram of the power module in the chip burning device provided in an embodiment of the present application.

[0046] Figure 8 The circuit diagram of the encryption and decryption module in the chip burning device provided in an embodiment of the present application.

[0047] Figure 9 The three-dimensional structure schematic diagram of the chip burning device provided in an embodiment of the present application.

[0048] Figure 10 The block diagram of the chip burning system provided in an embodiment of the present application.

[0049] Legend of reference signs:

[0050] 11, chip burning device; 111, MCU main control module; 1111, reset circuit; 1112, first peripheral crystal oscillator circuit; 1113, second peripheral crystal oscillator circuit; 112, single bus signal conditioning circuit; 1121, timing control circuit; 1122, timing signal generating circuit; 113, extensible multi-channel interface circuit; 114, communication interface module; 115, key and display module; 1151, start burning unit; 1152, burning file selection unit; 1153, display unit; 116, power module; 117, encryption and decryption circuit; 118, metal shell; 119, display screen; 120, power switch button; 121, common interface; 122, multi-channel burning interface; 123, function key; 124, working state indicator light; 21, chip to be burned; 22, host computer. DETAILED DESCRIPTION

[0051] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present application can be more thoroughly and completely understood.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein only for the purpose of describing the specific embodiments and is not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0053] In the case of using "include", "have", and "contain" described herein, unless a clear limiting term is used, such as "only", "consisting of", etc., another component can be added. Unless otherwise mentioned, the singular form of the term can include the plural form and cannot be understood as one in number.

[0054] It should be understood that although the terms "first", "second" and the like can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element without departing from the scope of the present application.

[0055] In the present application, unless otherwise explicitly specified and limited, the terms "connected", "connected" and the like should be understood broadly, for example, it can be directly connected or indirectly connected through an intermediate medium, it can be internal communication of two elements or interaction relationship of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0056] It should be noted that the diagrams provided in the embodiments only illustrate the basic concept of the present disclosure in a schematic manner, and although only the components related to the present disclosure are shown in the diagrams, the actual implementation does not draw the number, shape and size of the components, the actual implementation of each component can be a random change, and the component layout pattern can be more complex.

[0057] The burner is actually a tool for writing data into programmable integrated circuits. Burner is mainly used for programming (or called writing) of single-chip microcomputer (including embedded) / memory (including BIOS, Basic Input-Output System, basic input-output system) and other chips. Generally speaking, the embedded chips such as single-chip microcomputer are blank when they are shipped, and need to be programmed by the user to perform the corresponding program code file, so as to be used. When programming, the burner is generally used to burn the file.

[0058] In one embodiment, referring to Figure 1 The present application provides a chip burning device 11, which can include a communication interface module 114, an MCU master module 111, a single bus signal conditioning circuit 112, an encryption and decryption circuit 117 and an expandable multi-channel interface circuit 113; the communication interface module 114 and the upper computer Figure 1The host computer is connected with the chip burning device 11 (not shown), and a burning program is set in the host computer; the MCU master module 111 is connected with the communication interface module 114, and the MCU master module 111 is used for downloading and storing the burning program from the host computer via the communication interface module 114; the MCU master module 111 stores the downloaded at least one burning program as a target burning program; the single bus signal conditioning circuit 112 is connected with the MCU master module 111, and the single bus signal conditioning circuit 112 is used for generating a single bus communication timing signal based on the target burning program stored in the MCU master module 111; the encryption and decryption circuit 117 is connected with the single bus signal conditioning circuit 112, and the encryption and decryption circuit 117 is used for encrypting and decrypting the single bus communication timing signal; the extensible multi-channel interface circuit 113 is connected with the single bus signal conditioning circuit 112, the encryption and decryption circuit 117 and the to-be-burned chip (not shown), and the extensible multi-channel interface circuit 113 is used for burning the to-be-burned chip based on the encrypted single bus communication timing signal. Figure 1 The encryption and decryption circuit 117 is connected with the single bus signal conditioning circuit 112, and the encryption and decryption circuit 117 is used for encrypting and decrypting the single bus communication timing signal; the extensible multi-channel interface circuit 113 is connected with the single bus signal conditioning circuit 112, the encryption and decryption circuit 117 and the to-be-burned chip (not shown), and the extensible multi-channel interface circuit 113 is used for burning the to-be-burned chip based on the encrypted single bus communication timing signal.

[0059] In the chip burning device 11 of the above embodiment, by setting the single bus signal conditioning circuit 112 and the extensible multi-channel interface circuit 113, the single bus signal conditioning circuit 112 can be used for burning based on a single data line, and the extensible multi-channel interface circuit 113 can be used for realizing multi-channel burning based on a single data line, so that the multi-channel burning of the single bus interface of the special chip can be realized; by setting the encryption and decryption circuit 117, the two-level encryption and decryption processing of the bidirectional communication data of the single bus can be realized based on the internal software encryption and decryption algorithm, and the same encryption and decryption are also realized at the ASIC end, so that the confidentiality and security of the communication process are greatly improved, the purpose of protecting the burning data is achieved, the confidentiality is greatly enhanced, the data is avoided to be stolen, the economic loss and safety accidents of the customer are avoided, and the security is higher.

[0060] As an example, please refer to Figure 1 and refer to Figure 2 The MCU master module 111 can include: a single-chip microcomputer U1, an SWD download interface P4, a reset circuit 1111 and a peripheral crystal oscillator circuit 112; the single-chip microcomputer U1 is connected with the communication interface module 114, and is used for downloading and storing at least one burning program from the host computer via the communication interface module 114; the pin of the SWD download interface P4 is connected with the single-chip microcomputer U1; the reset circuit 1111 is connected with the single-chip microcomputer U1; and the peripheral crystal oscillator circuit is connected with the single-chip microcomputer U1. The peripheral crystal oscillator circuit includes a first peripheral crystal oscillator circuit 1112 and a second peripheral crystal oscillator circuit 1113.

[0061] Specifically, the single-chip microcomputer U1 can include a plurality of pins of pin 1 to pin 144; wherein, in the single-chip microcomputer U1, pin 1 is a UART MTP ST pin, pin 2 is a UART NOR pin, pin 3 is a UART SEND pin, pin 4 is a UART RCV pin, pin 67 is a CH1 EN pin, pin 68 is a CH1'EN pin, pin 10 is a CH1 A0 pin, pin 11 is a CH1 A1 pin, pin 12 is a CH1 A2 pin, pin 13 is a CH1 A3 pin, pin 14 is a CH1 A4 pin, pin 56 is a DISPLAY_SCL pin, pin 57 is a DISPLAY_SDA pin, pin 127 is a LED0 pin, pin 128 is a LED1 pin, pin 129 is a LED2 pin, pin 23 and pin 24 are both connected with the first peripheral crystal circuit 1112; pin 25 is a RESET pin; pin 6 is connected with a power supply voltage MCU_VCC and connected with one plate of a capacitor C15, and the other plate of the capacitor C15 is grounded; pin 138 is a BOOT0 pin, connected with one end of a resistor R7, and the other end of the resistor R7 is grounded; pin 143 is connected with one end of a resistor R8 and one end of a resistor R10, the other end of the resistor R8 is grounded, and the other end of the resistor R10 is connected with the power supply voltage MCU_VCC; pin 16, pin 38, pin 51, pin 61, pin 83, pin 94, pin 107, pin 120, pin 130 and pin 31 are all grounded; pin 144, pin 131, pin 121, pin 108, pin 95, pin 84, pin 72, pin 62, pin 52, pin 39, pin 30 and pin 17 are all connected with the power supply voltage MCU_VCC; pin 32 is a VDDA port, grounded via a capacitor C22 and a capacitor C23 in parallel; pin 106 is grounded via a capacitor C19; pin 71 is grounded via a capacitor C20; pin 33 is a VDDA pin, connected with the power supply voltage MCU_VCC via a resistor R16, and grounded via a capacitor C18 and a capacitor C21 in parallel; pin 114 is a KEY pin, pin 115 is a KEY' pin, and pin 116 is a CTL pin; pin 8 and pin 9 are both connected with the second peripheral crystal circuit 1113; pin 69 is a MCU_RXD pin, and pin 70 is a MCU_TXD pin; pin 48 is grounded via a resistor R3; pin 105 is a SWD pin, and pin 109 is a SWC pin; pin 101 is a USART1_TX pin, and pin 102 is a USART1_RX pin.

[0062] As an example, the first peripheral crystal circuit 1112 can include the first peripheral crystal X2, the capacitor C12 and the capacitor C14; one end of the first peripheral crystal X2 is connected to pin 23 of the single-chip microcomputer U1, and the other end is connected to pin 24 of the single-chip microcomputer U1; one end of the capacitor C12 is connected to pin 23 of the single-chip microcomputer U1, and the other end is grounded; one end of the capacitor C14 is connected to pin 24 of the single-chip microcomputer U1, and the other end is grounded.

[0063] As an example, the second peripheral crystal circuit 1113 can include the second peripheral crystal X1, the capacitor C11 and the capacitor C13; one end of the second peripheral crystal X1 is connected to pin 8 of the single-chip microcomputer U1, and the other end is connected to pin 9 of the single-chip microcomputer U1; one end of the capacitor C11 is connected to pin 8 of the single-chip microcomputer U1, and the other end is grounded; one end of the capacitor C13 is connected to pin 9 of the single-chip microcomputer U1, and the other end is grounded.

[0064] As an example, the reset circuit 1111 can include the resistor R9, the switch SW1 and the capacitor C16; wherein one end of the resistor R9 is connected to the supply voltage MCU_VCC, the other end of the resistor R9 is connected to the RESET pin of the single-chip microcomputer U1 and one end of the capacitor C16; the other end of the switch SW1 and the other end of the capacitor C16 are grounded.

[0065] As an example, the SWD download interface P4 can include the connection port 1, the connection port 2, the connection port 3, the connection port 4 and the connection port 5; the connection port 1 is connected to the RESET pin of the single-chip microcomputer U1, the connection port 2 is connected to the supply voltage MCU_VCC, the connection port 3 is connected to the SWD pin of the single-chip microcomputer U1 and is connected to the supply voltage MCU_VCC via the resistor R15, the connection port 4 is connected to the SWC pin of the single-chip microcomputer U1 and is grounded via the resistor R14, and the connection port 5 is grounded.

[0066] As an example, please refer to Figure 1 and Figure 2 and refer to Figure 3 , the single bus signal conditioning circuit 112 can include the timing control circuit 1121 and the timing signal generating circuit 1122; wherein,

[0067] The timing control circuit 1121 is connected to the MCU main control module 111;

[0068] The timing signal generating circuit 1122 is connected to the timing control circuit 1121 and the MCU main control module 111.

[0069] Specifically, the timing control circuit 1121 can include a chip U2, which can include 8 pins, i.e., pins 1 to 8. In the chip U2, the pin 1 is an S1 pin, which is grounded via a resistor R2; the pin 2 is a UART_TXD pin; the pin 3 is connected to a UART_NOR pin of the single-chip microcomputer U1; the pin 4 is grounded; the pin 5 is connected to a MCU_RXD pin of the single-chip microcomputer U1; the pin 6 is a UART_TXD pin; the pin 7 is connected to a UART_MTP_ST pin in the single-chip microcomputer U1; and the pin 8 is connected to a power supply voltage MCU_VCC and grounded via a capacitor C7.

[0070] Specifically, the timing signal generation circuit 1122 can include a chip U4, which can include 8 pins, i.e., pins 1 to 8. In the chip U4, the pin 1 is an S1 pin, which is connected to a MCU_TXD pin in the single-chip microcomputer U1; the pin 2 is an OWI_DIO pin; the pin 3 is connected to a UART_SEND pin of the single-chip microcomputer U1; the pin 4 is grounded; the pin 5 is connected to a UART_TXD pin of the chip U2; the pin 6 is an OWI_DIO pin; the pin 7 is connected to a UART_RCV pin in the single-chip microcomputer U1; and the pin 8 is connected to a power supply voltage MCU_VCC and grounded via a capacitor C9.

[0071] The single bus signal conditioning circuit 112 can generate a single bus communication timing to realize communication with a chip to be programmed. The single bus signal conditioning circuit 112 can ensure stability and delay accuracy of multiple communication signal timings, thereby improving reliability of overall communication. By using a simple single bus interface form, the number of interface wires can be greatly reduced, which can reduce the area occupied by the PCB on one hand and reduce the hardware cost of the interface and the complexity and error probability of wiring operation on the other hand.

[0072] As an example, please refer to Figures 1 to 3 and Figure 8 The encryption and decryption circuit 117 can include an encryption and decryption chip U_JM, which can include multiple pins, i.e., pins 1 to 6. In the encryption and decryption chip U_JM, the pin 1 and the pin 3 are both GND pins and grounded; the pin 2 is a DIO1 pin, which is connected to an OWI_DIO pin in the timing signal generation circuit 1122; the pin 4 is a GND pin and grounded; the pin 5 is a DIO2 pin, which is used to output OWI_DATA; and the pin 6 is a VCC pin, which is connected to a power supply voltage MCU_VCC and grounded via a capacitor C3.

[0073] As an example, please refer to Figures 1 to 3 and Figure 4The scalable multipath interface circuit 113 can include multiple groups of multipath interface circuits, each group of multipath interface circuits can include: a multipath analog switch circuit 1131 and a multipath drive circuit 1132; the multipath analog switch circuit 1131 is connected to the single bus signal conditioning circuit 112 and the chip to be burned and written; the multipath drive circuit 1132 is connected to the single bus signal conditioning circuit 112 and the chip to be burned and written.

[0074] As an example, the scalable multipath interface circuit 113 can include but not limited to 8 groups of multipath interface circuits; the multipath analog switch circuit 1131 can include but not limited to 32-way analog switch circuit; the multipath drive circuit 1132 can include but not limited to 32-way drive circuit; the scalable multipath interface circuit 113 can realize bidirectional read and write operation of a maximum of 256-way single bus signal, which can greatly improve the efficiency of the chip to be burned and written. The bidirectional read and write operation means that each chip can be addressed and operated for reading and writing at a time, or 256 chips can be burned and written at the same time.

[0075] As an example, please continue to combine Figures 1 to 3 and refer to Figure 4 The multipath analog switch circuit 1131 can include a multipath analog switch chip U_CH1, which includes a plurality of pins 1 to 48; in the multipath analog switch chip U_CH1, the pins 1 to 12 correspond to the pins S12 to S1 respectively, and are connected to the signal lines OWI12 to OWI1 respectively; the pins 25 to 40 correspond to the pins S17 to S32 respectively, and are connected to the signal lines OWI17 to OWI32 respectively; the pins 45 to 48 correspond to the pins S16 to S13 respectively, and are connected to the signal lines OWT16 to OWT13 respectively; the pins 13 and 14 are VDD1 pin and VDD2 pin respectively, and are connected to the supply voltage MCU_VCC' and grounded through the capacitor C_1; the pins 15 to 19 are pins A0 to A4 respectively, and are connected to the CH1 A0 pin, CH1 A1 pin, CH1 A2 pin, CH1 A3 pin and CH1 A4 pin in the MCU master module 111 respectively; the pins 20 and 21 are grounded; the pin 22 is connected to the CH1_EN pin in the MCU master module 111; the pins 23 and 24 are grounded; the pins 41, 42 and 44 are NC pins; the pin 43 is connected to the DIO2 pin of the encryption and decryption circuit 117 through the switch SW_CH1.

[0076] As an example, please continue to combine Figures 1 to 3 and refer to Figure 4The multiplex drive circuit 1132 can include a multiplex driver U CH1', which includes a plurality of pins 1 to 39; in the multiplex driver U CH1', the pins 1 to 32 are respectively O1 to O32 pins, which are respectively connected to the signal lines OWT1 to OWT32 one by one; the pin 33 is grounded; the pin 34 is connected to the CH1'EN pin in the MCU master module 111; the pin 35 is a DATA pin, which is connected to the DIO2 pin of the encryption and decryption circuit 117 through the switch SW_CH1'; the pins 36 and 37 are respectively VDD1 and VDD2 pins, which are both connected to the power supply voltage MCU_VCC' and grounded through the capacitor C_2; the pins 38 and 39 are both VSS pins, which are both grounded.

[0077] In one example, please refer to Figures 1 to 4 and refer to Figure 5 The communication interface module 114 can include a USB serial port circuit, and at this time, the communication interface module 114 can include a USB-to-serial chip U3 (i.e. CH340C), which can include a plurality of pins 1 to 16; in the USB-to-serial chip U3, the pin 1 is a GND pin and is grounded; the pin 2 is a TxD pin, which is connected to the USART1_RX pin in the MCU master module 111 and the pin 1 of the interface P1 (i.e. TP); the pin 3 is an RxD pin, which is connected to the USART1_TX pin in the MCU master module 111 and the pin 2 of the interface P1; the pin 4 is a V3 pin, which is grounded through the capacitor C10; the pin 5 is a UD+ pin, which is a 340D+ pin; the pin 6 is a UD- pin, which is a 340D- pin; the pin 7 is an XI pin; the pin 8 is an XO pin; the pin 9 is a CTS# pin; the pin 10 is a DSR# pin; the pin 11 is an RI# pin; the pin 12 is a DCD# pin; the pin 13 is a DTR# pin; the pin 14 is an RTS# pin; the pin 15 is an RS232 pin; and the pin 16 is a Vcc pin, which is connected to the 5V power supply voltage and grounded through the capacitor C8. The pin 3 of the interface P1 is grounded. The communication interface module 114 can be conveniently connected to the USB pin of the host computer, thereby realizing serial communication between the host computer and the burner.

[0078] In another example, the communication interface module 114 can include a first wireless communication module, and at this time, the host computer includes a second wireless communication module; the second wireless communication module is wirelessly connected to the first wireless communication module, and the second wireless communication module wirelessly sends the burning program to the first wireless communication module. The MCU master module 111 receives and stores at least one burning program from the first wireless communication module.

[0079] As an example, please refer to Figures 1 to 5Referring to Figure 6 The chip burning device 11 can further include a key and display module 115, which can include a start burning unit 1151, a burning file selection unit 1152, and a display unit 1153. The burning file selection unit 1152 is connected to the MCU master module 111, and is configured to determine a target burning file from at least one burning file stored in the MCU master module 111. The display unit 1153 is connected to the burning file selection unit 1152 and the MCU master module 111, and is configured to display a file name of the target burning file after the burning file selection unit 1152 determines the target burning file. The start burning unit 1151 is connected to the MCU master module 111, the burning file selection unit 1152, and the display unit 1153. The start burning unit 1151 is configured to generate a start burning instruction. After the MCU master module 111 receives the start burning instruction, the target burning file is fed back to the single bus signal conditioning circuit 112. The display unit 1153 is further configured to display first information, which includes whether the chip to be burned is in a burning state or whether the chip to be burned is successfully burned.

[0080] As an example, if the MCU master module 111 does not store at least one burning file, the display unit 1153 is further configured to display second information, which is used to prompt the MCU master module 111 to download a burning file.

[0081] Specifically, the start burning unit 1151 includes a resistor R13, a switch SW2, and a capacitor C17. One end of the resistor R13 is connected to a supply voltage MCU_VCC. The other end of the resistor R13, one end of the switch SW2, and one end of the capacitor C17 are connected to a KEY pin of the MCU master circuit 111. The other end of the switch SW2 and the other end of the capacitor C17 are grounded.

[0082] Specifically, the burning file selection unit 1152 includes a resistor R13', a switch SW3, and a capacitor C17'. One end of the resistor R13' is connected to a supply voltage MCU_VCC. The other end of the resistor R13', one end of the switch SW3, and one end of the capacitor C17' are connected to a KEY' pin of the MCU master module 111. The other end of the switch SW3 and the other end of the capacitor C17' are grounded.

[0083] Specifically, the display unit 1153 includes a resistor R11, a resistor R12 and an interface P3; the interface P3 includes a plurality of pins from pin 1 to pin 4; in the interface P3, the pin 1 is grounded, the pin 2 is connected to a supply voltage MCU_VCC, the pin 3 is connected to a DISPLAY_SCL pin of the MCU master module 111 and one end of the resistor R12, and the pin 4 is connected to a DISPLAY_SDA pin of the MCU master module 111 and one end of the resistor R11; the other end of the resistor R11 and the other end of the resistor R12 are both connected to the supply voltage MCU_VCC.

[0084] As an example, the display module 1153 is provided with a display screen, and the display module 1153 communicates with the display screen via an I2C serial communication interface P3; the display module 1153 can include an OLED display module. The display module 1153 is used to display some configuration parameters and burning operation prompt information, etc.

[0085] As an example, please refer to Figures 1 to 6 and refer to Figure 7 The chip burning device 11 can further include a power module 116, the power module 116 including a power supply circuit (not shown) and an electronic controllable switch S1; the power supply circuit is connected to the MCU master module 111, the single bus signal conditioning circuit 112 and the expandable multi-channel interface circuit 113 via the electronic controllable switch S1; the electronic controllable switch S1 is used to cut off the connection between the power supply circuit and the MCU master module 111, the single bus signal conditioning circuit 112 and the expandable multi-channel interface circuit 113 after the burning is completed. The power module 116 has the electronic controllable switch S1, which can save power consumption to the greatest extent, thereby prolonging the time of the mobile power supply battery power supply.

[0086] As an example, the power module 116 can include: capacitor C3, capacitor C4, power chip V1, capacitor C1, capacitor C2, voltage regulator DZ1, resistor R1, light emitting diode LED1, electronic controllable switch S1, USB interface USB1, fuse F1, capacitor C5, voltage regulator DZ2 and capacitor C6; wherein one end of capacitor C1, one end of capacitor C2, one end of capacitor C3, one end of capacitor C4 and the ground end of voltage regulator DZ1 are all grounded; the input end Vin of power chip V1, the other end of capacitor C3 and the other end of capacitor C4 are all connected to 5V voltage; the other end of capacitor C1, the other end of capacitor C2, the other end of voltage regulator DZ1, the output end Vout of power chip V1, one end of resistor R1 and one end VI of electronic controllable switch S1 are all connected, and output a power supply voltage MCU_VCC; the positive electrode of light emitting diode LED1 is connected to the other end of resistor R1, and the negative electrode of light emitting diode LED1 is grounded; electronic controllable switch S1 further includes CTL end and VO end, and the VO end is used to output a power supply voltage MCU_VCC'. The USB interface USB1 includes a plurality of pins 1 to 4, in the USB interface USB1, the pin 1 is a VCC pin, connected to 5V voltage via fuse F1; the pin 2 is a D- pin, connected to the UD- pin of the communication interface module 114; the pin 3 is a D+ pin, connected to the UD+ pin of the communication interface module 114; and the pin 4 is a GND pin, grounded. One end of capacitor C5 is connected to 5V voltage, and the other end is grounded; one end of voltage regulator DZ2 is connected to 5V voltage, and the other end is grounded; one end of capacitor C6 is connected to 5V voltage, and the other end is grounded.

[0087] As an example, considering the simplicity of the burning device 11, a general computer USB interface is used for power supply, and a mobile power supply (5V voltage) from the outside can also be used for power supply. The power chip V1 is a low-dropout LDO power chip, which can reduce its own power consumption. The electronic controllable switch S1 can cut off the power supply of the expandable multi-channel burning interface in time when the burning is completed, so as to achieve the purpose of reducing power consumption.

[0088] As an example, please refer to Figures 1 to 8 and refer to Figure 9 , the chip burning device 11 can further include: a metal shell 118, the metal shell 118 has a containing cavity (not shown) therein; the communication interface module 114, the MCU master control module 111, the single bus signal conditioning circuit 112, the encryption and decryption circuit 117 and the expandable multi-channel interface circuit 113 are all located in the containing cavity. The chip burning device 11 adopts a metal shell 118 (with special screws), which can improve the anti-electromagnetic interference, also has the effect of preventing being arbitrarily disassembled, and has certain firmness.

[0089] Please refer to Figure 9 ,Figure 9 In the chip burning device, the display screen 119 can be an OLED display screen for displaying some configuration parameters and prompt information in the burning operation process; the power switch button 120 can be a power switch button of the burner for controlling whether the power is on or off, that is, the on-off; the metal shell 118 can be a light metal shell, that is, a metal shell, which can wrap the control module circuit board into the shell, so as to effectively protect the internal circuit board and also enhance the overall EMC electromagnetic compatibility capability, and the light weight facilitates carrying and operation; the shared interface 121 can be a shared interface of an external mobile power supply (5V) power supply interface and a PC USB serial communication interface; the multi-way burning interface 122 can be a multi-way burning interface connected with the ASIC chip; the function keys 123 can include the "system reset" function key, the "start burning" function key and the "burning file selection" function key from left to right as shown in the figure, and the above keys are respectively used for system reset, start burning and selection of the file to be burned of the single-chip microcomputer; since the device can download up to 10 burning files (each burning file is 16K bytes in size), the "burning file selection" single key can cyclically select 10 files, and the selected burning file system is displayed in a highlighted manner on the screen to prompt the user that the file has been selected; the working state indicator light 124 can include the left blue B light (representing the boot / receiving indicator light, which is lit when the power of the system is turned on or the system is receiving the burning data file issued from the upper computer, that is, it flashes at a frequency of 5 times per second), the middle red R light (representing the "burning failure" indicator light, which is lit when the burning fails) and the right green G light (representing the "burning success" indicator light, which is lit when the burning succeeds). Figure 9 Figure 9 The working state indicator light 124 can include the left blue B light (representing the boot / receiving indicator light, which is lit when the power of the system is turned on or the system is receiving the burning data file issued from the upper computer, that is, it flashes at a frequency of 5 times per second), the middle red R light (representing the "burning failure" indicator light, which is lit when the burning fails) and the right green G light (representing the "burning success" indicator light, which is lit when the burning succeeds).

[0090] In the chip burning device, only two lines, that is, a power line and a data line, are needed, the number of wires is small, the hardware cost of the wires and the interface can be reduced, the number of single bus interface wires is small, the complexity and error probability of the wires can be reduced in terms of use and operation, the single bus communication protocol adopted by the single bus interface can be connected with the ASIC chip for communication and realization of the burning function, the UART-to-serial chip is not needed, the cost can be saved and the PCB size can be reduced, the bidirectional data flow in the communication process has the functions of software and hardware encryption and decryption, the confidentiality and security of the communication can be increased, the burning interface adopts a scalable maximum 256-way interface, the burning efficiency can be greatly improved, the power consumption of the burning interface can be controlled at any time according to the situation, and the light metal shell can improve the firmness of the system and enhance the anti-electromagnetic interference capability.

[0091] In another embodiment, please refer to Figures 1 to 9 and refer to Figure 10 ​The application further provides a chip burning system, which can include: a chip to be burned 21; a host computer 22, which is used to provide a burning program; the chip burning device 11 as described in the above embodiment; an extensible multi-channel interface circuit 113 connected with the chip to be burned 21; and an MCU master control module 111 connected with the host computer 22. Specifically, the MCU master control module 111 is connected with the host computer 22 via a communication interface module 114. Figures 1 to 9

[0092] In the chip burning system of the above embodiment, the single bus signal conditioning circuit 112 and the extensible multi-channel interface circuit 113 are arranged in the chip burning device 11. The single bus signal conditioning circuit 112 can be used to burn based on a single data line, and the extensible multi-channel interface circuit 113 can be used to realize multi-channel burning based on a single data line, so that the multi-channel burning of the single bus interface of a special chip can be realized. The encryption and decryption circuit 117 can be used to process the two-way communication data of the single bus based on an internal software encryption and decryption algorithm, and the ASIC end also performs the same encryption and decryption, so that the confidentiality and security of the communication process are greatly improved, the purpose of protecting the burning data is achieved, the confidentiality is greatly enhanced, the data is prevented from being stolen, the economic loss and safety accidents of the customer are avoided, and the security is higher. The chip burning system of the application can support the simultaneous pre-storage of 10 burning files (each burning file has a size of 16K bytes), and the files to be burned can be flexibly selected for offline burning through the "burning file selection" button and the OLED display screen highlighting display mode.

[0093] The chip burning system of the application can be realized by using an embedded operating system in the software aspect, and the functions of the burning file issuing, storage, OLED display screen display and burning file query can be realized, so that the ease of use and the functional expansibility of the operation can be greatly improved, and the system upgrade can be conveniently performed. The chip burning system of the application has the online and offline burning functions, and the application convenience can be greatly improved.

[0094] ​The working process of the chip burning system is as follows: when the power switch button 120 is closed, the OLED display screen (i.e. the display screen 119) will first display "burning file reading failure". The reason is that the initial system does not download the burning file. At this time, the USB interface of the PC computer is connected to the communication pin of the shared interface 121 through the USB communication cable, and the downloading file function of the upper computer 22 software is opened to transmit the burning file to be downloaded to the non-volatile memory of the burning device 11. After the burning file is successfully downloaded to the burning device 11, the display screen 119 displays the prompt information "burning file download success". Otherwise, if the download is unsuccessful, the display screen 119 displays the prompt information "burning file download failure".

[0095] After the burning file is successfully downloaded to the non-volatile memory inside the burning device 11, the off-line burning programming of the ASIC chip can be performed at any time. The method is as follows: first, connect the mobile power supply and the shared interface 121 with the USB cable to ensure that the burning device 11 is normally powered (5V) at this time. Then turn on the power switch button 120. At this time, the system will perform a self-checking operation, mainly checking whether the burning file has been burned. If the burning file has been burned, the OLED display screen will display "burning file reading success", and the file name of the burning file to be burned will also be displayed to facilitate checking whether the downloaded burning file is correct. If it is detected that the file has not been burned, the OLED display screen will display "burning file reading failure". Secondly, connect the multi-channel burning interface 122 connected by the wire to the burning interface of the ASIC to be burned (i.e. the chip to be burned 21), and then press the "start burning" function button on the right side of the function button 123, that is, start burning programming of the ASIC. When the programming of the ASIC is successfully performed, the display screen 119 displays the prompt information "burning success". Otherwise, if the programming of the ASIC fails, the display screen 119 displays the prompt information "burning failure". The above burning process is very simple, and the chip burning operation can be easily performed.

[0096] Please note that the above embodiments are only for illustrative purposes and do not mean to limit the disclosure.

[0097] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same and similar parts between the embodiments can be referred to each other.

[0098] Each technical feature of the above-described embodiments can be combined arbitrarily. In order to make the description simple, not all possible combinations of each technical feature in the above-described embodiments are described, however, as long as the combination of the technical features does not exist contradictory, it should be considered as the scope of the specification.

[0099] The above embodiments only express several implementation manners of the present application, which are described in a more specific and detailed manner, but cannot be understood as a limitation on the patent application scope. It should be noted that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. Therefore, the protection scope of the present application patent should be subject to the appended claims.

Claims

1. A chip burning device, characterized by, The chip burning device comprises: a communication interface module connected with an upper computer, wherein a burning program is arranged in the upper computer; an MCU master module connected with the communication interface module, used for downloading and storing the burning program from the upper computer via the communication interface module; the MCU master module stores at least one downloaded burning program as a target burning program; a single bus signal conditioning circuit connected with the MCU master module, used for generating a single bus communication timing signal based on the target burning program stored in the MCU master module; an encryption and decryption circuit connected with the single bus signal conditioning circuit, used for encrypting and decrypting the single bus communication timing signal; an extensible multi-channel interface circuit connected with the single bus signal conditioning circuit, the encryption and decryption circuit and a chip to be burned, used for burning the chip to be burned based on the encrypted and decrypted single bus communication timing signal.

2. The chip burning device according to claim 1, wherein The communication interface module comprises a USB serial port circuit or a first wireless communication module; when the communication interface module comprises the first wireless communication module, the upper computer comprises a second wireless communication module; the second wireless communication module is wirelessly connected with the first wireless communication module and wirelessly sends the burning program to the first wireless communication module.

3. The chip burning device according to claim 1, wherein The MCU master module comprises: a single chip microcomputer connected with the communication interface module, used for downloading and storing at least one burning program from the upper computer via the communication interface module; an SWD download interface, wherein a pin of the SWD download interface is connected with the single chip microcomputer; a reset circuit connected with the single chip microcomputer; a peripheral crystal oscillator circuit connected with the single chip microcomputer.

4. The chip burning device according to claim 1, wherein The single bus signal conditioning circuit comprises: a timing control circuit connected with the MCU master module; a timing signal generation circuit connected with the timing control circuit and the MCU master module.

5. The chip burning device according to claim 1, wherein The extensible multi-channel interface circuit comprises a plurality of groups of multi-channel interface circuits, each group of the multi-channel interface circuits comprises: a multi-channel analog switch circuit connected with the single bus signal conditioning circuit and the chip to be burned; a multi-channel drive circuit connected with the single bus signal conditioning circuit and the chip to be burned.

6. The chip burning device according to claim 1, wherein The chip burning device further comprises a key and display module, wherein the key and display module comprises: a burning file selection unit connected with the MCU master module, used for determining a target burning file required from at least one burning file stored in the MCU master module; a display unit connected with the burning file selection unit and the MCU master module, used for displaying a file name of the target burning file after the burning file selection unit determines the target burning file. A starting burning unit is connected with the MCU master module, the burning file selection unit and the display unit, and is used for generating a starting burning instruction; after receiving the starting burning instruction, the MCU master module feeds back the target burning file to the single bus signal conditioning circuit; the display unit is further used for displaying first information, and the first information includes whether the to-be-burned chip is in a burning state or whether the to-be-burned chip is burned successfully.

7. The chip burning device according to claim 1, wherein If at least one burning file is not stored in the MCU master module, the display unit is further used for displaying second information, and the second information is used for prompting that the MCU master module needs to download a burning file.

8. The chip burning device according to claim 1, wherein The chip burning device further comprises: A metal shell having an accommodating cavity; the communication interface module, the MCU master module, the single bus signal conditioning circuit, the encryption and decryption circuit and the expandable multi-path interface circuit are located in the accommodating cavity.

9. The chip burning device according to any one of claims 1 to 8, wherein The chip burning device further comprises a power supply module including a power supply circuit and an electronic controllable switch; The power supply circuit is connected with the MCU master module, the single bus signal conditioning circuit and the expandable multi-path interface circuit through the electronic controllable switch; and the electronic controllable switch is used for cutting off the connection between the power supply circuit and the MCU master module, the single bus signal conditioning circuit and the expandable multi-path interface circuit after burning is completed.

10. A chip burning system, characterized by comprising: It comprises: A to-be-burned chip; A host computer used for providing a burning program; The chip burning device according to any one of claims 1 to 9; The expandable multi-path interface circuit is connected with the to-be-burned chip; and the MCU master module is connected with the host computer.

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