Reread voltmeter configuration method of solid state drive, related device and medium
By writing a matching reread voltage table configuration file into the solid-state drive's firmware binary file, the high time cost problem caused by frequent updates of the reread voltage table is solved, and the mass production efficiency and reading efficiency of solid-state drives adapting to different levels of memory are improved.
Patent Information
- Application Number
- CN202410479374.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-19
- Publication Date
- 2025-10-24
AI Technical Summary
During the production phase of solid-state drives, frequent updates and rereading of voltage tables for different levels of memory result in frequent version updates of the FW BIN file, which results in high time costs and reduces the mass production efficiency of adapting to different levels of memory.
By obtaining the target level of the memory, selecting a matching reread voltmeter candidate configuration file, and writing the target configuration file into a reserved storage space of a firmware binary file, the reread voltmeter can be dynamically managed without updating the firmware program and testing and verification.
The system can adapt the reread voltage table of different levels of memory without updating the firmware program, reduce the number of read retry operations, and improve the reading efficiency and mass production efficiency of the memory.
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Figure CN120833802A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure belongs to the technical field of memory, and particularly relates to a read retry table configuration method of a solid state drive, related devices and media. BACKGROUND
[0002] A solid state drive (SSD) is a storage hard disk made of solid-state electronic storage chips, mainly composed of a controller and a memory (including storage particles). In the data writing stage of the solid state drive, the encoded data generated based on the original data is stored in the memory. In the data reading stage of the solid state drive, the ECC (Error Checking and Correction) decoding circuit is used to correct a certain number of error data bits to obtain the original data. If ECC failure occurs, a read retry operation is performed. Specifically, according to the read retry table provided by the manufacturer of the solid state drive, a new read voltage is selected for the read operation to identify the charge state of the storage unit in the memory. Therefore, during the production stage of the solid state drive, a set of appropriate read retry tables need to be set. The grades of the memory particles produced by different manufacturers, different batches of the same manufacturer, and the same batch are uneven, and the read retry tables matched by different grades of memory are different.
[0003] However, during the production stage of the solid state drive, the read retry table is usually fixedly written into the firmware (FW) program of the solid state drive. When producing the solid state drive, for different grades of memory, the read retry table in the firmware program of the solid state drive needs to be changed, the changed firmware program is compiled into a firmware binary (FW BIN) file, and the changed firmware binary file is stored in the memory. Obviously, during the production stage of the solid state drive, frequent updating of the read retry table in the firmware program for different grades of memory will cause the FW BIN file to be frequently updated in version. Each release of the FW BIN file needs to go through tedious test verification, so that the time cost of adapting different grades of memory is too high, and the overall production efficiency of the solid state drive adapting different grades of memory is reduced. SUMMARY
[0004] In view of the above problems, the present disclosure provides a read retry table configuration method of a solid state drive, related devices and media, aiming to, in the production stage of the solid state drive, without version updating of the FW BIN file in the case of frequent updating of the read retry table for different grades of memory, reducing the production time cost of adapting different grades of memory, and improving the production efficiency of the solid state drive adapting different grades of memory.
[0005] According to a first aspect of the present disclosure, a method for configuring a read-voltage table of a solid state drive is provided, comprising:
[0006] obtaining a target level of a memory in a solid state drive;
[0007] obtaining a plurality of candidate configuration files of a read-voltage table of the solid state drive, the plurality of candidate configuration files respectively corresponding to different levels of the memory;
[0008] based on a correspondence between the plurality of candidate configuration files and the different levels of the memory, selecting a target configuration file matching the target level from the plurality of candidate configuration files;
[0009] writing the target configuration file in a reserved storage space in a firmware binary file of the solid state drive, and storing the firmware binary file after writing the target configuration file into the memory, so as to configure the read-voltage table of the solid state drive as the target configuration file.
[0010] Optionally, writing the target configuration file in the reserved storage space in the firmware binary file of the solid state drive comprises:
[0011] obtaining a firmware program of the solid state drive;
[0012] compiling the firmware program into a firmware binary file;
[0013] reserving a storage space in the firmware binary file, the reserved storage space including a start tag and an end tag;
[0014] writing the target configuration file between the start tag and the end tag.
[0015] Optionally, the memory includes at least one of a single-layer cell storage unit, a two-layer cell storage unit, a three-layer cell storage unit, and a four-layer cell storage unit, and the candidate configuration file includes at least one of a single-layer cell sub-candidate configuration file, a two-layer cell sub-candidate configuration file, a three-layer cell sub-candidate configuration file, and a four-layer cell sub-candidate configuration file, the type of the sub-candidate configuration file corresponding to the type of the storage unit in the memory.
[0016] Optionally, the types of the storage units in the memory produced by different manufacturers are different and the parameters in the matched read-voltage table are different; the types of the storage units in the memory produced by different production batches of the same manufacturer are the same but the parameter values in the matched read-voltage table are different; the types of the storage units in the memory of different levels produced by the same production batch of the same manufacturer are the same but the parameter values in the matched read-voltage table are different.
[0017] Optionally, before the selecting a target configuration file matched with the target level from the plurality of candidate configuration files based on the correspondence between the plurality of candidate configuration files and different levels of the memory, the method further comprises:
[0018] adjusting parameter values in the candidate configuration file according to the read retry operation result.
[0019] Optionally, the writing the target configuration file in the reserved storage space in the firmware binary file of the solid state drive, and storing the firmware binary file with the target configuration file written in the memory to configure the read voltage table of the solid state drive as the target configuration file comprises:
[0020] writing the target configuration file in the reserved storage space in the firmware binary file of the solid state drive;
[0021] conducting an aging test on the firmware binary file with the target configuration file written;
[0022] storing the firmware binary file with the target configuration file written in the memory after the aging test passes.
[0023] According to a second aspect of the present disclosure, a read voltage table configuration device of a solid state drive is provided, comprising:
[0024] a level obtaining unit configured to obtain a target level of a memory in a solid state drive;
[0025] a candidate configuration file obtaining unit configured to obtain a plurality of candidate configuration files of a read voltage table of the solid state drive, the plurality of candidate configuration files corresponding to different levels of the memory respectively;
[0026] a target configuration file selecting unit configured to select a target configuration file matched with the target level from the plurality of candidate configuration files based on the correspondence between the plurality of candidate configuration files and different levels of the memory;
[0027] a configuration unit configured to write the target configuration file in a reserved storage space in a firmware binary file of the solid state drive, and store the firmware binary file with the target configuration file written in the memory to configure the read voltage table of the solid state drive as the target configuration file.
[0028] According to a third aspect of the present disclosure, a solid state drive is provided, comprising:
[0029] a memory;
[0030] A controller comprising the re-read voltmeter configuration device as described above for performing the method as described above to configure the re-read voltmeter of the solid state drive to a candidate configuration file matching a target grade of the memory.
[0031] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising a processor, a memory, and a program stored on the memory and executable on the processor, which when executed by the processor implements the steps of the method described above.
[0032] According to a fifth aspect of the present disclosure, a storage medium is provided, which stores a computer program or instructions, which when executed by a processor implements the steps of the method described above.
[0033] The present disclosure brings the following beneficial effects:
[0034] The re-read voltmeter configuration method of the solid state drive provided by the present disclosure can set the re-read voltmeter of the solid state drive to adapt to different grades of memory without updating the firmware program and testing and verification, by writing the selected matching target configuration file into the reserved storage space in the firmware binary file of the solid state drive. The target configuration file selected from the candidate configuration file and matching the target grade of the memory is more suitable for the current state of the memory, which can reduce the number of read retry operations in one read operation, and further improve the read efficiency of the memory. Since the parameters related to the physical characteristics of the memory are recorded in the re-read voltmeter, writing the target configuration file matching the target grade of the memory into the reserved storage space in the firmware binary file of the solid state drive has no substantial effect on the execution of the firmware binary file, so that in the production stage of the solid state drive, the firmware binary file does not need to be updated in the case of frequent updating of the re-read voltmeter for different grades of memory, which reduces the production time of adapting different grades of memory, and improves the mass production efficiency of the solid state drive adapting to different grades of memory.
[0035] Other features and advantages of the present disclosure will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present disclosure. The objects and other advantages of the present disclosure will be achieved and obtained by means of the structures particularly pointed out in the description and the accompanying drawings.
[0036] In order to make the above objects, features and advantages of the present disclosure more obvious and easy to understand, the following preferred embodiments are specifically described with reference to the attached drawings as follows. BRIEF DESCRIPTION OF DRAWINGS
[0037] The above and other objects, features and advantages of the present disclosure will become more apparent from the following description when taken in conjunction with the accompanying drawings, in which:
[0038] Figure 1 A structural schematic diagram of a computer system according to an embodiment of the present disclosure is shown;
[0039] Figure 2 A structural schematic diagram of a solid state drive according to an embodiment of the present disclosure is shown;
[0040] Figure 3 A schematic diagram of a candidate configuration file according to an embodiment of the present disclosure is shown;
[0041] Figure 4 A schematic diagram of configuring a re-read voltage table according to an embodiment of the present disclosure is shown;
[0042] Figure 5 A flowchart of a re-read voltage table configuration method of a solid state drive according to an embodiment of the present disclosure is shown;
[0043] Figure 6 A schematic diagram of a re-read voltage table configuration apparatus of a solid state drive according to an embodiment of the present disclosure is shown;
[0044] Figure 7 A structural schematic diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0045] Various embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, each portion in the drawings is not drawn to scale.
[0046] The following terms are used herein:
[0047] A solid state drive (SSD) is a storage device composed of a controller and a memory (e.g., NAND). The controller is responsible for managing and controlling the operation of the memory, including reading, programming, and erasing data. The programming and reading unit of the SSD is a page, while the erasing unit is a block. In the memory, the gate structure of a storage cell includes a tunneling dielectric layer, a floating gate, a gate dielectric layer, and a control gate stacked in sequence. By applying a read voltage to the control gate, the amount of charge in the floating gate can be obtained using the threshold voltage of the storage cell to achieve reading. In the power-off state of the flash memory, the charge in the floating gate can be maintained due to the insulating effect of the tunneling dielectric layer.
[0048] A read retry table (RRT) is set during a production phase of a solid state drive and records parameters related to characteristics of a memory in the solid state drive, such as a reference voltage and an offset of a read operation under a specific condition. During a data write phase of the solid state drive, encoded data generated based on original data is stored in the memory of the solid state drive. During a data read phase of the solid state drive, an ECC (Error Checking and Correction) decoding circuit is used to correct a certain number of error data bits to obtain the original data. If an ECC failure occurs, a read retry operation is performed. Specifically, a new read voltage is selected according to a read retry table provided by a manufacturer of the solid state drive to perform a read operation to identify a charge state of a memory cell in the memory.
[0049] Figure 1 A structural schematic diagram of a computer system according to one embodiment of the present disclosure is shown. As shown in the figure, the computer system 100 according to the embodiment of the present disclosure includes a computer device 110 and a solid state drive 120, where the solid state drive 120 can be understood as an external storage device of the computer device 110. The solid state drive 120 can include a controller 121 and a memory (for example, NAND) 122. The controller 121 includes a firmware (FW) 123 and a read retry table configuration device 124. The computer device 110 includes a host 111. Figure 1
[0050] In some embodiments, an operating system can be run on the computer device 110, which can be understood as the host 111 of the solid state drive 120. The host 111 can send instructions (including read / write commands, Trim commands, and commands related to FW tasks) to the firmware 123. In the case where the host 111 sends a write command to the firmware 123, the firmware 123 can write data into the memory 122 according to the write command. In the case where the host 111 sends a read command to the firmware 123, the firmware 123 can read data from the memory 122 according to the read command and return the read data to the host 111. It should be noted that, for ease of description, Figure 1 In some embodiments, the computer device 110 can be understood as a computer system, and the solid state drive 120 can be understood as an external storage device of the computer system. In some embodiments, the computer device 110 can be understood as a computer system, and the solid state drive 120 can be understood as a part of the computer system.
[0051] In some embodiments, the re-read voltage table configuration device 124 writes a target configuration file matching the target level of the memory 122 into the reserved storage space in the FW BIN file of the solid state drive in the production stage of the solid state drive, stores the FW BIN file after writing the target configuration file into the memory 122, configures the re-read voltage table of the solid state drive as the matching target configuration file, so that in the case of frequent updating of the re-read voltage table for different levels of memory 122, the FW BIN file does not need to be versioned, reducing the production time of the solid state drive adapted to different levels of memory, and improving the production efficiency of the solid state drive adapted to different levels of memory. It is easy to understand that, for the convenience of description, Figure 1 In some embodiments, the re-read voltage table configuration device 124 writes a target configuration file matching the target level of the memory 122 into the reserved storage space in the FW BIN file of the solid state drive in the production stage of the solid state drive, stores the FW BIN file after writing the target configuration file into the memory 122, configures the re-read voltage table of the solid state drive as the matching target configuration file, so that in the case of frequent updating of the re-read voltage table for different levels of memory 122, the FW BIN file does not need to be versioned, reducing the production time of the solid state drive adapted to different levels of memory, and improving the production efficiency of the solid state drive adapted to different levels of memory. It is easy to understand that, for the convenience of description,
[0052] Since the process of configuring the re-read voltage table using the re-read voltage table configuration method of the solid state drive in the embodiments of the present disclosure will be described in detail below, it will not be described here.
[0053] Figure 2 A structural schematic diagram of a solid state drive according to an embodiment of the present disclosure is shown. The solid state drive 120 includes a controller 121 and a memory 122. The controller 121 includes a storage data reading unit 210, an ECC decoding unit 220, a voltage setting unit 230, and a re-read voltage table configuration device 124. It is easy to understand that, for the convenience of description, Figure 2 In some embodiments, the re-read voltage table configuration device 124 writes a target configuration file matching the target level of the memory 122 into the reserved storage space in the FW BIN file of the solid state drive in the production stage of the solid state drive, stores the FW BIN file after writing the target configuration file into the memory 122, configures the re-read voltage table of the solid state drive as the matching target configuration file, so that in the case of frequent updating of the re-read voltage table for different levels of memory 122, the FW BIN file does not need to be versioned, reducing the production time of the solid state drive adapted to different levels of memory, and improving the production efficiency of the solid state drive adapted to different levels of memory. It is easy to understand that, for the convenience of description,
[0054] In some embodiments, the read voltage table configuration device 124 includes a grade obtaining unit 240, a candidate profile obtaining unit 250, a target profile selecting unit 260, and a configuration unit 270. The grade obtaining unit 240 obtains the target grade of the memory 122 in the solid state drive at the production stage of the solid state drive (e.g., after the solid state drive production patch). It should be noted that the memory particles are produced according to different standards after screening, thus different grades of memory are produced, and the secondary memory does not mean that it is bad or not good. Some memory may have some defects, but can be made into different storage products according to the grade. For example, the memory particle rate does not meet the standard, but can be used to manufacture some low-speed SD cards or SSDs with not very high performance requirements. It should be noted that the electronic of the higher grade memory particles is lost slowly over time, and the data in the memory can be read using the standard voltage under the guarantee of the firmware program. Some secondary or more secondary memory particles may be worse in maintaining the retention of the stored charge, and the written memory electrons flow faster over time. Then, if the original standard voltage is used to read the data in the memory, obviously the wrong data will be read. Obviously, for different grades of memory, the read voltage table for performing the read retry operation on the memory is different, and the read voltage table needs to be adapted to the actual situation of different grades of memory to ensure the accuracy of reading data from the memory. It should be noted that the grades of the memory 122 particles produced by different manufacturers and the same manufacturer in the same batch and different batches are uneven.
[0055] Generally, the storage cells in the memory produced by different manufacturers are of different types and the parameters in the matching read retry voltage table are different, the storage cells in the memory produced by the same manufacturer but in different batches are of the same type but the parameter values in the matching read retry voltage table are different, and the storage cells in the memory produced by the same manufacturer but in different grades are of the same type but the parameter values in the matching read retry voltage table are different. Therefore, in order to reduce the error rate of the data read out from the memory 122, in the production stage of the solid state drive, it is necessary to configure the solid state drive with the read retry voltage table matching the memory 122 thereof, so as to adjust the read voltage (also referred to as sensing voltage) applied to each storage cell of the storage page of the memory 122. It should be noted that since the error distribution of the read operation is affected by a plurality of parameters, in order to be able to cover all possible parameters, the manufacturer generally makes a plurality of read retry voltage tables corresponding to a plurality of different conditions, and performs read retry operation by polling these read retry voltage tables, so as to obtain the best read voltage (also referred to as best sensing voltage) under the current condition. The plurality of parameters are, for example, the current state of the flash memory system, including PE cycle, Read Count, Retention, Open page / block working condition, etc. It should be noted that the plurality of read retry voltage tables are generally stored in the memory 122, and in the data read stage of the solid state drive, if ECC failure occurs, read retry operation is performed. Specifically, the read retry voltage table (Read Retry table) is read out from the memory 122, and read retry operation is performed by polling these read retry voltage tables.
[0056] In some embodiments, the candidate profile acquisition unit 250 acquires a plurality of candidate profiles of the read-voltage table of the solid state drive in the production stage of the solid state drive. The plurality of candidate profiles can be pre-set by the manufacturer of the memory 122 for configuring the read-voltage table of the solid state drive. It is to be noted that the plurality of candidate profiles respectively correspond to different grades of the memory 122. It is to be noted that in some cases, the memory 122 includes at least one of an SLC (Single-Level Cell) memory cell, an MLC (Multi-Level Cell) memory cell, a TLC (Triple-Level Cell) memory cell, and a QLC (Quad-Level Cell) memory cell, the SLC memory cell can store a single bit, the MLC memory cell can store two bits, the TLC memory cell can store three bits, and the QLC memory cell can store four bits. It is to be noted that each candidate profile includes at least one of an SLC sub-candidate profile, an MLC sub-candidate profile, a TLC sub-candidate profile, and a QLC sub-candidate profile, and the type of the sub-candidate profile in each candidate profile corresponds to the type of the memory cell in the memory 122. The SLC sub-candidate profile can configure the read-voltage table of the SLC memory cell, the MLC sub-candidate profile can configure the read-voltage table of the MLC memory cell, the TLC sub-candidate profile can configure the read-voltage table of the TLC memory cell, and the QLC sub-candidate profile can configure the read-voltage table of the QLC memory cell.
[0057] In one example, memory 122 is a TLC NAND memory device, which only has two types of memory cells: SLC and TLC. Therefore, during the solid-state drive production phase, only an SLC sub-candidate profile for configuring the reread voltage table for SLC memory cells and a TLC sub-candidate profile for configuring the reread voltage table for TLC memory cells need to be obtained. In another example, memory 122 is a TLC NAND memory device, which only has three types of memory cells: SLC, MLC, and TLC. Therefore, during the solid-state drive production phase, an SLC sub-candidate profile for configuring the reread voltage table for SLC memory cells, an MLC sub-candidate profile for configuring the reread voltage table for MLC memory cells, and a TLC sub-candidate profile for configuring the reread voltage table for TLC memory cells need to be obtained. It will be readily understood that the memory cell types included in each type of memory device 122 are fixed and do not vary with granularity. Therefore, the sub-candidate profile types included in the candidate profile for each type of memory device 122 are also fixed and do not vary with granularity. What changes with the granularity level is the specific re-read parameter value corresponding to each storage unit in each sub-candidate configuration file.
[0058] Figure 3 FIG. 1 shows a schematic diagram of a candidate configuration file provided according to an embodiment of the present disclosure. Figure 3 As shown, the manufacturers of the memory 122 include manufacturer A, manufacturer B, and manufacturer C. It should be noted that three manufacturers are shown here by way of example. Optionally, the number of manufacturers of the memory 122 can also be other numbers. The production batches of the memory 122 produced by manufacturer A include batches 1 to batch m. The production batches of the memory 122 produced by manufacturer B include batches 1 to batch n. The production batches of the memory 122 produced by manufacturer C include batches 1 to batch p. Wherein, m, n, and p are integers greater than or equal to 1. It should be noted that the grades of the memories produced by manufacturers A, manufacturer B, and manufacturer C vary. The grades of memories produced by the same manufacturer (any one of manufacturer A, manufacturer B, and manufacturer C) in different batches or the same batch vary. Taking the memory 122 produced by batch 3 of manufacturer B as an example, the grades of the produced memory 122 include grade 1, grade 2, and grade 3. It should be noted that for the convenience of description, only the different grades of the memory 122 produced by batch 3 of manufacturer B are shown here.
[0059] The memory 122 manufactured by the manufacturer A in batches 1 to m corresponds to the read-voltage table candidate configuration files (i.e., read-voltage table candidate configuration file: manufacturer A batch 1 RRT to read-voltage table candidate configuration file: manufacturer A batch m RRT) including the sub-candidate configuration file SLC RRT, the sub-candidate configuration file MLC RRT and the sub-candidate configuration file TLC RRT configuring the read-voltage tables of the SLC storage unit, the MLC storage unit and the TLC storage unit. Similarly, the memory 122 manufactured by the manufacturer B in batches 1 to n corresponds to the read-voltage table candidate configuration files (i.e., read-voltage table candidate configuration file: manufacturer B batch 1 RRT to read-voltage table candidate configuration file: manufacturer B batch n RRT) including the sub-candidate configuration file SLC RRT, the sub-candidate configuration file MLC RRT, the sub-candidate configuration file TLC RRT and the sub-candidate configuration file QLC RRT. Similarly, the memory 122 manufactured by the manufacturer C in batches 1 to p corresponds to the read-voltage table candidate configuration files (i.e., read-voltage table candidate configuration file: manufacturer C batch 1 RRT to read-voltage table candidate configuration file: manufacturer C batch p RRT) including the sub-candidate configuration file SLC RRT and the sub-candidate configuration file TLC RRT. Similarly, the memory 122 of the grade 1 manufactured by the manufacturer B in batch 3 corresponds to the read-voltage table candidate configuration file including the sub-candidate configuration file SLC RRT1, the sub-candidate configuration file MLC RRT1, the sub-candidate configuration file TLC RRT1 and the sub-candidate configuration file QLC RRT1, the memory 122 of the grade 2 corresponds to the read-voltage table candidate configuration file including the sub-candidate configuration file SLC RRT2, the sub-candidate configuration file MLC RRT2, the sub-candidate configuration file TLC RRT2 and the sub-candidate configuration file QLC RRT2, and the memory 122 of the grade 3 corresponds to the read-voltage table candidate configuration file including the sub-candidate configuration file SLC RRT3, the sub-candidate configuration file MLC RRT3, the sub-candidate configuration file TLC RRT3 and the sub-candidate configuration file QLC RRT3.
[0060] It should be noted that generally, the types of the sub-candidate configuration files and the values of the parameters in the read-voltage table candidate configuration files corresponding to the memories manufactured by different manufacturers are different, the types of the sub-candidate configuration files in the read-voltage table candidate configuration files corresponding to the memories manufactured by the same manufacturer in different batches are the same but the values of the parameters in the sub-candidate configuration files are different, and the types of the sub-candidate configuration files in the read-voltage table candidate configuration files corresponding to the memories of different grades manufactured by the same manufacturer in the same batch are the same but the values of the parameters in the sub-candidate configuration files are different. It is easy to understand that the read-voltage table candidate configuration files corresponding to the memories manufactured by the same manufacturer in different batches can be combined into one configuration file or can be respectively set as multiple configuration files.
[0061] In some embodiments, during the production phase of the solid-state drive, the target profile selection unit 260 selects a target profile that matches the target level of the memory 122 from the plurality of candidate profiles based on the correspondence between the plurality of candidate profiles and the different levels of the memory 122. In some embodiments, there is a one-to-one correspondence between the plurality of candidate profiles and the different levels of the memory 122. The target profile selection unit 260 can traverse the plurality of candidate profiles, compare the target level of the memory 122 with the different levels corresponding to the plurality of candidate profiles, and select a target profile that matches the target level of the memory 122 from the plurality of candidate profiles based on the comparison result.
[0062] In some embodiments, during the production phase of the solid-state drive, the configuration unit 270 writes the target configuration file into a reserved storage space within the solid-state drive's firmware binary file, and stores the firmware binary file with the target configuration file written therein in the memory 122, thereby configuring the solid-state drive's reread voltage table to the target configuration file. In some embodiments, the configuration unit 270 obtains the solid-state drive's firmware program, compiles the firmware program into a firmware binary file, and reserves storage space within the firmware binary file, wherein the reserved storage space includes a start marker and an end marker, and the target configuration file is written between the start marker and the end marker.
[0063] Figure 4 FIG. 1 shows a schematic diagram of configuring a rereading voltage meter according to an embodiment of the present disclosure. Figure 4 As shown, the target profiles determined by the target profile selection unit 260 to match the target level of the memory 122 are the sub-candidate profiles SLC RRT3, MLC RRT3, TLC RRT3, and QLC RRT3 corresponding to the level 3 memory 122 produced by manufacturer B in batch 3. When releasing the firmware binary file, the mass production tool (MPT) is used to find the start marker of the reserved storage space in the firmware binary file. The reread voltmeter candidate profiles (such as the sub-candidate profiles SLC RRT3, MLC RRT3, TLC RRT3, and QLC RRT3) are then written to the reserved storage space in the firmware binary file. The firmware binary file after writing the target profiles constitutes a complete firmware binary file. The firmware binary file after writing the target profiles is then written to the memory 122 to complete the firmware binary file release process.
[0064] It should be noted that, without updating the firmware program and testing and verifying, by updating the selected matching target configuration file, the read retry voltage table of the solid state drive can be set to adapt to different levels of memory 122. Therefore, the structure of the read retry voltage table of different memory particles can be dynamically managed, and the read voltage is quickly adapted in the manner of reserving storage space in advance for the read retry voltage table of different memory particles in the firmware binary file. The target configuration file selected from the candidate configuration file matching the target level of the memory 122 is more suitable for the current state of the memory 122, which can reduce the number of read retry operations in one read operation, thereby improving the read efficiency of the memory 122.
[0065] It should be noted that, since the read retry voltage table records parameters related to the characteristics of the memory 122, writing the target configuration file matching the target level of the memory 122 into the reserved storage space of the firmware binary file of the solid state drive has no substantial effect on the execution of the firmware binary file. Therefore, in the production stage of the solid state drive, without updating the version of the firmware binary file in the case of frequently updating the read retry voltage table for different levels of memory, the production time of adapting different levels of memory is reduced, and the mass production efficiency of the solid state drive adapting different levels of memory is improved.
[0066] In some embodiments, before the target configuration file selection unit 260 selects the target configuration file matching the target level of the memory 122 from the plurality of candidate configuration files based on the correspondence between the plurality of candidate configuration files and different levels of the memory 122 in the production stage of the solid state drive, the candidate configuration file acquisition unit 250 can adjust the parameter values in the candidate configuration file according to the read retry operation results. It is easy to understand that the target configuration file selected from the candidate configuration file after adjusting the parameter values is more suitable for the current state of the memory 122, which can reduce the number of read retry operations in one read operation, thereby improving the read efficiency of the memory 122. It is easy to understand that the parameters and / or parameter values of the read retry voltage table need to be optimized during the effectiveness verification process of the read retry voltage table, and only the corresponding candidate configuration file needs to be changed for repeated verification, without updating and verifying the FWBIN file, which can improve the efficiency of verifying the effectiveness of the read retry voltage table.
[0067] In some embodiments, after the configuration unit 270 writes the target configuration file in the reserved storage space in the firmware binary file of the solid state drive, the updated firmware binary file is subjected to burn-in test, and after the burn-in test passes, the firmware binary file after writing the target configuration file is stored in the memory 122. It should be noted that since the read voltage table records parameters related to the characteristics of the memory 122, writing the target configuration file matching the target level of the memory 122 into the reserved storage space of the firmware binary file of the solid state drive has no substantial effect on the execution of the firmware binary file, and after updating the read voltage table of the solid state drive, no regular test is required, only targeted burn-in test is required, which can shorten the release cycle of the firmware binary file and reduce the production downtime of the solid state drive.
[0068] In some embodiments, after the configuration unit 270 configures the read voltage table of the solid state drive as the target configuration file, during the working phase of the solid state drive, the storage data reading unit 210 reads the storage data Din from the memory 122 in units of storage pages. That is, during a single read cycle, the data bits of the storage cells of a storage page of the memory 122 are read. During the read cycle, the storage data reading unit 210 applies a default read voltage to each storage cell of the storage page. For a given storage cell, the storage data reading unit 210 determines whether the voltage level of the storage cell is higher or lower than the applied read voltage. Specifically, for example, if the storage cell is SLC, the ECC decoding unit 220 can directly determine whether the bit stored in the storage cell is 0 or 1; if the storage cell is MLC, multiple detection voltages need to be applied to determine whether the bit stored in the storage cell is 0 or 1. Therefore, one read cycle is associated with one or more read voltages that are applied to the storage cells of a storage page of the memory 122 during the read cycle. The read operation here refers to a complete data reading process, i.e., from starting to read the storage data to finally outputting the "correct" original data via the ECC decoding unit.
[0069] In some embodiments, when the storage data reading unit 210 reads data from the storage unit, the ECC decoding unit 220 performs decoding error correction using a decoding technique, thereby generating output data Dout, which is the original data represented by the storage data Din. The ECC decoder module 123 decodes the data for error correction, for example, using a low-density parity-check (LDPC) code. In some embodiments, the voltage setting unit 230 determines a re-read voltage table to read from the memory 122 according to the decoding error correction result of a previous reading operation, traverses the re-read voltage table to set a new reading voltage, and then the storage data reading unit 210 can apply the new reading voltage to each storage unit of a storage page for a reading operation to identify the charge state of the storage unit in the memory.
[0070] Figure 5 A flowchart of a method for configuring a re-read voltage table of a solid state drive according to an embodiment of the present disclosure is shown. The method for configuring a re-read voltage table of a solid state drive according to an embodiment of the present disclosure can be performed by a re-read voltage table configuration apparatus 124 in a solid state drive. Figure 2 Figure 5 As shown in FIG. 7, the method for configuring a re-read voltage table of a solid state drive according to an embodiment of the present disclosure can include the following steps.
[0071] In step S510, a target level of a memory in a solid state drive is obtained.
[0072] In step S520, a plurality of candidate configuration files of a re-read voltage table of the solid state drive are obtained, and the plurality of candidate configuration files respectively correspond to different levels of the memory.
[0073] In step S530, based on a correspondence between the plurality of candidate configuration files and the different levels of the memory, a target configuration file matching the target level is selected from the plurality of candidate configuration files.
[0074] In step S540, the target configuration file is written in a reserved storage space in a firmware binary file of the solid state drive, and the firmware binary file after the target configuration file is written is stored in the memory, so as to configure the re-read voltage table of the solid state drive as the target configuration file.
[0075] Since the process of configuring a re-read voltage table using the method for configuring a re-read voltage table of a solid state drive according to an embodiment of the present disclosure has been described in detail in the apparatus embodiment above, it will not be described here again.
[0076] Figure 6 A schematic diagram of a re-read voltage table configuration apparatus of a solid state drive according to an embodiment of the present disclosure is shown. As shown in FIG. 8, the re-read voltage table configuration apparatus 124 can include a target level obtaining unit 810, a candidate configuration file obtaining unit 820, a target configuration file selecting unit 830, and a firmware binary file writing unit 840. Figure 6 As shown, the read voltage table configuration apparatus includes a level obtaining unit 610, a candidate profile obtaining unit 620, a target profile selecting unit 630, and a configuration unit 640.
[0077] The level obtaining unit 610 is configured to obtain a target level of a memory in a solid state drive.
[0078] The candidate profile obtaining unit 620 is configured to obtain a plurality of candidate profiles of a read voltage table of the solid state drive, the plurality of candidate profiles respectively corresponding to different levels of the memory.
[0079] The target profile selecting unit 630 is configured to select, from the plurality of candidate profiles, a target profile matching the target level based on a correspondence between the plurality of candidate profiles and the different levels of the memory.
[0080] The configuration unit 640 is configured to write the target profile into a reserved storage space in a firmware binary file of the solid state drive, and store the firmware binary file after the target profile is written into the memory, so as to configure the read voltage table of the solid state drive as the target profile.
[0081] Since the process of configuring the read voltage table using the read voltage table configuration method of the solid state drive in the embodiments of the present disclosure has been described in detail in the apparatus embodiments above, it will not be repeated here.
[0082] The embodiments of the present disclosure also provide an electronic device, such as Figure 7 As shown, the electronic device includes a memory 720, a processor 710, and a program stored in the memory 720 and executable on the processor 710, which, when executed by the processor 710, can implement each process of each embodiment of the read voltage table configuration method described above and achieve the same technical effects. To avoid repetition, it will not be repeated here.
[0083] Those skilled in the art can understand that all or part of the steps of the various methods of the above embodiments can be completed by instructions or by controlling relevant hardware by instructions, which can be stored in a computer readable storage medium and loaded and executed by a processor. For this purpose, the embodiments of the present disclosure also provide a storage medium having a computer program or instructions stored thereon, which, when executed by a processor, can implement each process of each embodiment of the read voltage table configuration method described above.
[0084] Since the instructions stored in the storage medium can execute the steps in the re-reading voltage table configuration method provided by the embodiments of the present disclosure, the beneficial effects that can be achieved by the re-reading voltage table configuration method provided by the embodiments of the present disclosure can be achieved. Details are described above, and will not be repeated here.
[0085] In summary, the re-reading voltage table configuration method of the solid state drive provided by the present disclosure can set the re-reading voltage table of the solid state drive to adapt to different levels of memory without updating the firmware program and testing and verifying by updating the selected matching target configuration file. The candidate configuration files corresponding to all levels of memory are set in advance, and the matching target configuration file is written in the reserved storage space in the firmware binary file of the solid state drive. In the mass production stage, one FW BIN can correspond to all levels of memory particles, that is, one firmware opening card package can produce SSDs of all levels of memory. The target configuration file selected from the candidate configuration file and matching the target level of the memory is more suitable for the current state of the memory, which can reduce the number of read retry operations in one read operation, and further improve the read efficiency of the memory. Since the re-reading voltage table records parameters related to the characteristics of the memory, writing the first candidate configuration file matching the target level of the memory into the reserved storage space of the firmware binary file of the solid state drive has no substantial effect on the execution of the firmware binary file. Therefore, in the production stage of the solid state drive, without updating the version of the firmware binary file, the production time of the solid state drive adapting to different levels of memory is reduced, and the mass production efficiency of the solid state drive adapting to different levels of memory is improved.
[0086] Finally, it should be noted that: obviously, the above embodiments are only examples for clearly illustrating the present disclosure, and are not limitations on the embodiments. Based on the above description, other different forms of changes or variations can be made by those of ordinary skill in the art. Here, all the embodiments need not and cannot be exhausted. The obvious changes or variations derived therefrom are still within the protection scope of the present disclosure.
Claims
1. A method for configuring a read-voltage table of a solid state drive, comprising: obtaining a target level of a memory in a solid state drive; obtaining a plurality of candidate configuration files of a read-voltage table of the solid state drive, the plurality of candidate configuration files respectively corresponding to different levels of the memory; selecting a target configuration file matching the target level from the plurality of candidate configuration files based on a correspondence between the plurality of candidate configuration files and the different levels of the memory; writing the target configuration file in a reserved storage space in a firmware binary file of the solid state drive, and storing the firmware binary file with the target configuration file written therein into the memory, so as to configure the read-voltage table of the solid state drive as the target configuration file.
2. The reconfigured multimeter of claim 1, wherein, The writing of the target configuration file in the reserved storage space in the firmware binary file of the solid state drive comprises: obtaining a firmware program of the solid state drive; compiling the firmware program into a firmware binary file; reserving a storage space in the firmware binary file, the reserved storage space comprising a start tag and an end tag; writing the target configuration file between the start tag and the end tag.
3. The reconfigured multimeter of claim 2, wherein, The memory comprises at least one of a single-layer cell storage unit, a two-layer cell storage unit, a three-layer cell storage unit and a four-layer cell storage unit, and the candidate configuration file comprises at least one of a single-layer cell sub-candidate configuration file, a two-layer cell sub-candidate configuration file, a three-layer cell sub-candidate configuration file and a four-layer cell sub-candidate configuration file, the type of the sub-candidate configuration file corresponding to the type of the storage unit in the memory.
4. The reconfigured multimeter of claim 1, wherein, The type of the storage unit in the memory produced by different manufacturers is different and the parameters in the matched read-voltage table are different; the type of the storage unit in the memory produced by different production batches of the same manufacturer is the same but the parameter values in the matched read-voltage table are different; the type of the storage unit in the memory of different levels produced by the same production batch of the same manufacturer is the same but the parameter values in the matched read-voltage table are different.
5. The reconfigured multimeter of claim 1, wherein, Before the selecting of the target configuration file matching the target level from the plurality of candidate configuration files based on the correspondence between the plurality of candidate configuration files and the different levels of the memory, the method for configuring a read-voltage table of a solid state drive further comprises: adjusting parameter values in the candidate configuration file according to a read retry operation result.
6. The reconfigured multimeter of claim 1, wherein, The writing of the target configuration file in the reserved storage space in the firmware binary file of the solid state drive, and the storing of the firmware binary file with the target configuration file written therein into the memory, so as to configure the read-voltage table of the solid state drive as the target configuration file, comprises: writing the target configuration file in the reserved storage space in the firmware binary file of the solid state drive; performing an aging test on the firmware binary file with the target configuration file written therein; storing the firmware binary file with the target configuration file written therein into the memory after the aging test passes. 7.A device for configuring a read-voltage table of a solid state drive, comprising: a rank obtaining unit configured to obtain a target rank of a memory in a solid state drive; a candidate profile obtaining unit configured to obtain a plurality of candidate profiles of a read voltage table of the solid state drive, the plurality of candidate profiles respectively corresponding to different ranks of the memory; a target profile selecting unit configured to select a target profile matching the target rank from the plurality of candidate profiles based on a correspondence between the plurality of candidate profiles and the different ranks of the memory; a configuring unit configured to write the target profile in a reserved storage space in a firmware binary file of the solid state drive, and store the firmware binary file with the target profile written therein into the memory, so as to configure the read voltage table of the solid state drive as the target profile.
8. A solid state drive, comprising: a memory; a controller comprising the read voltage table configuring apparatus of claim 7, the read voltage table configuring apparatus being configured to perform the method of any one of claims 1 to 6 to configure the read voltage table of the solid state drive as a candidate profile matching a target rank of the memory.
9. An electronic device comprising: a processor, a memory, and a program stored on the memory and executable on the processor, the program, when executed by the processor, implementing the steps of the method of any one of claims 1 to 6.
10. A storage medium having stored thereon a computer program or instructions, the computer program or instructions, when executed by a processor, implementing the steps of the method of any one of claims 1 to 6.