State detection method and system based on computing power chip, computer equipment and medium

Abstract

The invention relates to a state detection method and system based on a computing power chip, computer equipment and a medium. The method comprises the following steps: acquiring multi-dimensional hardware feature data of a computing power chip to construct a standardized time series data set; learning the standardized time series data set based on deep learning and physical constraint conditions of hardware feature data to construct a health assessment model, and selecting target sample data to generate a health reference time series; obtaining a to-be-detected data sequence, extracting statistical characteristics, and performing sequence reconstruction based on the statistical characteristics and the health reference time sequence through a multi-mode auto-encoder to obtain a reconstructed sequence; and determining the current health state deviation degree of the computing power chip based on the reconstruction sequence and the to-be-detected data sequence, and determining the current health state of the computing power chip. According to the invention, the system-level aging modeling and detection evaluation of the whole life cycle of the computing power chip can be realized, the health mode of the computing power chip is accurately learned, and the accuracy and precision of aging state detection are remarkably improved.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence technology, and in particular to state detection methods, systems, computer equipment and media based on computing chips. Background Technology

[0002] With the rapid development of high-performance computing and artificial intelligence, high-performance computing chips (such as GPUs) are widely used in data centers, intelligent computing centers, and smart terminals. The performance and reliability of chips are directly related to the overall system efficiency, and chips are prone to aging during long-term operation or in harsh environments, leading to performance degradation or even failure. Typically, hardware aging detection relies on simulation methods and destructive stress testing under extreme conditions. However, these methods are very time-consuming and costly, and difficult to apply to large-scale data center scenarios.

[0003] Currently, existing system-level solutions mainly focus on the design of single algorithms, such as temperature, power consumption, or ECC (Error-Correcting Code) memory errors. These methods primarily target chip reliability, i.e., the prediction of hardware failures. Although existing technologies have proposed system-level fault modeling methods, they require knowledge of the chip's specific architecture information, and the numerous types of faults make it difficult to model them all. Therefore, these methods have poor generalization capabilities and only focus on the real-time possible fault states of a single device, without modeling the long-term, full-lifecycle state of the chip.

[0004] It is evident that existing technologies for detecting the status of high-performance computing chips cannot achieve full lifecycle status assessment, and suffer from low detection accuracy due to the reliance on a single detection method. Therefore, there is an urgent need to provide a solution that can both accurately detect chip aging status and achieve full lifecycle assessment. Summary of the Invention

[0005] This application provides a state detection method, system, computer equipment, and medium based on computing power chips to solve the problems in the prior art that the state detection of high-performance computing power chips cannot achieve full life cycle state assessment of the chip, and that the single detection method leads to low detection accuracy.

[0006] According to one aspect of the embodiments of this application, this application provides a state detection method based on a computing chip. The method includes: acquiring multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset; learning the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model; selecting target sample data based on the health assessment model to generate a health benchmark time series of the computing chip; acquiring the current data sequence to be detected of the computing chip; extracting statistical features of the data sequence to be detected; reconstructing the sequence based on the statistical features and the health benchmark time series using a multimodal autoencoder to obtain a reconstructed sequence; determining the deviation of the current health state of the computing chip based on the reconstructed sequence and the data sequence to be detected; and determining the current health state of the computing chip based on the deviation of the health state.

[0007] Optionally, acquiring multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset includes: acquiring multi-dimensional hardware feature data of the computing chip under different test environments within a preset time period, wherein the multi-dimensional hardware feature data includes computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip; and performing feature engineering processing on the computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip based on a preset time window size and sliding step size to construct the standardized time series dataset.

[0008] Optionally, the step of learning the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model, and selecting target sample data based on the health assessment model to generate a health benchmark time series for the computing chip, includes: performing health pattern recognition on each standardized hardware feature time series under different test environments in the standardized time series dataset using a clustering algorithm; fitting the physical constraints corresponding to the hardware feature data based on the acquired hardware feature data, the physical constraints including physical relationship equations between each hardware feature data; constructing an optimization objective for the loss function in the health assessment model based on the physical relationship equations between each hardware feature data for multi-objective optimization; constructing the health assessment model based on the health pattern recognition of the computing chip and the loss function; and selecting target sample data based on the health assessment model to generate the health benchmark time series for the computing chip.

[0009] Optionally, the step of selecting the target sample data based on the health assessment model to generate the health benchmark time series of the computing chip includes: obtaining first sample data that meets preset sample selection conditions from the clustering results of health patterns based on the health assessment model, and prioritizing the results of multi-objective optimization to select the second sample data with the highest priority; using the first sample data and the second sample data as the target sample data, and updating the benchmark memory pool according to the target sample data; and generating the health benchmark time series of the computing chip based on the updated data in the basic memory pool using a generative adversarial network.

[0010] Optionally, the step of acquiring the current data sequence to be detected by the computing chip, extracting the statistical features of the data sequence to be detected, and reconstructing the sequence using a multimodal autoencoder based on the statistical features and the health baseline time series to obtain the reconstructed sequence includes: acquiring the data sequence to be detected under the current workload of the computing chip; extracting the statistical features from the data sequence to be detected, the statistical features including time-domain features and frequency-domain features; performing feature fusion on the health baseline time series, the time-domain features, and the frequency-domain features to obtain a multimodal input vector; training the multimodal autoencoder based on the multimodal input vector, and reconstructing the time series through the decoding end of the multimodal autoencoder to obtain the reconstructed sequence.

[0011] Optionally, determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation of the health status, includes: calculating the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected based on the trained multimodal autoencoder; if the deviation of the health status exceeds a preset deviation threshold, the current health status of the computing chip is determined to be abnormal.

[0012] Optionally, after determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation, the method further includes: calculating a health score based on the current deviation of the computing chip's health status and a preset reference value for the deviation; determining a warning level corresponding to the current state of the computing chip based on the current health score, the rate of change of the health score relative to the historical health score of the computing chip, and the continuity of the health score; generating health warning information corresponding to the current abnormal state of the computing chip based on the warning level; and updating the historical health score of the computing chip based on the health score.

[0013] According to another aspect of the embodiments of this application, this application provides a state detection system based on a computing chip. The system includes: a data acquisition module, used to acquire multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset; a sequence generation module, used to learn the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model, and select target sample data based on the health assessment model to generate a health benchmark time series of the computing chip; a sequence reconstruction module, used to acquire the current data sequence to be detected of the computing chip, extract statistical features of the data sequence to be detected, and perform sequence reconstruction based on the statistical features and the health benchmark time series using a multimodal autoencoder to obtain a reconstructed sequence; and a state assessment module, used to determine the deviation of the current health state of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determine the current health state of the computing chip based on the health state deviation.

[0014] According to another aspect of the embodiments of this application, this application provides a computer device, including: a processor, a memory, and a network interface. The memory stores machine-readable instructions executable by the processor. When the computer device is running, the processor communicates with the memory through the network interface, and the processor executes the machine-readable instructions to perform the steps of the state detection method based on computing power chip as described above.

[0015] According to another aspect of the embodiments of this application, this application provides a computer-readable medium having processor-executable non-volatile program code that causes the processor to perform the steps of the state detection method based on a computing chip.

[0016] Compared with related technologies, the technical solutions provided in this application have the following advantages: This application provides a state detection method based on computing chips. By constructing a three-layer architecture of standardized data acquisition, health pattern modeling, and dynamic health status assessment, a chip lifecycle aging monitoring system is built, enabling system-level aging modeling and assessment of computing chips throughout their entire lifecycle. By acquiring multi-dimensional hardware feature data of the computing chip under different testing environments as data support, the accuracy and comprehensiveness of modeling are improved. Based on deep learning and standardized time-series datasets, data learning for modeling allows for accurate learning of the computing chip's health patterns under different experimental environments and workloads, significantly improving the accuracy and precision of computing chip aging status detection. Furthermore, adding physical constraints to the hardware feature data during modeling ensures that anomalies are not caused by a single feature but by the synergy of multiple related features, thus improving detection accuracy. Through multimodal autoencoder statistical feature extraction of the data sequence to be tested, combined with a health benchmark time series for sequence reconstruction, and calculation of the current health status deviation of the computing chip for health status analysis, the current health status of the computing chip can be accurately analyzed, providing a full lifecycle health assessment. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0019] Figure 1 This is an optional hardware environment architecture diagram provided according to an embodiment of this application; Figure 2 This is a flowchart illustrating an optional state detection method based on a computing chip according to an embodiment of this application. Figure 3 This is an optional data interaction diagram provided according to an embodiment of this application; Figure 4 A flowchart of another optional state detection method based on a computing chip provided according to an embodiment of this application; Figure 5 A flowchart of another optional state detection method based on a computing chip provided according to an embodiment of this application; Figure 6 This is a schematic diagram of an optional state detection system module based on a computing chip, according to an embodiment of this application. Figure 7 This is a schematic diagram of an optional computer device structure provided for an embodiment of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] To address the problems mentioned in the background art, according to one aspect of the embodiments of this application, an embodiment of a state detection method based on a computing chip is provided.

[0022] like Figure 1 As shown, the above-described state detection method based on computing chips can be applied to, for example... Figure 1 The hardware environment shown is described. The system architecture 100 of the hardware environment includes a terminal device 101 and a server 103. The server 103 is connected to the terminal 101 via a network and can provide services to the terminal device 101 or clients installed on the terminal device 101. A database 105 can be set up on or independently of the server 103 to provide data storage services for the server 103. The network can include various connection types, such as wired, wireless communication links, or fiber optic cables, etc.

[0023] Users can use terminal device 101 to interact with server 103 via a network to receive or send messages. Various communication client applications can be installed on terminal device 101, such as web browsers, search applications, and instant messaging tools. Terminal device 101 can be various electronic devices with a display screen that support web browsing, including but not limited to smartphones, tablets, e-book readers, MP3 players (Moving Picture Experts Group Audio Layer III), MP4 players (Moving Picture Experts Group Audio Layer IV), laptops, and desktop computers. Server 103 can be a server providing various services, such as a backend server supporting the pages displayed on terminal device 101.

[0024] It should be noted that the state detection method based on computing power chips provided in this application is generally executed by a server and / or terminal device, and correspondingly, the state detection system based on computing power chips is generally set in the server / terminal device. Furthermore, it should be understood that... Figure 1 The number of terminal devices, networks, and servers shown is merely illustrative. Depending on implementation needs, any number of terminal devices, networks, and servers can be included.

[0025] like Figure 2 As shown, Figure 2 A flowchart illustrating a state detection method based on a computing chip provided in an embodiment of the present invention. Taking the execution of the state detection method based on a computing chip by a server as an example, the state detection method based on a computing chip includes the following steps: Step S202: Obtain multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset.

[0026] In this embodiment, the state detection method based on computing power chips can be applied to the health monitoring of single nodes and / or clusters of large-scale high-performance computing power chips. Its testing environment includes high-performance computing, data centers, cloud computing, etc., demonstrating strong versatility. The aforementioned computing power chips can refer to high-performance computing chips, which are integrated circuits specifically designed for handling complex computing tasks. They possess characteristics such as high computing power density, low latency, and high energy efficiency, and are widely used in fields such as artificial intelligence, scientific computing, data centers, autonomous driving, and edge computing.

[0027] In this embodiment, the computing chip includes a GPU. Benchmark tests are periodically run on the terminal device running each high-performance computing chip. Benchmark tests can be standard operator calculations, such as maxflops calculations, memory access, CPU-GPU data transfer, AI use case calculations, or specially designed test cases designed to stimulate the aging characteristics of the high-performance computing chip. The aforementioned multi-dimensional hardware feature data can refer to the feature data of the computing chip in different dimensions, including but not limited to hardware feature data such as chip power consumption, temperature, voltage, and frequency. The multi-dimensional hardware feature data collected in each test environment can be preprocessed and expressed based on vectors. Each data point has time characteristics, thereby constructing a standardized time-series dataset based on the vectors corresponding to different test environments.

[0028] Step S204: Based on deep learning and the physical constraints of the hardware feature data, the standardized time series dataset is learned to construct a health assessment model. Based on the health assessment model, target sample data is selected to generate a health benchmark time series of the computing chip.

[0029] In this embodiment, the physical constraints of the aforementioned hardware feature data can refer to the physical relationship equations between various hardware feature data under the same test environment, including but not limited to voltage-frequency relationships, temperature-power consumption-fan relationships, power consumption-frequency relationships, etc. The physical relationship equations between hardware feature data are relationships between features obtained by fitting a simplified physical model. This allows the physical law model to be introduced as a constraint into the neural network training process, achieving multi-objective optimization and ensuring feature space consistency. It ensures that the anomaly is not limited to a single feature, but rather a coordinated anomaly of multiple related features.

[0030] In this embodiment, the essence of deep learning is feature representation learning, which has the ability to automatically extract features. The extracted features are also called deep features or deep feature representations, which have stronger representation capabilities and are more robust. Deep learning algorithms include autoencoders, LSTM algorithms, and LSTM-based autoencoders. For example, an LSTM algorithm can be used for training on a standardized time-series dataset, with physical constraints on hardware feature data as constraints, to learn the health patterns of high-performance computing chips under different testing environments, thereby constructing a health assessment model.

[0031] In this embodiment, the aforementioned target sample data can refer to data extracted from a standardized time series dataset that meets preset data filtering conditions to construct a health benchmark time series for the computing chip. Examples include data from historical periods where the standard is healthy, data showing the lowest voltage and highest power at consistent frequencies, and data showing the chip operating normally and maintaining a stable state over consecutive periods. The stability over consecutive periods can be determined based on the variance of the data within that period; for example, if the variance is less than a preset variance threshold, it can be used as the target sample data.

[0032] Furthermore, by selecting target sample data and generating a health benchmark time series for the computing chip based on it, high-quality data can be selected to ensure that the benchmark time series reflects the chip's true health status. For example, in chip temperature monitoring, abnormally high temperature data points caused by environmental interference can be removed to avoid model misjudgments. Generating a benchmark series based on the selected data can reduce the impact of short-term fluctuations on long-term trends.

[0033] Step S206: Obtain the current data sequence to be detected from the computing chip, extract the statistical features of the data sequence to be detected, and reconstruct the sequence based on the statistical features and the health benchmark time series using a multimodal autoencoder to obtain the reconstructed sequence.

[0034] In this embodiment, by reading the data to be tested in the current test environment of the computing chip in real time, a data sequence to be tested can be constructed based on the temporal characteristics of the acquired data. The data to be tested includes hardware feature data of the computing chip in various dimensions. After data analysis of multiple data sequences to be tested, statistical features can be extracted. Then, a multimodal autoencoder can be used to reconstruct the sequence by combining the statistical features with the health baseline time series. The original health baseline time series and statistical features are combined into a multimodal input vector to generate a new reconstructed sequence. The multimodal autoencoder can be a bidirectional LSTM-based autoencoder capable of learning the latent representation of the multimodal input vector.

[0035] S208, determine the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determine the current health status of the computing chip based on the deviation of the health status.

[0036] In this embodiment, the reconstruction error between the reconstructed sequence and the data sequence to be detected can be calculated based on the aforementioned multimodal autoencoder. The current health status deviation of the computing chip is then calculated based on the reconstruction error. The current health status of the computing chip is determined based on the magnitude of the health status deviation and the continuity of the health status. The reconstructed sequence and the data sequence to be detected are sequences with a temporal order; therefore, the calculation can be performed using time as a benchmark, calculating data from the same dimension collected at the same time. The magnitude of the deviation can be represented by the average health status deviation over a continuous time period, and the continuity of the health status can be represented by the changes in the health status deviation over a continuous time interval.

[0037] In some examples, the health status of a computing chip can include normal mode, mild aging, moderate aging, and severe aging. Of course, the health status can be divided into more levels, which will not be listed here. Different classification criteria can be used for each health status, including classification based on the magnitude and / or duration of the health status deviation. For example, if the health status deviation exceeds a certain threshold and continues to decline over a continuous period of time, it is determined to be mild aging.

[0038] In this embodiment of the invention, a chip lifecycle aging monitoring system is constructed by building a three-layer architecture system of standardized data acquisition, health pattern modeling, and dynamic health status assessment. This system enables system-level aging modeling and detection assessment of computing chips throughout their entire lifecycle. By acquiring multi-dimensional hardware feature data of the computing chip under different test environments as data support, the accuracy and comprehensiveness of modeling can be improved. Based on deep learning and data learning from standardized time series datasets for modeling, the system can accurately learn the health patterns of computing chips under different experimental environments and workloads, significantly improving the accuracy and precision of computing chip aging status detection. Furthermore, the addition of physical constraints on hardware feature data during the modeling process ensures that the anomaly is not caused by a single feature but by the synergy of multiple related features, which is beneficial for improving detection accuracy. By using a multimodal autoencoder to extract statistical features from the data sequence to be tested, combining it with a health benchmark time series for sequence reconstruction, and calculating the deviation of the current health status of the computing chip for health status analysis, the system can accurately analyze the current health status of the computing chip and provide a full lifecycle health assessment.

[0039] In some optional embodiments, step S202 above specifically includes: S2021, acquire multi-dimensional hardware feature data of the computing chip in different test environments within a preset time period. The multi-dimensional hardware feature data includes computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip. S2022, based on a preset time window size and sliding step size, feature engineering processing is performed on the computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip to construct the standardized time series dataset.

[0040] In this embodiment, combined with Figure 3As shown, multi-dimensional hardware characteristic data of the computing chip under different test environments are collected within a preset time period. After data collection, the data can be processed through feature engineering to standardize the data. The collected hardware characteristic data may include, but is not limited to, computing unit characteristics in the computing unit, storage unit characteristics in the storage unit, power supply system characteristics in the power supply system, and thermodynamic characteristics. Among them, computing unit characteristics include Tensor core utilization, graphics frequency (core frequency), GFLOPS (floating-point operations per second), etc.; storage unit characteristics include memory utilization, frequency, bandwidth, etc.; power supply system characteristics include transient voltage, voltage fluctuation variance, etc. The formula for calculating voltage fluctuation variance is the variance of the characteristic value at each unit time step within a time window; thermodynamic characteristics include transient temperature, power consumption, transient overshoot area, dynamic energy efficiency ratio, etc., where transient overshoot area can refer to the integral area exceeding the average value within a time window, and dynamic energy efficiency ratio can be the ratio of floating-point operations per unit time to power consumption (GFLOPS / W).

[0041] Furthermore, the time window size and sliding step size can be preset. For example, the time window is 100 and the sliding step size is 5. Based on the preset time window size and sliding step size, feature engineering processing is performed on the collected computing unit features, storage unit features, power supply system features, and thermodynamic features. Feature engineering processing includes low-pass filtering smoothing and standardization to eliminate high-frequency noise and dimensional differences, including data cleaning, feature selection, feature transformation (normalization / standardization), feature combination, and time series features.

[0042] Furthermore, the feature-engineered data can be output as an N×M matrix, resulting in a standardized time series dataset. Here, N represents the total number of GPU nodes, each corresponding to an independent GPU; M is the number of time windows, each containing a standardized feature sequence. The feature sequence of each node in the standardized time series dataset can be represented as Si={xi,1,xi,2,...,xi,k}, where xi represents the i-th feature value, and 1…k represent the length of the feature sequence, i.e., the number of features for each node. This provides a clear and compact data structure foundation for subsequent modeling and analysis.

[0043] In some examples, combined Figure 3 As shown, the collected data can be transmitted in real time to a database stored on a cloud server or a database independent of the cloud server for subsequent analysis.

[0044] In this embodiment, by collecting hardware feature data from multiple dimensions, data diversity can be improved. Based on feature engineering, standardized data processing is performed to transform the data into a standardized time series dataset, thereby achieving systematic feature combination. This is beneficial for providing a more accurate health assessment data foundation and providing more precise data for subsequent analysis of their hidden interrelationships, achieving health pattern recognition and modeling.

[0045] In some optional embodiments, step S204 above specifically includes: S2041, Health pattern recognition is performed on each standardized hardware feature time series under different test environments in the standardized time series dataset using a clustering algorithm; S2042, Based on the acquired hardware feature data, fit the physical constraint conditions corresponding to the hardware feature data, the physical constraint conditions including the physical relationship equations between each hardware feature data; S2043, Based on the physical relationship equation between the hardware feature data, construct the optimization objective of the loss function in the health assessment model and perform multi-objective optimization; S2044, Construct the health assessment model based on the health pattern recognition of the computing chip and the loss function; S2045, Select the target sample data based on the health assessment model to generate the health benchmark time series of the computing chip.

[0046] In this embodiment, health pattern recognition can be performed on the standardized hardware feature time series of each node under different test environments in a standardized time series dataset using clustering algorithms. Clustering algorithms include K-Means, kmeans++, and DBSCAN. When clustering time series, distance metrics (such as Euclidean distance and cosine similarity) or Dynamic Time Warping (DTW) can be used to calculate the similarity between samples. In this embodiment, since DTW is suitable for dynamic alignment of time series, it is used to calculate the distance between time series. For cluster centers, the DBA (Bottleneck Attention Module) algorithm can be used. Through clustering, highly similar samples can be grouped into one class, minimizing the intra-class sample distance and maximizing the inter-class sample distance, thus achieving classification.

[0047] In some examples, classification rules for health modes can be preset. For example, normal mode: stable temperature, small power fluctuation, and smooth signal waveform; mild aging: slightly increased temperature, increased power fluctuation, and slight spikes in the signal waveform; severe aging: significantly increased temperature, violent power fluctuation, and severely distorted signal waveform. Thresholds can be set as the standard for data comparison and judgment. The set thresholds can be obtained based on a comprehensive analysis of historical data. For example, the temperature threshold can be determined based on the mean, mode, etc. of historical temperature data over the past month.

[0048] Furthermore, during clustering, the classification rules of the preset health mode and the results of the clustering output can be compared to obtain the health mode corresponding to the standardized hardware feature time series of each node, which is to obtain the clustering result of the health mode of the computing chip. For example, if the sample closest to the one with "stable temperature and small power fluctuation" belongs to the normal mode, it belongs to the normal mode; if the sample similar to the one with "slightly increased temperature and increased power fluctuation" belongs to the mild aging mode, the similarity can be compared by setting a limit value; if the value is less than the limit value, it is considered similar.

[0049] In some examples, after obtaining the hardware feature data, physical relationships can be fitted to these features to construct physical constraints. Constructing physical constraints includes: The physical relationship equation between voltage and frequency is: v = a * f + b. This relationship can be fitted by linear regression using historically collected datasets (f, V), where V represents voltage and f represents frequency. Parameters a and b can then be calculated. Based on parameters a and b, the regularization term in the loss function of the health assessment model is constructed, as shown in equation (1) below: (1) in, L volt The regularization term representing voltage-frequency, N This indicates the sample size of the collected dataset. V i pred Indicates the first i Predicted voltage for each sample, f i Indicates the first i The frequency of each sample a This indicates the degree to which frequency affects voltage. b This represents the frequency offset.

[0050] The physical equation relating power consumption and frequency is: P = α∙C∙V 2 Since frequency and voltage are nearly linear, the physical equation relating power consumption and frequency is: P = k·f 3+b, fit the parameters k,b, and then construct the regularization term in the loss function based on the physical relationship equation between power consumption and frequency as shown in equation (2): (2) in, L power The regularization term representing power consumption versus frequency. N This indicates the sample size of the collected dataset. P i pred Indicates the first i Predicted power consumption for each sample, f i Indicates the first i The frequency of each sample k This indicates the degree to which frequency affects power consumption. b This represents the frequency offset.

[0051] The physical relationship between temperature, power consumption, and fan is shown in equation (3) below: (3) in, T Indicates the temperature of the chip. T env Indicates ambient temperature. P Indicates power consumption. C fan This indicates the fan's heat dissipation coefficient. F The square root of the fan speed. ε This indicates the error term or noise term.

[0052] To perform parameter fitting on equation (3), we first transform equation (3) into a linear form, as shown in equations (4) and (5) below: (4) (5) Furthermore, C can be quickly solved using the (P,F,T) triplet and ambient temperature. fan The parameters are further constructed based on the physical relationship equation between temperature, power consumption, and fan, and the regularization term of the loss function in the health assessment model is shown in the following equation (6): (6) in, L temp The regularization term represents the temperature-power-fan ratio. N This indicates the sample size of the collected dataset. T i pred Indicates the first i Predicted temperature for each sample.

[0053] In summary, the regularization term of the loss function constructed based on the various physical relationship equations, and the final loss function is composed of the standard loss and the physical loss, as shown in equation (7) below: (7) Among them, the final constructed loss function, when performing multi-objective optimization, represents the loss of the main task. L main The magnitude is 1, determined by the typical data size of each physical regularization term, and the three parameters λ1, λ2, and λ3 are 0.001, 0.003, and 0.02, respectively.

[0054] Furthermore, combined Figure 4 As shown, a health assessment model is constructed based on the health pattern recognition and loss function of the computing chip. Then, target sample data is selected through the health pattern assessment model to generate the health benchmark time series of the computing chip.

[0055] In this embodiment, during the modeling process, a clustering algorithm is used to identify the health patterns of each standardized hardware feature time series under different test environments in the standardized time series dataset, which can accurately establish the health patterns of the high-performance computing chip. During the modeling process, physical constraints are added to the loss function of the constructed health assessment model based on the hardware feature data, which can be used to prevent the model from overfitting. In addition, the physical constraints on the hardware feature data can ensure that when the chip malfunctions, it is not just a single feature that malfunctions, but a coordinated malfunction of multiple related features. The coordinated malfunction of multiple related features can be analyzed by support vector machine (SVM).

[0056] In some optional embodiments, step S2045 specifically includes: Based on the health assessment model, first sample data that meets the preset sample selection conditions is obtained from the clustering results of health patterns, and the results of multi-objective optimization are prioritized and the second sample data with the highest priority is selected. The first sample data and the second sample data are used as the target sample data, and the baseline memory pool is updated according to the target sample data; Based on generative adversarial networks, the health baseline time series of the computing chip is generated according to the data in the updated basic memory pool.

[0057] In this embodiment, combined with Figure 5As shown, the state detection method based on computing chips provided in this embodiment periodically utilizes existing collected data or partial data to generate new benchmarks. All data is stored in a benchmark memory pool, which has a fixed-capacity priority queue and can be a dynamic benchmark memory pool, meaning it can be updated periodically. The benchmark memory pool can be located in the cloud.

[0058] In some examples, the data sources in the baseline memory pool may include: first sample data that meets preset sample selection criteria obtained from the clustering results of the healthy pattern, and second sample data with the highest priority selected by prioritizing the results of multi-objective optimization. The preset sample selection criteria may include, but are not limited to, healthy patterns being in normal mode, normal patterns maintaining a stable state over a continuous period, and samples clustered close to the DBA center, for example, DTW distance < δ Samples meeting the preset deviation threshold are used as the first sample data. The results of multi-objective optimization include multiple optimized results. Therefore, the results can be prioritized, and the highest priority (ranked first in the same dimension) optimization result can be selected as the second sample data. This includes finding the sample with the lowest voltage and highest power when the frequency is consistent, and then sorting them optimally according to power from highest to lowest. For example, when the frequency is consistent, the multi-objective optimization Pareto front method yields solution A: voltage 20V, power = 100W; solution B: voltage 25V, power = 120W; solution C: voltage 15V, power = 100W. The selected second sample data would be the data from solutions B and C.

[0059] In some examples, target sample data can be selected based on historical data in the baseline memory pool. This includes periods marked as healthy in the historical data, for example, those with health scores higher than a certain threshold. It also includes time series whose reconstruction errors are lower than a set reconstruction error value, for example, those with reconstruction errors lower than 95% of the historical threshold. By selecting data that meets certain conditions from the historical data in the baseline memory pool as target sample data, the selectability of the data, as well as the accuracy and representativeness of the selected data, can be guaranteed.

[0060] In other examples, combined Figure 5 As shown, a culling mechanism can be set for the data in the baseline memory pool: including removing a sequence that is marked as abnormal or seriously deviates; and culling data with a score in the memory pool, for example, based on its ranking in the reconstruction error of the current model, where data with a score below a set threshold is discarded.

[0061] Furthermore, based on the selected target sample data, the baseline memory pool can be updated to obtain the latest baseline memory pool data, ensuring the optimality and high quality of the baseline memory pool data. Then, the updated baseline memory pool data is used for reconstruction to generate a health baseline time series for the computing chip.

[0062] Among them, combined Figure 4-5 As shown, a healthy baseline time series can be generated using a GAN (Generative Adversarial Network). Updated data from the baseline memory pool is used as the training set. In a GAN, the input typically consists of multiple parts to guide the generator to produce outputs that meet specific needs or characteristics. The input to a GAN can be statistical features + noise + pattern labels (such as "memory-intensive state"). The generator produces sequences that are structurally (in the DTW sense) consistent with the real baseline. "Structurally" refers to sequences consistent with the real baseline in the DTW (Dynamic Time Warping) sense. The discriminator in the GAN determines whether a sequence comes from the real baseline memory pool. By inputting both real data and generator-generated data into the discriminator, it evaluates each data sample and outputs a probability value indicating the likelihood that the sample is real data. The GAN generates a "virtual ideal baseline curve," merging the output with the real baseline. The generated reference sequence plus the DBA (DTW Barycenter Averaging) central average is used as the discrimination criterion, aiming to combine the diversity and representativeness of the generated samples to evaluate the generation quality. In GAN networks, pattern labels are used to train multiple GANs at each cluster center to match different working states.

[0063] In this embodiment, by combining clustering results and multi-objective optimization results to screen target sample data and update the data in the benchmark memory pool, the real-time and targeted nature of the data in the benchmark memory pool can be guaranteed, so as to construct a more accurate health benchmark time series. By training with a GAN network to generate a health benchmark time series, it can automatically learn and simulate the inherent distribution and characteristics of complex data, thereby generating a health benchmark time series that both conforms to the actual data pattern and has ideal characteristics.

[0064] In some optional embodiments, step S206 specifically includes: S2061, Obtain the data sequence to be detected under the current workload of the computing chip, and extract the statistical features from the data sequence to be detected, the statistical features including time domain features and frequency domain features; S2062, perform feature fusion on the health baseline time series, time domain features and frequency domain features to obtain a multimodal input vector; S2063, The multimodal autoencoder is trained based on the multimodal input vector, and time series reconstruction is performed through the decoding end of the multimodal autoencoder to obtain the reconstructed sequence.

[0065] In this embodiment, by real-time monitoring of the computing chip to obtain the data sequence to be detected under the current workload, statistical features can be extracted, including time-domain features and frequency-domain features. Time-domain features may include, but are not limited to, signal waveforms, transient responses, timing parameters, and delay times; frequency-domain features may include, but are not limited to, spectral distribution, bandwidth, harmonic distortion, and noise characteristics.

[0066] Furthermore, the health baseline time series is combined with time-domain and frequency-domain features into a multimodal input vector. This vector is then used to learn the latent representation of the time series using a bidirectional LSTM-based multimodal autoencoder. Finally, the time series is reconstructed from the decoding end of the bidirectional LSTM multimodal autoencoder to output the reconstructed sequence.

[0067] In this embodiment, the status of the computing chip is monitored in real time to extract statistical features from the data sequence to be detected, and a multimodal input vector is constructed by combining it with the health benchmark time series. Data fusion under each modality can supplement missing information and improve the quality of the reconstructed sequence. Time series reconstruction is achieved by training with a multimodal autoencoder. The multimodal autoencoder can learn the joint representation of these modalities at the same time, making up for the limitations of a single modality.

[0068] In some optional embodiments, step S208 specifically includes: S2081, Based on the trained multimodal autoencoder, calculate the deviation of the current health status of the computing chip according to the reconstructed sequence and the data sequence to be detected; S2082, if the deviation of the health status exceeds the preset deviation threshold, the current health status of the computing chip is determined to be abnormal.

[0069] In this embodiment, after reconstructing the time series using the decoding end of the trained multimodal autoencoder to obtain the reconstructed sequence, the reconstruction error is calculated between the reconstructed sequence and the data sequence to be detected. The reconstruction error is used as the deviation of the current health status of the computing chip. In this embodiment, the reconstruction error is described using the mean square error, which is shown in the following formula (8): (8) in, T For the sample size, d This represents the dimension of the data, i.e., each sample. x t It isd dimensional vector; x t Indicates the first data sequence to be detected t One sample; x^ t Indicates the first reconstructed sequence t The reconstructed output of each sample.

[0070] The mean square error calculated based on equation (8) above is used as the health status deviation. Then, the health status deviation can be compared with a preset deviation threshold, and the current health status of the computing chip can be determined based on the comparison result. If the preset deviation threshold is exceeded, the computing chip is considered to be in an abnormal state. The abnormal state may include severe aging and / or chip abnormality, such as being in a state of severe aging. The degree to which the threshold is exceeded determines the degree of health status. The greater the deviation, the worse the health status. The preset deviation threshold is based on the data distribution status of historical behavior / baseline behavior. The percentile method is used to model the historical feature distribution. As a possible approach, 95% of the historical state distribution exceeding the node can be considered abnormal.

[0071] In this embodiment, by calculating the health status deviation and combining it with a preset deviation threshold to judge the health status, the degree of deviation between the current state of the computing chip and the normal mode can be quantified. When the health status deviation exceeds the preset deviation threshold, it indicates that the system is operating outside the expected mode and there may be potential faults or performance degradation. This is beneficial for timely identification of aging and abnormal states of high-performance computing chips and provides real-time health warnings.

[0072] In some optional embodiments, after step S208 above, the method further includes: S210, calculate the health score based on the current health status deviation of the computing chip and the preset health status deviation reference value; S212, and determine the warning level corresponding to the current state of the computing power chip based on the current health score of the computing power chip, the rate of change of the health score relative to the historical health score of the computing power chip, and the continuity of the health score; S214, Generate health warning information corresponding to the current abnormal state of the computing chip based on the warning level, and update the historical health score of the computing chip according to the health score.

[0073] In this embodiment, the health score is calculated using the following formula (9): (9) RE represents the deviation of the current health status of the computing chip. μ refThe preset reference value for the deviation of the health status can be the mean of the reconstruction error. δ It is the threshold width of the normal distribution.

[0074] Furthermore, the warning level corresponding to the current state of the computing chip can be determined based on the chip's current health score, the rate of change of the health score relative to its historical health scores, and the continuity of the health score. The rate of change of the health score relative to its historical health scores refers to how quickly the current health score changes compared to historical scores. If multiple historical health scores exist, they can be represented by the average or by the latest historical health score. The continuity of the health score refers to the stability of the health score over a period of time.

[0075] In some examples, the anomaly alarm decision rules for single nodes have a three-level warning mechanism: Primary warning: The health score is below the low end of the historical score distribution; such anomalies are usually transient noise or minor performance fluctuations. Intermediate warning: The health score declines steadily and gradually, or declines within a certain time window and then stabilizes at a low level, indicating that the node may have a persistent degradation effect; for example, the anomaly occurs for three consecutive cycles. Advanced warning: The health score declines rapidly and does not recover in a short period, reflecting a potential unrecoverable hardware failure. The threshold for rapid decline can be calculated based on historical data: Rapid decline threshold = m + 2 * n, where m is the average change in the health score and n is the standard deviation.

[0076] Furthermore, by analyzing the relationship between the current health score of the computing chip and the aforementioned three-level early warning mechanism, its corresponding early warning level can be determined. Then, based on different early warning levels, corresponding health early warning information of urgency can be generated and reported. At the same time, the current health score of the computing chip can be updated to its historical health score.

[0077] In this embodiment, by calculating the health score of the computing chip, and combining the health score, the rate of change of the health score relative to the historical health score of the computing chip, and the continuity of the health score, the warning level corresponding to the current state of the computing chip is analyzed. This allows for rapid and accurate prediction of the health status of the computing chip, timely generation of health warning information for alerts and score updates, and comprehensive health status assessment. This helps to identify potential fault risks in advance, improves the reliability and security of the computing chip, and enhances detection accuracy through a multi-level anomaly warning mechanism, ensuring the scalability and stability of the detection. Furthermore, accurate health assessment helps to rationally schedule and manage high-performance computing chip resources, extend hardware lifespan, and optimize overall performance. The multi-level anomaly warning mechanism further enhances detection accuracy and ensures the scalability and stability of the detection. Simultaneously, the health score is correlated with the actual failure rate to ensure detection accuracy.

[0078] In some possible embodiments, combined Figure 3 As shown, it can periodically perform batch analysis on all high-performance computing chip devices, generate health analysis reports, and show the health trends, performance changes, and potential aging risks of each high-performance computing chip.

[0079] In other possible embodiments, the state detection method based on computing power chips provided in this application is applicable to clusters built on individual nodes. After obtaining the health baseline time series, by identifying the load type of the obtained health baseline time series, the typical working modes of all nodes in the cluster, as well as the health baseline time series of each mode, can be obtained. By analyzing the characteristic meaning of the health baseline time series of each mode, the main state of each typical mode can be obtained, such as compute-intensive state (compute characteristics exceed the high end of the distribution), memory-intensive state (storage characteristics exceed the high end of the distribution), and mixed compute state (compute / storage characteristic fluctuation > 30%). Based on the health status assessment results of each single node, cluster-level health assessment is achieved, providing more accurate hierarchical early warning and health scoring. It can adapt to the needs of different application scenarios and has good scalability, supporting large-scale deployment and management. Whether in high-performance computing, data centers, or cloud computing environments, it can adapt to different high-performance computing chip application scenarios, improving versatility.

[0080] In other embodiments, combined with Figure 4 As shown, after the health score is calculated, a regression model can be established based on real failure samples to correlate the health score with the failure rate, so as to analyze the relationship between the failure rate and the health score in actual situations. At the same time, the current health score of the computing chip can be analyzed in detail according to specific benchmarks, modules, and levels to provide a more comprehensive scoring basis.

[0081] According to another aspect of the embodiments of this application, such as Figure 6 As shown, corresponding to the state detection method based on computing power chips in the above embodiments, this embodiment provides a state detection system based on computing power chips, the system comprising: The data acquisition module 601 is used to acquire multi-dimensional hardware feature data of the computing chip under different test environments in order to construct a standardized time series dataset; The sequence generation module 603 is used to learn the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to build a health assessment model, and select target sample data based on the health assessment model to generate a health benchmark time series of the computing chip. The sequence reconstruction module 605 is used to acquire the current data sequence to be detected by the computing chip, extract the statistical features of the data sequence to be detected, and reconstruct the sequence based on the statistical features and the health benchmark time series through a multimodal autoencoder to obtain the reconstructed sequence. The status assessment module 607 is used to determine the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and to determine the current health status of the computing chip based on the deviation of the health status.

[0082] It should be noted that in this embodiment, the data acquisition module 601 can be used to execute step S202 in this application embodiment, the sequence generation module 603 in this embodiment can be used to execute step S204 in this application embodiment, the sequence reconstruction module 605 in this embodiment can be used to execute step S206 in this application embodiment, and the state evaluation module 607 in this embodiment can be used to execute step S208 in this application embodiment.

[0083] It should be noted that the examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the content disclosed in the above embodiments. It should also be noted that the above modules, as part of the system, can run in the hardware environment of the state detection system based on the computing chip, and can be implemented in software or hardware.

[0084] According to another aspect of the embodiments of this application, this application provides a computer device, such as... Figure 7 As shown, it includes a memory 701, a processor 703, a communication interface 705, and a communication bus 707. The memory 701 stores a computer program that can run on the processor 703. The memory 701 and the processor 703 communicate through the communication interface 705 and the communication bus 707. When the processor 803 executes the computer program, it implements the steps of the above-mentioned state detection method based on the computing chip.

[0085] The memory and processor in the aforementioned computer equipment communicate with each other via a communication bus and a communication interface. The communication bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc.

[0086] The aforementioned memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0087] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0088] According to another aspect of the embodiments of this application, a computer program product or computer program is also provided, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the steps of the state detection method based on a computing chip in any of the above embodiments.

[0089] Optionally, in this embodiment, the computer-readable medium is configured to store program code for the processor to execute the steps of the state detection method based on the computing chip described in the above embodiments, wherein the steps of the state detection method based on the computing chip specifically include: S202. Obtain multi-dimensional hardware feature data of the computing chip under different test environments to construct a standardized time series dataset; S204. Based on deep learning and the physical constraints of the hardware feature data, the standardized time series dataset is learned to construct a health assessment model. Based on the health assessment model, target sample data is selected to generate a health benchmark time series of the computing chip. S206. Obtain the current data sequence to be detected from the computing chip, extract the statistical features of the data sequence to be detected, and reconstruct the sequence based on the statistical features and the health benchmark time series using a multimodal autoencoder to obtain the reconstructed sequence. S208. Determine the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determine the current health status of the computing chip based on the deviation of the health status.

[0090] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated here. Furthermore, in the specific implementation of this application embodiment, the above embodiments can be consulted, and corresponding technical effects can be achieved.

[0091] It is understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described herein, or combinations thereof. For software implementation, the techniques described herein can be implemented by units that perform the functions described herein. Software code can be stored in memory and executed by a processor. The memory can be implemented in the processor or external to the processor.

[0092] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0093] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the division of modules is merely a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0094] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially or in other words, the parts that contribute to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0095] It should be noted that, in this document, relational terms such as "first," "second," etc., are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprises a…" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0096] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A state detection method based on a computing chip, characterized in that, The method includes: To acquire multi-dimensional hardware feature data of computing chips under different testing environments in order to construct a standardized time series dataset; The standardized time series dataset is learned based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model. Target sample data is selected based on the health assessment model to generate a health benchmark time series for the computing chip. The current data sequence to be detected by the computing chip is obtained, the statistical features of the data sequence to be detected are extracted, and the sequence is reconstructed by a multimodal autoencoder based on the statistical features and the health benchmark time series to obtain the reconstructed sequence. The deviation of the current health status of the computing chip is determined based on the reconstructed sequence and the data sequence to be detected, and the current health status of the computing chip is determined based on the deviation of the health status.

2. The state detection method based on a computing chip according to claim 1, characterized in that, The acquisition of multi-dimensional hardware feature data of the computing chip under different testing environments to construct a standardized time series dataset includes: Acquire multi-dimensional hardware feature data of the computing chip in different test environments within a preset time period. The multi-dimensional hardware feature data includes computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip. Based on a preset time window size and sliding step size, feature engineering is performed on the computing unit features, storage unit features, power supply system features, and thermodynamic features of the computing chip to construct the standardized time series dataset.

3. The state detection method based on a computing chip according to claim 1, characterized in that, The standardized time series dataset is learned based on deep learning and the physical constraints of the hardware feature data to construct a health assessment model. Target sample data is then selected based on the health assessment model to generate a health benchmark time series for the computing chip, including: Health patterns of standardized hardware features under different test environments in the standardized time series dataset are identified using a clustering algorithm. Based on the acquired hardware feature data, the physical constraints corresponding to the hardware feature data are fitted, and the physical constraints include physical relationship equations between the hardware feature data. Based on the physical relationship equations between the various hardware feature data, the optimization objective of the loss function in the health assessment model is constructed for multi-objective optimization; The health assessment model is constructed based on the health pattern recognition of the computing chip and the loss function. The target sample data is selected based on the health assessment model to generate the health benchmark time series of the computing chip.

4. The state detection method based on a computing chip according to claim 3, characterized in that, The step of selecting the target sample data based on the health assessment model to generate the health benchmark time series of the computing chip includes: Based on the health assessment model, first sample data that meets the preset sample selection conditions is obtained from the clustering results of health patterns, and the results of multi-objective optimization are prioritized and the second sample data with the highest priority is selected. The first sample data and the second sample data are used as the target sample data, and the baseline memory pool is updated according to the target sample data; Based on generative adversarial networks, the health baseline time series of the computing chip is generated according to the data in the updated basic memory pool.

5. The state detection method based on a computing chip according to claim 1, characterized in that, The process of acquiring the current data sequence to be detected from the computing chip, extracting statistical features from the data sequence to be detected, and reconstructing the sequence using a multimodal autoencoder based on the statistical features and the health baseline time series to obtain the reconstructed sequence includes: The data sequence to be detected under the current workload of the computing chip is obtained, and the statistical features are extracted from the data sequence to be detected. The statistical features include time-domain features and frequency-domain features. The health baseline time series, time-domain features, and frequency-domain features are fused to obtain a multimodal input vector; The multimodal autoencoder is trained based on the multimodal input vector, and time series reconstruction is performed through the decoding end of the multimodal autoencoder to obtain the reconstructed sequence.

6. The state detection method based on a computing chip according to claim 1, characterized in that, The step of determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation of the health status, includes: Based on the trained multimodal autoencoder, the deviation of the current health status of the computing chip is calculated according to the reconstructed sequence and the data sequence to be detected; If the deviation of the health status exceeds a preset deviation threshold, the current health status of the computing chip is determined to be abnormal.

7. The state detection method based on a computing chip according to any one of claims 1 to 6, characterized in that, After determining the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and determining the current health status of the computing chip based on the deviation of the health status, the method further includes: A health score is calculated based on the current health status deviation of the computing chip and a preset health status deviation reference value. The warning level corresponding to the current state of the computing chip is determined based on the current health score of the computing chip, the rate of change of the health score relative to the historical health score of the computing chip, and the continuity of the health score. Based on the warning level, generate health warning information corresponding to the current abnormal state of the computing chip, and update the historical health score of the computing chip according to the health score.

8. A state detection system based on a computing chip, characterized in that, The system includes: The data acquisition module is used to acquire multi-dimensional hardware feature data of the computing chip under different test environments in order to construct a standardized time series dataset; The sequence generation module is used to learn the standardized time series dataset based on deep learning and the physical constraints of the hardware feature data to build a health assessment model, and select target sample data based on the health assessment model to generate a health benchmark time series of the computing chip. The sequence reconstruction module is used to acquire the current data sequence to be detected by the computing chip, extract the statistical features of the data sequence to be detected, and reconstruct the sequence based on the statistical features and the health benchmark time series through a multimodal autoencoder to obtain the reconstructed sequence. The status assessment module is used to determine the deviation of the current health status of the computing chip based on the reconstructed sequence and the data sequence to be detected, and to determine the current health status of the computing chip based on the deviation of the health status.

9. A computer device, comprising: A processor, a memory, and a network interface, wherein the memory stores machine-readable instructions executable by the processor, characterized in that: when the computer device is running, the processor communicates with the memory via the network interface, and the processor executes the machine-readable instructions to perform the steps of the state detection method based on a computing chip as described in any one of claims 1 to 7.

10. A computer-readable medium having processor-executable non-volatile program code, characterized in that, The program code causes the processor to execute the steps of the state detection method based on computing power chip as described in any one of claims 1 to 7.

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