A method and system for constructing a UVM-based verification use case

Abstract

The present application relates to the technical field of UVM testing, and relates to a UVM-based verification case construction method and system, which comprises the following steps: confirming preconfigured template files and template file paths in a test case directory, wherein the preconfigured template files comprise sequence classes, virtual sequence classes and test classes, and the sequence classes, the virtual sequence classes and the test classes all contain placeholders; receiving a case name; obtaining a copied top-level file based on the template file paths and the preconfigured template files; performing placeholder scanning on the copied top-level file to obtain a plurality of to-be-replaced placeholders; performing case name replacement on the plurality of to-be-replaced placeholders based on the case name to obtain a replaced top-level file; and performing verification on the replaced top-level file to obtain a target top-level file. The present application can improve the automation degree of UVM verification case construction and reduce manual operation and the complexity of operation.

Description

Technical Field

[0001] This invention relates to the field of UVM testing technology, and in particular to a method and system for constructing verification test cases based on UVM. Background Technology

[0002] UVM verification test case construction is a key step in ensuring that chip design functions correctly, reliably, and conforms to specifications. Through systematic test case design, it is possible to fully cover design boundaries and abnormal scenarios, discover potential defects in advance, reduce tape-out risks, thereby significantly improving verification efficiency and product quality, and shortening the entire chip development cycle.

[0003] Existing UVM verification test case construction methods involve a lot of repetitive work. Each test case requires the repeated creation of test classes, sequence classes, and virtual sequence classes, and these classes have roughly the same structure, with only differences in the core test logic. This results in a large amount of repetitive work and the degree of automation needs to be improved. At the same time, when the verification platform architecture changes (such as changing the sequencer name), all related test cases' virtual sequences and test classes need to be modified synchronously, which requires a lot of manual intervention, further increasing the complexity of test case construction. Summary of the Invention

[0004] This invention provides a method and system for constructing UVM-based verification test cases, the main purpose of which is to improve the automation level of UVM verification test case construction and reduce manual operation and the complexity of operation.

[0005] To achieve the above objectives, this invention provides a method for constructing verification test cases based on UVM, comprising:

[0006] Extract the test case directories sequentially from the multiple preset test case directories, and identify the pre-configured template files and their paths in the test case directories. The pre-configured template files include: sequence classes, virtual sequence classes, and test classes, and each of the sequence classes, virtual sequence classes, and test classes contains placeholders.

[0007] Receive user input information and extract the use case name based on the user input information;

[0008] Based on the template file path and the preset temporary file path, the pre-configured template file is copied to the preset temporary top-level file to obtain the copied top-level file;

[0009] The top-level file is copied, and placeholders are scanned to obtain multiple placeholders to be replaced. Based on the use case name, the multiple placeholders to be replaced in the top-level file are replaced with use case names to obtain the replaced top-level file.

[0010] The replacement top-level file is validated to obtain the target top-level file, and the test case directory is constructed based on the target top-level file;

[0011] Once multiple test case directories have been constructed, the construction of UVM-based verification test cases is complete.

[0012] Optionally, the pre-configured template file includes a virtual task interface, wherein the virtual task interface is used to construct a logic programming module, wherein the logic programming module is used to implement specific logic set by the user, wherein the specific logic includes: data stimulus generation, timing control and result checking.

[0013] Optionally, the virtual task interface is the body code segment of a sequence class.

[0014] Optionally, the virtual task interface is used to construct a logic programming module, including:

[0015] The user logic code file has been identified;

[0016] The user logic code file is merged into the virtual task interface based on preset compilation instructions to obtain the logic programming module.

[0017] Optionally, before confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0018] Multiple pre-configured UVM classes are generated based on placeholders. Each pre-configured UVM class is a sequence class, a virtual sequence class, or a test class. Each pre-configured UVM class includes a pre-configuration constructor and a pre-configuration registration macro. Both the pre-configuration constructor and the pre-configuration registration macro contain placeholders. The pre-configuration registration macro is either a component registration macro or an object registration macro.

[0019] Generate pre-configured template files based on multiple pre-configured UVM classes.

[0020] Optionally, after confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0021] Identify the build_phase code segment of the test class in the pre-configured template file;

[0022] When the build_phase code segment of the test class is run, the pre-built virtual sequencer is configured with the default sequence for main_phase based on the preset uvm_config_db and the virtual sequence class in the pre-configured template file. After the default sequence for main_phase is configured, when the main_phase code segment in the virtual sequencer is run, the virtual sequence class with the test case name replaced in the target top-level file will be executed through the virtual sequencer.

[0023] Optionally, after confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0024] Identify the body code segment of the virtual sequence class in the pre-configured template file;

[0025] When the body code segment of the virtual sequence class is run, it is instantiated and pre-configured based on the sequence class in the pre-configuration template file. After instantiation and pre-configuration, the instantiation is completed through the pre-built UVM framework and the sequence class with the test case name replaced in the target top-level file.

[0026] Optionally, the step of extracting the use case name based on user input information includes:

[0027] Parse the user input to obtain the name of the UVM class;

[0028] Extract the field from the name of the UVM class to obtain the use case name.

[0029] Optionally, the step of validating the replacement top-level file to obtain the target top-level file includes:

[0030] Multiple checks are performed on the top-level file to obtain the check results, which include: check success and check failure. The multiple checks include: format check, template file check and placeholder check.

[0031] If the verification result is a failure, an error message is generated based on the verification result. The top-level file to be replaced is adjusted according to the error message to obtain the target top-level file.

[0032] If the verification result is successful, then the replaced top-level file is recorded as the target top-level file.

[0033] To achieve the above objectives, the present invention also provides a UVM-based verification test case construction system, comprising:

[0034] The template file confirmation module is used to extract the test case directory sequentially from multiple preset test case directories, and confirm the pre-configured template file and template file path in the test case directory. The pre-configured template file includes: sequence class, virtual sequence class and test class, and the sequence class, virtual sequence class and test class all contain placeholders.

[0035] The user parameter parsing module is used to receive user input information, extract the test case name based on the user input information, and copy the pre-configured template file to the preset temporary top-level file based on the template file path and the preset temporary file path to obtain the copied top-level file.

[0036] The placeholder replacement module is used to scan for placeholders in the copied top-level file, obtain multiple placeholders to be replaced, and replace the multiple placeholders to be replaced in the copied top-level file with test case names based on the test case names, so as to obtain the replaced top-level file.

[0037] The top-level file verification module is used to verify the replacement top-level file to obtain the target top-level file. Based on the target top-level file, the test case directory is constructed. When multiple test case directories have been constructed, the construction of UVM-based verification test cases is completed.

[0038] To address the above problems, the present invention also provides an electronic device, the electronic device comprising:

[0039] Memory, storing at least one instruction;

[0040] The processor executes the instructions stored in the memory to implement the UVM-based verification test case construction method described above.

[0041] To address the aforementioned problems, the present invention also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor in an electronic device to implement the UVM-based verification use case construction method described above.

[0042] To address the problems described in the background section, this invention first identifies the pre-configured template files and their paths within the test case directory. These pre-configured template files include sequence classes, virtual sequence classes, and test classes, each containing placeholders. This step allows for the simultaneous location of these three key templates, avoiding manual searching through layers and establishing a unified entry point for subsequent automated replacement. This significantly shortens the preparation time before test case setup. Next, user input is received, and test case names are extracted based on this input. This step automatically extracts strings that would otherwise need to be manually entered into various templates, eliminating spelling discrepancies and ensuring the uniqueness and accuracy of the source strings for subsequent replacements. This prevents class name misalignment or name conflicts from the outset. A placeholder scan is then performed on the copied top-level file. Multiple placeholders to be replaced are obtained. Finally, based on the test case names, the placeholders in the copied top-level file are replaced with test case names to obtain the replaced top-level file. This step compresses the string modification actions, which were originally scattered in class names, function names, registered macros, paths, etc., into a single operation, enabling rapid rewriting of the entire file and quickly bringing the top-level file to a compileable state. Through the above steps, test classes, sequence classes, and virtual sequence classes are automatically generated and registered, reducing repetitive work and greatly improving the efficiency of post-simulation verification. At the same time, when building test cases, users only need to modify the test logic in the body part of the sequence class, without having to worry about the underlying details such as class creation, registration, sequence and sequencer binding. This simplifies the construction process from multiple steps to a single core logic writing step, significantly reducing operational complexity. Therefore, this invention can improve the automation level of UVM verification test case construction and reduce manual operation and its complexity. Attached Figure Description

[0043] Figure 1 A flowchart illustrating a method for constructing verification test cases based on UVM, as provided in an embodiment of the present invention;

[0044] Figure 2 A functional block diagram of a UVM-based verification test case construction system provided in an embodiment of the present invention;

[0045] Figure 3 This is a schematic diagram of the structure of an electronic device that implements the UVM-based verification test case construction method according to an embodiment of the present invention.

[0046] Explanation of reference numerals in the attached figures:

[0047] 10. Electronic device; 11. Processor; 12. Memory; 13. Bus.

[0048] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0049] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0050] This application provides a method for constructing verification test cases based on UVM. The execution entity of the UVM-based verification test case construction method includes, but is not limited to, at least one of the following electronic devices that can be configured to execute the method provided in this application: a server, a terminal, etc. In other words, the UVM-based verification test case construction method can be executed by software or hardware installed on a terminal device or a server device, and the software can be a blockchain platform. The server includes, but is not limited to, a single server, a server cluster, a cloud server, or a cloud server cluster.

[0051] Reference Figure 1 The diagram shown is a flowchart illustrating a method for constructing UVM-based verification test cases according to an embodiment of the present invention. In this embodiment, the method for constructing UVM-based verification test cases includes:

[0052] S1. Extract the test case directories sequentially from the multiple preset test case directories, and identify the pre-configured template files and template file paths in the test case directories. The pre-configured template files include: sequence classes, virtual sequence classes, and test classes, and each of the sequence classes, virtual sequence classes, and test classes contains placeholders.

[0053] As is clear, the test case directory refers to the directory structure used to store files related to a specific test case, and each test case directory corresponds to one test case. The pre-configured template file refers to a standardized UVM class template file containing placeholders, stored in each test case directory, used for automatically generating test classes, sequence classes, and virtual sequence classes. The template file path refers to the storage path of the pre-configured template file in the test case directory. Each test case directory contains the same pre-configured template file, which includes placeholders that serve as identifiers for subsequent replacement of test case names.

[0054] In detail, the pre-configured template file includes a virtual task interface, which is used to build a logic programming module. The logic programming module is used to implement specific logic set by the user. The specific logic includes: data stimulus generation, timing control, and result checking.

[0055] It should be explained that the pre-configured template file contains a virtual task interface, which is used to build the logic programming module later. The logic programming module contains specific logic scripts written by the user. These specific logic scripts are used to implement specific logic such as data stimulus generation, timing control, and result checking.

[0056] Specifically, the virtual task interface is the body code segment of the sequence class.

[0057] It is clear that the pre-configured template file does not contain the specific logic programming module. Only at the beginning of the subsequent compilation process, the user-written specific logic script (i.e. the subsequent user logic code file) is merged into the virtual task interface to obtain the logic programming module.

[0058] Specifically, the virtual task interface is used to construct logic programming modules, including:

[0059] The user logic code file has been identified;

[0060] The user logic code file is merged into the virtual task interface based on preset compilation instructions to obtain the logic programming module.

[0061] Understandably, the user logic code file refers to a code file written by the user that contains specific test logic. The compilation instruction refers to the instruction issued after entering the compilation stage, indicating that the compilation process has begun. The logic programming module is a virtual task interface after merging the user logic code. Merging the user logic code file into the virtual task interface based on preset compilation instructions means that during the compilation process (i.e., after receiving the compilation instruction), the specific logic code of the user-written body task is inserted into the predefined virtual body task interface in the template through a script or compilation tool, forming a complete and executable sequence-type body task.

[0062] Specifically, before confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0063] Multiple pre-configured UVM classes are generated based on placeholders. Each pre-configured UVM class is a sequence class, a virtual sequence class, or a test class. Each pre-configured UVM class includes a pre-configuration constructor and a pre-configuration registration macro. Both the pre-configuration constructor and the pre-configuration registration macro contain placeholders. The pre-configuration registration macro is either a component registration macro or an object registration macro.

[0064] Generate pre-configured template files based on multiple pre-configured UVM classes.

[0065] As is clear, the pre-configured UVM class refers to a sequence class, virtual sequence class, or test class. Each pre-configured UVM class contains a pre-configured constructor and a pre-configured registration macro. The pre-configured constructor is a function predefined in the template used to initialize class instances, such as `function new(string name="UVM_tcname_sequence")`, where `UVM_tcname` is a placeholder. This pre-configured constructor is used to complete the class initialization. The pre-configured registration macro is a component registration macro or an object registration macro, and different pre-configured UVM classes contain different pre-configured registration macros. Placeholders are included in both the pre-configured constructor and the pre-configured registration macro.

[0066] For example, the sequence class contains the object registration macro: uvm_object_utils(UVM_tcname_sequence), where uvm_object_utils represents the object registration macro, UVM_tcname_sequence represents the class name of the sequence class with placeholders, and UVM_tcname represents the placeholder. If the user's test case name received later when generating the target top-level file is case_01, then this object registration macro is replaced with: uvm_object_utils(case_01_sequence).

[0067] Specifically, after confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0068] Identify the build_phase code segment of the test class in the pre-configured template file;

[0069] When the build_phase code segment of the test class is run, the pre-built virtual sequencer is configured with the default sequence for main_phase based on the preset uvm_config_db and the virtual sequence class in the pre-configured template file. After the default sequence for main_phase is configured, when the main_phase code segment in the virtual sequencer is run, the virtual sequence class with the test case name replaced in the target top-level file will be executed through the virtual sequencer.

[0070] It is clear that the `build_phase` code segment of the test class refers to the `build_phase` code segment defined in the test class. `uvm_config_db` refers to the data communication mechanism in UVM used for global configuration information transmission. The specific process of setting the default sequence for the main_phase of the pre-built virtual sequencer based on the preset `uvm_config_db` and the virtual sequence class in the pre-configured template file is as follows: When the `build_phase` code segment of the test class is run, the virtual sequence class (at this time, the placeholders in the virtual sequence class have been replaced by the test case name entered by the user) is preset as the default sequence for the main_phase of the virtual sequencer through `uvm_config_db`. After this setting, when the main_phase of the virtual sequencer is reached, the corresponding virtual sequence class will be automatically executed, thus eliminating the need for verification engineers to manually set it.

[0071] Specifically, after confirming the pre-configured template files and their paths in the test case directory, the method further includes:

[0072] Identify the body code segment of the virtual sequence class in the pre-configured template file;

[0073] When the body code segment of the virtual sequence class is run, it is instantiated and pre-configured based on the sequence class in the pre-configuration template file. After instantiation and pre-configuration, the instantiation is completed through the pre-built UVM framework and the sequence class with the test case name replaced in the target top-level file.

[0074] Understandably, the body code segment of the virtual sequence class refers to the body code segment defined in the virtual sequence class, which is used to coordinate the execution of multiple sequences. The instantiation pre-configuration based on the sequence class in the pre-configuration template file means that when the execution reaches the body code segment of the virtual sequence class, the sequence class (at this time, the placeholders in the sequence class have been replaced by the test case name) is instantiated through a predefined code structure (such as using the uvm_do_on macro), and the mapping relationship between the sequence class and a specific sequencer is specified. After this instantiation pre-configuration, the stimulus transactions generated by the sequence class after the test case name replacement will be sent to the driver through the specified sequencer, thereby driving the DUT to perform simulation.

[0075] S2. Receive user input information and extract the use case name based on the user input information.

[0076] It is clear that the user input information refers to the class name entered by the user via command line or script parameters. The use case name refers to the name that will be used to replace the placeholder later.

[0077] Specifically, the extraction of use case names based on user input information includes:

[0078] Parse the user input to obtain the name of the UVM class;

[0079] Extract the field from the name of the UVM class to obtain the use case name.

[0080] It needs to be explained that the above extraction of fields from the UVM class name is as follows: if the name of a UVM class is: case_01_test, then after field extraction, the test case name is: case_01.

[0081] S3. Based on the template file path and the preset temporary file path, copy the pre-configured template file to the preset temporary top-level file to obtain the copied top-level file.

[0082] It should be explained that the temporary file path refers to the storage path of the temporary top-level file, which is an intermediate file generated during script processing to temporarily store template content, such as old_top.v. The copying of the top-level file refers to the temporary top-level file after copying. The content of the copied top-level file is the same as the pre-configured template file. The purpose of this step is to preserve the original template information for easy debugging and comparison later.

[0083] S4. Perform a placeholder scan on the copied top-level file to obtain multiple placeholders to be replaced. Replace the multiple placeholders to be replaced in the copied top-level file with test case names based on the test case names to obtain the replaced top-level file.

[0084] It is clear that the multiple placeholders to be replaced refer to all placeholders appearing in the copied top-level file. For example, if the placeholder in the pre-configured template file is UVM_tcname, then the multiple placeholders to be replaced here are UVM_tcname in different locations (such as class names, function names, factory registrations, component initializations, etc.). The replacement of the top-level file refers to the copied top-level file after use case name replacement. Specifically, replacing the multiple placeholders to be replaced in the copied top-level file based on the use case name means replacing all the multiple placeholders to be replaced in the copied top-level file with use case names.

[0085] S5. Verify the replacement top-level file to obtain the target top-level file, and complete the construction of the test case directory based on the target top-level file.

[0086] It should be explained that the target top-level file refers to the replacement top-level file after verification.

[0087] Specifically, the step of validating the replaced top-level file to obtain the target top-level file includes:

[0088] Multiple checks are performed on the top-level file to obtain the check results, which include: check success and check failure. The multiple checks include: format check, template file check and placeholder check.

[0089] If the verification result is a failure, an error message is generated based on the verification result. The top-level file to be replaced is adjusted according to the error message to obtain the target top-level file.

[0090] If the verification result is successful, then the replaced top-level file is recorded as the target top-level file.

[0091] It is clear that the multiple validations of the top-level file replacement refer to performing different types of validations on the top-level file replacement. These validations not only apply to the top-level file replacement but also exist throughout the entire test case construction process. These validations include format validation, template file validation, and placeholder validation. Format validation checks if the user input information is formatted correctly; template file validation checks if the template file exists; and placeholder validation checks if there are any unreplaced placeholders in the top-level file replacement that have not been replaced by the test case name. If a validation fails, an error message is generated, containing the specific error location and reason. For example, if a validation finds that a placeholder in the top-level file has not been replaced, the exact location of the unreplaced placeholder is identified, and the error reason "placeholder not replaced" is noted. The adjustment refers to manual adjustments made by relevant personnel based on the error message.

[0092] S6. Once multiple test case directories have been constructed, the construction of UVM-based verification test cases is complete.

[0093] Understandably, once the target top-level file is generated, it means that the UVM class templates in the current test case directory have successfully replaced the placeholders and passed the validation, generating a compileable and executable target top-level file (such as "top_all.sv"), thus completing the construction of the current test case directory. Repeating the above test case directory construction process will complete the construction of all test case directories.

[0094] To address the problems described in the background section, this invention first identifies the pre-configured template files and their paths within the test case directory. These pre-configured template files include sequence classes, virtual sequence classes, and test classes, each containing placeholders. This step allows for the simultaneous location of these three key templates, avoiding manual searching through layers and establishing a unified entry point for subsequent automated replacement. This significantly shortens the preparation time before test case setup. Next, user input is received, and test case names are extracted based on this input. This step automatically extracts strings that would otherwise need to be manually entered into various templates, eliminating spelling discrepancies and ensuring the uniqueness and accuracy of the source strings for subsequent replacements. This prevents class name misalignment or name conflicts from the outset. A placeholder scan is then performed on the copied top-level file. Multiple placeholders to be replaced are obtained. Finally, based on the test case names, the placeholders in the copied top-level file are replaced with test case names to obtain the replaced top-level file. This step compresses the string modification actions, which were originally scattered in class names, function names, registered macros, paths, etc., into a single operation, enabling rapid rewriting of the entire file and quickly bringing the top-level file to a compileable state. Through the above steps, test classes, sequence classes, and virtual sequence classes are automatically generated and registered, reducing repetitive work and greatly improving the efficiency of post-simulation verification. At the same time, when building test cases, users only need to modify the test logic in the body part of the sequence class, without having to worry about the underlying details such as class creation, registration, sequence and sequencer binding. This simplifies the construction process from multiple steps to a single core logic writing step, significantly reducing operational complexity. Therefore, this invention can improve the automation level of UVM verification test case construction and reduce manual operation and its complexity.

[0095] like Figure 2 The diagram shown is a functional block diagram of a UVM-based verification test case construction system provided in an embodiment of the present invention.

[0096] The UVM-based verification test case construction system 100 of this invention can be installed in an electronic device. Depending on the functions implemented, the UVM-based verification test case construction system 100 may include a template file verification module 101, a user parameter parsing module 102, a placeholder replacement module 103, and a top-level file verification module 104. The module described in this invention can also be called a unit, which refers to a series of computer program segments that can be executed by the processor of an electronic device and can perform a fixed function, and which are stored in the memory of the electronic device.

[0097] The template file confirmation module 101 is used to extract test case directories sequentially from multiple preset test case directories, and confirm the pre-configured template file and template file path in the test case directory. The pre-configured template file includes: sequence class, virtual sequence class and test class, and the sequence class, virtual sequence class and test class all contain placeholders.

[0098] The user parameter parsing module 102 is used to receive user input information, extract the use case name based on the user input information, and copy the pre-configured template file to a preset temporary top-level file based on the template file path and the preset temporary file path to obtain the copied top-level file.

[0099] The placeholder replacement module 103 is used to scan the copy top-level file for placeholders, obtain multiple placeholders to be replaced, and replace the multiple placeholders to be replaced in the copy top-level file with use case names based on use case names to obtain a replacement top-level file.

[0100] The top-level file verification module 104 is used to verify the replacement top-level file to obtain the target top-level file, and to complete the construction of the test case directory based on the target top-level file. When multiple test case directories have been completed, the construction of UVM-based verification test cases is completed.

[0101] In detail, the modules in the UVM-based verification test case construction system 100 described in this embodiment of the invention employ the same methods as described above. Figure 1 The method used is the same as the UVM-based verification test case construction method described above, and it can produce the same technical effect, so it will not be repeated here.

[0102] like Figure 3 The diagram shown is a structural schematic of an electronic device that implements a method for constructing verification test cases based on UVM, according to an embodiment of the present invention.

[0103] The electronic device 1 may include a processor 10, a memory 11 and a bus 12, and may also include a computer program stored in the memory 11 and executable on the processor 10, such as a method program for building verification use cases based on UVM.

[0104] The memory 11 includes at least one type of readable storage medium, such as flash memory, portable hard drive, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 11 can be an internal storage unit of the electronic device 1, such as a portable hard drive. In other embodiments, the memory 11 can be an external storage device of the electronic device 1, such as a plug-in portable hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory 11 includes both internal and external storage units of the electronic device 1. The memory 11 can be used not only to store application software and various types of data installed on the electronic device 1, such as the code of a UVM-based verification test case construction method program, but also to temporarily store data that has been output or will be output.

[0105] In some embodiments, the processor 10 may be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor 10 is the control unit of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules stored in the memory 11 (e.g., UVM-based verification test case construction methods) and calls data stored in the memory 11 to perform various functions of the electronic device 1 and process data.

[0106] The bus 12 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus 12 can be divided into an address bus, a data bus, a control bus, etc. The bus 12 is configured to realize the connection and communication between the memory 11 and at least one processor 10, etc.

[0107] Figure 3 Only electronic devices with components are shown; it will be understood by those skilled in the art that... Figure 3The structure shown does not constitute a limitation on the electronic device 1, and may include fewer or more components than shown, or combine certain components, or have different component arrangements.

[0108] For example, although not shown, the electronic device 1 may also include a power supply (such as a battery) to power the various components. Preferably, the power supply can be logically connected to the at least one processor 10 through a power management system, thereby enabling functions such as charging management, discharging management, and power consumption management through the power management system. The power supply may also include one or more DC or AC power supplies, recharging systems, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device 1 may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be described in detail here.

[0109] Furthermore, the electronic device 1 may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), which is typically used to establish communication connections between the electronic device 1 and other electronic devices.

[0110] Optionally, the electronic device 1 may further include a user interface, which may be a display, an input unit (such as a keyboard), and optionally, a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the electronic device 1 and to display a visual user interface.

[0111] The UVM-based verification test case construction method program stored in the memory 11 of the electronic device 1 is a combination of multiple instructions, which, when run in the processor 10, can achieve the following:

[0112] Extract the test case directories sequentially from the multiple preset test case directories, and identify the pre-configured template files and their paths in the test case directories. The pre-configured template files include: sequence classes, virtual sequence classes, and test classes, and each of the sequence classes, virtual sequence classes, and test classes contains placeholders.

[0113] Receive user input information and extract the use case name based on the user input information;

[0114] Based on the template file path and the preset temporary file path, the pre-configured template file is copied to the preset temporary top-level file to obtain the copied top-level file;

[0115] The top-level file is copied, and placeholders are scanned to obtain multiple placeholders to be replaced. Based on the use case name, the multiple placeholders to be replaced in the top-level file are replaced with use case names to obtain the replaced top-level file.

[0116] The replacement top-level file is validated to obtain the target top-level file, and the test case directory is constructed based on the target top-level file;

[0117] Once multiple test case directories have been constructed, the construction of UVM-based verification test cases is complete.

[0118] Specifically, the processor 10's implementation method for the above instructions can be found in [reference needed]. Figures 1 to 3 The descriptions of the relevant steps in the corresponding embodiments are not repeated here.

[0119] Furthermore, if the modules / units integrated in the electronic device 1 are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium may include: any entity or system capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, or a read-only memory (ROM).

[0120] The present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor of an electronic device, can perform the following:

[0121] Extract the test case directories sequentially from the multiple preset test case directories, and identify the pre-configured template files and their paths in the test case directories. The pre-configured template files include: sequence classes, virtual sequence classes, and test classes, and each of the sequence classes, virtual sequence classes, and test classes contains placeholders.

[0122] Receive user input information and extract the use case name based on the user input information;

[0123] Based on the template file path and the preset temporary file path, the pre-configured template file is copied to the preset temporary top-level file to obtain the copied top-level file;

[0124] The top-level file is copied, and placeholders are scanned to obtain multiple placeholders to be replaced. Based on the use case name, the multiple placeholders to be replaced in the top-level file are replaced with use case names to obtain the replaced top-level file.

[0125] The replacement top-level file is validated to obtain the target top-level file, and the test case directory is constructed based on the target top-level file;

[0126] Once multiple test case directories have been constructed, the construction of UVM-based verification test cases is complete.

[0127] In the embodiments provided by this invention, it should be understood that the disclosed devices, systems, and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative, and actual implementations may have other classification methods.

[0128] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0129] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional modules.

[0130] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A method for constructing verification test cases based on UVM, characterized in that, The method includes: Extract the test case directories sequentially from the multiple preset test case directories, and identify the pre-configured template files and their paths in the test case directories. The pre-configured template files include: sequence classes, virtual sequence classes, and test classes, and each of the sequence classes, virtual sequence classes, and test classes contains placeholders. Receive user input information and extract the use case name based on the user input information; Based on the template file path and the preset temporary file path, the pre-configured template file is copied to the preset temporary top-level file to obtain the copied top-level file; The top-level file is copied, and placeholders are scanned to obtain multiple placeholders to be replaced. Based on the use case name, the multiple placeholders to be replaced in the top-level file are replaced with use case names to obtain the replaced top-level file. The replacement top-level file is validated to obtain the target top-level file, and the test case directory is constructed based on the target top-level file; Once multiple test case directories have been constructed, the construction of UVM-based verification test cases is complete.

2. The method for constructing UVM-based verification test cases as described in claim 1, characterized in that, The pre-configured template file includes a virtual task interface, which is used to build a logic programming module. The logic programming module is used to implement specific logic set by the user. The specific logic includes: data stimulus generation, timing control, and result checking.

3. The method for constructing UVM-based verification test cases as described in claim 2, characterized in that, The virtual task interface is the body code segment of the sequence class.

4. The method for constructing UVM-based verification test cases as described in claim 2, characterized in that, The virtual task interface is used to build logic programming modules, including: The user logic code file has been identified; The user logic code file is merged into the virtual task interface based on preset compilation instructions to obtain the logic programming module.

5. The method for constructing UVM-based verification test cases as described in claim 1, characterized in that, Before confirming the pre-configured template files and their paths in the test case directory, the method further includes: Multiple pre-configured UVM classes are generated based on placeholders. Each pre-configured UVM class is a sequence class, a virtual sequence class, or a test class. Each pre-configured UVM class includes a pre-configuration constructor and a pre-configuration registration macro. Both the pre-configuration constructor and the pre-configuration registration macro contain placeholders. The pre-configuration registration macro is either a component registration macro or an object registration macro. Generate pre-configured template files based on multiple pre-configured UVM classes.

6. The method for constructing UVM-based verification test cases as described in claim 5, characterized in that, After confirming the pre-configured template files and their paths in the test case directory, the method further includes: Identify the build_phase code segment of the test class in the pre-configured template file; When the build_phase code segment of the test class is run, the pre-built virtual sequencer is configured with the default sequence for main_phase based on the preset uvm_config_db and the virtual sequence class in the pre-configured template file. After the default sequence for main_phase is configured, when the main_phase code segment in the virtual sequencer is run, the virtual sequence class with the test case name replaced in the target top-level file will be executed through the virtual sequencer.

7. The method for constructing UVM-based verification test cases as described in claim 6, characterized in that, After confirming the pre-configured template files and their paths in the test case directory, the method further includes: Identify the body code segment of the virtual sequence class in the pre-configured template file; When the body code segment of the virtual sequence class is run, it is instantiated and pre-configured based on the sequence class in the pre-configuration template file. After instantiation and pre-configuration, the instantiation is completed through the pre-built UVM framework and the sequence class with the test case name replaced in the target top-level file.

8. The method for constructing UVM-based verification test cases as described in claim 1, characterized in that, The extraction of use case names based on user input information includes: Parse the user input to obtain the name of the UVM class; Extract the field from the name of the UVM class to obtain the use case name.

9. The method for constructing UVM-based verification test cases as described in claim 1, characterized in that, The step of verifying the replaced top-level file to obtain the target top-level file includes: Multiple checks are performed on the top-level file to obtain the check results, which include: check success and check failure. The multiple checks include: format check, template file check and placeholder check. If the verification result is a failure, an error message is generated based on the verification result. The top-level file to be replaced is adjusted according to the error message to obtain the target top-level file. If the verification result is successful, then the replaced top-level file is recorded as the target top-level file.

10. A UVM-based verification test case construction system, characterized in that, The system includes: The template file confirmation module is used to extract the test case directory sequentially from multiple preset test case directories, and confirm the pre-configured template file and template file path in the test case directory. The pre-configured template file includes: sequence class, virtual sequence class and test class, and the sequence class, virtual sequence class and test class all contain placeholders. The user parameter parsing module is used to receive user input information, extract the test case name based on the user input information, and copy the pre-configured template file to the preset temporary top-level file based on the template file path and the preset temporary file path to obtain the copied top-level file. The placeholder replacement module is used to scan for placeholders in the copied top-level file, obtain multiple placeholders to be replaced, and replace the multiple placeholders to be replaced in the copied top-level file with test case names based on the test case names, so as to obtain the replaced top-level file. The top-level file verification module is used to verify the replacement top-level file to obtain the target top-level file. Based on the target top-level file, the test case directory is constructed. When multiple test case directories have been constructed, the construction of UVM-based verification test cases is completed.

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