Quantum bit mapping method, apparatus, device, medium, and computer program product

Abstract

The application discloses a quantum bit mapping method, device, equipment, medium and computer program product, and the method comprises the following steps: calculating an initial quantum bit mapping according to the mutual relationship between quantum bits relied on by each logic gate in a quantum circuit; the initial quantum bit mapping is an initial mapping of a logical quantum bit to a physical quantum bit; generating a to-be-executed gate circuit set according to the execution dependency relationship between each logic gate in the quantum circuit; calculating the execution cost of each to-be-executed gate circuit in the to-be-executed gate circuit set based on the initial quantum bit mapping, selecting the to-be-executed gate circuit with the minimum execution cost as a target execution gate circuit; calculating the cost of different SWAP strategies of the target execution gate circuit based on a preset heuristic cost function, and determining an optimal quantum bit mapping according to the SWAP strategy with the minimum cost. The application significantly reduces the insertion of SWAP gates in the quantum circuit, thereby improving the efficiency and accuracy of quantum bit mapping.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a quantum bit mapping method, apparatus, device, medium, and computer program product. Background Technology

[0002] Qubit mapping is a key technique in quantum computing that maps logical qubits to physical qubits. Current qubit mapping methods often lack initial mapping or have poor initial mapping quality, making it difficult for subsequent optimizations to converge to the global optimum. Furthermore, they may require inserting a large number of swap gates to exchange quantum states, impacting the performance of quantum circuits. Summary of the Invention

[0003] The purpose of this invention is to provide a quantum bit mapping method, apparatus, device, medium, and computer program product. By initializing the mapping, it lays the foundation for finding the global optimal solution in the future. At the same time, it introduces a heuristic cost evaluation method and combines the execution characteristics of quantum circuits to optimize the quantum bit mapping process, which significantly reduces the insertion of SWAP gates in quantum circuits, thereby improving the efficiency and accuracy of quantum bit mapping.

[0004] To achieve the above objectives, embodiments of the present invention provide a quantum bit mapping method, comprising:

[0005] The initial qubit mapping is calculated based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends; the initial qubit mapping is the initial mapping from logical qubits to physical qubits.

[0006] Based on the execution dependencies between the logic gates in the quantum circuit, a set of gate circuits to be executed is generated.

[0007] Based on the initial qubit mapping, the execution cost of each gate circuit in the set of gate circuits to be executed is calculated, and the gate circuit with the lowest execution cost is selected as the target gate circuit.

[0008] Based on a preset heuristic cost function, the cost of different SWAP strategies for the target execution gate circuit is calculated, and the optimal qubit mapping is determined according to the SWAP strategy with the lowest cost.

[0009] As an improvement to the above scheme, the calculation of the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes:

[0010] Based on the interrelationships between the qubits upon which each logic gate in a quantum circuit depends, the initial qubit mapping is calculated using the ant colony algorithm.

[0011] As an improvement to the above scheme, the step of calculating the initial qubit mapping using the ant colony algorithm based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes:

[0012] Based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, an initial qubit mapping between the logical qubits and the physical qubits is initialized; wherein, each ant constructs an initial qubit mapping.

[0013] Calculate the distance between two physical qubits when the logic gate is executed under the initial qubit mapping;

[0014] The weight of each logic gate is determined based on the importance of each logic gate in the quantum circuit;

[0015] Based on the distance and the weight, an initial mapping optimization objective is constructed;

[0016] A global search is performed with the goal of minimizing the initial mapping to output the optimal initial qubit mapping.

[0017] As an improvement to the above scheme, the step of generating a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit includes:

[0018] Based on the execution dependencies between the logic gates in the quantum circuit, a directed acyclic graph is constructed; the nodes in the directed acyclic graph represent gate circuits, and the edges represent the execution order of the gate circuits.

[0019] Based on the directed acyclic graph, all nodes with an in-degree of 0 at the current time are selected to generate a set of gate circuits to be executed at the current time; the nodes with an in-degree of 0 represent gate circuits that have no dependencies and can be executed immediately.

[0020] As an improvement to the above scheme, the step of calculating the execution cost of each gate circuit in the set of gate circuits to be executed based on the initial qubit mapping, and selecting the gate circuit with the lowest execution cost as the target gate circuit, includes:

[0021] For each of the gates to be executed in the set of gates to be executed, calculate the minimum distance between two physical qubits when executed under the initial qubit mapping;

[0022] Based on a greedy strategy, the execution cost is estimated according to the minimum distance, and the gate circuit to be executed with the minimum execution cost is selected as the target execution gate circuit.

[0023] As an improvement to the above scheme, the step of calculating the cost of different SWAP strategies for the target execution gate circuit based on a preset heuristic cost function, and determining the optimal qubit mapping according to the SWAP strategy with the lowest cost, includes:

[0024] Based on a preset heuristic cost function, calculate the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit;

[0025] Calculate the total cost of each SWAP strategy based on the current gate execution cost, the SWAP gate overhead, and the future gate cost of each SWAP strategy;

[0026] The optimal qubit mapping is determined by selecting the SWAP strategy with the lowest total cost from all the SWAP strategies.

[0027] As an improvement to the above scheme, the calculation of the current gate execution cost, SWAP gate overhead, and future gate cost of each SWAP strategy of the target execution gate circuit based on a preset heuristic cost function includes:

[0028] For each of the SWAP strategies of the target execution gate circuit, the current gate execution cost, SWAP gate overhead, and future gate cost are calculated hierarchically based on a preset heuristic cost function and through a layer weight decay factor.

[0029] This invention also provides a quantum bit mapping device, comprising:

[0030] The initial mapping module is used to calculate the initial qubit mapping based on the interrelationships between the qubits on which each logic gate in the quantum circuit depends; the initial qubit mapping is the initial mapping from logical qubits to physical qubits.

[0031] The gate circuit module to be executed is used to generate a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit.

[0032] The gate circuit screening module is used to calculate the execution cost of each gate circuit to be executed in the set of gate circuits to be executed based on the initial quantum bit mapping, and select the gate circuit to be executed with the minimum execution cost as the target gate circuit;

[0033] The optimal mapping module is used to calculate the cost of different SWAP strategies for the target execution gate circuit based on a preset heuristic cost function, and determine the optimal qubit mapping according to the SWAP strategy with the lowest cost.

[0034] This invention also provides a terminal device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the quantum bit mapping method described in any of the preceding claims.

[0035] This invention also provides a computer-readable storage medium, which includes a stored computer program, wherein the computer program, when running, controls the device where the computer-readable storage medium is located to execute the quantum bit mapping method described above.

[0036] This invention also provides a computer program product, which includes a computer program or computer instructions. When the computer program or computer instructions are executed by a processor, they implement the quantum bit mapping method described above.

[0037] Compared to existing technologies, the beneficial effects of the qubit mapping method, apparatus, device, medium, and computer program product provided by this invention are as follows: An initial qubit mapping is calculated based on the interrelationships between the qubits upon which each logic gate in a quantum circuit depends; this initial qubit mapping is an initial mapping from logical qubits to physical qubits; a set of gate circuits to be executed is generated based on the execution dependencies between the logic gates in the quantum circuit; based on the initial qubit mapping, the execution cost of each gate circuit to be executed in the set is calculated, and the gate circuit with the lowest execution cost is selected as the target execution gate circuit; based on a preset heuristic cost function, the cost of different SWAP strategies for the target execution gate circuit is calculated, and the optimal qubit mapping is determined based on the SWAP strategy with the lowest cost. This invention lays the foundation for finding the global optimal solution by initializing the mapping, while introducing a heuristic cost evaluation method and combining it with the execution characteristics of the quantum circuit to optimize the qubit mapping process, significantly reducing the insertion of SWAP gates in the quantum circuit, thereby improving the efficiency and accuracy of qubit mapping. Attached Figure Description

[0038] Figure 1 This is a flowchart illustrating a preferred embodiment of a quantum bit mapping method provided by the present invention;

[0039] Figure 2 This is a schematic diagram of a preferred embodiment of a quantum bit mapping device provided by the present invention;

[0040] Figure 3 This is a schematic diagram of a preferred embodiment of a terminal device provided by the present invention. Detailed Implementation

[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] Please see Figure 1 , Figure 1 This is a flowchart illustrating a preferred embodiment of a qubit mapping method provided by the present invention. The qubit mapping method includes:

[0043] S1, Calculate the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends; the initial qubit mapping is the initial mapping from logical qubits to physical qubits;

[0044] S2, Generate a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit;

[0045] S3. Based on the initial qubit mapping, calculate the execution cost of each gate circuit in the set of gate circuits to be executed, and select the gate circuit with the lowest execution cost as the target gate circuit.

[0046] S4. Based on a preset heuristic cost function, calculate the cost of different SWAP strategies for the target execution gate circuit, and determine the optimal qubit mapping according to the SWAP strategy with the lowest cost.

[0047] Specifically, this embodiment of the invention first analyzes the dependencies between logic gates and qubits in the quantum circuit, mapping abstract logical qubits to specific physical qubits to form an initial qubit mapping, providing a foundation for subsequent qubit mapping optimization. The quantum circuit is a computational model composed of a series of quantum logic gates arranged in chronological order, used to implement quantum algorithms. A logic gate (Quantum Gate) refers to a unit that operates on qubits, and is divided into single-qubit gates (such as Hadamard, H gates) and multi-qubit gates (such as CNOT gates). Multi-qubit gates require explicit specification of control bits and target bits (e.g., in CNOT(c,t), c is the control and t is the target). The initial qubit mapping is the initial mapping from logical qubits to physical qubits. Then, because there are dependencies between logic gates in the quantum circuit, the execution of some CNOT gates depends on some preceding CNOT gates. Therefore, this embodiment of the invention generates a set of gate circuits to be executed based on the execution dependencies between various logic gates in the quantum circuit. Secondly, based on the initial qubit mapping, the execution cost of each gate in the set of gates to be executed is calculated, and the gate with the lowest execution cost is selected as the target gate. Finally, based on a preset heuristic cost function, the cost of different SWAP strategies for the target gate is calculated, and the optimal qubit mapping is determined according to the SWAP strategy with the lowest cost.

[0048] This invention lays the foundation for finding the global optimum by initializing the mapping, and introduces a heuristic cost evaluation method combined with the execution characteristics of quantum circuits to optimize the qubit mapping process. This significantly reduces the insertion of SWAP gates in the quantum circuit, thereby improving the efficiency and accuracy of qubit mapping. Furthermore, unlike traditional schemes that require high computational resources or rely on dedicated hardware (such as annealing computers or quantum computers) for the constructed mapping model, and that often fail to utilize computational resources efficiently, this invention can run on conventional CPUs or GPUs without relying on dedicated hardware. Based on a heuristic lookahead algorithm, it can perform path searching simultaneously, thereby reducing processing time and improving resource utilization to some extent.

[0049] In another preferred embodiment, step S1, calculating the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, includes:

[0050] S11. Based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, the ant colony algorithm is used to calculate the initial qubit mapping.

[0051] Specifically, the Ant Colony Optimization (ACO) algorithm performs exceptionally well in solving pathfinding problems, exhibiting strong global optimization capabilities. Based on this, this embodiment of the invention employs the ACO algorithm to calculate the initial qubit mapping. By simulating the foraging behavior of ants, the ACO algorithm can better explore the global optimum in a large-scale, high-dimensional search space, providing a good starting point for subsequent searches.

[0052] The embodiments of the present invention employ the ant colony algorithm to calculate the initial qubit mapping, which can obtain a better initial state, laying the foundation for subsequent search and mapping processes and improving the execution efficiency of quantum circuits.

[0053] In another preferred embodiment, S11, the step of calculating the initial qubit mapping using the ant colony algorithm based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes:

[0054] S111, Based on the interrelationship between the qubits upon which each logic gate in the quantum circuit depends, initialize the initial qubit mapping between the logical qubits and the physical qubits; wherein, each ant constructs an initial qubit mapping;

[0055] S112, Calculate the distance between two physical qubits when executing the logic gate under the initial qubit mapping;

[0056] S113, determine the weight of each logic gate according to the importance of each logic gate in the quantum circuit;

[0057] S114, construct an initial mapping optimization objective based on the distance and the weight;

[0058] S115, perform a global search to minimize the initial mapping optimization objective and output the optimal initial qubit mapping.

[0059] Specifically, in this embodiment of the invention, when calculating the initial qubit mapping using the ant colony algorithm, firstly, an initial qubit mapping between logical qubits and physical qubits is initialized based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends. Each ant constructs one initial qubit mapping. Then, the distance between two physical qubits when executing a logic gate under the initial qubit mapping is calculated, and a fitness function is constructed based on the distance-quantized cost. For example, let... and Let these represent the sets of physical qubits and logical qubits, respectively.

[0060] ;

[0061] ;

[0062] The fitness function is defined as follows:

[0063] ；

[0064] in, Indicates the initial qubit mapping Execution logic gate The cost, This represents two physical qubits when executing a logic gate under the initial qubit mapping. The distance between them, this distance function quantifies the physical distance cost.

[0065] It should be noted that a good mapping should reduce the number of additional swap operations. Furthermore, as additional swap operations are executed, the mapping relationship of the logic bits continuously changes. Therefore, the influence of the initial mapping on each logic gate gradually decreases as the logic gates are executed later in the order. Thus, this embodiment of the invention needs to give more consideration to logic gates with earlier execution orders when generating the initial mapping. To address this issue, this embodiment of the invention employs a weighting strategy, determining the weight of each logic gate based on its importance in the quantum circuit, thereby enhancing the influence of relatively early-positioned logic gates in solving the initial mapping and assigning higher weights to the circuit components further forward.

[0066] For example, It is a logic gate The weight of a gate represents its importance in the circuit. Gates located earlier in the circuit have a greater weight. The definition is as follows:

[0067] ;

[0068] in, It is the first in the circuit A logic gate, This is a positive parameter used to control the exponential decay rate. The reason why the weight decay strategy is set to be exponential is that, based on research on practical problems and experimental topologies, its computational complexity increases exponentially with the layer circuit and the order of logic gates in the circuit. This can better reflect the impact of the initial mapping on the subsequent layer circuits.

[0069] The ant colony algorithm aims to minimize the weighted cost of all gate operations in a quantum circuit by constructing an initial mapping optimization objective based on distance and weights. The goal is to perform a global search to find an optimal initial qubit mapping by minimizing this initial mapping optimization objective. By selecting appropriate mappings, the number of auxiliary operations (such as swaps) can be reduced, thereby optimizing the execution efficiency of quantum circuits. For example, the optimal solution for the initial qubit mapping obtained in this embodiment of the invention is represented as follows:

[0070] ;

[0071] in, This represents the final, optimal initial qubit mapping. It is the mapping function. One example is mapping logical bits to physical bits. This means finding the mapping that minimizes the optimization objective of the initial mapping. In other words, it means finding a mapping through the optimization process that minimizes the total cost. Representation of logic gates The weights reflect the logic gates Importance in quantum circuits. Logic gates placed earlier in the sequence are given higher weights to highlight their importance in the initial qubit mapping. Representation of logic gates The total number. Indicates the initial mapping Below, logic gates The execution cost is usually quantified by the distance between physical qubits.

[0072] The embodiments of this invention employ the ant colony algorithm, which utilizes pheromone guidance. Multiple individual ants can simultaneously and in parallel search the solution space, cooperating and sharing information. This parallel search method is more suitable for large-scale, high-dimensional optimization problems and can improve solution efficiency.

[0073] In yet another preferred embodiment, step S2 generates a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit, including:

[0074] S21, construct a directed acyclic graph based on the execution dependencies between the logic gates in the quantum circuit; the nodes in the directed acyclic graph represent gate circuits, and the edges represent the execution order of the gate circuits;

[0075] S22, based on the directed acyclic graph, select all nodes with an in-degree of 0 at the current time and generate a set of gate circuits to be executed at the current time; the nodes with an in-degree of 0 represent gate circuits that have no dependencies and can be executed immediately.

[0076] It's important to note that logic gates in quantum circuits exhibit sequential dependencies; the execution of certain CNOT gates depends on the execution of preceding CNOT gates. This characteristic allows the execution order of gates to be modeled as a Directed Acyclic Graph (DAG). In a DAG, each node represents a gate, and directed edges represent the execution order of these gates. A gate can be executed if and only if it has no incoming edges or if all nodes associated with its incoming edges have been executed.

[0077] This invention constructs a directed acyclic graph (DAG) based on the execution dependencies between the logic gates in a quantum circuit. For example, each logic gate in the quantum circuit is represented as a node in the DAG. If the execution of logic gate A depends on logic gate B, a directed edge is added between node A and node B, pointing from B to A. For example, the DAG is represented as follows:

[0078] ;

[0079] in, G It is a DAG. V It is a set of nodes, representing logic gates; E It is a set of edges, representing dependencies.

[0080] Based on the directed acyclic graph, all nodes with an in-degree of 0 at the current time are selected. These nodes represent gate circuits that have no current dependencies and can be executed immediately.

[0081] ;

[0082] in, Indicates time t An executable set of gate circuits. This represents the in-degree of node v.

[0083] In another preferred embodiment, step S3, based on the initial qubit mapping, calculates the execution cost of each gate circuit in the set of gate circuits to be executed, and selects the gate circuit with the lowest execution cost as the target gate circuit, including:

[0084] S31, For each of the gate circuits to be executed in the set of gate circuits to be executed, calculate the minimum distance between two physical qubits when executed under the initial qubit mapping;

[0085] S32, based on a greedy strategy, estimate the execution cost according to the minimum distance, and select the gate circuit to be executed with the minimum execution cost as the target execution gate circuit.

[0086] It should be noted that for circuits containing a large number of logical and physical qubits, multiple executable gates may exist simultaneously. When some gates cannot be executed directly (requiring additional swap operations), different swap strategies will lead to different changes in the mapping, thus affecting the execution of subsequent gates. To address this issue, this invention proposes a heuristic look-ahead algorithm to determine the optimal qubit mapping. To ensure the universality of the solution and effectively handle various situations, this invention designs a two-stage algorithm selection strategy. This algorithm strategy performs two selections during the look-ahead process, one for the currently executable gates and the other for potential mapping transformations. This algorithm strategy can effectively improve the adaptability of the algorithm, enabling it to select a better computational strategy when facing different situations, thereby improving the overall performance of the system.

[0087] Specifically, in the first stage of this embodiment, based on the execution cost of each gate circuit in the set of gate circuits to be executed, the gate circuit with the lowest execution cost is selected as the target gate circuit. First, for each gate circuit in the set of gate circuits to be executed, the minimum distance between two physical qubits when executed under the initial qubit mapping is calculated. For example, for each executable gate circuit, the minimum distance requiring a swap operation under the current mapping is calculated using the following formula:

[0088] ;

[0089] in, Represents logic gate circuits, Represents a mapping function. Represents a physical quantum bit.

[0090] Then, based on the greedy strategy and the estimated execution cost according to the minimum distance, the gate circuit to be executed with the minimum execution cost is selected as the target gate circuit, that is:

[0091] ;

[0092] in, This means that after the calculation is completed, the gate circuit with the smallest distance, that is, the lowest execution cost, is selected as the target gate circuit.

[0093] In another preferred embodiment, step S4, based on a preset heuristic cost function, calculates the cost of different SWAP strategies for the target execution gate circuit, and determines the optimal qubit mapping according to the SWAP strategy with the lowest cost, including:

[0094] S41, based on a preset heuristic cost function, calculate the current gate execution cost, SWAP gate overhead, and future gate cost of each SWAP strategy of the target execution gate circuit;

[0095] S42, calculate the total cost of each SWAP strategy based on the current gate execution cost, the SWAP gate overhead, and the future gate cost of each SWAP strategy;

[0096] S43, Select the SWAP strategy with the minimum total cost from all the SWAP strategies to determine the optimal qubit mapping.

[0097] Specifically, in the second stage of this invention, a heuristic cost function is used to calculate and compare different SWAP strategies, and finally, the SWAP strategy with the lowest overall cost is selected to determine the optimal qubit mapping. For example, based on a preset heuristic cost function, this invention calculates the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit. Then, based on the current gate execution cost, SWAP gate overhead, and future gate cost of each SWAP strategy, the total cost of each SWAP strategy is calculated. Finally, the SWAP strategy with the lowest total cost is selected from all SWAP strategies to determine the optimal qubit mapping.

[0098] This invention presents a state selection mechanism based on a look-ahead algorithm. This mechanism not only examines the cost of the current state but also analyzes the costs of its sub-states to make more optimized decisions. Simultaneously, the algorithm employs a pruning mechanism, selectively discarding some unproductive state extensions to reduce the search space. Through the combination of these innovative technologies, the algorithm can find a near-optimal qubit mapping scheme in polynomial time, significantly reducing the insertion of SWAP gates and improving the execution speed and fidelity of quantum circuits. Furthermore, the algorithm dynamically adjusts the mapping relationship based on the physical mapping topology to ensure the execution of the quantum circuit. To this end, the algorithm uses a flexible heuristic cost function to evaluate the current state. This function not only considers the direct cost of the current state but also estimates the overhead required to complete the remaining circuitry, thus better guiding the algorithm to make optimization decisions.

[0099] In another preferred embodiment, step S41, based on a preset heuristic cost function, calculates the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit, including:

[0100] S411, for each of the SWAP strategies of the target execution gate circuit, the current gate execution cost, SWAP gate overhead, and future gate cost are calculated hierarchically based on a preset heuristic cost function and through a layer weight decay factor.

[0101] Specifically, in this embodiment of the invention, for each SWAP strategy of the target execution gate circuit, the execution cost of the current gate, the overhead of the SWAP gate, and the cost of the future gate are calculated hierarchically based on a preset heuristic cost function and a layer weight decay factor. For example, the heuristic cost function is:

[0102] ;

[0103] in, The layer weight decay factor is represented by k, which represents the weight of the k-th layer, i.e., the importance of that layer in the overall cost. It is a factorial decreasing sequence, specifically represented as follows:

[0104] .

[0105] Let represent the set of quantum gates at the k-th layer, containing all quantum gates executed at that layer.

[0106] Indicates a door In mapping The cost below represents the resources required to execute the gate.

[0107] The weight of the SWAP gate indicates its importance in the overall cost, as shown below:

[0108] ;

[0109] in It is the basic number of gates required to implement a SWAP gate.

[0110] d represents the diameter of the architecture diagram and the maximum distance between qubits in the quantum processor architecture.

[0111] This represents the number of basic gates required to implement a SWAP gate.

[0112] This represents the number of gates in the current logic circuit state, and the number of remaining unprocessed quantum gates.

[0113] This invention proposes a heuristic look-ahead algorithm. By introducing a heuristic cost evaluation method and combining it with the execution characteristics of quantum circuits, a decay weight model is designed. The ant colony algorithm is used as the initial mapping, thereby optimizing the quantum bit mapping process, significantly improving the efficiency and accuracy of circuit conversion, and showing better performance in finding the global optimal solution.

[0114] Accordingly, the present invention also provides a quantum bit mapping device capable of implementing all the processes of the quantum bit mapping method in the above embodiments.

[0115] Please see Figure 2 , Figure 2 This is a schematic diagram of a preferred embodiment of a quantum bit mapping device provided by the present invention. The quantum bit mapping device includes:

[0116] The initial mapping module 201 is used to calculate the initial qubit mapping based on the interrelationship between the qubits on which each logic gate in the quantum circuit depends; the initial qubit mapping is the initial mapping from logical qubits to physical qubits.

[0117] The gate circuit module 202 is used to generate a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit.

[0118] The gate circuit screening module 203 is used to calculate the execution cost of each gate circuit to be executed in the set of gate circuits to be executed based on the initial quantum bit mapping, and select the gate circuit to be executed with the minimum execution cost as the target gate circuit;

[0119] The optimal mapping module 204 is used to calculate the cost of different SWAP strategies for the target execution gate circuit based on a preset heuristic cost function, and determine the optimal qubit mapping according to the SWAP strategy with the lowest cost.

[0120] Preferably, the initial mapping module 201 is specifically used for:

[0121] Based on the interrelationships between the qubits upon which each logic gate in a quantum circuit depends, the initial qubit mapping is calculated using the ant colony algorithm.

[0122] Preferably, the step of calculating the initial qubit mapping using the ant colony algorithm based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes:

[0123] Based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, an initial qubit mapping between the logical qubits and the physical qubits is initialized; wherein, each ant constructs an initial qubit mapping.

[0124] Calculate the distance between two physical qubits when the logic gate is executed under the initial qubit mapping;

[0125] The weight of each logic gate is determined based on the importance of each logic gate in the quantum circuit;

[0126] Based on the distance and the weight, an initial mapping optimization objective is constructed;

[0127] A global search is performed with the goal of minimizing the initial mapping to output the optimal initial qubit mapping.

[0128] Preferably, the gate circuit module 202 to be executed is specifically used for:

[0129] Based on the execution dependencies between the logic gates in the quantum circuit, a directed acyclic graph is constructed; the nodes in the directed acyclic graph represent gate circuits, and the edges represent the execution order of the gate circuits.

[0130] Based on the directed acyclic graph, all nodes with an in-degree of 0 at the current time are selected to generate a set of gate circuits to be executed at the current time; the nodes with an in-degree of 0 represent gate circuits that have no dependencies and can be executed immediately.

[0131] Preferably, the gate circuit screening module 203 is specifically used for:

[0132] For each of the gates to be executed in the set of gates to be executed, calculate the minimum distance between two physical qubits when executed under the initial qubit mapping;

[0133] Based on a greedy strategy, the execution cost is estimated according to the minimum distance, and the gate circuit to be executed with the minimum execution cost is selected as the target execution gate circuit.

[0134] Preferably, the optimal mapping module 204 is specifically used for:

[0135] Based on a preset heuristic cost function, calculate the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit;

[0136] Calculate the total cost of each SWAP strategy based on the current gate execution cost, the SWAP gate overhead, and the future gate cost of each SWAP strategy;

[0137] The optimal qubit mapping is determined by selecting the SWAP strategy with the lowest total cost from all the SWAP strategies.

[0138] Preferably, the step of calculating the current gate execution cost, SWAP gate overhead, and future gate cost of each SWAP strategy of the target execution gate circuit based on a preset heuristic cost function includes:

[0139] For each of the SWAP strategies of the target execution gate circuit, the current gate execution cost, SWAP gate overhead, and future gate cost are calculated hierarchically based on a preset heuristic cost function and through a layer weight decay factor.

[0140] In specific implementations, the working principle, control process, and technical effects of the quantum bit mapping device provided in the embodiments of the present invention are the same as those of the quantum bit mapping method in the above embodiments, and will not be repeated here.

[0141] Please see Figure 3 , Figure 3 This is a schematic diagram of a preferred embodiment of a terminal device provided by the present invention. The terminal device includes a processor 301, a memory 302, and a computer program stored in the memory 302 and configured to be executed by the processor 301. When the processor 301 executes the computer program, it implements the quantum bit mapping method described in any of the above embodiments.

[0142] Preferably, the computer program can be divided into one or more modules / units (such as computer program 1, computer program 2, ...), and the one or more modules / units are stored in the memory 302 and executed by the processor 301 to complete the present invention. The one or more modules / units can be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program in the terminal device.

[0143] The processor 301 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor 301 can be any conventional processor. The processor 301 is the control center of the terminal device, connecting various parts of the terminal device through various interfaces and lines.

[0144] The memory 302 mainly includes a program storage area and a data storage area. The program storage area can store the operating system, applications required for at least one function, etc., and the data storage area can store related data, etc. In addition, the memory 302 can be a high-speed random access memory, or a non-volatile memory, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, and a flash card, etc., or the memory 302 can also be other volatile solid-state storage devices.

[0145] It should be noted that the aforementioned terminal devices may include, but are not limited to, processors and memory, as will be understood by those skilled in the art. Figure 3 The structural diagram is merely an example of the terminal device described above and does not constitute a limitation on the terminal device described above. It may include more or fewer components than shown in the diagram, or combine certain components, or use different components.

[0146] This invention also provides a computer-readable storage medium, which includes a stored computer program, wherein the computer program, when running, controls the device where the computer-readable storage medium is located to execute the quantum bit mapping method described in any of the above embodiments.

[0147] This invention also provides a computer program product, which includes a computer program or computer instructions. When the computer program or computer instructions are executed by a processor, they implement the quantum bit mapping method described in any of the above embodiments.

[0148] This invention provides a method, apparatus, device, medium, and computer program product for qubit mapping. It calculates an initial qubit mapping based on the relationships between the qubits upon which each logic gate in a quantum circuit depends; this initial qubit mapping is an initial mapping from logical qubits to physical qubits. A set of gate circuits to be executed is generated based on the execution dependencies between the logic gates in the quantum circuit. Based on the initial qubit mapping, the execution cost of each gate circuit in the set is calculated, and the gate circuit with the lowest execution cost is selected as the target execution gate circuit. Based on a preset heuristic cost function, the costs of different SWAP strategies for the target execution gate circuit are calculated, and the optimal qubit mapping is determined based on the SWAP strategy with the lowest cost. This invention lays the foundation for finding the global optimal solution by initializing the mapping, and by introducing a heuristic cost evaluation method and combining it with the execution characteristics of the quantum circuit to optimize the qubit mapping process, significantly reducing the insertion of SWAP gates in the quantum circuit, thereby improving the efficiency and accuracy of qubit mapping.

[0149] It should be noted that the system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, in the accompanying drawings of the system embodiments provided by this invention, the connection relationships between modules indicate that they have communication connections, which can be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement this without any creative effort.

[0150] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A quantum bit mapping method, characterized in that, include: Calculate the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends; The initial qubit mapping is an initial mapping from logical qubits to physical qubits; Based on the execution dependencies between the logic gates in the quantum circuit, a set of gate circuits to be executed is generated. Based on the initial qubit mapping, the execution cost of each gate circuit in the set of gate circuits to be executed is calculated, and the gate circuit with the lowest execution cost is selected as the target gate circuit. Based on a preset heuristic cost function, the costs of different SWAP strategies for the target execution gate circuit are calculated, and the optimal qubit mapping is determined according to the SWAP strategy with the lowest cost; the heuristic cost function is: ； in, The layer weight decay factor is represented by k, where k represents the weight of the k-th layer. Denotes the set of quantum gates at the k-th layer; Indicates a door In mapping The cost below; d represents the weight of the SWAP gate; d represents the diameter of the architecture diagram. This represents the number of basic gates required to implement a SWAP gate; Indicates the number of gates in the current logic circuit state; The step of calculating the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes: Based on the interrelationships between the qubits upon which each logic gate in a quantum circuit depends, the initial qubit mapping is calculated using the ant colony algorithm.

2. The quantum bit mapping method as described in claim 1, characterized in that, The calculation of the initial qubit mapping using the ant colony algorithm, based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, includes: Based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends, an initial qubit mapping between the logical qubits and the physical qubits is initialized; wherein, each ant constructs an initial qubit mapping. Calculate the distance between two physical qubits when the logic gate is executed under the initial qubit mapping; The weight of each logic gate is determined based on the importance of each logic gate in the quantum circuit; Based on the distance and the weight, an initial mapping optimization objective is constructed; A global search is performed with the goal of minimizing the initial mapping to output the optimal initial qubit mapping.

3. The quantum bit mapping method as described in claim 1, characterized in that, The step of generating a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit includes: Based on the execution dependencies between the logic gates in the quantum circuit, a directed acyclic graph is constructed; the nodes in the directed acyclic graph represent gate circuits, and the edges represent the execution order of the gate circuits. Based on the directed acyclic graph, all nodes with an in-degree of 0 at the current time are selected to generate a set of gate circuits to be executed at the current time; the nodes with an in-degree of 0 represent gate circuits that have no dependencies and can be executed immediately.

4. The quantum bit mapping method as described in claim 1, characterized in that, The step of calculating the execution cost of each gate circuit in the set of gate circuits to be executed based on the initial qubit mapping, and selecting the gate circuit with the lowest execution cost as the target gate circuit, includes: For each of the gates to be executed in the set of gates to be executed, calculate the minimum distance between two physical qubits when executed under the initial qubit mapping; Based on a greedy strategy, the execution cost is estimated according to the minimum distance, and the gate circuit to be executed with the minimum execution cost is selected as the target execution gate circuit.

5. The quantum bit mapping method as described in claim 1, characterized in that, The process of calculating the cost of different SWAP strategies for the target execution gate circuit based on a preset heuristic cost function, and determining the optimal qubit mapping according to the SWAP strategy with the lowest cost, includes: Based on a preset heuristic cost function, calculate the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit; Calculate the total cost of each SWAP strategy based on the current gate execution cost, the SWAP gate overhead, and the future gate cost of each SWAP strategy; The optimal qubit mapping is determined by selecting the SWAP strategy with the lowest total cost from all the SWAP strategies.

6. The quantum bit mapping method as described in claim 5, characterized in that, The calculation of the current gate execution cost, SWAP gate overhead, and future gate cost for each SWAP strategy of the target execution gate circuit, based on a preset heuristic cost function, includes: For each of the SWAP strategies of the target execution gate circuit, the current gate execution cost, SWAP gate overhead, and future gate cost are calculated hierarchically based on a preset heuristic cost function and through a layer weight decay factor.

7. A quantum bit mapping device, characterized in that, include: The initial mapping module is used to calculate the initial qubit mapping based on the interrelationships between the qubits on which each logic gate in the quantum circuit depends. The initial qubit mapping is an initial mapping from logical qubits to physical qubits; The gate circuit module to be executed is used to generate a set of gate circuits to be executed based on the execution dependencies between the logic gates in the quantum circuit. The gate circuit screening module is used to calculate the execution cost of each gate circuit to be executed in the set of gate circuits to be executed based on the initial quantum bit mapping, and select the gate circuit to be executed with the minimum execution cost as the target gate circuit to be executed. The optimal mapping module is used to calculate the cost of different SWAP strategies for the target execution gate circuit based on a preset heuristic cost function, and determine the optimal qubit mapping according to the SWAP strategy with the lowest cost; the heuristic cost function is: ； in, The layer weight decay factor is represented by k, where k represents the weight of the k-th layer. Denotes the set of quantum gates at the k-th layer; Indicates a door In mapping The cost below; d represents the weight of the SWAP gate; d represents the diameter of the architecture diagram. This represents the number of basic gates required to implement a SWAP gate; Indicates the number of gates in the current logic circuit state; The step of calculating the initial qubit mapping based on the interrelationships between the qubits upon which each logic gate in the quantum circuit depends includes: Based on the interrelationships between the qubits upon which each logic gate in a quantum circuit depends, the initial qubit mapping is calculated using the ant colony algorithm.

8. A terminal device, characterized in that, The device includes a processor and a memory, the memory storing a computer program configured to be executed by the processor, wherein the processor, when executing the computer program, implements the qubit mapping method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the device containing the computer-readable storage medium executes the computer program, it implements the quantum bit mapping method as described in any one of claims 1 to 6.

10. A computer program product, characterized in that, The computer program product includes a computer program or computer instructions, which, when executed by a processor, implement the quantum bit mapping method as described in any one of claims 1 to 6.

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