Gain control method, electronic device, storage medium and program product

Abstract

The invention provides a gain control method, electronic equipment, a storage medium and a program product, and relates to the technical field of communication. According to the method, the average power of the set signal length is counted in the gain adjustment period, gain control is carried out according to the average power, and accurate adjustment of the signal power can be achieved. Moreover, the signal duration is less than the length of one time slot, so that the power can be counted and the gain control can be carried out in a shorter duration instead of waiting for the completion of the power statistics of the whole time slot frame, and the interference can be more quickly responded and the gain can be more quickly adjusted by shortening the statistical period and adjusting the statistical period. Therefore, the problem that signal demodulation is affected due to ADC saturation caused by too high signal power is prevented.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more specifically, to a gain control method, electronic device, storage medium, and program product. Background Technology

[0002] In today's wireless communication field, signal transmission between terminal devices and base stations faces numerous challenges. Among these, the fluctuation of the received power of terminal devices is particularly prominent. This fluctuation mainly stems from two factors: first, changes in the physical environment between the terminal device and the base station; and second, differences in resource scheduling within the communication system.

[0003] On the one hand, in real-world usage scenarios, terminal devices frequently encounter the appearance and disappearance of obstructions. For example, when a terminal device moves from the shadow of a building to an open area, or vice versa, the received signal power can change dramatically in an instant. Furthermore, the distance between the terminal device and the base station is also dynamic. When the terminal device is closer to the base station, the received signal power increases; conversely, when the terminal device is farther from the base station, especially at the cell edge, the signal power decreases. These factors all contribute to the difficulty in maintaining a stable received signal power for the terminal device.

[0004] On the other hand, in advanced communication systems like 5G NR (New Radio), base stations dynamically allocate resource blocks based on the needs of different users and channel conditions. This means that the number of resource blocks allocated to terminal devices by the base station may vary at different times. Since the number of resource blocks directly affects the signal transmission power, this dynamic scheduling also causes fluctuations in the received power of the terminal device.

[0005] To address this issue and ensure stable signal reception by terminal devices, Automatic Gain Control (AGC) technology is widely used. It plays a crucial role in wireless communication systems.

[0006] Currently, common AGC implementations primarily rely on slot-based gain adjustment. In NR systems, data transmission is organized in slot-based units. This approach uses the signal power of a particular slot as a reference to calculate the gain adjustment amount and applies it to subsequent slots. However, this approach has significant limitations.

[0007] AGC needs to calculate the gain adjustment at the end of one slot before it can be applied to subsequent slots. This means that in cases of rapid changes in signal power, AGC's response will have a slot-long time interval. For example, when a terminal device suddenly moves from a deep shadow area to an open area, the signal power rises sharply in a short period of time. However, AGC cannot immediately adjust the gain according to the new signal power, which may result in the terminal receiving excessive signal power during this delay. This could lead to saturation of the analog-to-digital converter (ADC), causing demodulation failure in that slot and affecting communication quality. Summary of the Invention

[0008] The purpose of this application is to provide a gain control method, electronic device, storage medium, and program product to improve the problem that in the prior art, power statistics and gain adjustment performed on a slot-by-slot basis may lead to slot demodulation failure and affect communication quality.

[0009] In a first aspect, embodiments of this application provide a gain control method applied to a terminal, the method comprising:

[0010] Within the gain adjustment period, the average power of the received signal with a set signal length is statistically analyzed, wherein the gain adjustment period is greater than the signal duration corresponding to the set signal length, and the signal duration is less than the length of a time slot;

[0011] Gain control is performed on the signal within the gain adjustment period based on the average power.

[0012] In the above implementation process, by statistically analyzing the average power of a set signal length within the gain adjustment period and using this average power for gain control, precise adjustment of the signal power can be achieved. Furthermore, since the signal duration is shorter than the length of a time slot, power statistics and gain control can be performed within a shorter time frame, rather than waiting for the power statistics of the entire time slot frame to be completed. By shortening the statistical period and adjusting accordingly, a more rapid response to interference can be achieved, adjusting the gain to prevent excessively high signal power from causing ADC saturation and thus affecting signal demodulation.

[0013] Optionally, the step of performing gain control on the signal within the gain adjustment period based on the average power includes:

[0014] Calculate the gain adjustment value based on the average power and the target power;

[0015] The target analog gain and target digital gain are determined based on the aforementioned gain adjustment values;

[0016] Gain control is performed on the signal within the gain adjustment period according to the target analog gain and the target digital gain.

[0017] In the above implementation process, by accurately calculating the gain adjustment value and decomposing it into target analog gain and target digital gain, precise control of the signal within the gain adjustment period is achieved. This method not only dynamically adjusts the gain according to the actual power of the signal, ensuring that the signal power is maintained within the target range, but also improves the flexibility and accuracy of gain adjustment through the synergistic effect of analog and digital gains.

[0018] Optionally, before calculating the average power of the received signal with a set signal length during the gain adjustment period, the method further includes:

[0019] Detect the frame header position of the received signal;

[0020] The position after offsetting the frame header position by a set length is determined as the starting time of the first gain adjustment cycle.

[0021] In the above implementation, by detecting the frame header position before calculating the average power and determining the position after offsetting the frame header position by a set length as the start time of the first gain adjustment cycle, it is possible to ensure that the gain adjustment cycle is synchronized with the frame structure. This not only improves the accuracy and stability of gain adjustment but also avoids synchronization errors or other problems caused by conflicts between gain adjustment and frame header processing.

[0022] Optionally, the step of performing gain control on the signal within the gain adjustment period based on the average power includes:

[0023] After the first detection that the statistically calculated average power exceeds the signal power threshold, gain control is performed on the signal within the gain adjustment period based on the average power.

[0024] In the above implementation process, by starting gain control only after the average power exceeds the signal power threshold for the first time, it is possible to effectively avoid false triggering of gain adjustment due to short-term signal fluctuations or noise interference.

[0025] Optionally, the method further includes:

[0026] During the gain hold period, the current gain of the signal during the gain hold period is maintained, wherein the signal location in which the gain hold period is effective in the received signal includes the signal location where the scheduling data is located in the received signal.

[0027] In the above implementation process, by precisely setting the gain hold period according to the signal location of the scheduling data, the signal gain is kept stable during the critical data transmission phase, thereby improving the reliability and accuracy of signal demodulation.

[0028] Optionally, the method further includes:

[0029] The received signal is gain controlled according to the gain control strategy in gain-locked state or gain-unlocked state. The gain control strategy in gain-locked state is to maintain the current gain of the received signal. The gain control strategy in gain-unlocked state is to control the gain of the signal in the gain adjustment period based on the average power of the set signal length in each gain adjustment period.

[0030] In the above implementation process, in the gain-locked state, the current gain of the received signal is maintained, thereby ensuring that the gain remains unchanged when the signal is stable and avoiding unnecessary gain adjustments that could affect the stability of signal processing. In the gain-unlocked state, gain control is performed based on the statistical average power, enabling rapid response to changes in signal power and ensuring that the signal power remains within the target range.

[0031] Optionally, the gain-locked state is determined by:

[0032] When the lock enable flag is detected to indicate an enabled state, it is determined whether the count of gain adjustments has reached the minimum number of adjustments, wherein the number of gain adjustments is counted after each gain control of the signal;

[0033] If the condition is met, the lock state will be set to gain lock state.

[0034] In the above implementation process, the gain lock state is determined by checking whether the minimum number of gain adjustments has been reached, ensuring that the system enters a stable state after a certain number of gain adjustments. This mechanism avoids premature lock-up, which would prevent the system from adapting to continuous signal changes, and also prevents frequent gain adjustments from affecting system stability.

[0035] Optionally, the gain-locked state is determined by:

[0036] When the lock enable flag is detected to indicate an disabled state, if the number of times the difference between the average power of the set signal length and the target power is less than the lock threshold reaches the first set minimum number, the lock state is set to gain lock state.

[0037] In the above implementation process, the difference between the average power and the target power is monitored to determine whether to re-enter the gain-locked state. This mechanism ensures that the system locks the gain promptly after the signal power stabilizes, avoiding frequent lock-and-unlock operations caused by brief signal fluctuations, thereby improving system stability.

[0038] Optionally, the gain unlock state is determined by the following method:

[0039] If the number of times the difference between the average power of the set signal length and the target power exceeds the unlock threshold reaches the second set minimum number, and the number of times the gain adjustment cycle is counted reaches the minimum hold number, then the locked state is set to the gain unlock state.

[0040] In the above implementation process, the system determines whether to enter a gain unlock state by comprehensively considering the number of times the difference between the average power and the target power exceeds the unlock threshold and the number of gain adjustment cycles. This mechanism ensures that the system only triggers unlock when the signal power continuously deviates from the target power and meets certain time conditions, avoiding misjudgment due to short-term signal fluctuations.

[0041] Optionally, after setting the locked state to a gain-unlocked state, the method further includes:

[0042] If the moment when the locked state is set to the gain unlocked state occurs during the gain hold period, then the following step is executed: maintain the current gain of the signal during the gain hold period.

[0043] In the above implementation, after entering the gain unlock state, if the current time is within the gain hold period, the current gain of the signal within that period is maintained. This mechanism ensures that even in the unlock state, the system will not adjust the gain of the signal transmitting scheduling data, thereby avoiding the risk of demodulation failure.

[0044] Secondly, embodiments of this application provide a gain control device applied to a terminal, the device comprising:

[0045] The power statistics module is used to calculate the average power of a set signal length in the received signal within a gain adjustment period, wherein the gain adjustment period is greater than the signal duration corresponding to the set signal length, and the signal duration is less than the length of a time slot.

[0046] A gain control module is used to control the gain of the signal within the gain adjustment period based on the average power.

[0047] Thirdly, embodiments of this application provide an electronic device, including a processor and a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the steps of the method provided in the first aspect above are performed.

[0048] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the method provided in the first aspect above.

[0049] Fifthly, embodiments of this application provide a computer program product, including computer program instructions, which, when read and executed by a processor, perform the steps of the method provided in the first aspect above.

[0050] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing embodiments of this application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0051] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This application provides a schematic diagram of a system architecture for the application of this solution.

[0053] Figure 2 A flowchart of a gain control method provided in an embodiment of this application;

[0054] Figure 3 A timing diagram illustrating gain control provided in an embodiment of this application;

[0055] Figure 4 A structural block diagram of a gain control device provided in an embodiment of this application;

[0056] Figure 5 This is a schematic diagram of the structure of an electronic device for performing a gain control method, provided as an embodiment of this application. Detailed Implementation

[0057] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0058] It should be noted that the terms "system" and "network" in the embodiments of this invention can be used interchangeably. "Multiple" refers to two or more; therefore, in the embodiments of this invention, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0059] It should also be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0060] The technical solution of this application can be applied to non-terrestrial network (NTN) systems such as satellite communication systems and high altitude platform station (HAPS) communication, for example, integrated communication and navigation (ICaN) systems and global navigation satellite systems (GNSS).

[0061] The technical solution of this application can also be applied to traditional mobile communication systems, such as: the mobile communication system can be a fourth-generation (4G) communication system (e.g., long term evolution (LTE) system), a worldwide interoperability for microwave access (WiMAX) communication system, a fifth-generation (5G) communication system (e.g., new radio (NR) system), and future mobile communication systems, etc.

[0062] The system architecture or scenario primarily applied in this application is as follows: Figure 1 As shown, this includes base stations and terminals. Base stations can be in New Radio (NR) systems, such as New Generation Node B (gNodeB), etc.

[0063] The terminals mentioned in the embodiments of this application include various handheld devices, vehicle-mounted devices, wearable devices, computing devices, or other processing devices connected to a wireless modem with wireless communication functions. Specifically, they may refer to user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user device. Terminals can also be satellite phones, cellular phones, smartphones, wireless data cards, wireless modems, machine-type communication devices, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, in-vehicle devices or wearable devices, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical care, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, terminal devices in 5G networks or future communication networks, etc.

[0064] This application provides a gain control method that achieves precise adjustment of signal power by statistically analyzing the average power of a set signal length within a gain adjustment period and performing gain control accordingly. Furthermore, since the signal duration is shorter than the length of a time slot, power statistics and gain control can be performed within a shorter time frame, rather than waiting for the power statistics of the entire time slot frame to be completed. By shortening the statistical period and adjusting accordingly, a more rapid response to interference can be achieved, and the gain can be adjusted to prevent excessively high signal power from causing ADC saturation and affecting signal demodulation.

[0065] The method described in this application can be applied to a gain control module in a terminal. This gain control module is an AGC module, primarily used for gain control of the signals received by the terminal. Some parameters involved in this solution, such as the gain adjustment period, set signal length, target power, signal power threshold, and gain hold period, are configured by the processor in the terminal and assigned to the gain control module. For ease of description, the following embodiments use the AGC module as the execution entity.

[0066] Please refer to Figure 2 , Figure 2 A flowchart of a gain control method provided in this application embodiment, the method including the following steps:

[0067] Step S110: During the gain adjustment period, calculate the average power of the received signal with the set signal length.

[0068] After receiving the signal from the base station, the terminal can first submit the signal to the processor for relevant processing, such as identifying the signal type and frame format. Then, the processor transmits the signal to the AGC module for gain control. The signal after gain control processing can be input to subsequent modules such as the analog-to-digital conversion module and the demodulation module for corresponding processing.

[0069] After receiving the signal from the processor, the AGC module can perform gain control according to the configured gain control strategy. This includes obtaining the pre-configured gain adjustment period and signal power threshold. The AGC module samples the signal at a preset sampling rate, acquires signal samples, identifies the effective position of the gain adjustment period in the received signal, and calculates the average power of the set signal length within the gain adjustment period.

[0070] The gain adjustment period refers to the length of the signal for which gain adjustment takes effect, measured in the number of sampling points. The set signal length refers to the length of data used to statistically analyze signal power, also measured in the number of sampling points. For example, a gain adjustment period of 2048 points and a set signal length of 2000 points means that for the received signal, gain control is performed every 2048 points, and the average power of the 2000 sampling points within that period is collected during the control process.

[0071] In this context, the gain adjustment period is greater than the signal duration corresponding to the set signal length, while the signal duration is less than the length of a time slot. This can be understood as the number of sampling points in the gain adjustment period being greater than the number of sampling points in the set signal length, and the number of sampling points in the set signal length being less than the number of sampling points in a time slot.

[0072] A time slot is a unit of time for receiving and transmitting signals. The length of a time slot may vary in different communication systems. When a base station sends a signal to a terminal, it divides the radio resources into multiple discrete intervals in time. Each interval is called a time slot. A time slot contains multiple symbols, which are the basic transmission units in the signal transmission and are used to carry modulated data. The signals sent by the base station are organized according to a predetermined time slot structure.

[0073] The reason for setting a gain adjustment period greater than the signal duration corresponding to the set signal length is that after collecting the power of the signal points of the set signal length, some time is still needed to calculate the average power and compare the thresholds. Therefore, the gain adjustment period can be slightly larger than the set signal length. As for the difference between the gain adjustment period and the set signal length, it can be determined according to the computing power of the AGC module. If the computing power is strong, power calculation and threshold comparison can be performed in a very short time, so the difference can be smaller. If the computing power is weak, it takes longer to calculate, so the difference needs to be larger.

[0074] Setting the number of sampling points for the signal length to be less than the number of sampling points in a time slot shortens the gain adjustment time, allowing for timely gain adjustments and keeping the signal power within the ADC's processing range, thus preventing ADC saturation. For example, when the system encounters strong interference, a normally long power statistics period (such as one slot) might not be able to respond promptly to changes in signal power. However, shortening the period allows for a faster response to interference, adjusting the gain to prevent excessive information power from causing ADC problems and affecting signal demodulation.

[0075] In some implementations, if the signal is transmitted in slots in an NR system, the gain adjustment period can be determined using one slot as the gain adjustment period, i.e., the number of sampling points in one slot. This way, gain control is performed on a slot-by-slot basis. However, in this scheme, the gain adjustment is based on the average power of a set signal length within that slot, rather than the power of previous slots. Alternatively, in other systems, a whole frame of signal can be used as the gain adjustment period.

[0076] To obtain the average power of a signal within a given signal length, the mean square method or other suitable power calculation methods can be used.

[0077] Step S120: Perform gain control on the signal within the gain adjustment period based on the average power.

[0078] During gain adjustment, the required gain adjustment amount is calculated and then applied to the signal within the gain adjustment cycle for gain control. After completing one gain adjustment cycle, the system returns to the signal power statistics stage to begin the operation of the next gain adjustment cycle.

[0079] In the above implementation process, by statistically analyzing the average power of a set signal length within the gain adjustment period and using this average power for gain control, precise adjustment of the signal power can be achieved. Furthermore, since the signal duration is shorter than the length of a time slot, power statistics and gain control can be performed within a shorter time frame, rather than waiting for the power statistics of the entire time slot frame to be completed. By shortening the statistical period and adjusting accordingly, a more rapid response to interference can be achieved, adjusting the gain to prevent excessively high signal power from causing ADC saturation and thus affecting signal demodulation.

[0080] Based on the above embodiments, in the method of gain control of the signal within the gain adjustment period according to the average power, the gain adjustment value can be calculated first based on the average power and the target power, and then the target analog gain and target digital gain can be determined based on the gain adjustment value. The signal within the gain adjustment period can then be gain controlled according to the target analog gain and target digital gain.

[0081] The target power, measured in dB, can be pre-configured in the AGC module by the processor. The target power refers to the power the AGC module attempts to maintain in the received signal at a specific value; it serves as a reference value to guide the AGC module in adjusting the signal gain to ensure the stability and reliability of signal processing.

[0082] When determining the target power, the dynamic range of the ADC can be considered; for example, the target power should be set within the power range where the ADC can operate effectively. Alternatively, different communication standards have different requirements for the target power setting. For instance, in NR, the target power setting needs to consider the power requirements of different channels (such as PDSCH (Physical Downlink Shared Channel) and PDCCH (Physical Downlink Control Channel)). Therefore, the target power can be set according to actual considerations.

[0083] The gain adjustment value is calculated as follows: Target Power - Average Power. This gain adjustment value represents the amount of gain that needs to be adjusted to bring the signal power closer to the target power.

[0084] Then, based on the current gain (referring to the target gain of the previous gain adjustment cycle) and the gain adjustment value, the target gain is obtained. This can be achieved by adding the gain adjustment value to the current gain, which can then be used as the current gain for the next gain adjustment cycle. Next, the analog gain closest to the target gain can be found in the gain table, which is predefined and contains available analog gains and their corresponding digital gains. After obtaining the target analog gain, the target digital gain is obtained by subtracting the target analog gain from the target digital gain and then performing a conversion. The specific calculation formula is as follows:

[0085] Indicates the target digital gain. This represents the difference between the target gain and the target analog gain.

[0086] Then, the analog gain of the signal within the gain adjustment period can be adjusted according to the target analog gain, and the digital gain of the signal within the gain adjustment period can be adjusted according to the target digital gain, that is, the power of the signal within this period can be adjusted according to the target gain.

[0087] In the above implementation process, by accurately calculating the gain adjustment value and decomposing it into target analog gain and target digital gain, precise control of the signal within the gain adjustment period is achieved. This method not only dynamically adjusts the gain according to the actual power of the signal, ensuring that the signal power is maintained within the target range, but also improves the flexibility and accuracy of gain adjustment through the synergistic effect of analog and digital gains.

[0088] Based on the above embodiments, before calculating the average power of the set signal length in the received signal, the frame header position of the received signal can be detected first. Then, the position of the set length after offsetting the frame header position is determined as the start time of the first gain adjustment cycle, which is the time of the first sampling point of the first gain adjustment cycle. This ensures that the gain adjustment cycle is synchronized with the frame structure, improving the accuracy and stability of gain control.

[0089] Among them, frame header detection algorithms can be used to identify the position of the frame header. Frame header detection algorithms include correlation-based frame header detection (such as predefining a specific sequence of frame headers and finding the position of the frame header by calculating the correlation between the received signal and the specific sequence), synchronization signal-based frame header detection (such as in some communication systems, the frame header contains a specific synchronization signal, and the position of the frame header can be determined by detecting these synchronization signals), and signal feature-based frame header detection (such as identifying the frame header based on specific characteristics of the signal, such as amplitude and frequency).

[0090] After determining the frame header position, an offset can be added to the frame header position to obtain the start time of the first gain adjustment cycle. The offset is a set length. The offset can be pre-configured by the processor to the AGC module, and it refers to the number of sampling points between the frame header position and the start time of the first gain adjustment cycle.

[0091] The purpose of setting an offset is to ensure that the gain adjustment period is offset from critical parts of the signal. For example, the frame header may contain important synchronization and system information, which is crucial for the normal operation of the receiver. If the gain adjustment period starts from the frame header, it may interfere with the frame header processing, leading to synchronization errors or other problems. By setting an offset, the start time of the gain adjustment period can be offset from the frame header, ensuring that the gain adjustment operation does not affect the frame header processing. Alternatively, for a period of time after the frame header, the signal may be in an unstable state or contain special symbols used for synchronization and initialization. By setting an offset, these unstable parts can be skipped, and gain adjustment can be performed during a relatively stable period of the signal, thereby improving the accuracy of gain adjustment.

[0092] When setting the offset, consider the terminal's processing time for the frame header. For example, set the offset based on the time required for the receiver to process the frame header to ensure that the gain adjustment period does not interfere with the frame header processing. For instance, if the receiver requires a certain number of samples for frame header synchronization and decoding, the offset should be at least greater than that number. Alternatively, consider the signal's stabilization time after the frame header and choose to start gain adjustment after the signal has stabilized. Analyze the signal characteristics to determine how long it takes for the signal to reach a stable state after the frame header, and then set the offset to the corresponding number of sampling points.

[0093] Of course, in some implementations, the start time of the first gain adjustment cycle may also begin from the frame header position.

[0094] After determining the start time of the first gain adjustment cycle, the average power of the set signal length can be calculated, and then gain control can be performed according to the average power.

[0095] In the above implementation, by detecting the frame header position before calculating the average power and determining the position after offsetting the frame header position by a set length as the start time of the first gain adjustment cycle, it is possible to ensure that the gain adjustment cycle is synchronized with the frame structure. This not only improves the accuracy and stability of gain adjustment but also avoids synchronization errors or other problems caused by conflicts between gain adjustment and frame header processing.

[0096] Based on the above embodiments, in order to identify the starting position of the signal, starting from the first gain adjustment cycle, the statistically obtained average power is compared with the signal power threshold. After the first detection that the statistically obtained average power exceeds the signal power threshold, the gain control of the signal within the gain adjustment cycle is performed based on the average power.

[0097] For example, starting from the beginning of the first gain adjustment cycle, the average power of the set signal length within the first gain adjustment cycle is calculated. If the average power exceeds the signal power threshold, it is considered that a signal has started to enter, and gain adjustment begins. If the average power of the set signal length within the first gain adjustment cycle does not exceed the signal power threshold, gain adjustment is not performed, and the cycle continues to wait for the next gain adjustment cycle to begin calculating and comparing the average power of the next set signal length, until the first average power exceeding the signal power threshold is detected. In subsequent gain adjustment cycles, gain control is performed based on the average power.

[0098] That is, starting from the first gain adjustment cycle, if the average power exceeds the signal power threshold, the gain adjustment process is triggered; otherwise, no gain adjustment is performed, and signal power statistics continue for the next gain adjustment cycle.

[0099] The signal power threshold is pre-configured. Once the average power exceeds the signal power threshold, the AGC module will determine that a signal has entered and immediately initiate gain control to adjust the signal gain within the gain adjustment cycle. If a strong interference suddenly occurs, causing the signal power to rise sharply, the AGC module will intervene immediately after detecting that the signal power exceeds the signal power threshold, without waiting for the power statistics of the entire slot (or longer) to be completed, thus achieving rapid gain adjustment.

[0100] The setting of the signal power threshold can be determined by considering factors such as system noise floor, interference level, and expected signal power range. For example, the terminal can first measure the system noise floor and interference level. The system noise floor can be obtained by measuring the receiver's noise power when there is no signal input, and the interference level can be determined by measuring the power of the interfering signal in an environment with interference sources. Then, based on the design specifications of the communication system and the application scenario, the expected power range of the received signal can be determined, as different types of signals may have different power range requirements.

[0101] Then, the signal power threshold can be determined by combining the system noise floor, interference level, and expected signal power. For example, the signal power threshold can be higher than the system noise floor and lower than the interference level, but lower than the minimum expected signal power.

[0102] In practical applications, the terminal can also adjust the signal power threshold according to the system's performance (such as demodulation success rate, bit error rate, etc.). For example, if it is found that AGC starts too late, the threshold can be appropriately lowered; if AGC is easily triggered by interference, the threshold can be appropriately increased.

[0103] In the above implementation process, by starting gain control only after the average power exceeds the signal power threshold for the first time, it is possible to effectively avoid false triggering of gain adjustment due to short-term signal fluctuations or noise interference.

[0104] Based on the above embodiments, in order to avoid the problem that demodulation may fail due to gain adjustment of signals with scheduling data, a gain hold period can also be set. During the gain hold period, the current gain of the signal within the gain hold period is maintained, that is, the current gain remains unchanged (the current gain is the target gain calculated by the most recent gain adjustment period before the gain hold period), and gain control is performed according to the signal within the current gain period. The signal position in the received signal where the gain hold period is effective includes the signal position where the scheduling data is located in the received signal.

[0105] The gain hold period is pre-configured by the processor for the AGC module. When determining the gain hold period, the processor can identify the time slot position where the scheduled data is located in the received signal. The gain hold period can be greater than or equal to the signal position where the scheduled data is located. Specifically, the gain hold period can cover the entire time period where the scheduled data is located, ensuring that the gain remains unchanged within that time period.

[0106] In some implementations, when identifying the signal location of scheduling data, the terminal can first synchronize with the base station by detecting synchronization signals. These synchronization signals may be located at specific symbol locations, helping the terminal determine the boundaries of frames and time slots, and providing a time reference for subsequent identification of scheduling symbol locations. The terminal can use DMRS (Demodulation Reference Signal) to assist in determining the symbol location carrying scheduling information and demodulating the PDCCH. DMRS is a reference signal used for demodulation, and its position in the scheduling symbol is known.

[0107] During the random access process, the terminal requests access from the base station and obtains initial scheduling information. After the base station allocates resources to the terminal, the terminal receives relevant scheduling information, including the location of the PDSCH, thus understanding the symbol positions for data transmission. The terminal sends a scheduling request to inform the base station of its need for uplink resources. Upon receiving the scheduling request, the base station allocates uplink resources to the terminal and notifies it via downlink control information, including the start position and length of the PDSCH. By decoding the DCI (Distributed Control Information), the terminal can accurately determine which symbols are used to transmit the PDSCH, thereby identifying the positions of the scheduled symbols.

[0108] In addition, during the establishment of an RRC (Radio Resource Control) connection, the base station sends a large amount of configuration information to the terminal through RRC signaling, including system bandwidth, antenna port information, PDCCH and PDSCH configuration, etc. This information helps the terminal understand the basic framework of the entire system frame structure and scheduling symbols, enabling the terminal to identify the symbol positions used for scheduling.

[0109] It should be noted that if the gain hold period and the gain adjustment period overlap, the execution of the gain hold period shall be given priority.

[0110] If the location of the scheduled data changes in different time slots, the terminal can update the gain hold period configuration in real time to ensure that the gain hold period always covers the time period in which the scheduled data is located.

[0111] If the statistical time falls within the configured gain hold period, the average power can be calculated based on the set signal length without changing the gain. This avoids frequent gain adjustments during the data symbol period, prevents data demodulation failure due to gain differences, ensures the stability of data symbol transmission, and guarantees the accuracy of demodulation.

[0112] After the gain hold period ends, another gain hold period can be entered, and the gain adjustment can be performed in the manner described above.

[0113] In the above implementation process, by precisely setting the gain hold period according to the signal location of the scheduling data, the signal gain is kept stable during the critical data transmission phase, thereby improving the reliability and accuracy of signal demodulation.

[0114] Based on the above embodiments, in order to flexibly adjust the gain according to the signal conditions, the gain control of the received signal can also be performed according to the gain control strategy in the gain locked state or the gain unlocked state. The gain control strategy in the gain locked state is to maintain the current gain of the received signal (the current gain is the target gain calculated in the most recent gain adjustment cycle before entering the gain locked state). The gain control strategy in the gain unlocked state is to perform gain control of the signal in the gain adjustment cycle according to the average power of the set signal length in each gain adjustment cycle.

[0115] Specifically, initially, the system is in a gain-unlocked state. In this state, the AGC module performs gain control as described above, but simultaneously performs some statistical analysis, such as the number of gain adjustments, to determine whether to enter a locked state. In this state, the AGC acts like it's constantly testing the signal condition, allowing for frequent gain adjustments to adapt to changes in signal power.

[0116] In gain-locked mode, the power of the received signal is adjusted according to the stable current gain. During gain-locked mode, some statistical information is also collected, such as the average power within each gain adjustment cycle. Once the signal stabilizes and the gain is adjusted to an appropriate level, AGC enters gain-locked mode. This avoids frequent gain adjustments due to normal small fluctuations in the signal, ensuring gain stability and thus improving signal processing stability.

[0117] In the above implementation process, in the gain-locked state, the current gain of the received signal is maintained, thereby ensuring that the gain remains unchanged when the signal is stable and avoiding unnecessary gain adjustments that could affect the stability of signal processing. In the gain-unlocked state, gain control is performed based on the statistical average power, enabling rapid response to changes in signal power and ensuring that the signal power remains within the target range.

[0118] Based on the above embodiments, when the AGC module detects the lock enable flag indicating the enable state, it performs a gain lock state determination. One way to determine the gain lock state is to count the number of gain adjustments and then determine whether the counted number of gain adjustments has reached the minimum number of adjustments. The number of gain adjustments is counted after each gain control of the signal. If it has reached the minimum number of adjustments, the lock state is set to the gain lock state.

[0119] The lock enable flag can be configured by the user according to their needs. For example, if it is configured to 0, it indicates the enabled state, and if it is configured to 1, it indicates the disabled state. When configured to 1, the AGC module can determine the gain lock state in another way.

[0120] The AGC module can maintain a state machine to indicate the gain-locked state or the gain-unlocked state. The state machine can be initially in the gain-unlocked state.

[0121] In the first gain adjustment cycle, the state machine is in a gain unlocked state, that is, the initial state of the state machine is a gain unlocked state. At this time, gain control can be performed in the manner described above. After each gain adjustment, the gain adjustment count is incremented by 1. Initially, the gain adjustment count is 0.

[0122] The minimum number of adjustments is a condition pre-configured by the processor for the AGC module to control the AGC to enter the locked state. For example, if the counted number of gain adjustments reaches the minimum number of adjustments, it indicates that the signal may have been adjusted multiple times and the signal may have stabilized. To avoid frequent gain adjustments, the system enters the locked state, that is, the state machine is set to gain-locked state. In gain-locked state, the current gain is maintained, and the average power of the set signal length within each gain adjustment cycle is counted and stored.

[0123] In the above implementation process, the gain lock state is determined by checking whether the minimum number of gain adjustments has been reached, ensuring that the system enters a stable state after a certain number of gain adjustments. This mechanism avoids premature lock-up, which would prevent the system from adapting to continuous signal changes, and also prevents frequent gain adjustments from affecting system stability.

[0124] Based on the above embodiments, when the lock enable flag is detected to indicate an disabled state, i.e. when the lock enable flag is 1, the method for determining the gain lock state includes: counting the number of times the difference between the average power of the consecutive set signal length and the target power is less than the lock threshold; if the number of times the difference between the average power of the consecutive set signal length and the target power is less than the lock threshold reaches a first set minimum number, then the lock state is set to the gain lock state.

[0125] The lock threshold and the first set minimum number of times are also pre-configured to the AGC module by the processor. Both the lock threshold and the first set minimum number of times are used to determine whether the gain lock state is triggered. They can be flexibly set according to actual needs.

[0126] The AGC module can create a counter, including a first counter, which records the number of times the difference between the average power and the target power is continuously less than the lock threshold.

[0127] After detecting that the lock enable flag indicates an disabled state, the AGC module begins to collect relevant information. For example, for each gain adjustment cycle, it calculates the average power of the set signal length within that gain adjustment cycle and compares it with the target power. If the difference is less than the lock threshold, the first counter is incremented by 1; otherwise, the first counter is set to 0.

[0128] For example, if the first minimum number of iterations is set to 3, the average power of the set signal length during the first gain adjustment cycle is detected. If the difference between the average power and the target power is less than the lock threshold, the first counter is incremented by 1 (1), and the signal gain is adjusted according to the average power during that gain adjustment cycle. The detection continues for the second gain adjustment cycle. If the difference between the average power of the set signal length during the second gain adjustment cycle and the target power is less than the lock threshold, the first counter is incremented by 1 (2), and the signal gain is adjusted according to the average power during that gain adjustment cycle. The detection continues for the third gain adjustment cycle. If the difference between the average power of the set signal length during the third gain adjustment cycle and the target power is greater than or equal to the lock threshold, the first counter is reset to 0 (0), and the signal gain is adjusted according to the average power during that gain adjustment cycle. The detection continues for the fourth gain adjustment cycle. If the difference between the average power of the set signal length during the fourth gain adjustment cycle and the target power is less than the lock threshold, the first counter is incremented by 1 (1), and the signal gain is adjusted according to the average power during that gain adjustment cycle. This process continues until the value of the first counter reaches 3, at which point the gain is locked.

[0129] After entering the gain lock state, when encountering a gain adjustment cycle, the current gain remains unchanged, and the adjustment is performed according to the current gain, while the average power of the set signal length is calculated.

[0130] In some other implementations, the number of times the difference between the average power and the target power is less than the locking threshold may not be counted continuously. For example, as long as the difference between the average power and the target power is less than the locking threshold, even if it is not continuously less than the locking threshold, the first counter is incremented by 1. When the value of the first counter reaches the first set minimum number of times, it enters the gain-locked state. At this time, the AGC module updates the state machine to the gain-locked state.

[0131] In the above implementation process, the difference between the average power and the target power is monitored to determine whether to re-enter the gain-locked state. This mechanism ensures that the system locks the gain promptly after the signal power stabilizes, avoiding frequent lock-and-unlock operations caused by brief signal fluctuations, thereby improving system stability.

[0132] Based on the above embodiments, when determining the gain unlock state, if the number of times the difference between the average power of the continuously counted set signal length and the target power exceeds the unlock threshold reaches the second set minimum number, and the number of counted gain adjustment cycles reaches the minimum hold number, then the lock state is set to the gain unlock state.

[0133] Among them, the unlock threshold, the second minimum number of times, and the minimum number of times are also pre-configured by the processor to the AGC module. The unlock threshold, the second minimum number of times, and the minimum number of times are all used to determine whether the gain unlock state is triggered. They can be flexibly set according to actual needs.

[0134] The AGC module can create two counters, including a second counter and a third counter. The second counter is used to record the number of times the difference between the average power and the target power exceeds the unlock threshold consecutively, and the third counter is used to record the number of gain adjustment cycles counted.

[0135] In addition to collecting some information to determine the gain lock status, the AGC module also simultaneously collects relevant information to determine the gain unlock status. For example, every time a gain adjustment cycle is encountered, the third counter is incremented by 1, and the average power of the set signal length within that gain adjustment cycle is calculated and compared with the target power. If the difference exceeds the unlock threshold, the second counter is incremented by 1; otherwise, the second counter is set to 0.

[0136] For example, if the second minimum number of counts is set to 3 and the minimum hold count is set to 5, the average power of the set signal length during the first gain adjustment cycle is detected. If the difference between the average power and the target power exceeds the unlock threshold, the second counter increments by 1 (1), the third counter increments by 1 (1), and the detection continues for the second gain adjustment cycle. The third counter increments by 1 (2). If the difference between the average power of the set signal length during the second gain adjustment cycle and the target power exceeds the unlock threshold, the second counter increments by 1 (2). The detection continues for the third gain adjustment cycle. The third counter increments by 1 (3). If the difference between the average power of the set signal length during the third gain adjustment cycle and the target power does not exceed the unlock threshold, the second counter is set to 0 (0). The detection continues for the fourth gain adjustment cycle. The third counter increments by 1 (4). If the difference between the average power of the set signal length during the fourth gain adjustment cycle and the target power exceeds the unlock threshold, the second counter increments by 1 (1). The detection continues in the same manner until the value of the second counter reaches 3 and the value of the third counter is greater than or equal to 5, at which point the system enters the gain unlock state.

[0137] Upon entering the gain unlock state, when a gain adjustment cycle is encountered, gain adjustment is performed based on the statistically calculated average power of the set signal length. Alternatively, if the gain lock state is entered first, the signal power change also needs to be monitored. If the signal power change is significant, the gain unlock state needs to be entered for timely gain adjustment. That is, even in the gain lock state, the number of times the difference between the average power of the set signal length and the target power exceeds the unlock threshold, as well as the number of gain adjustment cycles, also needs to be counted. If these conditions are met, the gain unlock state is entered.

[0138] Conversely, if the gain unlock state is entered first, it is also necessary to synchronously collect some information for judging the gain lock state. When the corresponding conditions are met, the gain lock state is entered.

[0139] In some other implementations, the number of times the difference between the average power and the target power exceeds the unlock threshold may not be counted continuously. For example, after entering the gain-locked state, as long as the difference between the average power and the target power exceeds the unlock threshold, even if it is not continuously exceeded, the second counter is incremented by 1. When the value of the second counter reaches the second set minimum number and the value of the third counter reaches the minimum hold number, the gain-unlocked state is entered. At this time, the AGC module updates the state machine state to the gain-unlocked state.

[0140] In some implementations, the unlock threshold can be greater than the lock threshold to avoid frequent state machine switching.

[0141] In some implementations, after entering the gain unlock state, the number of gain adjustments continues to be counted, and the gain lock state is entered when the minimum number of adjustments is reached. Alternatively, even if the value of the first counter reaches the first set minimum number of adjustments, if the minimum number of adjustments has not yet been reached, adjustment continues until the minimum number of adjustments is met.

[0142] In other words, the gain lock state can be switched when at least one of the following conditions is met: the value of the first counter reaches the first set minimum number of times and the number of adjustments in the gain unlock state reaches the minimum number of adjustments.

[0143] In the above implementation process, the system determines whether to enter a gain unlock state by comprehensively considering the number of times the difference between the average power and the target power exceeds the unlock threshold and the number of gain adjustment cycles. This mechanism ensures that the system only triggers unlock when the signal power continuously deviates from the target power and meets certain time conditions, avoiding misjudgment due to short-term signal fluctuations.

[0144] Based on the above embodiments, if the moment when the lock state is set to the gain unlock state is during the gain hold period, then the current gain of the signal within the gain hold period is maintained.

[0145] That is, if a gain unlock state is detected during the gain hold period, the current gain is maintained and adjusted to keep the gain unchanged. If the gain is still unlocked after the gain hold period ends, the gain is adjusted according to the average power.

[0146] In the above implementation, after entering the gain unlock state, if the current time is within the gain hold period, the current gain of the signal within that period is maintained. This mechanism ensures that even in the unlock state, the system will not adjust the gain of the signal transmitting scheduling data (i.e., it will not change the gain), thereby avoiding the risk of demodulation failure.

[0147] The implementation process of the above method will be illustrated with a specific example below.

[0148] The terminal's processor pre-configures the offset to the AGC module (i.e., the AGC startup time). Signal power statistical length L p Gain adjustment period Power target value P t Signal power threshold Minimum number of adjustments Threshold for the difference between signal power and target power Minimum number of times the power difference remains within the threshold Starting position of gain hold End position of gain hold The meanings of each parameter are shown in the table below:

[0149]

[0150]

[0151] The AGC module maintains a state machine, the parameters of which are shown in the table below:

[0152]

[0153]

[0154] Initially, the AGC module resets the above parameters (I lock , and (All initialized to 0), Configured by software, in addition, I lock , and Both support software reading and configuration.

[0155] Combination Figure 3The timing diagram for gain control shown below illustrates the steps for implementing gain control on the received signal:

[0156] 1) After detecting the frame header, the AGC module offsets the frame header... At the location, begin counting the power of the received signal, according to L. p The average power P of the length statistical signal avg The unit is dB. After the statistics are completed, compare it with... Comparison, if not exceeding Then wait Start the next P avg The statistics continue until the first P-value is detected. avg It is assumed that a signal has started to enter, and thereafter, except for the period of gain hold, the statistical average power P is... avg Both will be used for AGC adjustment and judgment;

[0157] 2) From the point of signal arrival: If the current frame has not ended, proceed according to P t And the statistically derived P avg Calculate the gain adjustment value, specifically ΔG = P. t -P avg Then based on the current gain The target gain is obtained as Otherwise, proceed to step 9);

[0158] 3) According to The target simulated gain is obtained by looking up the gain table. Calculate the gain difference And convert it into the target digital gain.

[0159] 4) In the current P avg corresponding At any given time, new gains will take effect, including and Simultaneously update the current gain. Statistical gain adjustment times

[0160] 5) If, after determining that a signal has entered, the statistical time enters the gain hold period. arrive If the range is within a certain range, then only the signal power P is counted. avg No AGC adjustment judgment is performed, that is, the gain is not adjusted;

[0161] 6) When the AGC module determines the lock enable flag When it is 0: If If the condition is met, determine that the gain is locked and proceed to step 8); otherwise, continue to detect and adjust and proceed to step 2).

[0162] 7) When the AGC module determines the lock enable flag When the value is 1, the target power P t And a certain signal power P avg The difference is less than but Perform the increment operation; otherwise, Set to 0. When achieve When this happens, it is considered that AGC has entered a gain-locked state, and I is set to... lock Set to 1 and proceed to step 8);

[0163] 8) In locked state (I lock =1), executed in each cycle. Additionally, if the target power P t And a certain signal power P avg The difference exceeds but Perform the increment operation; otherwise, Set to 0. When achieve and At this point, the minimum holding time is reached. When this occurs, it is considered that AGC has entered a gain unlock state, and I is... lock Set to 0, proceed to step 2);

[0164] 9) The adjustment of the current frame has ended.

[0165] Please refer to the above method embodiments. Figure 4 , Figure 4 This is a structural block diagram of a gain control device 200 provided in an embodiment of this application. The device 200 may be a module, program segment, or code on an electronic device. It should be understood that the device 200 corresponds to the above method embodiment and is capable of performing the various steps involved in the method embodiment. The specific functions of the device 200 can be found in the description above. To avoid repetition, detailed descriptions are appropriately omitted here.

[0166] Optionally, the device 200 includes:

[0167] The power statistics module 210 is used to count the average power of a set signal length in the received signal within a gain adjustment period, wherein the gain adjustment period is greater than the signal duration corresponding to the set signal length, and the signal duration is less than the length of a time slot.

[0168] The gain control module 220 is used to control the gain of the signal within the gain adjustment period based on the average power.

[0169] Optionally, the gain control module 220 is configured to calculate a gain adjustment value based on the average power and the target power; determine a target analog gain and a target digital gain based on the gain adjustment value; and perform gain control on the signal within the gain adjustment period according to the target analog gain and the target digital gain.

[0170] Optionally, the device 200 further includes:

[0171] The frame header detection module is used to detect the position of the frame header of the received signal; the position after offsetting the frame header position by a set length is determined as the start time of the first gain adjustment cycle.

[0172] Optionally, the gain control module 220 is used to perform gain control on the signal within the gain adjustment period based on the average power after the first detection that the statistically calculated average power exceeds the signal power threshold.

[0173] Optionally, the device 200 further includes:

[0174] A gain stabilization module is used to maintain the current gain of the signal during a gain hold period, wherein the signal location in which the gain hold period is effective in the received signal includes the signal location where the scheduling data is located in the received signal.

[0175] Optionally, the device 200 further includes:

[0176] A gain-locking module is used to perform gain control on the received signal according to the gain control strategy in the gain-locked state or the gain-unlocked state when a lock-enable flag is detected to indicate an enabled state. The gain control strategy in the gain-locked state is to maintain the current gain of the received signal, and the gain control strategy in the gain-unlocked state is to perform gain control on the signal in the gain adjustment period based on the average power of a set signal length within each gain adjustment period.

[0177] Optionally, the gain locking module is used to determine whether the counted number of gain adjustments has reached the minimum number of adjustments when the lock enable flag is detected to indicate the enable state. The number of gain adjustments is counted after each gain control of the signal. If the minimum number of adjustments is reached, the lock state is set to the gain lock state.

[0178] Optionally, the gain locking module is configured to set the locking state to gain locking state when the lock enable flag is detected to indicate an disabled state, and if the number of times the difference between the average power of the set signal length and the target power is less than the lock threshold reaches a first set minimum number of times.

[0179] Optionally, the gain locking module is configured to set the locking state to a gain unlock state if the number of times the difference between the average power of the continuously counted set signal length and the target power exceeds the unlock threshold reaches a second set minimum number, and the number of counted gain adjustment cycles reaches the minimum hold number.

[0180] Optionally, the gain locking module is configured to perform the step of maintaining the current gain of the signal within the gain holding period if the moment when the locked state is set to the gain unlocked state is during the gain holding period.

[0181] It should be noted that those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0182] Please refer to Figure 5 , Figure 5 This is a schematic diagram of an electronic device for performing a gain control method, provided in an embodiment of this application. The electronic device may include: at least one processor 310, such as a CPU; at least one communication interface 320; at least one memory 330; and at least one communication bus 340. The communication bus 340 is used to establish communication between these components. In this embodiment, the communication interface 320 is used for signaling or data communication with other node devices. The memory 330 may be a high-speed RAM or a non-volatile memory, such as at least one disk storage device. Optionally, the memory 330 may also be at least one storage device located remotely from the aforementioned processor. The memory 330 stores computer-readable instructions, which, when executed by the processor 310, cause the electronic device to perform the aforementioned method process.

[0183] Understandable. Figure 5 The structure shown is for illustrative purposes only; the electronic device may also include components that are more advanced than those shown. Figure 5 The more or fewer components shown, or having the same Figure 5 The different configurations shown. Figure 5 The components shown can be implemented using hardware, software, or a combination thereof.

[0184] This application provides a computer-readable storage medium storing a computer program thereon. When the computer program is executed by a processor, it performs the method process executed by the electronic device in the above method embodiments.

[0185] This embodiment discloses a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by a computer, the computer can perform the methods provided in the above-described method embodiments, such as including:

[0186] Within the gain adjustment period, the average power of the received signal with a set signal length is statistically analyzed, wherein the gain adjustment period is greater than the signal duration corresponding to the set signal length, and the signal duration is less than the length of a time slot;

[0187] Gain control is performed on the signal within the gain adjustment period based on the average power.

[0188] In summary, the embodiments of this application provide a gain control method, electronic device, storage medium, and program product. By statistically analyzing the average power of a set signal length within a gain adjustment period and performing gain control accordingly, precise adjustment of signal power can be achieved. Furthermore, since the signal duration is shorter than the length of a time slot, power statistics and gain control can be performed within a shorter time frame, rather than waiting for the power statistics of the entire time slot frame to be completed. By shortening the statistical period and making adjustments, a more rapid response to interference can be achieved, and the gain can be adjusted, thereby preventing excessively high signal power from causing ADC saturation and affecting signal demodulation.

[0189] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0190] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0191] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0192] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0193] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A gain control method, characterized in that, Applied to a terminal, the method includes: Within the gain adjustment period, the average power of the received signal with a set signal length is statistically analyzed, wherein the gain adjustment period is greater than the signal duration corresponding to the set signal length, and the signal duration is less than the length of a time slot; Gain control is performed on the signal within the gain adjustment period based on the average power.

2. The method according to claim 1, characterized in that, The step of performing gain control on the signal within the gain adjustment period based on the average power includes: Calculate the gain adjustment value based on the average power and the target power; The target analog gain and target digital gain are determined based on the aforementioned gain adjustment values; Gain control is performed on the signal within the gain adjustment period according to the target analog gain and the target digital gain.

3. The method according to claim 1, characterized in that, Before calculating the average power of the received signal with a set signal length within the gain adjustment period, the method further includes: Detect the frame header position of the received signal; The position after offsetting the frame header position by a set length is determined as the starting time of the first gain adjustment cycle.

4. The method according to claim 1, characterized in that, The step of performing gain control on the signal within the gain adjustment period based on the average power includes: After the first detection that the statistically calculated average power exceeds the signal power threshold, gain control is performed on the signal within the gain adjustment period based on the average power.

5. The method according to claim 1, characterized in that, The method further includes: During the gain hold period, the current gain of the signal during the gain hold period is maintained, wherein the signal location in which the gain hold period is effective in the received signal includes the signal location where the scheduling data is located in the received signal.

6. The method according to any one of claims 1-5, characterized in that, The method further includes: The received signal is gain controlled according to the gain control strategy in gain-locked state or gain-unlocked state. The gain control strategy in gain-locked state is to maintain the current gain of the received signal. The gain control strategy in gain-unlocked state is to control the gain of the signal in the gain adjustment period based on the average power of the set signal length in each gain adjustment period.

7. The method according to claim 6, characterized in that, The gain-locked state is determined by the following methods: When the lock enable flag is detected to indicate an enabled state, it is determined whether the count of gain adjustments has reached the minimum number of adjustments, wherein the number of gain adjustments is counted after each gain control of the signal; If the condition is met, the lock state will be set to gain lock state.

8. The method according to claim 6, characterized in that, The gain-locked state is determined by the following methods: When the lock enable flag is detected to indicate an disabled state, if the number of times the difference between the average power of the set signal length and the target power is less than the lock threshold reaches the first set minimum number, the lock state is set to gain lock state.

9. The method according to claim 6, characterized in that, The gain unlock state is determined in the following manner: If the number of times the difference between the average power of the set signal length and the target power exceeds the unlock threshold reaches the second set minimum number, and the number of times the gain adjustment cycle is counted reaches the minimum hold number, then the locked state is set to the gain unlock state.

10. The method according to claim 9, characterized in that, After setting the locked state to a gain-unlocked state, the method further includes: If the moment when the locked state is set to the gain unlocked state occurs during the gain hold period, then the following step is executed: maintain the current gain of the signal during the gain hold period.

11. An electronic device, characterized in that, It includes a processor and a memory, the memory storing computer-readable instructions that, when executed by the processor, perform the method as described in any one of claims 1-10.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it performs the method as described in any one of claims 1-10.

13. A computer program product, characterized in that, It includes computer program instructions, which, when read and executed by a processor, perform the method as described in any one of claims 1-10.

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