Mesh network broadcast anti-deadlock FIFO (First In First Out) module and method thereof
By designing a FIFO module in a mesh network to dynamically manage data storage and transmission direction, the broadcast deadlock problem is solved, achieving efficient resource utilization and area compression.
Patent Information
- Application Number
- CN202511103724.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-07
- Publication Date
- 2025-10-31
AI Technical Summary
In mesh networks, a single FIFO buffer can cause deadlock during broadcast packet transmission, and FIFO resource utilization is low during unicast.
A mesh network broadcast anti-deadlock FIFO module is adopted. Through the counter and register structure at the input and output ends, the data storage and transmission direction are dynamically managed to ensure orderly data transmission, avoid deadlock, and share a single data storage memory.
It effectively solves the deadlock problem of mesh network broadcast, while reducing the area occupied by the FIFO module and improving resource utilization.
Smart Images
Figure CN120881031A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip technology, and specifically to a FIFO module and method for preventing deadlock in mesh network broadcasting. Background Technology
[0002] In a mesh network, data transmission occurs in five directions: east, south, west, north, and local. When a broadcast packet enters from one direction, it is output from the other four. If a single FIFO is used to buffer data, all packets in the same flit must be transmitted in all four directions before switching to the next flit. When a packet is sent to the body flit, congestion in one direction can cause all other paths to become blocked, leading to a routing deadlock.
[0003] Currently, the solution to the broadcast deadlock problem is to split the data into four channels at input, with each channel using a FIFO buffer. The independent operation of each channel avoids deadlock. However, this approach requires four FIFOs for each input direction, resulting in a large footprint. When unicast is sent, data is transmitted only in one direction at a time, leaving the FIFOs in the other three directions idle, with only a quarter of the resources utilized. Summary of the Invention
[0004] In view of the deficiencies in the prior art mentioned in the background, the purpose of this invention is to provide a mesh network broadcast anti-deadlock FIFO module and method.
[0005] To achieve the above objectives, in a first aspect, embodiments of the present invention provide a mesh network broadcast anti-deadlock FIFO module, including an input terminal, a first register, a second register, and an output terminal; the first register is used to store the flit data written through the input terminal, and the second register is used to record the four direction information that the current flit needs to transmit;
[0006] When data is read out, the output terminal completes the data transmission of the FIFO module in four directions in an orderly manner according to the amount of data stored in the current flit and the direction information stored in the second register.
[0007] As one specific implementation of this application, the input terminal includes a write pointer and a set of write counters; the write counters are used for:
[0008] Calculate the current amount of data stored in the FIFO module, and determine whether the FIFO module is currently full based on the amount of data stored.
[0009] If full is 1, external data writing is prohibited;
[0010] If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
[0011] As a specific implementation of this application, the output terminal includes four read pointers and four sets of read counters arranged in four data transmission directions; each of the read counters is used for:
[0012] The amount of stored data on the current transmission path is counted, and the current transmission path is determined to be empty based on the amount of stored data.
[0013] As one specific implementation of this application, during data reading, the data transmission in the four directions of the FIFO module is completed in an orderly manner, specifically as follows:
[0014] When the read counter determines that the current transmission path is not empty, it retrieves the direction information corresponding to the read pointer in the current transmission direction.
[0015] If the direction information is high, then the corresponding flit packet is extracted and transmitted.
[0016] If the direction information is low, then the current direction data processing is complete.
[0017] Secondly, embodiments of this application also provide a method for preventing deadlock in mesh network broadcasting, applicable to the FIFO module described in the first aspect above, the method comprising:
[0018] When writing data, the input terminal is used to determine whether the current FIFO is full, and the write of the flit data and the direction data is completed according to the determination result;
[0019] When reading data, the output terminal determines whether the current transmission path is empty, and based on the determination result and the direction information stored in the second register, the four directions of the FIFO module are transmitted in an orderly manner.
[0020] As one specific implementation of this application, the input terminal includes a write pointer and a set of write counters; to complete the writing of flit data and direction data, specifically:
[0021] If full is 1, external data writing is prohibited;
[0022] If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
[0023] As one specific implementation of this application, the output terminal includes four read pointers and four sets of read counters configured in four data transmission directions; when reading data, the data transmission of the FIFO module in the four directions is completed in an orderly manner, specifically as follows:
[0024] When the read counter determines that the current transmission path is not empty, it retrieves the direction information corresponding to the read pointer in the current transmission direction.
[0025] If the direction information is high, the corresponding flit packet is extracted and transmitted. After the transmission is completed, the read pointer is incremented and the read counter is decremented.
[0026] If the direction information is low, it indicates that the current direction data processing is complete, and the read pointer is incremented by one while the read counter is decremented by one.
[0027] Furthermore, after completing the writing of the flit data and the direction data, the method further includes:
[0028] The write counter increments by one, the write pointer increments by one, and the read counters in all four directions increment by one.
[0029] Implementing embodiments of the present invention provides a novel FIFO structure, which:
[0030] (1) Increase direction memory. Each set of data can be dynamically marked with the output direction. In unicast and multicast transmission, only one set of data memory is needed to store the data.
[0031] (2) The output is split into four groups of read pointers, which are independent of each other and do not affect each other. There will be no situation where congestion in one direction leads to the inability to transmit in other directions.
[0032] The novel FIFO structure provided by this invention allows for one-to-four read operations by sharing a single data storage memory. In solving the mesh broadcast deadlock problem, the area can be reduced to one-quarter of that of a traditional FIFO. Attached Figure Description
[0033] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below.
[0034] Figure 1 This is a structural diagram of the FIFO module for preventing deadlock in mesh network broadcasting provided in an embodiment of the present invention;
[0035] Figure 2 yes Figure 1 Another structural diagram of the FIFO module shown;
[0036] Figure 3 This is a schematic diagram of the deadlock prevention FIFO implementation in a mesh network;
[0037] Figure 4 It is a read / write flowchart. Detailed Implementation
[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0039] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0040] Terminology Explanation:
[0041] Flit: The smallest unit of data transmitted in a mesh network.
[0042] Packet: A packet is composed of multiple flits. A packet contains a head flit, a body flit, and a tail flit. FIFO: First Input First Output, a data buffering structure.
[0043] The mesh network broadcast anti-deadlock FIFO module provided in this embodiment of the invention includes one input data channel and four output data channels. Please refer to... Figure 1 and Figure 2 The FIFO module includes an input terminal, a first register, a second register, and an output terminal. The first register is used to store the flit data written through the input terminal, and the second register stores direction information, which is used to record the four directions of information that the current flit needs to transmit.
[0044] In this embodiment, the input terminal includes a write pointer and a set of write counters; the write counters are used for:
[0045] Calculate the current amount of data stored in the FIFO module, and determine whether the FIFO module is currently full based on the amount of data stored.
[0046] If full is 1, external data writing is prohibited;
[0047] If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
[0048] In this embodiment, the output terminal includes four read pointers and four sets of read counters arranged in four data transmission directions; each read counter is used for:
[0049] The amount of stored data on the current transmission path is counted, and the current transmission path is determined to be empty based on the amount of stored data.
[0050] Furthermore, during data reading, the data transmission in the four directions of the FIFO module is completed in an orderly manner, specifically as follows:
[0051] When the read counter determines that the current transmission path is not empty, it retrieves the direction information corresponding to the read pointer in the current transmission direction.
[0052] If the direction information is high, then the corresponding flit packet is extracted and transmitted.
[0053] If the direction information is low, then the current direction data processing is complete.
[0054] When the FIFO structure of this embodiment is applied to a mesh network, its structure diagram is as follows: Figure 3 As shown in the figure, a node contains five directions: east, south, west, north, and local. The anti-deadlock FIFO mentioned in this invention is set at the input position of each direction.
[0055] To better understand the working principle of the FIFO structure provided in the embodiments of the present invention, in conjunction with the foregoing structural description and Figure 4 The data read / write process of this FIFO structure is as follows:
[0056] When writing data, the write counter determines whether the current FIFO is full. When the FIFO is full (1), data cannot be written. When the FIFO is full (0), the flit data and the direction data in the four directions are written. At the same time, the write counter is incremented by one, the write pointer is incremented by one, and the read counters in the four directions are incremented by one.
[0057] During data reading, each of the four directions checks its corresponding read counter to determine if the FIFO is empty. If not empty, the direction information corresponding to the current direction's read pointer is retrieved. If the read direction is 0, data processing for the current direction is completed, the read pointer is incremented, and the read counter is decremented. If the read direction is 1, the current flit data is retrieved and output. After transmission, the read pointer is incremented, and the read counter is decremented. When transmission is complete in all four directions, the write counter is updated and decremented.
[0058] As can be seen from the above description, implementing the embodiments of the present invention provides a novel FIFO structure, which:
[0059] (1) Increase direction memory. Each set of data can be dynamically marked with the output direction. In unicast and multicast transmission, only one set of data memory is needed to store the data.
[0060] (2) The output is split into four groups of read pointers, which are independent of each other and do not affect each other. There will be no situation where congestion in one direction leads to the inability to transmit in other directions.
[0061] The novel FIFO structure provided by this invention allows for one-to-four read operations by sharing a single data storage memory. In solving the mesh broadcast deadlock problem, the area can be reduced to one-quarter of that of a traditional FIFO.
[0062] Based on the same inventive concept, this invention also provides a method for preventing deadlock in mesh network broadcasting, applicable to signed FIFO modules, comprising the following steps:
[0063] S1, when writing data, the system determines whether the current FIFO is full by checking the input terminal, and completes the writing of the flit data and the direction data based on the determination result.
[0064] In practice, if full is 1, external data writing is prohibited.
[0065] If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
[0066] Furthermore, after the data writing is completed, the write counter is incremented by one, the write pointer is incremented by one, and the read counters in all four directions are incremented by one.
[0067] S2, when reading data, the output terminal determines whether the current transmission path is empty, and according to the determination result and the direction information stored in the second register, the four directions of the FIFO module are transmitted in an orderly manner.
[0068] In practice, when the read counter determines that the current transmission path is not empty, the direction information corresponding to the read pointer in the current transmission direction is retrieved.
[0069] If the direction information is high, the corresponding flit packet is extracted and transmitted. After the transmission is completed, the read pointer is incremented and the read counter is decremented.
[0070] If the direction information is low, it indicates that the current direction data processing is complete, and the read pointer is incremented by one and the read counter is decremented by one.
[0071] When data transmission is complete in all four directions, update the write counter by decrementing it by one.
[0072] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A FIFO module for preventing deadlock in mesh network broadcasting, characterized in that, It includes an input terminal, a first register, a second register, and an output terminal; the first register is used to store the flit data written through the input terminal, and the second register is used to record the four-directional information that the current flit needs to transmit; When data is read out, the output terminal completes the data transmission of the FIFO module in four directions in an orderly manner according to the amount of data stored in the current flit and the direction information stored in the second register.
2. The FIFO module for preventing deadlock in mesh network broadcasting as described in claim 1, characterized in that, The input terminal includes a write pointer and a set of write counters; the write counters are used for: Calculate the current amount of data stored in the FIFO module, and determine whether the FIFO module is currently full based on the amount of data stored. If full is 1, external data writing is prohibited; If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
3. The FIFO module for preventing deadlock in mesh network broadcasting as described in claim 1, characterized in that, The output terminal includes four read pointers and four sets of read counters configured in four data transmission directions; each read counter is used for: The amount of stored data on the current transmission path is counted, and the current transmission path is determined to be empty based on the amount of stored data.
4. The mesh network broadcast anti-deadlock FIFO module as described in claim 3, characterized in that, During data reading, the data transmission in the four directions of the FIFO module is completed in an orderly manner, specifically as follows: When the read counter determines that the current transmission path is not empty, it retrieves the direction information corresponding to the read pointer in the current transmission direction. If the direction information is high, then the corresponding flit packet is extracted and transmitted. If the direction information is low, then the current direction data processing is complete.
5. A method for preventing deadlock in mesh network broadcasting, characterized in that, The method is applicable to the FIFO module as described in claim 1; the method includes: When writing data, the input terminal is used to determine whether the current FIFO is full, and the write of the flit data and the direction data is completed according to the determination result; When reading data, the output terminal determines whether the current transmission path is empty, and based on the determination result and the direction information stored in the second register, the four directions of the FIFO module are transmitted in an orderly manner.
6. The method as described in claim 5, characterized in that, The input terminal includes a write pointer and a set of write counters; it completes the writing of flit data and direction data, specifically as follows: If full is 1, external data writing is prohibited; If full is 0, then write the flit data to the first register and write the direction data in the four directions to the second register.
7. The method as described in claim 6, characterized in that, The output terminal includes four read pointers and four sets of read counters configured in four data transmission directions; when reading data, the FIFO module sequentially completes data transmission in the four directions, specifically as follows: When the read counter determines that the current transmission path is not empty, it retrieves the direction information corresponding to the read pointer in the current transmission direction. If the direction information is high, the corresponding flit packet is extracted and transmitted. After the transmission is completed, the read pointer is incremented and the read counter is decremented. If the direction information is low, it indicates that the current direction data processing is complete, and the read pointer is incremented by one while the read counter is decremented by one.
8. The method as described in claim 7, characterized in that, After completing the writing of the flit data and the direction data, the method further includes: The write counter increments by one, the write pointer increments by one, and the read counters in all four directions increment by one.
9. The method as described in claim 7, characterized in that, When data transmission is completed in all four directions, the write counter at the input terminal is decremented by one.