Micro-burst detection method and device and readable medium

Abstract

The invention provides a micro burst detection method, and the method comprises the steps: receiving a first message from a receiving port, a port cache of the receiving port comprises a first cache and a second cache, and the second cache is located at one side of the head of a cache queue of the first cache; under the condition that the first cache is completely occupied, the first target message in the first cache is stored in the second cache, and the first target message is the micro burst flow message. By reserving the second cache, when the micro burst occurs, the micro burst flow message in the cache queue of the first cache is stored in the second cache, so that the information of the micro burst flow message can be timely and accurately acquired without using a mirroring means, the networking complexity is reduced, and mirroring port resources of network equipment are saved; the timeliness and accuracy of micro-burst detection can be improved, the micro-burst detection is easy to implement, and the micro-burst detection cost is reduced. The invention further provides a micro-burst detection device and a readable medium.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, specifically to a micro-burst detection method, apparatus, and readable medium. Background Technology

[0002] Common network micro-bursts often occur when network devices are overwhelmed by abnormal traffic. Related technologies handle network device traffic bursts in several ways: If a network device experiences continuous traffic exceeding limits, port cache anomalies can trigger alerts directly. However, this only allows for packet capture and mirroring of continuous abnormal traffic to pinpoint the source. While technologies can detect micro-bursts in a timely manner, monitoring these still requires mirroring. However, during mirroring configuration, the micro-burst may have already disappeared, making accurate acquisition of network device micro-burst traffic difficult.

[0003] Both of the above scenarios require the use of the network device's mirroring function, which necessitates the use of the network device's mirroring port for processing and the connection of a mirroring observation device. Therefore, they have certain disadvantages in terms of timeliness and network complexity, and are difficult to implement. Summary of the Invention

[0004] This disclosure provides a method, apparatus, and readable medium for detecting microbursts.

[0005] In a first aspect, embodiments of this disclosure provide a micro-burst detection method, the method comprising:

[0006] Receive the first message from the receiving port;

[0007] If the first buffer is fully occupied, the first target message in the first buffer is stored in the second buffer; the first buffer is at least a part of the port buffer of the receiving port, the second buffer is a buffer for storing micro-burst traffic messages, and the first target message is the first message in the buffer queue of the first buffer.

[0008] In another aspect, embodiments of this disclosure also provide a microburst detection device, comprising: at least one processor; a memory storing at least one program, wherein when the at least one program is executed by the at least one processor, the at least one processor implements the microburst detection method as described above; and at least one I / O interface configured to enable information interaction between the processor and the memory.

[0009] In another aspect, embodiments of this disclosure also provide a computer-readable medium having a computer program stored thereon, wherein the program, when executed, implements the micro-burst detection method as described above.

[0010] The micro-burst detection method provided in this disclosure includes: receiving a first packet from a receiving port, wherein the receiving port's port buffer includes a first buffer and a second buffer, the second buffer being located at the head of the buffer queue of the first buffer; and storing a first target packet in the first buffer, wherein the first target packet is a micro-burst traffic packet, in the second buffer when the first buffer is fully occupied. By reserving the second buffer, when a micro-burst occurs, the micro-burst traffic packets in the buffer queue of the first buffer are stored in the second buffer, which allows for timely and accurate acquisition of micro-burst traffic packet information without the need for mirroring, reducing network complexity and saving mirroring port resources of network devices. This disclosure improves the timeliness and accuracy of micro-burst detection, is easy to implement, and reduces the cost of micro-burst detection. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the network architecture of an embodiment of the present disclosure;

[0012] Figure 2 This is a schematic diagram of the microburst detection process provided in an embodiment of this disclosure;

[0013] Figure 3 A schematic diagram illustrating the normal forwarding of micro-burst traffic packets provided in this embodiment of the disclosure;

[0014] Figure 4 A flowchart illustrating the process of retaining micro-burst traffic packets provided in this embodiment of the disclosure;

[0015] Figure 5 This is a schematic diagram of the micro-burst detection device provided in an embodiment of this disclosure. Detailed Implementation

[0016] Exemplary embodiments will be described more fully below with reference to the accompanying drawings; however, these exemplary embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this disclosure.

[0017] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0018] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the said feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded.

[0019] The embodiments described herein can be described with reference to plan views and / or cross-sectional views using the ideal schematic diagrams of this disclosure. Therefore, the example illustrations can be modified according to manufacturing techniques and / or tolerances. Therefore, the embodiments are not limited to those shown in the drawings, but include modifications to configurations formed based on manufacturing processes. Therefore, the areas illustrated in the drawings are schematic in nature, and the shapes of the areas shown in the figures illustrate specific shapes of areas of an element, but are not intended to be limiting.

[0020] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.

[0021] Figure 1 This is a schematic diagram of the network architecture according to an embodiment of this disclosure. Figure 1 As shown, the network architecture includes a micro-burst detection device 1 and a network management device 2. The micro-burst detection device 1 is a network device and includes a CPU (Central Processing Unit), a receiving port (i.e., port A), a sending port (i.e., port B), and a port buffer. The port buffer includes a first buffer and a second buffer. Packets received by the receiving port are stored in the buffer queue of the first buffer. When the buffer queue of the first buffer is full, a micro-burst occurs, and the micro-burst traffic packets are stored in the buffer queue of the second buffer. In this way, the CPU can obtain the relevant information of the micro-burst traffic packets and send the relevant information of the micro-burst traffic packets to the network management device 2, thereby achieving fast and accurate detection of micro-bursts.

[0022] In this embodiment of the disclosure, a very small reserved area is allocated at the top of the port buffer of the receiving port; that is, a certain percentage of the buffer space is reserved as a second buffer, and the non-reserved area is used as a first buffer. For example, 0.1% of the port buffer space can be reserved as a second buffer to store micro-burst traffic packets. Figure 1As shown in the figure, the dashed arrow pointing from left to right indicates the storage direction of packets in the cache queue of the first cache. The top of the port cache is the head side of the cache queue of the first cache, that is, the head side of the dashed arrow.

[0023] In some embodiments, the difference between the capacity of the second buffer and the capacity of the first buffer is greater than a preset first threshold. In this embodiment, the capacity of the second buffer is much smaller than the capacity of the first buffer. For example, 0.1% of the port buffer capacity of the receiving port can be used as the second buffer, and 99.9% of the port buffer capacity of the receiving port can be used as the first buffer. Setting the capacity of the second buffer used to store micro-burst traffic packets to a small size ensures that micro-burst traffic packets can be obtained in a timely manner without affecting the normal caching and forwarding of packets.

[0024] This disclosure provides a microburst detection method, which is applied to a microburst detection device. Figure 2 This is a schematic diagram of the micro-burst detection process provided in an embodiment of this disclosure. Figure 2 As shown, the micro-burst detection method includes the following steps:

[0025] Step S11: Receive a first message from the receiving port, wherein the port buffer of the receiving port includes a first buffer and a second buffer, and the second buffer is located at the head of the buffer queue of the first buffer.

[0026] The first message received by the receiving port is stored in the first buffer queue.

[0027] Step S12: If the first buffer is fully occupied, the first target message in the first buffer is stored in the second buffer. The first target message is a micro-burst traffic message.

[0028] When the receiving port receives the first packet, if the first buffer is already fully occupied, it indicates a micro-burst has occurred. In this case, packets from the first buffer's queue are pushed into the second buffer. These pushed packets are called the first destination packets, and they constitute the micro-burst traffic packets. It's important to note that because the first buffer's queue is constantly changing—receiving packets from the receiving port while simultaneously sending packets to the sending port—the first buffer's queue is dynamic. The number of first destination packets entering the second buffer depends on the packet transmission and reception rate.

[0029] Micro-bursts are short-lived and difficult to detect in a timely manner. This embodiment addresses this by reserving a second buffer. When a micro-burst occurs, the micro-burst traffic packets are stored in the second buffer. Therefore, short-lived micro-burst traffic is automatically held in the second buffer, allowing the CPU to acquire this traffic data. This facilitates further analysis by network administrators, enabling them to trace and eliminate the source of interference from the micro-burst traffic. The micro-burst detection device 1 can detect traffic bursts and acquire burst traffic data without relying on other mirroring techniques or consuming device port buffers.

[0030] The micro-burst detection method provided in this disclosure includes: receiving a first packet from a receiving port, wherein the receiving port's port buffer includes a first buffer and a second buffer, the second buffer being located at the head of the buffer queue of the first buffer; and storing a first target packet in the first buffer, wherein the first target packet is a micro-burst traffic packet, in the second buffer when the first buffer is fully occupied. By reserving the second buffer, when a micro-burst occurs, the micro-burst traffic packets in the buffer queue of the first buffer are stored in the second buffer, which allows for timely and accurate acquisition of micro-burst traffic packet information without the need for mirroring, reducing network complexity and saving mirroring port resources of network devices. This disclosure improves the timeliness and accuracy of micro-burst detection, is easy to implement, and reduces the cost of micro-burst detection.

[0031] Depending on the chip capabilities of the micro-burst detection device 1, there are two different processing methods for the first target packet. One method is to send the first target packet normally, i.e., the normal forwarding of micro-burst traffic packets. In this method, the micro-burst traffic packets are temporarily stored in the second buffer, and all packets in the port buffer of the micro-burst detection device 1 can be transmitted normally. The other method is to discard the first target packet, i.e., the retention of micro-burst traffic packets. In this method, if 0.1% of the second buffer space is reserved, the micro-burst detection device 1 can transmit 99.9% of the buffered packets normally, and the 0.1% of packets are not forwarded but only retained, which is equivalent to being discarded due to buffer overload. The following provides a detailed explanation of the two methods for processing the first target packet.

[0032] The following combination Figure 3 The processing method for normally forwarding micro-burst traffic packets is described. In some embodiments, such as... Figure 3 As shown, after storing the first target packet in the first buffer in the second buffer (i.e., step S12), the micro-burst detection method may further include the following steps:

[0033] Step S13: Send the first target message to the sending port according to the cache queue of the second cache.

[0034] In this step, the first target message stored in the second buffer is sent to the sending port according to the order of the second buffer's buffer queue, thereby realizing the forwarding of micro-burst messages.

[0035] like Figure 1 As shown, the second buffer's buffer queue sends packets according to the first-in, first-out principle, prioritizing sending the first target packet that enters the second buffer to port B (e.g., ...). Figure 1 (As shown by the dashed arrow). In the message processing mode where the first target message is sent normally, all messages in the port buffer of the receiving port of the micro-burst detection device 1 will be transmitted normally.

[0036] Step S14: Send the message information of the first target message to the CPU.

[0037] In this embodiment of the disclosure, the message information may be the header information of the message, including but not limited to: MAC (Media Access Control Address) address, IP (Internet Protocol Address) address, etc.

[0038] When the first target packet appears in the second buffer, it indicates that the first buffer of the receiving port has been overwhelmed by a traffic burst to 100% or close to 100% capacity, meaning that a traffic micro-burst has occurred at the receiving port of the micro-burst detection device 1. In this situation, the packet information of the first target packet in the second buffer can be reported to the CPU. After obtaining the packet information of the first target packet, the CPU analyzes the packet information and sends the analysis results to the network management device 2.

[0039] It should be noted that in the processing of normal forwarding micro-burst traffic packets, the execution order of steps 13 and 14 is not limited.

[0040] To ensure the accuracy of micro-burst traffic reporting, when a new packet is received during the transmission of micro-burst traffic packets, if the first buffer is still fully occupied, the second buffer is not allowed to be overwritten. The second buffer can only be reused after the packet information for the micro-burst traffic packet is sent to the CPU. Therefore, in some embodiments, the micro-burst detection method further includes the following steps: during the transmission of a first target packet to the sending port according to the second buffer's buffer queue, if a second packet is received from the receiving port and the first buffer is fully occupied, the second packet is discarded; or, at least one packet is deleted from the port buffer, and the second packet is stored in the first buffer. In other words, during the transmission of micro-burst packets, if a second packet continues to be received, and if the traffic is still exceeding the limit (exceeding the limit refers to a scenario where the first buffer is fully occupied, the second buffer is fully occupied, or packets are temporarily not being received), the second packet can be discarded, or the second packet can be used to overwrite packets stored in the first or second buffer.

[0041] In some embodiments, sending the message information of the first target message to the CPU (i.e., step S14) includes the following steps: if the first target message and the third message stored in the second cache are messages of the same traffic, send the message information of the first target message to the CPU, and do not send the message information of the third message to the CPU. That is, the first target message stored in the second cache may be a message of the same traffic. In this case, to save data transmission resources, only one message information needs to be sent to the CPU for the first target message of the same traffic. For example, the message information of the most recently stored first target message can be sent to the CPU, or the third message stored in the second cache can be sent to the CPU.

[0042] The following combination Figure 4 The process for retaining micro-burst traffic packets is described. In some embodiments, such as Figure 4 As shown, after receiving the first message from the receiving port (i.e., step S11), the micro-burst detection method includes the following steps:

[0043] Step S12': If the first buffer is fully occupied, send a message to the sending port according to the buffer queue of the first buffer.

[0044] In the processing method for delayed micro-burst traffic packets, the first target packet in the second buffer is no longer sent. In this case, the dequeueing packet pointer directly performs operations from the first buffer (e.g., Figure 1 (As shown by the solid arrow in the middle), the packets in the first buffer queue are sent, so that the first target packet in the second buffer can be retained to save micro-burst traffic.

[0045] In some embodiments, such as Figure 4 As shown, after storing the first target packet in the first buffer in the second buffer (i.e., step S12), the micro-burst detection method further includes the following steps:

[0046] Step S13': Query the message information of the first target message in the second cache using the CPU.

[0047] It should be noted that in the method of handling delayed micro-burst traffic packets, the step of querying the packet information of the first target packet in the second buffer by the CPU (step S13') can be executed synchronously with the step of sending the packet to the sending port according to the buffer queue of the first buffer (i.e., step S12'). This places higher demands on CPU performance, and this processing method can be chosen when the CPU performance is strong. In the normal forwarding of micro-burst traffic packets, since it is necessary to wait for the micro-burst traffic to be reported completely before sending the packet, the packet sending will be delayed compared to the method of handling delayed micro-burst traffic packets.

[0048] In some embodiments, such as Figure 4 As shown, after querying the packet information of the first target packet in the second cache by the CPU (i.e., step S13'), the micro-burst detection method further includes the following steps:

[0049] Step S14': Clear the first target message from the second buffer.

[0050] In the handling of delayed micro-burst traffic packets, the first target packet is no longer forwarded. After the CPU queries and obtains the packet information of the first target packet in the second buffer, the first target packet in the second buffer can be discarded, i.e., the second buffer is cleared. By clearing the second buffer after the CPU queries the micro-burst traffic in the second buffer, duplicate reporting can be avoided, buffer resources can be released, and sufficient buffer space can be ensured to store micro-burst traffic normally.

[0051] In the processing of delayed micro-burst traffic packets, there are two ways to query the packet information of the first target packet in the second cache by the CPU: one is to trigger the CPU to notify it, and the other is to query the CPU periodically. The following will explain in detail the two ways of querying the packet information of the first target packet by the CPU.

[0052] Regarding the interrupt-triggered notification method to the CPU, in some embodiments, the step of querying the message information of the first target message in the second cache by the CPU (i.e., step S13) includes the following steps: In response to the presence of the first target message in the second cache, a first target message is notified to the CPU through the receiving port. The first target message is used to instruct the CPU to query the message information of the first target message in the second cache. That is, once the first target message is stored in the second cache, i.e., micro-burst traffic is captured, the CPU is notified to query the message information of the first target message stored in the second cache, thereby enabling the CPU to obtain the micro-burst traffic in the second cache through interrupt processing.

[0053] To ensure the accuracy of micro-burst traffic reporting, if the first buffer is still fully occupied during the process of announcing the first target message to the CPU, the second buffer is not allowed to be overwritten. The second buffer can only be reused after the CPU has completed querying the message information of the first target message in the second buffer. Therefore, in some embodiments, the micro-burst detection method may further include the following steps: during the process of announcing the first target message to the CPU through the receiving port, if a second message is received from the receiving port and the first buffer is fully occupied, the second message is discarded, or at least one message in the first buffer is deleted, and the second message is stored in the first buffer. That is, during the process of announcing the first target message to the CPU, if the receiving port receives a new message, i.e., a second message, and the first buffer is fully occupied and the second buffer is not allowed to be written to, the newly received second message can be processed in two ways: 1. Directly discard the second message; 2. Discard the message already stored in the first buffer and store the second message in the first buffer. It should be noted that the message in the first buffer to be deleted can be randomly selected, or it can be a message with the same traffic as the second message.

[0054] In some embodiments, after announcing the first target message to the CPU through the receiving port, the micro-burst detection further includes the following steps: after a preset quiet period, announcing a second target message to the CPU through the receiving port, the second target message being used to instruct the CPU to query the message information of a second target message in the second cache; the second target message being a message stored in the second cache during the quiet period, the quiet period being a preset time period after announcing the first target message to the CPU through the receiving port.

[0055] To prevent continuous interruptions caused by excessive traffic from placing an additional burden on the CPU, a quiet period can be set. After announcing the first target message to the CPU, if a micro-burst traffic packet exists during the quiet period, the micro-burst traffic packet is stored in the second buffer, and the announcement of the second target message to the CPU is temporarily suspended until the quiet period ends. Then, the second target message is announced to the CPU so that the CPU can query and retrieve the packet information of the second target packet in the second buffer.

[0056] Regarding the CPU cycle query method, in some embodiments, the step of querying the message information of the first target message in the second cache by the CPU (i.e., step S13) includes the following steps: querying the storage status of the second cache by the CPU according to a preset cycle, so that the CPU can obtain the message information of the first target message when the first target message is stored in the second cache.

[0057] In some embodiments, the micro-burst detection further includes the following steps: receiving a fourth message from the receiving port within a preset cycle of the CPU, and deleting the first target message from the second cache and storing the fourth message in the second cache if the fourth message and the first target message stored in the second cache are messages with different traffic.

[0058] Regarding the CPU cycle-based query method, due to the preset cycle, the second cache may be impacted multiple times by different traffic flows within that cycle. Therefore, the second cache only needs to retain the traffic packet from the last impact, with each different traffic impact overwriting the packet stored from the previous impact. Within a preset cycle, if multiple micro-bursts occur, and the newly received packet (i.e., the fourth packet) is from a different traffic flow than the first target packet already stored in the second cache, only the newly received fourth packet is retained, overwriting the already stored first target packet. This ensures that the CPU queries the most recently occurring micro-burst traffic, guaranteeing the timeliness of micro-burst detection and preventing the reserved cache from becoming too full and preventing further detection.

[0059] In some embodiments, if the CPU queries at least two packets of the same traffic stored in the second cache, the CPU queries the packet information of any one of the packets of the same traffic. That is, the first target packet stored in the second cache may be a packet of the same traffic. To save data transmission resources, the CPU only obtains one of the multiple first target packets of the same traffic. For example, the packet information of the most recently stored first target packet among the multiple packets of the same traffic can be reported to the CPU.

[0060] To clearly illustrate the technical solutions of the embodiments of this disclosure, the following is combined with... Figure 1 The following detailed description will be provided through specific embodiments.

[0061] like Figure 1 As shown, the micro-burst detection device 1 allocates 0.1% of the port buffer capacity of port A as a second buffer, serving as a retention area for buffered packets. The non-retention area of ​​the port buffer is the first buffer. Port A of the micro-burst detection device 1 is the receiving port, and the destination port for packet forwarding is port B (the sending port). The packets received at port A cause micro-burst traffic. Currently, the first buffer is fully occupied, and the micro-burst packets arrive at the second buffer. The second buffer stores the micro-burst packets, which are the first destination packets. The packets in the first buffer are forwarded normally and sent to port B.

[0062] Depending on the settings or chip capabilities, micro-burst packets can be sent normally. That is, after the micro-burst traffic is reported to the CPU, the first target packet in the second buffer can be forwarded normally from the outgoing port queue to port B. Alternatively, the first target packet can be discarded. That is, the outgoing queue pointer can be set to perform the operation directly from the first buffer, temporarily storing the first target packet in the second buffer and no longer forwarding it to port B. After the CPU completes the query of the micro-burst traffic, the second buffer can be cleared.

[0063] In the method of discarding the first target packet, the CPU can periodically query the micro-burst traffic in the second buffer. Specifically, the CPU periodically checks the second buffer of each receiving port, i.e., periodically polls, to check whether the second buffer of each receiving port stores the first target packet. If the polling finds that there is a packet stuck in the second buffer of port A, the CPU retrieves the packet information of the stuck packet. Among multiple stuck packets belonging to the same traffic, the CPU only retrieves the packet information of one packet, and does not retrieve the packet information of the other stuck packets of the same traffic. After the micro-burst traffic is retrieved, the second buffer is cleared.

[0064] In the method of discarding the first target packet, the CPU can also acquire the micro-burst traffic in the second buffer via an interrupt. Specifically, once the second buffer contains the first target packet, an interrupt is triggered to notify the CPU, that is, the first target message is announced to the CPU through the receive port. The CPU then acquires the packet information of the first target packet in the second buffer through interrupt handling. The packet information of other delayed packets with the same traffic is no longer acquired. After the micro-burst traffic acquisition is complete, the second buffer is cleared.

[0065] The above processing can be used to retain and capture burst traffic on port A without the need for mirroring or other methods. It only requires reserving some port caching resources, making it simple and effective to implement.

[0066] This disclosure proposes a scheme for detecting micro-bursts and capturing packets that cause micro-burst traffic in a timely manner. It avoids the use of mirroring methods and utilizes the network device's own capabilities to obtain the traffic that causes micro-bursts. The scheme is simple to implement and highly accurate.

[0067] This embodiment utilizes the port cache of a network device, reserving a certain percentage of cache space at the top of the port cache to retain micro-burst traffic entering this cache space, and periodically querying or actively reporting this micro-burst traffic. Specifically, a very small space can be reserved according to the capacity of the port cache, for example, 0.1% of the cache space. Packets in the non-reserved cache space can still continue to be transmitted, but packets that overflow the reserved cache space will always be retained in the reserved cache space until this part of the packet information is obtained by the CPU, and then the reserved cache space is released. This embodiment improves the timeliness and accuracy of micro-burst detection at the cost of sacrificing a small amount of cache space.

[0068] In the event of micro-bursts in network devices, this method can easily and accurately detect the specific details of the micro-burst packets, thereby identifying the source of the burst and enabling appropriate handling. Furthermore, it eliminates the need for traditional mirroring technologies, avoiding the need for mirroring observation devices and offering significant advantages in network deployment costs, while also improving the accuracy of micro-burst detection. Additionally, it does not place an extra burden on the device's CPU, demonstrating strong implementation advantages and significantly enhancing the self-diagnostic capabilities of network devices.

[0069] The embodiments disclosed herein can be applied to network detection in scenarios of sudden traffic bursts in network devices, and are particularly suitable for analyzing and processing burst traffic in micro-burst situations. They are applicable to various telecom-grade networks.

[0070] This disclosure also provides a micro-burst detection device, such as... Figure 5 As shown, it includes:

[0071] At least one processor 501;

[0072] The memory 502 stores at least one program, which, when executed by the at least one processor, enables the at least one processor to implement the micro-burst detection method provided in the foregoing embodiments.

[0073] At least one I / O interface 503 is configured to enable information exchange between the processor and memory.

[0074] Among them, processor 501 is a device with data processing capabilities, including but not limited to central processing unit (CPU); memory 502 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH); I / O interface (read-write interface) 503 enables information interaction between processor 501 and memory 502, including but not limited to data bus (Bus).

[0075] In some embodiments, the processor 501, memory 502, and I / O interface 503 are interconnected via a bus, and thus connected to other components of the computing device.

[0076] This disclosure also provides a computer-readable medium having a computer program stored thereon, wherein the computer program, when executed, implements the micro-burst detection method as provided in the foregoing embodiments.

[0077] It will be understood by those skilled in the art that all or some of the steps in the methods disclosed above, and the functional modules / units in the apparatus, can be implemented as software, firmware, hardware, and suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0078] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A microburst detection method, comprising: The first message is received from the receiving port, wherein the port buffer of the receiving port includes a first buffer and a second buffer, and the second buffer is located at the head of the buffer queue of the first buffer; If the first cache is fully occupied, the first target message in the first cache is stored in the second cache. The first target message is a micro-burst traffic message.

2. The method as described in claim 1, characterized in that, After storing the first target message in the first cache in the second cache, the method further includes: The first target message is sent to the sending port according to the cache queue of the second cache, and the message information of the first target message is sent to the central processing unit (CPU).

3. The method as described in claim 2, characterized in that, The method further includes: During the process of sending the first target message to the sending port according to the cache queue of the second cache, if the second message is received from the receiving port and the first cache is fully occupied, the second message is discarded, or at least one message is deleted from the port cache and the second message is stored in the first cache.

4. The method as described in claim 2, characterized in that, The message information for sending the first target message to the CPU includes: If the first target message and the third message stored in the second cache are messages of the same traffic, the message information of the first target message is sent to the CPU, and the message information of the third message is no longer sent to the CPU.

5. The method as described in claim 1, characterized in that, After receiving the first message from the receiving port, the method further includes: If the first buffer is fully occupied, a message is sent to the sending port according to the buffer queue of the first buffer.

6. The method as described in claim 5, characterized in that, After storing the first target message in the first cache in the second cache, the method further includes: The CPU queries the second cache to retrieve the message information of the first target message.

7. The method as described in claim 6, characterized in that, After querying the message information of the first target message in the second cache via the CPU, the method further includes: Clear the first target message from the second cache.

8. The method as described in claim 6, characterized in that, The step of querying the message information of the first target message in the second cache via the CPU includes: In response to the fact that the first target message is stored in the second cache, a first target message is notified to the CPU through the receiving port. The first target message is used to instruct the CPU to query the message information of the first target message in the second cache.

9. The method as described in claim 8, characterized in that, The method further includes: During the process of announcing the first target message to the CPU through the receiving port, if a second message is received from the receiving port and the first buffer is fully occupied, the second message is discarded, or at least one message in the first buffer is deleted and the second message is stored in the first buffer.

10. The method as described in claim 8, characterized in that, After announcing the first target message to the CPU through the receiving port, the method further includes: After a preset silence period, a second target message is announced to the CPU through the receiving port. The second target message is used to instruct the CPU to query the message information of the second target message in the second cache. The second target message is the message stored in the second cache during the silence period, which is a preset time period after the first target message is announced to the CPU through the receiving port.

11. The method as described in claim 6, characterized in that, The step of querying the message information of the first target message in the second cache via the CPU includes: The CPU queries the storage status of the second cache at a preset period, so that if the CPU has the first target message stored in the second cache, it can obtain the message information of the first target message.

12. The method as described in claim 11, characterized in that, The method further includes: Within one preset cycle of the CPU, a fourth message is received from the receiving port. If the fourth message and the first target message stored in the second cache are messages with different traffic, the first target message is deleted from the second cache, and the fourth message is stored in the second cache.

13. The method as described in claim 8 or 11, characterized in that, If the CPU queries and finds at least two packets of the same traffic stored in the second cache, the CPU queries the packet information of any one of the packets of the same traffic.

14. The method as described in claim 1, characterized in that, The difference between the capacity of the first cache and the capacity of the second cache is greater than a preset first threshold.

15. A micro-burst detection device, characterized in that, include: At least one processor; A memory having at least one program stored thereon, which, when executed by the at least one processor, causes the at least one processor to implement the microburst detection method according to any one of claims 1-14; At least one I / O interface is configured to enable information interaction between the processor and the memory.

16. A computer-readable medium having a computer program stored thereon, wherein, When the program is executed, it implements the microburst detection method as described in any one of claims 1-14.

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