Display device, preparation method thereof and electronic device

Abstract

The invention relates to the technical field of semiconductors, in particular to a display device and a preparation method thereof and an electronic device.The display device comprises a silicon-based substrate, a display layer, a first bonding layer located on one side of the silicon-based substrate and a second bonding layer located on one side of the display layer, and the silicon-based substrate comprises a logic circuit layer; the display layer comprises a plurality of display units distributed at intervals, and the display layer is electrically connected with the logic circuit layer; the first bonding layer and the second bonding layer are located between the silicon-based substrate and the display layer, and the first bonding layer and the second bonding layer are connected. The integration of the display unit and the logic circuit does not need to cut a single display chip and does not need to transfer a large amount of chips, the process is simple, and the preparation time and cost are remarkably reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, in particular to a display device and a preparation method thereof, and an electronic device. BACKGROUND

[0002] Display chip technology (such as Micro LED display chip) is a new type of display technology, which is composed of a large number of micro display chip dot matrix (such as LED dot matrix), and has the advantages of self-luminous, high brightness, long service life, fast response, ultra-high resolution and color saturation, etc. The future development and application potential are huge. At present, in the manufacturing process of display devices, the core technology is to transfer the pre-cut primary color display chip die 20 to the glass substrate 10 by massive transfer technology (for reference Figure 1 ), and to connect the logic chip 30 to the glass substrate 10 by COG (Chip on Galss) or FPC (Flexible Printed Circuit). However, in the above manufacturing technology, massive display chip die 20 cutting and transfer need to be performed, such as in the case of a screen resolution of 1920x 1080, more than 200 million dies need to be transferred to the glass substrate one by one or sequentially, which not only takes time, but also cannot guarantee the alignment accuracy. In addition, TFT array 40 (for reference Figure 2 ) needs to be formed on the glass substrate 10 based on LTPS-TFT (Low Temperature Poly-silicon-Thin Film Transistor) or Oxide-TFT Array (metal oxide array engineering) process, and the logic chip 30 needs to be connected, so the preparation process is complex and the cost is high. SUMMARY

[0003] In view of the above problems of the prior art, the present application provides a display device and a preparation method thereof, and an electronic device, and the specific technical solutions are as follows:

[0004] On the one hand, the present application provides a display device, which comprises a silicon-based substrate, a display layer, a first bonding layer located on one side of the silicon-based substrate, and a second bonding layer located on one side of the display layer. The silicon-based substrate comprises a logic circuit layer, the display layer comprises a plurality of display units distributed at intervals, and the display layer is electrically connected to the logic circuit layer.

[0005] The first bonding layer and the second bonding layer are located between the silicon-based substrate and the display layer, and the first bonding layer and the second bonding layer are bonded.

[0006] In some embodiments, each display unit in the display layer is formed in situ after the first bonding layer and the second bonding layer are bonded based on a patterning process.

[0007] In some embodiments, the silicon-based substrate further comprises a silicon-based substrate, and the logic circuit layer is located on the silicon-based substrate.

[0008] In some embodiments, the first bonding layer and the second bonding layer are bonded by a hybrid bonding technology.

[0009] In some embodiments, the display device further comprises a rewiring layer.

[0010] At least one of the first bonding layer and the second bonding layer is provided with the rewiring layer, and the display layer is electrically connected to the logic circuit layer through the rewiring layer.

[0011] In some embodiments, the plurality of display units display light of the same color.

[0012] In some embodiments, the display device further comprises a color filter layer, which is located on a side of the display layer away from the second bonding layer, and the color filter layer is used to filter light emitted by the display layer to enable the display device to display in color.

[0013] In some embodiments, the display device further comprises a wavelength conversion layer, which is located on a side of the display layer away from the second bonding layer, and the wavelength conversion layer is used to convert the wavelength of light emitted by the display unit.

[0014] In some embodiments, the display device comprises a Micro LED display device.

[0015] In another aspect, the present application provides a method for preparing a display device, which comprises:

[0016] providing a silicon-based substrate and a display substrate, wherein the silicon-based substrate comprises a logic circuit layer, and the display substrate comprises a display material layer;

[0017] forming a first bonding layer on the silicon-based substrate;

[0018] forming a second bonding layer on the display substrate, wherein the second bonding layer is located on a side of the display material layer;

[0019] bonding the first bonding layer and the second bonding layer;

[0020] processing the display material layer based on a patterning process to obtain a display layer comprising a plurality of display units distributed at intervals, and the display layer is electrically connected to the logic circuit layer.

[0021] In some embodiments, the display substrate further comprises a support substrate, the display material layer comprises a plurality of functional material sub-layers, and the functional material sub-layers are continuous structures formed on the support substrate.

[0022] After the first bonding layer and the second bonding layer are bonded, the support substrate is located on a side of the display material layer that faces away from the second bonding layer.

[0023] In some embodiments, the processing of the display material layer based on the patterning process to obtain a display layer comprising a plurality of display units distributed at intervals comprises:

[0024] etching the display material layer based on a patterning process to obtain a plurality of display unit structures distributed at intervals;

[0025] forming an electrode layer on each of the display unit structures to obtain a plurality of display units;

[0026] electrically connecting each of the display units to the logic circuit layer to obtain a display layer electrically connected to the logic circuit layer.

[0027] In some embodiments, before the etching of the display material layer based on the patterning process to obtain a plurality of display unit structures distributed at intervals, the preparation method further comprises:

[0028] removing the support substrate on the display material layer to expose the display material layer.

[0029] In some embodiments, after the processing of the display material layer based on the patterning process to obtain a display layer comprising a plurality of display units distributed at intervals, the preparation method further comprises:

[0030] forming a color filter layer on a side of the display layer that faces away from the second bonding layer, the color filter layer being used to filter light emitted by the display layer to enable the display device to perform color display.

[0031] In some embodiments, after the processing of the display material layer based on the patterning process to obtain a display layer comprising a plurality of display units distributed at intervals, the preparation method further comprises:

[0032] forming a wavelength conversion layer on a side of the display layer that faces away from the second bonding layer, the wavelength conversion layer being used to perform wavelength conversion on light emitted by the display units.

[0033] In some embodiments, the preparation method further comprises at least one of the following steps:

[0034] forming a redistribution layer on one side of the silicon-based substrate before forming the first bonding layer on the silicon-based substrate, the redistribution layer being between the silicon-based substrate and the first bonding layer;

[0035] forming a redistribution layer on one side of the display substrate before forming the second bonding layer on the display substrate, the redistribution layer being between the display material layer and the first bonding layer;

[0036] The redistribution layer is used to electrically connect the display layer and the logic circuit layer.

[0037] In another aspect, the present application provides an electronic device comprising the above display device or a display device prepared by the preparation method of the above display device.

[0038] Based on the above technical solutions, the present application has the following beneficial effects:

[0039] The display device of the present application sets the first bonding layer and the second bonding layer between the silicon-based substrate and the display layer, and realizes the integration of the silicon-based substrate with the logic circuit and the display layer comprising a plurality of display units through the bonding of the two, without the need for single die cutting of the display chip and the need for massive die transfer, the process is simple, the preparation time and cost are significantly reduced, and the display unit position accuracy and device display resolution are improved; in addition, the logic circuit is directly located in the silicon-based substrate of the device, without the need for additional logic chip connection process, further reducing the process complexity and preparation cost.

[0040] The preparation method of the display device of the present application first forms a silicon-based substrate with a logic circuit layer and a display substrate comprising a display material layer, and realizes the whole plate connection of the silicon-based substrate and the display substrate through the formation of the first bonding layer, the second bonding layer and the corresponding bonding layer bonding, and then processes the display material layer through a patterning process to form each display unit on the display device, that is, through the bonding technology and in-situ process preparation, the batch preparation of a large number of display units on the display device and the one-time integration of the logic circuit are realized, without the need for massive transfer process, the preparation process is simple and low in cost, solves the pain point of massive transfer, can realize the mass production of the display device, and is beneficial to the mass production and display resolution improvement of the display device. BRIEF DESCRIPTION OF DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creating any creative labor.

[0042] Figure 1A structural schematic diagram of a display device provided by the prior art;

[0043] Figure 2 A structural schematic diagram of a glass substrate provided with a TFT array by the prior art;

[0044] Figure 3 A cross-sectional view of a display device provided by an embodiment of the present application;

[0045] Figure 4 A cross-sectional view of another display device provided by an embodiment of the present application;

[0046] Figure 5 A cross-sectional view of a silicon-based substrate provided with a first bonding layer provided by an embodiment of the present application;

[0047] Figure 6 A cross-sectional view of a display substrate provided with a second bonding layer provided by an embodiment of the present application;

[0048] Figure 7 A structural cross-sectional view in a preparation process of a display device provided by an embodiment of the present application;

[0049] Figure 8 A structural cross-sectional view in a preparation process of another display device provided by an embodiment of the present application;

[0050] Figure 9 A structural cross-sectional view in a preparation process of another display device provided by an embodiment of the present application;

[0051] Figure 10 A flowchart of a preparation method of a display device provided by an embodiment of the present application;

[0052] Reference signs: 10-glass substrate, 20-display chip die, 30-logic chip, 40-TFT array, 200-silicon-based substrate, 300-display layer, 310-display unit, 311-display unit structure, 311a-N-type material layer, 312b-multilayer quantum well light-emitting layer, 313c-P-type material layer, 312-electrode layer, 320-encapsulation layer, 400-first bonding layer, 410-first dielectric layer, 420-first metal bonding layer, 500-second bonding layer, 510-second dielectric layer, 520-second metal bonding layer, 600-color filter layer, 700-display substrate, 710-supporting substrate, 720-display material layer. DETAILED DESCRIPTION

[0053] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of the present application.

[0054] It should be noted that in the description of the present application, the following defined terms should be applied to the description unless a different definition is provided in the claims or elsewhere in the specification. All numerical values are defined as being "about" unless explicitly indicated otherwise. The term "about" generally refers to a range of values that one of ordinary skill in the art would consider as a substantially equivalent value to produce substantially the same property, function, result, etc. A numerical range expressed by a low value and a high value is defined to include all numerical values falling within the range including the numerical values and all sub-ranges included in the range.

[0055] It should be noted that in the description of the present application, the terms "first", "second", etc. are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion.

[0056] It should be noted that in the description of the present application, the terms "on", "over", "above", "upper" should be interpreted in the broadest sense, meaning that the description of the terms "component can be disposed on another component in a direct contact manner, or there can be intermediate components or layers between the components". In addition, in order to facilitate the description, the present application can also use spatial relative terms such as "under", "below", "under", "on", "over", "above", "lower", "upper" to describe the relationship between one element or component and another element or component shown in the drawings. In addition to the orientation described in the drawings, the spatial relative terms are also intended to cover different orientations of the device in use or operation. The device can be oriented in other ways (rotated 90° or in other orientations), and the spatial relative description used in the present application can be interpreted accordingly.

[0057] As used herein, the term "layer" refers to a portion of material that includes a region having a thickness. A layer can extend over an entire underlying or overlying structure, or can extend across only a partial area of an underlying or overlying structure. Further, a layer can be a region of a homogenous or inhomogenous continuous structure that has a thickness that is less than the thickness of the continuous structure. For example, a layer can be between the top surface and the bottom surface of a continuous structure or between any pair of horizontal planes therebetween. A layer can extend horizontally, vertically, and / or along a tapered surface. A layer can include multiple layers. For example, a wiring layer can include one or more doped or undoped semiconductor layers or metal layers, and can have the same or different materials.

[0058] It should be understood that, as used herein, "surface", such as "first surface", "second surface", etc. refers to the XY plane of a silicon-based substrate, an interlayer, a wafer, or a display substrate, etc. corresponding to the XY plane of a display device, and "thickness direction" refers to the Z direction relative to the XY plane.

[0059] The following describes Figures 3-4 A display device of the present application is described. It can be understood that the display device in the drawings is only a technical solution of one example embodiment of the present application, and the display device of the present application can include fewer or more structural features, and is not limited to the device structure described in the drawings. Reference is made to Figures 3-4 which is a cross-sectional view of a display device provided by an embodiment of the present application. The display device includes a silicon-based substrate 200, a display layer 300, a first bonding layer 400 located on one side of the silicon-based substrate 200, and a second bonding layer 500 located on one side of the display layer 300.

[0060] The silicon-based substrate 200 includes a logic circuit layer. Specifically, a logic integrated circuit (Logic IC) is formed in the logic circuit layer, which is used to process digital signals of the display device and perform various logic operations, including display unit driving, etc. In a possible implementation, the logic circuit layer can be formed on the silicon-based substrate by deposition process, patterning process, etc., and includes a plurality of circuit elements.

[0061] In a possible implementation, the display device includes a Micro LED display device. Accordingly, the display unit is a Micro LED display unit.

[0062] The display layer 300 includes a plurality of display units 310 arranged at intervals, and the display layer 300 is electrically connected to the logic circuit layer. Specifically, each display unit 310 forms a pixel point of a display screen, and the plurality of display units 310 are arranged at intervals in the display device to form a display unit array. The position, distribution, and spacing between adjacent display units 310 can be set based on actual application requirements. Each display unit 310 is electrically connected to the logic circuit layer of the silicon-based substrate 200 to control the switching and display state of each display unit 310 through the output signal of the logic circuit layer. The electrical connection can be achieved at least by a via hole interconnection process.

[0063] In a possible implementation, the first bonding layer 400 is formed on one side of the silicon-based substrate 200, and can be prepared by epitaxial growth or deposition, patterning, and the like. In a possible implementation, referring to Figure 4 , the first bonding layer 400 can include a first dielectric layer 410 and a first metal bonding layer 420 located in the first dielectric layer 410, and the first metal bonding layer 420 includes a plurality of first metal bonding structures arranged at intervals, and the surface of the first metal bonding structure is exposed to the bonding surface of the first dielectric layer 410 facing the second bonding layer 500. The material of the first dielectric layer 410 can include, but is not limited to, SiO or SiCN and the like, which can achieve interface bonding and high dielectric coefficient, so as to insulate different first metal bonding structures, and the first dielectric layer 410 can be formed on the silicon-based substrate 200 by epitaxial growth or deposition process; the material of the first metal bonding structure can include, but is not limited to, copper and the like, which is a conductive metal material capable of achieving interface bonding, and can be formed in the first dielectric layer 410 by a patterning process, and can be connected to the logic circuit layer by a via hole interconnection process. In some embodiments, the first bonding layer 400 can include at least one first dielectric layer 410 and at least one first metal bonding layer 420 located in the first dielectric layer 410; for example, referring to Figure 3 and Figure 4 , the first bonding layer 400 includes two first dielectric layers 410 and two electrically connected first metal bonding layers 420.

[0064] In a possible implementation, the second bonding layer 500 is formed on one side of the display layer 300, and can be prepared by epitaxial growth or deposition, patterning and the like. In a possible implementation, the second bonding layer 500 can include a second dielectric layer 510 and a second metal bonding layer 520 in the second dielectric layer 510, and the second metal bonding layer 520 includes a plurality of second metal bonding structures spaced apart from each other, and surfaces of the second metal bonding structures are exposed to a bonding surface of the second dielectric layer 510 facing the first bonding layer 400. The material of the second dielectric layer 510 can include, but is not limited to, SiO or SiCN and the like, which can realize interface bonding and has a high dielectric coefficient, so as to insulate different second metal bonding structures, and the second dielectric layer 510 can be formed on the display layer 300 by epitaxial growth or deposition and the like. The material of the second metal bonding structure can include, but is not limited to, copper and the like, which is a conductive metal material capable of realizing interface bonding, and can be formed in the second dielectric layer 510 by a patterning process. In some embodiments, the second bonding layer 500 can include at least one second dielectric layer 510 and at least one second metal bonding layer 520 in the second dielectric layer 510, for example, referring to Figure 3 and Figure 4 The second bonding layer 500 includes two second dielectric layers 510 and two second metal bonding layers 520 electrically connected.

[0065] The first bonding layer 400 and the second bonding layer 500 are located between the silicon-based substrate 200 and the display layer 300, and the first bonding layer 400 and the second bonding layer 500 are bonded. Specifically, the first metal bonding layer 420 is bonded with the second metal bonding layer 520, and the first dielectric layer 410 is bonded with the second dielectric layer 510.

[0066] In a possible implementation, the first bonding layer 400 and the second bonding layer 500 are bonded by a hybrid bonding technology, without relying on soldering or adhesives, so as to reduce device resistance and signal delay, and have excellent heat dissipation performance, and optimize heat dissipation efficiency of the display unit 310.

[0067] In the conventional process, cutting and chip packaging are performed for each display unit 310 to form a display chip die, and a TFT array is formed on a glass substrate by LTPS-TFT (low-temperature polysilicon TFT) or Oxide-TFT Array (metal oxide array engineering), and then a large number of single display chip dies are integrated on the glass substrate by mass transfer, similar to a pixel array of a CIS (CMOS image sensor), which is complex, high in cost, and poor in transfer position accuracy. The display device of the present application is provided with a first bonding layer 400 and a second bonding layer 500 between the silicon-based substrate 200 and the display layer 300, and the integration of the silicon-based substrate 200 with the logic circuit and the display layer 300 including a plurality of display units 310 is achieved by the bonding of the two, without the need for single cutting of the display chip die and mass transfer of the die, which is simple in process, significantly reduces the preparation time and cost, and improves the display unit position accuracy and the device display resolution. In addition, the logic circuit is directly located in the silicon-based substrate 200 of the device, without the need for an additional logic chip connection process, which further reduces the process complexity and preparation cost.

[0068] In a possible implementation, the silicon-based substrate 200 further includes a silicon-based substrate, and the logic circuit layer is located on the silicon-based substrate. The silicon-based substrate can realize in-situ preparation of the logic circuit and provide support for the formation of the first bonding layer and the bonding with the second bonding layer, which is beneficial to subsequent batch in-situ preparation of the display units 310, and at the same time simplifies the logic chip integration process and reduces the production cost.

[0069] Specifically, the material of the silicon-based substrate is a semiconductor material containing silicon, including but not limited to single crystal silicon, doped silicon, SiGe, Silicon On Insulator (SOI), etc. In a preferred implementation, the silicon-based substrate 200 is obtained by performing logic circuit preparation on a wafer.

[0070] In a possible implementation, each display unit 310 in the display layer 300 is formed in situ based on a patterning process after the first bonding layer 400 and the second bonding layer 500 are bonded, that is, each display unit 310 in the display layer 300 has not been formed before the bonding, and only a continuous display material layer is formed on the support substrate 710, after the bonding, the corresponding display material layer 720 of the display layer 300 is processed by a patterning process such as photolithography to form each display unit 310 in situ at each preset position. In this way, the display device is directly prepared in situ by using the patterning process, without using the massive transfer process, which not only simplifies the preparation process, but also greatly improves the display resolution of the display device. Specifically, the first bonding layer 400 is formed on the silicon-based substrate 200 on which the logic circuit layer is formed, and the second bonding layer 500 is formed on the display substrate 700 having the display material layer 720, then the first bonding layer 400 and the second bonding layer 500 are bonded to integrate the display substrate 700 and the silicon-based substrate 200, and then the display material layer 720 is processed by a patterning process to obtain the display layer 300 including a plurality of spaced display units 310.

[0071] In a possible implementation, the patterning process of the display unit 310 can at least include gluing, exposure and development, photolithography, and cleaning. The display unit 310 can include a display unit structure and an electrode layer 312, the electrode layer is electrically connected with the display unit structure and the logic circuit layer respectively, and the display unit structure is used to emit light after being powered on. The display unit structure can include a plurality of functional material sub-layers, for example, can include an N-type material layer 311a, a multi-layer quantum well light emitting layer 311b (MQWs), and a P-type material layer 311c. The N-type material layer 311a and the P-type material layer 311c form a PN junction and form a recombination light emitting area after being powered on. The multi-layer quantum well light emitting layer 311b is located between the N-type material layer 311a and the P-type material layer 311c, and is used to limit the movement of electrons, thereby increasing the recombination probability of electrons and holes and improving the light emitting efficiency. The material of the N-type material layer 311a can be, for example, N-type gallium nitride material or other N-type material capable of forming a PN junction and recombination light emitting. The material of the P-type material layer 311c can be, for example, P-type gallium nitride material or other P-type material capable of forming a PN junction and recombination light emitting. The material of the multi-layer quantum well light emitting layer 311b can be, for example, InGaN / AlGaN or GaAs / AlGaAs or other material capable of limiting the movement of carriers. The electrode layer 312 includes a positive electrode and a negative electrode of the display unit 310, and the material of the electrode layer 312 can include but is not limited to Ta, Ti, Al, Mo, Cu, Co, W, Ag, Au, or other alternative conductive material. The electrode layer 312 can be connected with the logic circuit layer by a process such as through-hole interconnection.

[0072] In a possible implementation, the plurality of display units 310 display light of the same color. For example, the light can be blue light, and the display units 310 can be made of gallium nitride-based semiconductor materials to emit blue light.

[0073] In a possible implementation, the display device further includes a color filter layer 600 located on a side of the display layer 300 away from the second bonding layer 500. The color filter layer 600 is configured to filter light emitted by the display layer 300, so that the display device can display colors. The color filter layer 600 includes a plurality of color filter units located above at least some of the display units 310. The color filter units are configured to purify light beams, realize color display, remove stray light, and reduce light noise. Specifically, the color filter units cover the light emitting surfaces of the display units 310.

[0074] In a possible implementation, the display device further includes a wavelength conversion layer located on a side of the display layer 300 away from the second bonding layer 500. The wavelength conversion layer is configured to convert the light emitted by the display units 310. The wavelength conversion layer includes wavelength conversion structures located on the display units 310. The wavelength conversion structures are configured to convert part of the light emitted by the display units 310 into light of other colors, so as to realize color display. In an embodiment, the wavelength conversion layer includes first, second, and third wavelength conversion structures. The first wavelength conversion structure is configured to convert light of a first color emitted by the display units 310 into light of a second color. The second wavelength conversion structure is configured to convert the light of the first color emitted by the display units 310 into light of a third color. The third wavelength conversion structure is configured to transmit the light of the first color. For example, the light of the first, second, and third colors can be blue light, red light, and green light, respectively. It can be understood that the colors of light described above are merely examples, and other colors of light that can be used for color display can also be used. In addition, the wavelength conversion layer can include wavelength conversion structures configured to convert the light of the first color into more colors of light, which can be set based on actual application requirements, and the present application is not limited in this regard.

[0075] The materials of the first and second wavelength conversion structures can include a colloid containing a wavelength conversion substance, for example, quantum dots or fluorescent powder. The third wavelength conversion structure described above can be a transparent material that does not contain a wavelength conversion substance, or a colloid containing a wavelength conversion substance configured to convert light of other colors into light of the first color. The transparent material can be photoresist or the like.

[0076] In some embodiments, the color filter layer 600 or the wavelength conversion layer is formed on the display layer 300. In other embodiments, the wavelength conversion layer and the color filter layer 600 are stacked on the display layer 300. The color filter layer 600 purifies light beams emitted by the wavelength conversion layer, and further optimizes the light emitting effect.

[0077] In a possible implementation, after the display units 310 are formed, the display device can further include an encapsulation layer 320, which is used to fill the gaps between the display units and to planarize the device, and a wavelength conversion layer or a color filter layer is located on the encapsulation layer 320.

[0078] In a possible implementation, the display device further includes a re-distributed layer (RDL). The re-distributed layer is arranged at least one of between the first bonding layer 400 and the silicon-based substrate 200, and between the second bonding layer 500 and the display layer 300, and the display layer 300 is electrically connected to the logic circuit layer through the re-distributed layer. Specifically, the re-distributed layer is used for interconnection between the display layer 300 and the logic circuit layer and electrical extension in an XY plane, where the XY plane refers to the XY plane of the display layer 300 or the silicon-based substrate 200. The re-distributed layer can be formed at least by photolithography, metal layer deposition, and dielectric layer deposition processes, and metal wires are formed in the layer to achieve redistribution of IO ports, electrical signals, power signals, or ground signals. The dielectric layer in the re-distributed layer can be made of a high polymer material, and the material of the metal wires includes but is not limited to one or more of copper, titanium, tungsten, aluminum, gold, nickel, tantalum, titanium nitride, and tantalum nitride, or other alternative conductive materials. By arranging the re-distributed layer, reasonable wiring connection between the display units 310 and the logic circuit layer is achieved, which is conducive to driving and controlling a large number of display units.

[0079] In some embodiments, the re-distributed layer is arranged between the first bonding layer 400 and the silicon-based substrate 200, and is electrically connected to the first bonding layer 400 and the logic circuit layer, respectively, so as to realize signal transmission between the display units 310 and the logic circuit layer through the re-distributed layer, the first bonding layer 400, the second bonding layer 500, and other hole interconnection structures. In other embodiments, the re-distributed layer is arranged between the second bonding layer 500 and the display layer 300, and is electrically connected to the second bonding layer 500 and the display layer 300, respectively, so as to realize signal transmission between the display units 310 and the logic circuit layer through the first bonding layer 400, the second bonding layer 500, the re-distributed layer, and other hole interconnection structures. In other embodiments, the re-distributed layer is arranged between the first bonding layer 400 and the silicon-based substrate 200, and the re-distributed layer is also arranged between the second bonding layer 500 and the display layer 300, so as to realize flexible wiring and conduction connection of the display units 310.

[0080] The following describes the display device provided in the embodiments of the present application in combination with Figures 4-10 The preparation method of the display device provided in the embodiments of the present application can be applied to the preparation of the display device described above, Figure 10is a flowchart of a method for preparing a display device. The present specification provides method operation steps as the embodiments or flowcharts, but can include more or less steps based on conventional or non-creative labor. The order of steps listed in the embodiments is only one of the many execution sequences of the steps, and does not represent the only execution sequence. In actual execution of the preparation method, the method sequence shown in the embodiments or the drawings can be executed or parallel executed. The preparation method of the display device can include S11-S15:

[0081] S11: providing a silicon-based substrate 200 and a display substrate 700, the silicon-based substrate 200 comprising a logic circuit layer, and the display substrate 700 comprising a display material layer 720.

[0082] In a possible implementation, the silicon-based substrate 200 comprises a silicon-based substrate, and the logic circuit layer is formed in situ on the silicon-based substrate by a deposition process, a patterning process, etc. For example, a wafer is provided, and the wafer is subjected to deposition and patterning processes to form a logic circuit layer, thereby obtaining a silicon-based substrate 200 comprising a silicon-based substrate and a logic circuit layer.

[0083] In a possible implementation, the display material layer 720 is patterned in a subsequent process to obtain a plurality of display units 310.

[0084] In a possible implementation, referring to Figure 6 , the display substrate 700 further comprises a support substrate 710, and the display material layer 720 comprises a plurality of functional material sublayers, and the functional material sublayers are continuous structures formed on the support substrate 710. For example, the display material layer 720 can comprise an N-type material layer 311a, a multi-layer quantum well light-emitting layer 311b, and a P-type material layer 311c. After the first bonding layer 400 and the second bonding layer 500 are bonded, the support substrate 710 is located on a side of the display material layer 720 away from the second bonding layer 500. In this way, the support substrate 710 is used as a base during preparation of the display material layer 720, so as to facilitate formation of a continuous material layer, and the support substrate 710 can provide support to protect the display material layer 720 during a subsequent bonding process.

[0085] In a possible implementation, the display material layer 720 can be formed on the support substrate 710 by deposition or epitaxial growth, and the like. Specifically, each functional material sub-layer can be formed in sequence on the support substrate 710, for example, the N-type material layer 311a is epitaxially grown on the support substrate 710 first, then the multilayer quantum well light-emitting layer 311b is epitaxially grown on the N-type material layer 311a, and then the P-type material layer 311c is epitaxially grown on the multilayer quantum well light-emitting layer 311b, to obtain the display material layer 720. The material constituting the support substrate 710 can include, but is not limited to, at least one of the following materials: silicon or doped silicon, silicon-containing semiconductor materials (such as SiGe, SiC, etc.), silicon on insulator (SOI), compound semiconductors (such as III-V compound semiconductor materials (such as GaAs, GaAsP, AlInAs, etc.), or other semiconductor materials capable of deposition or epitaxial growth of the display material layer 720. In an embodiment, the support substrate 710 is a silicon substrate, the N-type material layer 311a is N-GaN, the P-type material layer 311c is P-GaN, and the multilayer quantum well light-emitting layer 311b is InGaN / AlGaN.

[0086] S12: Forming a first bonding layer 400 on the silicon-based substrate 200.

[0087] In a possible implementation, with reference to Figure 5 The first bonding layer 400 can be formed on the silicon-based substrate 200 by deposition or epitaxial growth, patterning, and the like. The first bonding layer 400 includes at least one first dielectric layer 410 and a first metal bonding layer 420 in the first dielectric layer 410. For example, the first dielectric layer 410 can be formed by deposition, and the first metal bonding layer 420 exposed on the surface of the first dielectric layer 410 can be formed by patterning. In the case of two or more first dielectric layers 410 and first metal bonding layers 420, the deposition and patterning processes described above can be repeated to form multiple first dielectric layers 410 and multiple first metal bonding layers 420. The first metal bonding layer 420 is electrically connected to the logic circuit layer.

[0088] S13: Forming a second bonding layer 500 on the display substrate 700, and the second bonding layer 500 is located on one side of the display material layer 720.

[0089] In a possible implementation, with reference to Figure 6The second bonding layer 500 can be formed above the display material layer 720 by deposition or epitaxial growth, and patterning processes, etc. The second bonding layer 500 includes at least one second dielectric layer 510 and a second metal bonding layer 520 in the second dielectric layer 510. Exemplarily, the second dielectric layer 510 can be formed by deposition, and the second metal bonding layer 520 exposed on the surface of the second dielectric layer 510 can be formed by patterning processes. In the case of two or more layers of the second dielectric layer 510 and the second metal bonding layer 520, the above deposition and patterning processes can be repeated to form multiple layers of the second dielectric layer 510 and the second metal bonding layer 520.

[0090] S14: bonding the first bonding layer 400 and the second bonding layer 500.

[0091] In possible embodiments, the first bonding layer 400 and the second bonding layer 500 are bonded. In preferred embodiments, the first bonding layer 400 and the second bonding layer 500 are bonded by hybrid bonding technology, and the bonding process can include at least surface cleaning and planarization of the bonding layer, plasma treatment, alignment bonding, and annealing, etc. Specifically, referring to Figure 7 The first metal bonding layer 420 is aligned and bonded with the second metal bonding layer 520, and the first dielectric layer is bonded with the second dielectric layer.

[0092] S15: processing the display material layer 720 based on a patterning process to obtain a display layer 300 including a plurality of spaced display units 310, and the display layer 300 is electrically connected with the logic circuit layer.

[0093] In summary, the preparation method of the display device of the present application first forms a silicon-based substrate with a logic circuit layer and a display substrate including a display material layer, and then realizes the whole-plate connection of the silicon-based substrate and the display substrate by forming a first bonding layer, a second bonding layer, and corresponding bonding layer bonding, and then processing the display material layer by a patterning process to form each display unit on the display device, that is, the batch preparation of a large number of display units on the display device is realized by bonding technology and in-situ process, and the logic circuit is integrated once, without the need for massive transfer process, the preparation process is simple and low in cost, solves the pain point of massive transfer, can realize the mass production of display devices, and is conducive to the mass production and display resolution improvement of display devices.

[0094] In possible embodiments, S15 can include:

[0095] S151: etching the display material layer 720 based on a patterning process to obtain a plurality of spaced display unit structures 311;

[0096] S152: forming an electrode layer 312 on each display unit structure 311, to obtain a plurality of display units 310;

[0097] S153: electrically connecting each display unit 310 with the logic circuit layer, to obtain a display layer 300 electrically connected with the logic circuit layer.

[0098] Specifically, the patterning process in S151 can at least include exposure, development, photolithography, etc., and can further include a BSI (Back Side Isolation) process, etc. It can be understood that the etching patterns of different functional material sub-layers in the display material layer 720 can be different, and therefore the patterning process can be performed for each functional material sub-layer based on the pattern requirements, to obtain the display unit structure 311 (see Figure 8 ).

[0099] Specifically, referring to Figure 9 , the electrode layer can be formed on the display unit structure 311 through a deposition and patterning process, and the electrode layer includes an electrode structure of each display unit, specifically including a positive electrode and a negative electrode. Further, the electrode layer can be electrically connected with the logic circuit layer through a via interconnection process, etc., and the display layer 300 is electrically connected with the logic circuit layer, to realize the driving control of each display unit 310.

[0100] In a possible implementation, referring to Figure 4 , after the display unit 310 is formed, the preparation method can further include: forming an encapsulation layer 320 on the display layer, the encapsulation layer 320 is used to fill the gaps between the display units and to perform device planarization, which is beneficial to the formation of a color filter layer or a wavelength conversion layer in the subsequent process.

[0101] In a possible implementation, before S151, the preparation method further includes: removing the support substrate 710 on the display material layer 720 to expose the display material layer 720, so as to facilitate the patterning process of the display material layer. It can be understood that the support substrate 710 is located on the side of the display material layer 720 away from the second bonding layer 500, and the support substrate 710 needs to be removed to expose the display material layer 720 before the subsequent display unit preparation. Specifically, the support substrate 710 can be removed by using a grinding or etching process. For example, the support substrate 710 can be removed by using a BSI-CMP (Back Side Isolation-Chemical Mechanical Planarization) process, to ensure the flatness of the wafer surface, reduce defects and impurities, and improve the reliability and stability of the device.

[0102] In a possible implementation, referring to Figure 4After S15, the preparation method can further include S16: forming a color filter layer 600 on the side of the display layer 300 away from the second bonding layer 500, to realize color display. The color filter layer 600 can be prepared by a CF (Color Filter) process, and can be prepared by using a photoresist liquid raw material of multiple colors, and using photo-etching or other technologies (such as a pigment dispersion or a transfer method) to form an array of filter units of multiple colors, such as an array of red, green and blue colors, to realize color display.

[0103] In some possible embodiments, after S15, the preparation method further includes S17: forming a wavelength conversion layer on the side of the display layer 300 away from the second bonding layer 500, the wavelength conversion layer being configured to convert the wavelength of light emitted by the display unit 310. The wavelength conversion layer can be formed by at least one of spin coating or spray coating, exposure, development and etching, and specifically, the wavelength conversion structure for each color of light can be formed by spin coating or spray coating, exposure, development and etching once, to form the wavelength conversion structure corresponding to each color of light.

[0104] In some possible manners, the color filter layer 600 is formed on the display layer 300 to realize color display, and in some other embodiments, the color filter layer 600 is formed on the wavelength conversion layer to further purify the emitted light beam and optimize the color display effect.

[0105] In some possible embodiments, the preparation method further includes at least one of the following steps:

[0106] S21: before forming the first bonding layer 400 on the silicon-based substrate 200, a redistribution layer is formed on one side of the silicon-based substrate 200, the redistribution layer being located between the silicon-based substrate 200 and the first bonding layer 400.

[0107] S22: before forming the second bonding layer 500 on the display substrate 700, a redistribution layer is formed on one side of the display substrate 700, the redistribution layer being located between the display material layer 720 and the first bonding layer 400.

[0108] Specifically, the re-wiring layer is used to electrically connect the display layer 300 and the logic circuit layer, and can be formed by at least photolithography, metal layer deposition, dielectric layer deposition and the like. In the case that the re-wiring layer is only formed between the silicon-based substrate 200 and the first bonding layer 400, the re-wiring layer is electrically connected with the logic circuit layer and the first bonding layer 400 respectively, and is electrically connected with the display unit 310 through processes such as via hole interconnection. In the case that the re-wiring layer is only formed between the display layer 300 and the second bonding layer 500, the re-wiring layer is electrically connected with the display layer 300 and the second bonding layer 500 respectively, and is electrically connected with the logic circuit layer through processes such as via hole interconnection. In the case that the re-wiring layer is arranged between the first bonding layer 400 and the silicon-based substrate 200, and between the second bonding layer 500 and the display layer 300, the display unit 310 is electrically connected with the logic circuit layer through at least two re-wiring layers. The number of I / O ports is effectively increased through the re-wiring layer, and the driving of each display unit 310 is realized.

[0109] It can be understood that the display device embodiments and the display device preparation method embodiments are based on the same application concept, and the display device can be prepared by the display device preparation method.

[0110] Correspondingly, the application further provides an electronic device, which comprises the display device or the display device prepared by the display device preparation method.

[0111] Correspondingly, the application provides an electronic device, which comprises the electronic device, and the electronic device comprises the display device or the display device prepared by the display device preparation method.

[0112] The electronic device of the application embodiment can be selected from any electronic product or equipment such as a mobile phone, a personal digital assistant (PDA), a pad, a notebook computer, a game machine, a television, a video compact disc (VCD), a digital video disc (DVD), a navigator, a camera, a video camera, a recording pen, an MP3, an MP4, a PlayStation Portable (PSP) and the like, and can also be any intermediate product of an electronic device prepared by the display device.

[0113] It should be noted that each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same or similar parts between each embodiment can be referred to each other.

[0114] The foregoing description has been set forth in terms of specific embodiments of the application. It is to be understood that modifications which do not depart from the scope of the application will occur to those skilled in the art upon a reading of the foregoing description. Accordingly, it is intended that the scope of the application be governed by the following claims.

Claims

1. A display device, characterized in that, The device includes a silicon substrate, a display layer, a first bonding layer located on one side of the silicon substrate, and a second bonding layer located on one side of the display layer. The silicon substrate includes a logic circuit layer, and the display layer includes a plurality of spaced display units, and the display layer is electrically connected to the logic circuit layer. The first bonding layer and the second bonding layer are located between the silicon substrate and the display layer, and the first bonding layer and the second bonding layer are bonded together.

2. The display device according to claim 1, characterized in that, Each display unit in the display layer is formed in situ based on a patterning process after the first bonding layer and the second bonding layer are bonded together.

3. The display device according to claim 1, characterized in that, The silicon-based substrate further includes a silicon-based substrate, and the logic circuit layer is located on the silicon-based substrate.

4. The display device according to claim 1, characterized in that, The first bonding layer and the second bonding layer are joined by a hybrid bonding technique.

5. The display device according to any one of claims 1-4, characterized in that, It also includes a rewiring layer; The redistribution layer is provided between the first bonding layer and the silicon substrate, and between the second bonding layer and the display layer, and the display layer is electrically connected to the logic circuit layer through the redistribution layer.

6. The display device according to any one of claims 1-4, characterized in that, The multiple display units display the same color light.

7. The display device according to claim 6, characterized in that, It also includes a color filter layer, which is located on the side of the display layer opposite to the second bonding layer. The color filter layer is used to filter the light emitted from the display layer so that the display device can perform color display.

8. The display device according to claim 6, characterized in that, It also includes a wavelength conversion layer, which is located on the side of the display layer opposite to the second bonding layer, and is used to convert the wavelength of the light emitted by the display unit.

9. The display device according to any one of claims 1-4, characterized in that, The display device includes a MicroLED display device.

10. A method for fabricating a display device, characterized in that, The preparation method includes: A silicon-based substrate and a display substrate are provided, wherein the silicon-based substrate includes a logic circuit layer and the display substrate includes a display material layer; A first bonding layer is formed on the silicon substrate; A second bonding layer is formed on the display substrate, and the second bonding layer is located on one side of the display material layer; The first bonding layer and the second bonding layer are bonded together; The display material layer is processed using a patterning process to obtain a display layer comprising multiple spaced display units, and the display layer is electrically connected to the logic circuit layer.

11. The method for fabricating a display device according to claim 10, characterized in that, The display substrate further includes a support substrate, and the display material layer includes multiple functional material sublayers, wherein the functional material sublayers are a continuous structure formed on the support substrate; After the first bonding layer and the second bonding layer are bonded, the support substrate is located on the side of the display material layer opposite to the second bonding layer.

12. The method for fabricating a display device according to claim 10 or 11, characterized in that, The process of processing the display material layer using a patterning technique to obtain a display layer comprising multiple spaced display units includes: The display material layer is etched using a patterning process to obtain a multiple spaced display unit structure; An electrode layer is formed on each of the aforementioned display unit structures to obtain a plurality of the aforementioned display units; Each of the display units is electrically connected to the logic circuit layer to obtain a display layer that is electrically connected to the logic circuit layer.

13. The method for fabricating a display device according to claim 12, characterized in that, Before etching the display material layer using a patterning process to obtain a plurality of spaced display unit structures, the fabrication method further includes: Remove the supporting substrate on the display material layer to expose the display material layer.

14. The method for fabricating a display device according to claim 10 or 11, characterized in that, After processing the display material layer using a patterning process to obtain a display layer comprising a plurality of spaced display units, the fabrication method further includes: A color filter layer is formed on the side of the display layer opposite to the second bonding layer. The color filter layer is used to filter the light emitted from the display layer so that the display device can perform color display.

15. The method for fabricating a display device according to claim 10 or 11, characterized in that, The preparation method further includes at least one of the following steps: Before forming the first bonding layer on the silicon substrate, a redistribution layer is formed on one side of the silicon substrate, the redistribution layer being located between the silicon substrate and the first bonding layer; Before forming the second bonding layer on the display substrate, a redistribution layer is formed on one side of the display substrate, the redistribution layer being located between the display material layer and the first bonding layer; The rewiring layer is used to electrically connect the display layer and the logic circuit layer.

16. An electronic device, characterized in that, The display device includes any one of claims 1 to 9, or a display device manufactured using the method of any one of claims 10 to 15.

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