Signal acquisition circuit, signal processing device and signal conditioning equipment

Abstract

The invention provides a signal acquisition circuit, a signal processing device and signal conditioning equipment, and relates to the technical field of power electronics, the circuit comprises a rectification circuit, a hysteresis comparison circuit and an output circuit, the rectification circuit is connected with a speed sensor and the hysteresis comparison circuit, the rectification circuit is used for outputting an initial output signal based on the speed sensor, and the hysteresis comparison circuit is connected with the output circuit. Determining a rectification signal; the hysteresis comparison circuit is also connected with the output circuit, and the hysteresis comparison circuit is used for comparing the rectification signal with a positive hysteresis threshold and a negative hysteresis threshold in a hysteresis window to determine a first output signal; when the rectification signal is in the hysteresis window, the first output signal keeps the current level signal; the output circuit is further connected with the processor and used for determining a target output signal based on the first output signal and sending the target output signal to the processor. According to the invention, stable output can be maintained when the initial output signal slightly fluctuates due to interference of noise and the like, and the anti-interference degree is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a signal acquisition circuit, a signal processing device, and a signal conditioning equipment. Background Technology

[0002] Currently, speed sensors used in rail transit include Hall effect speed sensors, magnetoelectric speed sensors, and photoelectric speed sensors. One type of speed sensor outputs a sinusoidal signal, such as the AG43E. Speed ​​sensors that output sinusoidal signals utilize the principle of a tachometer motor, have a simple internal structure, and a low failure rate, making them suitable for applications requiring high sensor lifespan.

[0003] However, as Figure 1 As shown, the acquisition circuit corresponding to the speed sensor that outputs a sine wave signal uses a single threshold. When the initial output signal (the sine wave signal output by the speed sensor) fluctuates around the single threshold due to noise and other interference, the output signal will change with the fluctuation of the initial output signal, resulting in errors in the output result and low accuracy. Summary of the Invention

[0004] This invention provides a signal acquisition circuit, a signal processing device, and a signal conditioning equipment to solve the defect in the prior art where the sinusoidal signal output by the speed sensor is easily interfered with, resulting in low accuracy of the output results.

[0005] This invention provides a signal acquisition circuit, comprising: a rectifier circuit, a hysteresis comparator circuit, and an output circuit, wherein: The rectifier circuit is connected to the speed sensor and the hysteresis comparator circuit. The rectifier circuit is used to determine the rectified signal based on the initial output signal of the speed sensor. The hysteresis comparator circuit is also connected to the output circuit. The hysteresis comparator circuit is used to compare the rectified signal with the positive hysteresis threshold and the negative hysteresis threshold in the hysteresis window to determine the first output signal. When the rectified signal is within the hysteresis window, the first output signal maintains its current level signal. The positive hysteresis threshold is greater than the negative hysteresis threshold. The output circuit is also connected to the processor, and the output circuit is used to determine the target output signal based on the first output signal and send the target output signal to the processor.

[0006] According to the signal acquisition circuit provided by the present invention, the hysteresis comparator circuit is specifically used for: If the voltage value corresponding to the rectified signal is greater than or equal to the positive hysteresis threshold, the first output signal is determined to be a first level signal. determining that the first output signal maintains a current level signal in a case that the voltage value corresponding to the rectified signal is greater than the negative hysteresis threshold value and less than the positive hysteresis threshold value; determining that the first output signal is a second level signal in a case that the voltage value corresponding to the rectified signal is less than or equal to the negative hysteresis threshold value; the level state of the first level signal is different from the level state of the second level signal.

[0007] According to the signal acquisition circuit provided by the present application, the hysteresis comparison circuit comprises a first comparison circuit and a second comparison circuit, wherein: The first end of the first comparison circuit is connected to the rectifier circuit, the second end of the first comparison circuit is connected to a first power supply end, the third end and the fourth end of the first comparison circuit are both grounded, the fifth end of the first comparison circuit is connected to the fourth end of the second comparison circuit, and the output end of the first comparison circuit is connected to the first end of the second comparison circuit; The second end of the second comparison circuit is connected to the first power supply end, the third end of the second comparison circuit is grounded, and the output end of the second comparison circuit is connected to the first end of the output circuit; The rectified signal is used to control the on-off state of the first comparison circuit to obtain a first divided signal; and the first divided signal is used to control the on-off state of the second comparison circuit to obtain the first output signal.

[0008] According to the signal acquisition circuit provided by the present application, the output circuit comprises a first voltage dividing circuit and a pulse output circuit, wherein: The first end of the first voltage dividing circuit serves as the first end of the output circuit, the second end of the first voltage dividing circuit is grounded, and the output end of the first voltage dividing circuit is connected to the first end of the pulse output circuit; the first voltage dividing circuit is used to determine a first divided voltage signal corresponding to the first output signal; The second end of the pulse output circuit is grounded, the first output end and the second output end of the pulse output circuit are both connected to the processor, and the first divided voltage signal is used to control the on-off state of the pulse output circuit to determine the target output signal.

[0009] According to the signal acquisition circuit provided by the present application, the pulse output circuit comprises a first switch circuit and a second switch circuit, wherein: The first end of the first switch circuit is connected to the output end of the first voltage dividing circuit, the second end of the first switch circuit is grounded, and the third end of the first switch circuit is connected to the first end of the second switch circuit; The second end of the second switch circuit is connected with a first power supply end, the third end of the second switch circuit is connected with a second power supply end, and the first output end and the second output end of the second switch circuit are connected with the processor, and the output voltage of the first power supply end is higher than that of the second power supply end. The first voltage division signal is used for controlling the on-off state of the first switch circuit, and the on-off state of the first switch circuit is used for controlling the second switch circuit to output the target output signal.

[0010] According to the signal acquisition circuit provided by the application, the second switch circuit comprises a first switch sub-circuit and a second switch sub-circuit, wherein: The first end of the second switch sub-circuit is connected with the third end of the first switch circuit, the second end of the second switch sub-circuit is connected with the first end of the first switch sub-circuit, the third end of the second switch sub-circuit is connected with the second power supply end, and the fourth end of the second switch sub-circuit serves as the second output end of the second switch circuit. The second end of the first switch sub-circuit is connected with the first power supply end, the third end of the first switch sub-circuit is connected with the second power supply end, and the output end of the first switch circuit serves as the first output end of the second switch circuit. The on-off state of the first switch circuit is used for controlling the on-off state of the second switch sub-circuit, so as to determine the target train speed signal in the target output signal. The on-off state of the second switch sub-circuit is used for controlling the on-off state of the first switch sub-circuit, so as to determine the target phase signal in the target output signal, and the target phase signal is used for determining the installation position of the speed sensor and the running direction of the train.

[0011] According to the signal acquisition circuit provided by the application, the processor is specifically used for: In the case where the target output signal is not received, determining a broken line fault signal corresponding to the speed sensor.

[0012] According to the signal acquisition circuit provided by the application, the rectifier circuit comprises an isolation transformer and a full-wave rectifier bridge circuit, wherein: The primary coil of the isolation transformer is connected with the speed sensor, the secondary coil of the isolation transformer is connected with the input end of the full-wave rectifier bridge circuit, and the isolation transformer is used for determining an isolation signal corresponding to the initial output signal. The output end of the full-wave rectifier bridge circuit is connected with the hysteresis comparison circuit, and the full-wave rectifier bridge circuit is used for full-wave rectifying the isolation signal to obtain the rectified signal.

[0013] The application further provides a signal processing device, comprising a speed sensor, a processor and the signal acquisition circuit according to any one of the above.

[0014] The application further provides a signal conditioning device, comprising the signal processing device according to the above.

[0015] The signal acquisition circuit, the signal processing device and the signal conditioning device provided by the application rectify the initial output signal of the speed sensor through the rectifier circuit to obtain a rectified signal in a single direction, the hysteresis comparison circuit compares the rectified signal with the positive hysteresis threshold and the negative hysteresis threshold in the hysteresis window respectively to determine the first output signal, and the first output signal can maintain the current level signal when the rectified signal fluctuates in the voltage range of the hysteresis window, and the output circuit can determine the target output signal according to the first output signal and send the target output signal to the processor. In the application, the hysteresis window is set in the hysteresis comparison circuit, and the positive hysteresis threshold and the negative hysteresis threshold are set in the hysteresis window, so that the first output signal can maintain stable output when the initial output signal is slightly disturbed by noise and the like, the anti-interference degree is effectively improved, and the accuracy of the output result is improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0017] Figure 1 is a schematic diagram of an output signal affected by interference provided by the prior art.

[0018] Figure 2 is a structural schematic diagram of the signal acquisition circuit provided by the embodiment of the application.

[0019] Figure 3 is a structural schematic diagram of the rectifier circuit provided by the embodiment of the application.

[0020] Figure 4 is a structural schematic diagram of the hysteresis comparison circuit provided by the embodiment of the application.

[0021] Figure 5 is a schematic diagram of the hysteresis window provided by the embodiment of the application.

[0022] Figure 6 is a structural schematic diagram of the output circuit provided by the embodiment of the application.

[0023] Figure 7is a waveform schematic diagram of a rectified signal and a target output signal provided by the embodiment of the present application.

[0024] Reference signs: 100: signal acquisition circuit; 110: rectifier circuit; 111: isolation transformer; 112: full-wave rectifier bridge circuit; 120: hysteresis comparison circuit; 121: first comparison circuit; 122: second comparison circuit; 130: output circuit; 131: first voltage dividing circuit; 132: pulse output circuit; 1321: first switching circuit; 1322: second switching circuit; 13221: first switching sub-circuit, 13222: second switching sub-circuit; 200: speed sensor; 300: processor. DETAILED DESCRIPTION

[0025] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below in combination with the drawings in the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0026] In view of the problem that the sine wave signal output by the speed sensor in the prior art is susceptible to interference, resulting in low accuracy of the output result, the embodiment of the present application provides a signal acquisition circuit, Figure 2 is a structural schematic diagram of the signal acquisition circuit provided by the embodiment of the present application, as Figure 2 shown, the signal acquisition circuit 100 comprises a rectifier circuit 110, a hysteresis comparison circuit 120 and an output circuit 130, wherein: The rectifier circuit 110 is connected with the speed sensor 200 and the hysteresis comparison circuit 120, and the rectifier circuit 110 is configured to determine a rectified signal based on an initial output signal of the speed sensor 200.

[0027] The hysteresis comparison circuit 120 is further connected with the output circuit 130, and the hysteresis comparison circuit 120 is configured to compare the rectified signal with a positive hysteresis threshold VH and a negative hysteresis threshold VL in a hysteresis window to determine a first output signal; when the rectified signal is within the hysteresis window, the first output signal maintains a current level signal; the positive hysteresis threshold VH is greater than the negative hysteresis threshold VL.

[0028] The output circuit 130 is further connected with a processor 300, and the output circuit 130 is configured to determine a target output signal based on the first output signal and send the target output signal to the processor 300.

[0029] Specifically, the speed sensor 200 is a speed sensor 200 designed by adopting the principle of a tachometer motor, which has a simple internal structure and a low failure rate, and can be applied to scenes with high requirements for sensor service life. The initial output signal of the speed sensor 200 is a sine wave signal, and the signal acquisition circuit 100 needs to condition the initial output signal. The specific conditioning process includes the following steps.

[0030] The rectifier circuit 110 can receive the initial output signal of the speed sensor 200 through the output interface of the speed sensor 200. The initial output signal is an alternating current signal. The rectifier circuit 110 can rectify the initial output signal to obtain a rectified signal that is a direct current signal. That is, the rectifier circuit 110 can convert the alternating current signal that alternately changes in the positive and negative half cycles into a direct current signal in a single direction, and transmit the rectified signal to the hysteresis comparison circuit 120. Then, by setting a positive hysteresis threshold VH and a negative hysteresis threshold VL in the hysteresis comparison circuit 120, a hysteresis window is constructed. By comparing the rectified signal with the hysteresis window, the first output signal can be obtained. That is, when the rectified signal changes within the hysteresis window, the first output signal remains unchanged, and when the rectified signal changes outside the hysteresis window, the first output signal changes accordingly. By setting the hysteresis window, the first output signal can remain stable when the initial output signal is slightly disturbed by noise and the like, effectively improving the anti-interference degree. After determining the first output signal, the hysteresis comparison circuit 120 can stably output the first output signal to the output circuit 130. The output circuit 130 can determine the target output signal according to the first output signal, and send the target output signal to the processor 300, so that the processor 300 can determine the train speed information according to the target output signal.

[0031] It should be noted that the initial output signal can be a high-frequency signal, and the frequency range can be 4kHz, which meets the current application scenario of high-speed trains.

[0032] Further, Figure 3 is a structural schematic diagram of the rectifier circuit provided by the embodiment of the present application, as Figure 3 shown, the rectifier circuit 110 includes an isolation transformer 111 and a full-wave rectifier bridge circuit 112, wherein: The primary winding of the isolation transformer 111 is connected to the speed sensor 200, and the secondary winding of the isolation transformer 111 is connected to the input end of the full-wave rectifier bridge circuit 112. The isolation transformer 111 is used to determine the isolation signal corresponding to the initial output signal. The output end of the full-wave rectifier bridge circuit 112 is connected to the hysteresis comparison circuit 120, and the full-wave rectifier bridge circuit 112 is used to full-wave rectify the isolation signal to obtain the rectified signal.

[0033] Specifically, the initial output signal of the speed sensor 200 is first transmitted to the isolation transformer 111 in the rectifier circuit 110. The isolation transformer 111 generates a corresponding isolation signal based on the initial output signal. The primary and secondary coils in the isolation transformer 111 are physically separated, achieving electrical isolation, reducing interference, and improving the purity and stability of the initial output signal. Simultaneously, utilizing the high high-frequency loss characteristic of the iron core, high-frequency noise is suppressed from entering the signal acquisition circuit 100. Afterward, the isolation transformer 111 transmits the isolated signal to the full-wave rectifier bridge circuit 112. This full-wave rectifier bridge circuit 112 converts the initial output signal into a rectified signal, facilitating processing by subsequent circuits. The coordinated operation of the isolation transformer 111 and the full-wave rectifier bridge circuit 112 ensures the accurate transmission and processing of the initial output signal of the speed sensor 200.

[0034] In addition, such as Figure 3 As shown, the full-wave rectifier bridge circuit 112 includes a full-wave rectifier bridge B1 and a resistor R1, with the resistor R1 serving as the load resistor for the full-wave rectifier bridge B1. Specifically, the first terminal of the full-wave rectifier bridge B1 is connected to the first terminal of the secondary coil, the second terminal of the full-wave rectifier bridge B1 is connected to the second terminal of the resistor R1, the third terminal of the full-wave rectifier bridge B1 is connected to the second terminal of the secondary coil, and the fourth terminal of the full-wave rectifier bridge B1 is connected to the first terminal of the resistor R1. The full-wave rectifier bridge B1 can detect the positive and negative half-axis waveforms of the sine wave signal, facilitating timely elimination of abnormal situations where the initial output signal is output on the negative half-axis.

[0035] Furthermore, Figure 4 This is a schematic diagram of the hysteresis comparator circuit provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the hysteresis comparator circuit 120 includes a first comparator circuit 121 and a second comparator circuit 122, wherein: The first terminal of the first comparator circuit 121 is connected to the rectifier circuit 110, the second terminal of the first comparator circuit 121 is connected to the first power supply terminal, the third and fourth terminals of the first comparator circuit 121 are both grounded, the fifth terminal of the first comparator circuit 121 is connected to the fourth terminal of the second comparator circuit 122, and the output terminal of the first comparator circuit 121 is connected to the first terminal of the second comparator circuit 122. The second terminal of the second comparator circuit 122 is connected to the first power supply terminal, the third terminal of the second comparator circuit 122 is grounded, and the output terminal of the second comparator circuit 122 is connected to the first terminal of the output circuit 130. The rectified signal is used to control the on / off state of the first comparator circuit 121 to obtain the first shunt signal; the first shunt signal is used to control the on / off state of the second comparator circuit 122 to obtain the first output signal.

[0036] Specifically, the first comparison circuit 121 comprises resistors R2, R3, R4, R5, a capacitor C1, a transistor Q1 and a diode D1, wherein: a first end of the resistor R2 is connected to a first end of the resistor R1 and serves as a first end of the first comparison circuit 121, a second end of the resistor R2 is connected to a first end of the capacitor C1 and a base of the transistor Q1, an emitter of the transistor Q1 is connected to an anode of the diode D1, a collector of the transistor Q1 is connected to a first end of the resistor R3 and a first end of the resistor R5, a second end of the resistor R3 is connected to the first power supply end and serves as a second end of the first comparison circuit 121, a cathode of the diode D1 is connected to a first end of the resistor R4, a second end of the capacitor C1 and a second end of the resistor R4 are grounded, the second end of the capacitor C1 serves as a third end of the first comparison circuit 121, the second end of the resistor R4 serves as a fourth end of the first comparison circuit 121, the first end of the resistor R4 serves as a fifth end of the first comparison circuit 121, and a second end of the resistor R5 serves as an output end of the first comparison circuit 121.

[0037] The second comparison circuit 122 comprises resistors R6, R7, a transistor Q2 and a diode D2, wherein: a first end of the resistor R6 is connected to a base of the transistor Q2 and serves as a first end of the second comparison circuit 122, a second end of the resistor R6 is grounded and serves as a third end of the second comparison circuit 122, an emitter of the transistor Q2 is connected to an anode of the diode D2, a cathode of the diode D2 is connected to a cathode of the diode D1 and serves as a fourth end of the second comparison circuit 122, a collector of the transistor Q2 is connected to a first end of the resistor R7 and serves as an output end of the second comparison circuit 122, and a second end of the resistor R7 is connected to the first power supply end.

[0038] It should be noted that the output voltage of the first power supply end is 24V, which supports the acquisition of a wide amplitude sine wave.

[0039] In addition, the positive hysteresis threshold VH can be a voltage threshold of the rectified signal in the rising direction, and the negative hysteresis threshold VL can be a voltage threshold of the rectified signal in the falling direction. The corresponding positive hysteresis threshold VHand negative hysteresis threshold VL can be set according to specific application conditions, and the specific values of other components can be determined according to the positive hysteresis threshold VHand negative hysteresis threshold VL.

[0040] For example, the positive hysteresis threshold VH can be 10V, and the negative hysteresis threshold VL can be 5V. The saturation conduction current i2 of the transistor Q2 can be 3mA, Vb=10V, and the voltage drop of the diode D2 is 0.7V. Therefore, the resistor R4 at the emitter of the transistor Q2 is 3.1kΩ, i.e., the resistance of the resistor R4 can be 3.3kΩ, and the resistor R7 at the collector of the transistor Q2 is 4.66kΩ, i.e., the resistance of the resistor R7 can be 4.7kΩ.

[0041] Since the negative hysteresis threshold VL can be 5V, and Va=24V, the current i1 between the collector and the emitter of the transistor Q1 when the transistor Q1 is saturated and turned on is 5 / 3.3k=1.5mA, and the resistance of the resistor R3 can be (24-5) / 1.5mA=12.7kΩ. If the amplification β1 of the transistor Q1 is 50 times, and the amplitude of the input rectified signal is 12V, the maximum current of the base of the transistor Q1 is 1.5mA / β1=1.5 / 50=30μA, so the resistance of the resistor R2 at the base of the transistor Q1 is (12-5) / 30μA=233kΩ, that is, the resistance of the resistor R2 can be 250kΩ.

[0042] Since Vb=10V, if the amplification β2 of the transistor Q2 is 50 times, the base current of the transistor Q2 when the transistor Q2 is saturated and turned on is 3mA / β2=3 / 50=60μA. The voltage is divided by the resistors R3, R5 and R6 to ensure that the positive hysteresis threshold VH is 10V, and the current is greater than the maximum base current 60μA of the transistor Q2, which can be selected as 400μA, so the resistance of the resistor R6 is 10V / 400μA=25kΩ, and the resistance of the resistor R5 is 24V / 400μA-R3-R6=60-12.7-25=22.3kΩ.

[0043] Further, the hysteresis comparison circuit 120 is specifically configured to: switch the first output signal from a previous level signal to a first level signal in a case where the voltage value corresponding to the rectified signal is greater than or equal to the positive hysteresis threshold VH; determine that the first output signal maintains the previous level signal in a case where the voltage value corresponding to the rectified signal is greater than the negative hysteresis threshold VL and less than the positive hysteresis threshold VH; switch the first output signal from the previous level signal to a second level signal in a case where the voltage value corresponding to the rectified signal is less than or equal to the negative hysteresis threshold VL; the level state of the first level signal is different from the level state of the second level signal.

[0044] Figure 5 is a schematic diagram of the hysteresis window provided by the embodiment of the present application, and the hysteresis window composed of the positive hysteresis threshold VH and the negative hysteresis threshold VL is as shown in Figure 5As shown, when the voltage value corresponding to the rectified signal is within the hysteresis window, the first output signal maintains the previous level signal, that is, when the previous level signal is a high level signal, the first output signal continues to output a high level signal, and when the previous level signal is a low level signal, the first output signal continues to output a low level signal. When the voltage value corresponding to the rectified signal is greater than or equal to the forward hysteresis threshold value VH, the first output signal is switched from the previous level signal to the first level signal, and the first level signal is a high level signal. When the voltage value corresponding to the rectified signal is less than or equal to the negative hysteresis threshold value VL, the first output signal is switched from the previous level signal to the second level signal, and the second level signal is a low level signal.

[0045] Further, Figure 6 is a structural schematic diagram of an output circuit provided by an embodiment of the present application, as Figure 6 shown, the output circuit 130 includes a first voltage dividing circuit 131 and a pulse output circuit 132, wherein: The first end of the first voltage dividing circuit 131 is the first end of the output circuit 130, the second end of the first voltage dividing circuit 131 is grounded, and the output end of the first voltage dividing circuit 131 is connected to the first end of the pulse output circuit 132; the first voltage dividing circuit 131 is used to determine the first voltage dividing signal corresponding to the first output signal; The second end of the pulse output circuit 132 is grounded, and the first output end and the second output end of the pulse output circuit 132 are both connected to the processor 300, and the first voltage dividing signal is used to control the on-off state of the pulse output circuit 132 to determine the target output signal.

[0046] The first voltage dividing circuit 131 includes resistors R8 and R9 connected in series, wherein one end of the resistor R8 is the first end of the first voltage dividing circuit 131, the other end of the resistor R8 is connected to one end of the resistor R9, and the other end of the resistor R9 is grounded, and the other end of the resistor R9 is the second end of the first voltage dividing circuit 131. The resistance value of the resistor R8 can be 200kΩ, and the resistance value of the resistor R9 can be 100kΩ, and the voltage amplitude between the two ends of the resistor R9 can be controlled between 4V-8V through voltage division.

[0047] Further, as Figure 6 shown, the pulse output circuit 132 includes a first switch circuit 1321 and a second switch circuit 1322, wherein: The first end of the first switch circuit 1321 is connected to the output end of the first voltage dividing circuit 131, the second end of the first switch circuit 1321 is grounded, and the third end of the first switch circuit 1321 is connected to the first end of the second switch circuit 1322; The second end of the second switch circuit 1322 is connected to a first power supply end, the third end of the second switch circuit 1322 is connected to a second power supply end, and the first output end and the second output end of the second switch circuit 1322 are both connected to the processor 300, and the output voltage of the first power supply end is higher than the output voltage of the second power supply end; The first voltage division signal is used to control the on-off state of the first switch circuit 1321, and the on-off state of the first switch circuit 1321 is used to control the second switch circuit 1322 to output the target output signal.

[0048] The first switch circuit 1321 includes a transistor Q3 and a resistor R10, the base of the transistor Q3 is used as the first end of the first switch circuit 1321, the collector of the transistor Q3 is used as the third end of the first switch circuit 1321, the emitter of the transistor Q3 is connected to one end of the resistor R10, the other end of the resistor R10 is grounded and used as the second end of the first switch circuit 1321. For example, the current of the transistor Q3 after saturation conduction can be set to 3mA, and the resistance value of the resistor R10 can be 20kΩ, so that the base voltage of the transistor Q3 is 6V. In this way, when the voltage value of the first voltage division signal output by the first voltage division circuit 131 is a low level of 4V, the transistor Q3 is cut off, and when the voltage value of the first voltage division signal is a high level of 8V, the transistor Q3 is turned on.

[0049] Further, as shown in Figure 6 The second switch circuit 1322 includes a first switch sub-circuit 13221 and a second switch sub-circuit 13222, wherein: The first end of the second switch sub-circuit 13222 is connected to the third end of the first switch circuit 1321, the second end of the second switch sub-circuit 13222 is connected to the first end of the first switch sub-circuit 13221, the third end of the second switch sub-circuit 13222 is connected to the second power supply end, and the fourth end of the second switch sub-circuit 13222 is used as the second output end of the second switch circuit 1322; The second end of the first switch sub-circuit 13221 is connected to the first power supply end, the third end of the first switch sub-circuit 13221 is connected to the second power supply end, and the output end of the first switch circuit 1321 is used as the first output end of the second switch circuit 1322; The on-off state of the first switch circuit 1321 is used to control the on-off state of the second switch sub-circuit 13222 to determine the target train speed signal in the target output signal; The on-off state of the second switch sub-circuit 13222 is used to control the on-off state of the first switch sub-circuit 13221, so as to determine the target phase signal in the target output signal, and the target phase signal is used to determine the installation position of the speed sensor 200 and the running direction of the train.

[0050] Specifically, the first switch sub-circuit 13221 comprises an optocoupler U1, a resistor R11 and a resistor R12, wherein one end of the resistor R11 is connected to the anode of the optocoupler U1, the other end of the resistor R11 is connected to the first power supply end, the cathode of the optocoupler is used as the first end of the first switch sub-circuit 13221, the collector of the optocoupler U1 is connected to one end of the resistor R12, and is used as the output end of the first switch sub-circuit 13221, and the other end of the resistor R12 is connected to the second power supply end. The second switch sub-circuit 13222 comprises an optocoupler U2 and a resistor R13, wherein the anode of the optocoupler U2 is connected to the cathode of the optocoupler U1, and is used as the second end of the second switch sub-circuit 13222, the cathode of the optocoupler U2 is used as the first end of the second switch sub-circuit 13222, the collector of the optocoupler U2 is connected to one end of the resistor R13, and is used as the fourth end of the second switch sub-circuit 13222, and the other end of the resistor R13 is connected to the second power supply end. For example, the resistance value of the resistor R11 can be 60kΩ, and the resistance values of the resistor R12 and the resistor R13 can both be 10kΩ.

[0051] For example, Figure 7 is a waveform diagram of the rectified signal and the target output signal provided by the embodiment of the present application, as shown in Figure 7 , Figure 4 and Figure 6 Taking the positive hysteresis threshold value VH as 10V and the negative hysteresis threshold value VL as 5V as an example, the target output signal changes with the rectified signal as follows.

[0052] (1) When the voltage value of the rectified signal is 0V and the rectified signal is positive, the base of the triode Q1 has no current, so that the triode Q1 is in the off state. The output current of the first power supply terminal passes through the resistor R3 and the resistor R5, and then a first shunt signal flowing into the base of the triode Q2 is obtained, so that the triode Q2 is in the on state. Then, the resistor R7 and the resistor R4 divide the output voltage of the first power supply terminal, and a first output signal of about 10V high level signal is obtained. The first output signal is further divided by the resistor R8 and the resistor R9, and a first divided signal is obtained and input into the base of the triode Q3. Since the first divided signal is obtained by dividing the first output signal of 10V, the first divided signal is less than 10V, that is, the first divided signal is less than the positive hysteresis threshold VH, at this time, the triode Q3 is in the off state, that is, the triode Q3 does not emit light, and therefore the optocoupler U1 and the optocoupler U2 are both in the off state. At this time, the target output signal is a second level signal, and the second level signal is a high level signal, that is, the target train speed signal output by the first output terminal is a high level signal, and the target phase signal output by the second output terminal is also a high level signal.

[0053] (2) When the voltage value of the rectified signal continues to increase to be greater than or equal to 10V, the current flowing through the base of the triode Q1 increases, so that the triode Q1 is in the on state, and the first shunt signal flowing into the base of the triode Q2 decreases, and then the triode Q2 is in the off state. At this time, the first output signal of the triode Q2 collector is greater than 10V and close to 24V, and after being divided by the resistor R8 and the resistor R9, the first divided signal is greater than 10V, that is, the first divided signal is greater than or equal to the positive hysteresis threshold VH, at this time, the triode Q3 is in the on state, the triode Q3 emits light, and then the optocoupler U1 and the optocoupler U2 are both in the on state. At this time, the target output signal is a first level signal, and the first level signal is a high level, and the emitters corresponding to the optocoupler U1 and the optocoupler U2 respectively pull down the target output signal to a low level signal, that is, the target train speed signal output by the first output terminal is a low level signal, and the target phase signal output by the second output terminal is also a low level signal.

[0054] (3) As can be known from the above, when the rectified signal increases to be greater than or equal to the positive hysteresis threshold VH, the target output signal is a low level signal, when the rectified signal decreases to be less than or equal to the negative hysteresis threshold VL, the target output signal is a high level signal, and when the rectified signal is less than the positive hysteresis threshold VH and greater than the negative hysteresis threshold VL, the target output signal remains the current level signal. Repeat the above steps, and the target output signal is stably output.

[0055] Further, the processor 300 is specifically configured to: In the case that the target output signal is not received, a broken line fault signal corresponding to the speed sensor 200 is determined.

[0056] Specifically, if the processor 300 receives the target train speed signal and the target phase signal in the target output signal at the same time, it indicates that the speed sensor 200 is working normally. If the processor 300 does not receive the target train speed signal and the target phase signal in the target output signal, it indicates that the speed sensor 200 has a broken line fault, and a broken line fault signal can be generated to remind the staff to handle it in time.

[0057] It should be noted that the signal acquisition circuit 100 provided by the embodiment of the present application can be applied to the signal equipment corresponding to the speed sensor 200 installed in the rail transit field of China Railway, subway, tram, etc. produced by various manufacturers at present, which outputs a sine wave signal. After the speed sensor 200 is installed on the axle of the vehicle, the threshold range of the hysteresis window can be adjusted by modifying the resistance parameters in the hysteresis comparison circuit 120 according to the actual application requirements on site, that is, the positive hysteresis threshold VH and the negative hysteresis threshold VL in the hysteresis window are modified, and different degrees of anti-interference are realized, so as to expand the application range of the speed sensor 200 outputting the sine wave signal.

[0058] The signal acquisition circuit provided by the embodiment of the present application rectifies the initial output signal of the speed sensor through the rectifier circuit to obtain a rectified signal in a single direction, the hysteresis comparison circuit can compare the rectified signal with the positive hysteresis threshold VH and the negative hysteresis threshold VL in the hysteresis window respectively to determine the first output signal, and the first output signal can maintain the current level signal when the rectified signal fluctuates in the voltage range of the hysteresis window, the output circuit can determine the target output signal according to the first output signal, and send the target output signal to the processor. In the embodiment of the present application, the hysteresis window is set in the hysteresis comparison circuit, and the positive hysteresis threshold VH and the negative hysteresis threshold VL double thresholds are set in the hysteresis window, so that the first output signal can maintain stable output when the initial output signal is slightly disturbed by noise and the like, the anti-interference degree is effectively improved, and the accuracy of the output result is further improved. In addition, the components used in the embodiment of the present application have simple structure, and do not use integrated devices such as AD (Analog-to-Digital, analog-to-digital) conversion chip, DSP (Digital Signal Processing, digital signal processing technology) chip, single-chip microcomputer or Schmidt trigger, which have higher dependence and need to consider factors such as delivery period and price, thereby reducing the circuit cost.

[0059] The embodiment of the present application also provides a signal processing device, which comprises a speed sensor, a processor and the signal acquisition circuit according to any one of the above.

[0060] In the embodiment of the present application, after the speed sensor collects the sinusoidal signal, the signal collection circuit can be used to regulate and stably output the sinusoidal signal, so as to ensure that the processor stably receives the sinusoidal signal.

[0061] The embodiment of the present application also provides a signal conditioning device, which comprises the signal processing device.

[0062] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A signal acquisition circuit, characterized by comprising: The application relates to a rectifier circuit, a hysteresis comparison circuit and an output circuit, wherein: The rectifier circuit is connected with a speed sensor and the hysteresis comparison circuit, and is used for determining a rectified signal based on an initial output signal of the speed sensor; The hysteresis comparison circuit is also connected with the output circuit, and is used for comparing the rectified signal with a positive hysteresis threshold and a negative hysteresis threshold in a hysteresis window to determine a first output signal; when the rectified signal is in the hysteresis window, the first output signal keeps a current level signal; the positive hysteresis threshold is greater than the negative hysteresis threshold; The output circuit is also connected with a processor, and is used for determining a target output signal based on the first output signal and sending the target output signal to the processor. The hysteresis comparison circuit is specifically used for:

2. The signal acquisition circuit of claim 1, wherein, determining the first output signal as a first level signal when a voltage value corresponding to the rectified signal is greater than or equal to the positive hysteresis threshold; determining the first output signal to maintain a current level signal when the voltage value corresponding to the rectified signal is greater than the negative hysteresis threshold and less than the positive hysteresis threshold; determining the first output signal as a second level signal when the voltage value corresponding to the rectified signal is less than or equal to the negative hysteresis threshold; the level state of the first level signal is different from that of the second level signal. The hysteresis comparison circuit comprises a first comparison circuit and a second comparison circuit, wherein:

3. The signal acquisition circuit of claim 1, wherein, a first end of the first comparison circuit is connected with the rectifier circuit, a second end of the first comparison circuit is connected with a first power supply end, a third end and a fourth end of the first comparison circuit are grounded, a fifth end of the first comparison circuit is connected with a fourth end of the second comparison circuit, and an output end of the first comparison circuit is connected with a first end of the second comparison circuit; a second end of the second comparison circuit is connected with the first power supply end, a third end of the second comparison circuit is grounded, and an output end of the second comparison circuit is connected with a first end of the output circuit; the rectified signal is used for controlling on-off states of the first comparison circuit to obtain a first divided signal; and the first divided signal is used for controlling on-off states of the second comparison circuit to obtain the first output signal. The output circuit comprises a first voltage dividing circuit and a pulse output circuit, wherein:

4. The signal acquisition circuit of claim 1, wherein, a first end of the first voltage dividing circuit is used as a first end of the output circuit, a second end of the first voltage dividing circuit is grounded, and an output end of the first voltage dividing circuit is connected with a first end of the pulse output circuit; the first voltage dividing circuit is used for determining a first divided voltage signal corresponding to the first output signal; a second end of the pulse output circuit is grounded, a first output end and a second output end of the pulse output circuit are connected with the processor, and the first divided voltage signal is used for controlling on-off states of the pulse output circuit to determine the target output signal. The pulse output circuit comprises a first switch circuit and a second switch circuit, wherein:

5. The signal acquisition circuit of claim 4, wherein, ​ The first end of the first switch circuit is connected to the output end of the first voltage division circuit, the second end of the first switch circuit is grounded, and the third end of the first switch circuit is connected to the first end of the second switch circuit. The second end of the second switch circuit is connected to the first power supply end, the third end of the second switch circuit is connected to the second power supply end, and the first output end and the second output end of the second switch circuit are both connected to the processor, and the output voltage of the first power supply end is higher than the output voltage of the second power supply end. The first voltage division signal is used to control the on-off state of the first switch circuit, and the on-off state of the first switch circuit is used to control the second switch circuit to output the target output signal.

6. The signal acquisition circuit of claim 5, wherein, The second switch circuit comprises a first switch sub-circuit and a second switch sub-circuit, wherein: The first end of the second switch sub-circuit is connected to the third end of the first switch circuit, the second end of the second switch sub-circuit is connected to the first end of the first switch sub-circuit, the third end of the second switch sub-circuit is connected to the second power supply end, and the fourth end of the second switch sub-circuit serves as the second output end of the second switch circuit. The second end of the first switch sub-circuit is connected to the first power supply end, the third end of the first switch sub-circuit is connected to the second power supply end, and the output end of the first switch circuit serves as the first output end of the second switch circuit. The on-off state of the first switch circuit is used to control the on-off state of the second switch sub-circuit to determine the target train speed signal in the target output signal. The on-off state of the second switch sub-circuit is used to control the on-off state of the first switch sub-circuit to determine the target phase signal in the target output signal, and the target phase signal is used to determine the installation position of the speed sensor and the running direction of the train.

7. The signal acquisition circuit according to any one of claims 1 to 6, characterized in that, The processor is specifically configured to: In the case where the target output signal is not received, determine a disconnection fault signal corresponding to the speed sensor.

8. The signal acquisition circuit of any one of claims 1-6, wherein, The rectifier circuit comprises an isolation transformer and a full-wave rectifier bridge circuit, wherein: The primary coil of the isolation transformer is connected to the speed sensor, the secondary coil of the isolation transformer is connected to the input end of the full-wave rectifier bridge circuit, and the isolation transformer is used to determine an isolation signal corresponding to the initial output signal. The output end of the full-wave rectifier bridge circuit is connected to the hysteresis comparison circuit, and the full-wave rectifier bridge circuit is used to full-wave rectify the isolation signal to obtain the rectified signal.

9. A signal processing device, characterized by The signal acquisition circuit comprises a speed sensor, a processor, and a signal processing device.

10. A signal conditioning device, characterized by The signal processing device comprises a signal acquisition circuit.

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