Display device, method of manufacturing display device, and electronic device

By setting an overlay layer to cover the alignment marks in the third area of ​​the display panel, the problem of insufficient alignment mark recognition rate of the display device is solved, achieving a more efficient alignment process and cost reduction, while the display device is thinner.

CN120933273APending Publication Date: 2025-11-11SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202510380579.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-05-10
Filing Date
2025-03-28
Publication Date
2025-11-11

AI Technical Summary

Technical Problem

The existing display devices have insufficient recognition rate of alignment marks during the manufacturing process, which increases the difficulty of aligning the display panel and affects the display effect and production efficiency.

Method used

By setting a cover layer in the third area of ​​the display panel to cover the alignment marks, and cutting the cover layer during the manufacturing process to cover the data driver and circuit board, the recognition rate of the alignment marks is ensured and the difficulty of recognizing the alignment marks is reduced.

Benefits of technology

It improves the recognition rate of alignment marks, simplifies the alignment process of the display panel, reduces production costs, and reduces the thickness of the display device.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display device, a method of manufacturing the same, and an electronic device are provided. The display device includes: a display panel including a first region, a second region adjacent to the first region and bent about a bending axis extending in one direction, and a third region adjacent to the second region and including an alignment mark; a cover layer under the third area of the display panel and covering the alignment mark; and a cover panel between the first region and the third region of the display panel and in contact with the display panel.
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Description

Technical Field

[0001] Embodiments of this disclosure relate to a display device. For example, embodiments of this disclosure relate to a display device that provides visual information and a method of manufacturing the display device. Background Technology

[0002] The display device may include a display panel and a driver. The display panel includes a plurality of pixels for displaying images, and the driver drives these pixels. The pixels may be arranged in a display area of ​​the display panel, while the driver may be arranged in a non-display area of ​​the display panel surrounding (e.g., enclosing) the display area. The display panel may define a curved region between the driver and the display area, such that the curved region is curved, and the driver is arranged below the display area.

[0003] During the manufacturing process of a display panel, alignment marks can be defined in the non-display areas of the display panel. These alignment marks can be used to align the display panel with other components or to align bends in the display panel.

[0004] The information disclosed in this background section is intended to enhance the understanding of the disclosed background technology and may contain information that does not constitute prior art. Summary of the Invention

[0005] One or more embodiments of this disclosure relate to a display device having an improved recognition rate of alignment marks.

[0006] One or more aspects of this disclosure relate to a method of manufacturing a display device.

[0007] One or more aspects of this disclosure relate to an electronic device including a display device.

[0008] Additional aspects will be set forth in part in the description which follows, and in part will be apparent from the description, or may be learned by practicing the embodiments presented herein.

[0009] A display device according to one or more embodiments of the present disclosure includes: a display panel including a first region, a second region, and a third region, the second region being adjacent to the first region and bent about a bending axis extending in one direction, the third region being adjacent to the second region and including an alignment mark; a cover layer disposed under the third region of the display panel and covering the alignment mark; and a cover panel disposed between the first and third regions of the display panel and in contact with the display panel.

[0010] In one or more embodiments, the first width of the third region of the display panel in one direction may be equal to the second width of the overlay layer in one direction.

[0011] In one or more embodiments, in a plan view, a first side surface at an opposite end of a third region of a display panel in one direction may be superimposed on a second side surface at an opposite end of a cover layer in one direction.

[0012] In one or more embodiments, the cover panel may include: a first surface that contacts a first area of ​​the display panel; and a second surface that contacts a third area of ​​the display panel.

[0013] In one or more embodiments, a third region of the display panel may be arranged below the first region of the display panel.

[0014] In one or more embodiments, the cover layer may include: a first cover layer comprising an optically transparent material; and a second cover layer disposed on the first cover layer and comprising a conductive material.

[0015] In one or more embodiments, the first overlay layer may be superimposed with the alignment marks in the plan view, and the second overlay layer may not be superimposed with the alignment marks in the plan view.

[0016] In one or more embodiments, the third width of the first cover layer in one direction may be greater than the fourth width of the second cover layer in one direction.

[0017] In one or more embodiments, the third width of the first overlay layer may be equal to the first width of the third region of the display panel.

[0018] In one or more embodiments, in a plan view, the third side surface of the first cover layer at opposite ends in the one direction may not overlap with the fourth side surface of the second cover layer at opposite ends in the one direction.

[0019] In one or more embodiments, in a plan view, the third side surface of the first cover layer may be superimposed on the first side surface of the display panel, respectively.

[0020] In one or more embodiments, the display device may further include: a circuit board, coupled to a third region of the display panel, and a cover layer that may cover at least a portion of the circuit board.

[0021] In one or more embodiments, the circuit board may include a conductive pattern superimposed on a cover layer in a plan view, and the first cover layer may define an opening superimposed on the conductive pattern in a plan view.

[0022] In one or more embodiments, the display panel may include a data driver arranged in a third area, and a cover layer may cover the data driver.

[0023] In one or more embodiments, the first overlay may include a first transport layer and a second transport layer disposed on the first transport layer, and the first transport layer may be defined in an opening superimposed on the data driver in a plan view.

[0024] A method of manufacturing a display device according to one or more embodiments of the present disclosure includes the following steps: setting (e.g., supplying) a preliminary display panel, the preliminary display panel including a first region, a second region, a third region and a dummy region, the second region being adjacent to the first region and flexible, the third region being adjacent to the second region and including alignment marks, the dummy region defining the first region, the second region and the third region; forming a preliminary cover layer on the preliminary display panel covering the alignment marks in the third region and the dummy region; cutting the preliminary display panel and the preliminary cover layer along the dummy region (e.g. along the boundary defining the dummy region) to form a display panel including the first region, the second region and the third region and a cover layer covering the alignment marks; and attaching the cover panel to the lower part of the display panel.

[0025] In one or more embodiments, the first width of the third region of the display panel in one direction may be equal to the second width of the overlay layer in that direction.

[0026] In one or more embodiments, in a plan view, a first side surface at an opposite end of a third region of a display panel in one direction may be superimposed on a second side surface at an opposite end of a cover layer in one direction.

[0027] In one or more embodiments, the method may further include the step of bending a second region of the display panel about a bending axis extending in one direction to position a third region of the display panel below the first region of the display panel.

[0028] In one or more embodiments, a first surface of the cover panel may contact a first area of ​​the display panel, and a second surface of the cover panel may contact a third area of ​​the display panel.

[0029] In one or more embodiments, the step of forming an initial overlay may include: forming a first overlay that overlaps with alignment marks in a plan view; and forming a second overlay on the first overlay that does not overlap with alignment marks in a plan view.

[0030] In one or more embodiments, after cutting the preliminary display panel and the preliminary cover layer, the third width of the first cover layer in the one direction may be equal to the first width of the third region of the display panel.

[0031] In one or more embodiments, after cutting the preliminary display panel and the preliminary cover layer, in a plan view, the third side surface of the first cover layer at opposite ends in the one direction may be superimposed on the first side surface of the display panel, respectively.

[0032] In one or more embodiments, the method may further include the step of combining a third region with a circuit board, the circuit board including a conductive pattern superimposed on a cover layer in a plan view, and the cover layer defining an opening superimposed on the conductive pattern in a plan view.

[0033] In one or more embodiments, the display panel may include a data driver arranged in a third region, an overlay layer may cover the data driver, and the overlay layer may be defined in an opening overlapping the data driver in a plan view.

[0034] According to one or more embodiments of the present disclosure, an electronic device includes a display device, the display device comprising: a display panel including a first region, a second region and a third region, the second region being adjacent to the first region and bent about a bending axis extending in one direction, the third region being adjacent to the second region and including alignment marks; a cover layer being below the third region of the display panel and covering the alignment marks; and a cover panel being between the first region and the third region of the display panel and in contact with the display panel.

[0035] In one or more embodiments, the electronic device may be a portable communication device, a medical display device, a vehicle, a ship, or an aircraft.

[0036] In a display device according to one or more embodiments of the present disclosure, the display device may include: a display panel including a first region, a second region, and a third region, the display region being defined in the first region, the second region being defined as a curved region, the third region being disposed below the first region, and an alignment mark being defined in the third region; a cover panel in contact with the display panel; and a cover layer extending to cover the alignment mark on the third region. Because the region defining the alignment mark can be supported by the cover layer to supplement rigidity, the recognition rate of the alignment mark can be improved when confirming the alignment of the alignment mark after bending the second region, even if no separate component (e.g., a protective film) is disposed between the display panel and the cover panel. Therefore, the display device can be thin, and the manufacturing cost can be reduced. Attached Figure Description

[0037] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure. Figure 1This is an exploded perspective view schematically illustrating a display device according to one or more embodiments of the present disclosure.

[0038] Figure 2 This illustrates one or more embodiments according to the present disclosure. Figure 1 Rear view of the display device.

[0039] Figure 3 It is according to one or more embodiments of this disclosure along Figure 2 A sectional view taken by line I-I'.

[0040] Figure 4 It is according to one or more embodiments of this disclosure along Figure 2 The sectional view taken from line II-II'.

[0041] Figure 5 This illustrates one or more embodiments according to the present disclosure, including... Figure 1 A plan view of the display panel, bending protective layer, cover layer and circuit board in the display device.

[0042] Figure 6 It is according to one or more embodiments of this disclosure along Figure 5 The sectional view taken from line III-III'.

[0043] Figure 7 It is according to one or more embodiments of this disclosure along Figure 5 A sectional view taken from line IV-IV'.

[0044] Figure 8 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure.

[0045] Figure 9 According to one or more embodiments of this disclosure Figure 8 A magnified plan view of region A.

[0046] Figure 10 It is according to one or more embodiments of this disclosure along Figure 9 A sectional view taken by line V-V'.

[0047] Figure 11 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure.

[0048] Figure 12 According to one or more embodiments of this disclosure Figure 11 A magnified plan view of region B.

[0049] Figure 13 It is according to one or more embodiments of this disclosure along Figure 12 A sectional view taken from line VI-VI'.

[0050] Figure 14 , Figure 15 and Figure 16 This is a view illustrating a method of manufacturing a display device according to one or more embodiments of the present disclosure.

[0051] Figure 17 This is a block diagram illustrating an electronic device according to one or more embodiments of the present disclosure.

[0052] Figure 18 This is a schematic diagram illustrating an electronic device according to one or more embodiments of the present disclosure. Detailed Implementation

[0053] This disclosure can be modified in many alternative forms, and therefore specific embodiments will be shown in the accompanying drawings and described in more detail. However, it should be understood that this is not intended to limit this disclosure to the specific forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure.

[0054] In the following description, embodiments of the present disclosure will be illustrated in more detail with reference to the accompanying drawings. However, the present disclosure may be implemented in a variety of different forms and should not be construed as limited to the embodiments shown herein. Rather, these embodiments are provided as examples so that the disclosure will be thorough and complete, and will fully convey to those skilled in the art the aspects and features of the present disclosure. Therefore, processes, elements, and techniques necessary for those skilled in the art to fully understand the aspects and features of the present disclosure are not described.

[0055] Throughout the accompanying drawings and written description, unless otherwise stated, the same reference numerals indicate the same elements, and therefore their repeated description is unnecessary. In the drawings, for clarity, the relative dimensions of elements, layers, and regions may be exaggerated.

[0056] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Therefore, without departing from the spirit and scope of this disclosure, the first element, first component, first region, first layer, or first portion described below may be referred to as a second element, second component, second region, second layer, or second portion.

[0057] For ease of explanation, spatial relative terms such as “above,” “below,” “lower,” “under,” “above,” and “upper” may be used herein to describe the relationship of one element or feature to another element (or feature) or feature (or feature) as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the spatial relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, then an element described as “below” or “under” other elements or features will subsequently be oriented “above” other elements or features. Thus, the example terms “below” and “under” can cover both above and below orientations. The device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein should be interpreted accordingly.

[0058] It will be understood that when an element, such as a region, layer, membrane, area, or portion, is referred to as being "on" another element, "connected to," or "bonded to" another element, it can be directly on, directly connected to, or directly bonded to said other element, or one or more intermediary elements may be present. In contrast, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," "directly bonded to," or "directly adjacent to" another element or layer, no intermediary element or intermediary layer exists. Furthermore, it will be understood that when an element is referred to as being "between two elements," it can be the only element between the two elements, or one or more intermediary elements may be present.

[0059] As used here, unless the context clearly indicates otherwise, the singular forms “a,” “one,” and “the” are also intended to include the plural forms.

[0060] It will also be understood that when the terms “comprising,” “including,” “having,” and “owning,” and variations thereof are used in this specification, they specify the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0061] As used herein, the term “and / or” includes any and all combinations of one or more of the relevant listed items.

[0062] As used herein, the term “use” and its variants can be considered synonymous with the term “utilize” and its variants, respectively.

[0063] In the context of this disclosure, and unless otherwise defined, a plan view is an orthographic projection of a three-dimensional object through the object from a position on a horizontal plane. That is, it is a top view showing the layout and spatial relationships of various elements within an object or structure. A plan view based on a third direction DR3 refers to a top view of the display panel, as if viewing the surface directly from above. In this context, the third direction DR3 is a direction perpendicular to or orthogonal to the plane defined by the first direction DR1 and the second direction DR2. This means that in the plan view, subpixels, pads (also called "solder pads"), and other components can be seen arranged on the substrate as they are laid out, without any perspective distortion.

[0064] Figure 1 This is an exploded perspective view schematically illustrating a display device according to one or more embodiments of the present disclosure. For example, Figure 1 It can be an exploded perspective view showing the state of the display panel PN before it is bent.

[0065] Reference Figure 1 The display device 10 can display an image on a display surface parallel to a plane (e.g., a plan view) defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the display device 10 can display an image on a third direction DR3 intersecting each of the first direction DR1 and the second direction DR2. For example, the display surface can correspond to the front surface of the display device 10. For example, the first direction DR1, the second direction DR2, and the third direction DR3 can be orthogonal to each other (e.g., perpendicular). In this specification, the term "in a plan view" can refer to the case when viewed from the third direction DR3.

[0066] The display device 10 may include a window WM, a polarizing layer POL, a display panel PN, a bending protection layer BPL, a circuit board CB, a cover layer CIC, and a cover panel CP.

[0067] The window WM can include optically transparent materials. For example, the window WM can include glass, plastic, and / or sapphire. The window WM can include materials with relatively high transmittance and can transmit light generated from the display panel PN. The window WM can protect the display panel PN from external impacts.

[0068] Window WMs can have a single-layer or multi-layer structure. For example, a window WM may include multiple plastic films bonded together with adhesive, or it may include a glass substrate and plastic films bonded together with adhesive. Window WMs may also include functional coatings. For example, functional coatings may include anti-fingerprint layers, anti-reflective layers, and / or hard coatings, etc.

[0069] The polarizing layer POL can be disposed below the window WM. The polarizing layer POL can reduce the reflectivity of external light incident on the window WM. For example, the polarizing layer POL can prevent or reduce the reflection of external light incident through the front surface of the display device 10 by components included in the display panel PN and make it visually identifiable from the outside.

[0070] For example, a polarizing layer (POL) may include a phase retarder or a polarizer. The phase retarder may be a film-type or a liquid crystal coating-type, and may include a λ / 2 phase retarder or a λ / 4 phase retarder. The polarizer may also be a film-type or a liquid crystal coating-type. For example, the phase retarder and the polarizer may be a single polarizing film. The polarizing layer (POL) may also include a protective film disposed on or below the polarizing film.

[0071] The display panel PN can be arranged below the polarization layer POL. The display panel PN may include a display area DA and a non-display area NDA. The display area DA may be the area where an image is displayed, and the non-display area NDA may be the area where no image is displayed.

[0072] Pixels that display light (e.g., such as Figure 5 The pixels (PX) shown can be arranged in the display area DA. The non-display area NDA can be arranged around the display area DA. For example, in a plan view, the non-display area NDA can be around the display area DA (e.g., surrounding the display area DA). The driver for displaying the image in the display area DA can be arranged in the non-display area NDA. The display area DA and the non-display area NDA can respectively correspond to the display area for displaying the image and the non-display area for not displaying the image of the display device 10.

[0073] The display panel PN may include a first region A1, a second region A2, and a third region A3. The second region A2 may be adjacent to the first region A1, and the third region A3 may be adjacent to the second region A2. In one or more embodiments, the second region A2 may be arranged between the first region A1 and the third region A3. For example, the first region A1, the second region A2, and the third region A3 may be arranged in a direction opposite to the second direction DR2. The first region A1, the second region A2, and the third region A3 may extend in a direction opposite to the second direction DR2.

[0074] A portion of the first region A1 may be included in the display region DA, and another portion of the first region A1, the second region A2, and the third region A3 may be included in the non-display region NDA. For example, the first region A1 may define (include) the display region DA. In one or more embodiments, the second region A2 may be a curved region with respect to the curvature of the bending axis (see, for example, Figure 2 and Figure 4), and each of the first region A1 and the third region A3 can be a non-curved region that is not curved.

[0075] The display panel PN may include a data driver DIC and an alignment mark AM. The data driver DIC may be mounted in a third region A3 of the display panel PN. The data driver DIC may include data driving circuitry for driving the pixels of the display panel PN. The alignment mark AM may be defined in the third region A3 of the display panel PN. For example, the alignment mark AM may be arranged adjacent to the side surfaces of the third region A3 that are opposite to each other along the first direction DR1. In other words, in the third region A3, the alignment mark AM may be adjacent to the side surfaces of the display panel PN, wherein the side surfaces (side surfaces opposite to each other) are located at opposite ends of the third region A3 of the display panel PN in the first direction DR1.

[0076] A bend protection layer BPL can be disposed in a second region A2 of the display panel PN. The bend protection layer BPL can be further disposed in a portion of a first region A1 and a portion of a third region A3 of the display panel PN. The bend protection layer BPL can be bent together with the second region A2 of the display panel PN. The bend protection layer BPL can protect the second region A2 of the display panel PN from external impacts and can control the bending stress of the second region A2.

[0077] A circuit board CB can be disposed within a portion of a third region A3 on the display panel PN. The circuit board CB can be bonded to one end of the display panel PN via a bonding process. The circuit board CB can be bonded to the end of the third region A3. The circuit board CB can be electrically connected to the display panel PN. For example, the circuit board CB can be electrically connected to the display panel PN via an anisotropic conductive adhesive layer. The circuit board CB may include a driving element DE mounted on the circuit board CB. The driving element DE can convert signals input from an external source into signals for the data driver DIC or signals for driving the display panel PN.

[0078] The cover layer CIC can be disposed in a third region A3 on the display panel PN. In one or more embodiments, the cover layer CIC can cover the data driver DIC and alignment mark AM. The cover layer CIC can further cover a portion of the bend protection layer BPL and a portion of the circuit board CB. The cover layer CIC can block noise that may form near the data driver DIC and the circuit board CB, and can protect the data driver DIC and the circuit board CB from external impacts.

[0079] A cover panel CP can be disposed below the display panel PN. The cover panel CP can improve the impact resistance of the display device 10. The cover panel CP may include one or more suitable functional layers, such as an impact-absorbing layer to absorb external impacts, a support layer to support the display panel PN, and / or a heat dissipation layer to dissipate heat generated by the display panel PN. For example, the cover panel CP may include metal and / or padding members.

[0080] Figure 2 This illustrates one or more embodiments according to the present disclosure. Figure 1 Rear view of the display device. Figure 3 It is according to one or more embodiments of this disclosure along Figure 2 A sectional view taken by line I-I'. Figure 4 It is according to one or more embodiments of this disclosure along Figure 2 The sectional view taken from line II-II'.

[0081] For example, Figure 2 This could be a rear view showing the state of the display panel PN after it has been bent. Figure 3 It can be a sectional view taken from the first region A1, and Figure 4 It can be a sectional view taken from the first region A1, the second region A2, and the third region A3.

[0082] Reference Figure 1 , Figure 2 , Figure 3 and Figure 4 The display device 10 may include a window WM, an adhesive layer AL, a polarizing layer POL, a display panel PN, a cover panel CP, a bending protection layer BPL, and a cover layer CIC.

[0083] The window WM may include a light-blocking pattern WBM. The light-blocking pattern WBM may be disposed on the lower surface of the window WM (i.e., the surface of the window WM adjacent to the display panel PN). The light-blocking pattern WBM may be overlaid with the non-display area NDA in a plan view. The light-blocking pattern WBM may include a light-blocking material. For example, the light-blocking pattern WBM may include an organic material with a black color. The light-blocking pattern WBM may cover the non-display area NDA so that it is not visually identifiable from the outside.

[0084] The adhesive layer AL can be disposed between the window WM and the polarizing layer POL, and can bond the window WM and the polarizing layer POL together. The adhesive layer AL can be optically transparent. For example, the adhesive layer AL can include pressure-sensitive adhesive (PSA), optically transparent adhesive (OCA), and / or optically transparent resin (OCR), etc.

[0085] The display panel PN and the cover panel CP can be disposed below the polarizing layer POL. The polarizing layer POL can be disposed in a first region A1 on the display panel PN, and the cover panel CP can be disposed, for example, between the first region A1 and the third region A3 of the display panel PN when the display panel PN is bent. The display panel PN may include a non-bent first region A1 and a third region A3, and a bent second region A2.

[0086] The second region A2 of the display panel PN can be bent about the bending axis RX. The bending axis RX can extend in the first direction DR1. The second region A2 can be bent in a direction toward the lower surface of the display panel PN (i.e., the surface of the display panel PN that is separated from and / or separated from the window WM (e.g., spaced apart or separated)). For example, the second region A2 can be bent in a direction opposite to the third direction DR3.

[0087] Therefore, the first region A1 of the display panel PN can be arranged on the upper surface of the cover panel CP (i.e., the surface of the cover panel CP adjacent to the window WM), and the third region A3 of the display panel PN can be arranged below the lower surface of the cover panel CP (i.e., the surface of the cover panel CP that is separated from and / or separated from the window WM (e.g., spaced apart or separated)). The upper and lower surfaces of the cover panel CP can be opposite each other (e.g., back to back). The third region A3 can be arranged below the first region A1, and the first region A1 and the third region A3 can be opposite each other on the third-direction DR3 (e.g., back to back).

[0088] In one or more embodiments, the display device 10 may not include (e.g., may exclude) a separate component disposed between the cover panel CP and the display panel PN. For example, the display device 10 may not include (e.g., may exclude) a separate protective film disposed between the cover panel CP and the display panel PN to protect the display panel PN. For example, the protective film may comprise a flexible plastic material such as polyethylene terephthalate and may protect the first region A1 and the third region A3 of the display panel PN.

[0089] Therefore, in one or more embodiments, the cover panel CP can be in direct contact with the display panel PN. The cover panel CP may include a first adhesive layer and a second adhesive layer to bond the display panel PN and the cover panel CP. The upper surface of the cover panel CP can be directly bonded (or in direct contact) with a first region A1 of the display panel PN through the first adhesive layer, and the lower surface of the cover panel CP can be directly bonded (or in direct contact) with a third region A3 of the display panel PN through the second adhesive layer.

[0090] The display panel PN may include a data driver DIC and an alignment mark AM disposed in a third region A3, and a circuit board CB may be disposed in the third region A3 of the display panel PN. The data driver DIC, alignment mark AM, and circuit board CB may be disposed below the lower surface of the cover panel CP.

[0091] In one or more embodiments, the alignment mark AM can be a mark used to confirm the curvature of the display panel PN. For example, the alignment mark AM can be a mark used to confirm whether the display panel PN is curved and aligned so that the second region A2 has an appropriate or suitable curvature. For example, the curvature of the display panel PN can be confirmed by capturing an image of the alignment mark AM on a third-direction DR3 under the overlay panel CP.

[0092] although Figure 1 and Figure 2 The illustration shows a display panel PN comprising two alignment marks AM arranged adjacent to two first side surfaces S1 (wherein the first side surfaces S1 are located at opposite ends of a third region A3 of the display panel PN, facing away from each other along a first direction DR1), but the present disclosure is not limited thereto. For example, the display panel PN may include one or more alignment marks AM, and the positions of the alignment marks AM (multiple alignment marks AM) may vary in various ways.

[0093] Furthermore, despite Figure 1 and Figure 2 The alignment mark AM is shown to have a triangular planar shape, but this disclosure is not limited thereto. For example, the alignment mark AM may have one or more suitable shapes, such as a cross-shaped planar shape and / or an L-shaped planar shape, etc.

[0094] The bending protective layer BPL can be disposed in the second region A2 of the display panel PN and can be bent together with the display panel PN. The bending protective layer BPL can extend to the first region A1 and the third region A3 of the display panel PN. The bending protective layer BPL can extend from the second region A2 of the display panel PN such that a portion of the bending protective layer BPL can be disposed between the first region A1 of the display panel PN and the adhesive layer AL, and a portion of the bending protective layer BPL can be disposed between the third region A3 of the display panel PN and the cover layer CIC.

[0095] The cover layer CIC can be disposed in the third region A3 of the display panel PN, and can be disposed below the cover panel CP. The cover layer CIC can cover the data driver DIC and alignment mark AM of the display panel PN. The cover layer CIC can cover a portion of the bend protection layer BPL and a portion of the circuit board CB, but may not cover the driving element DE of the circuit board CB. For example, the cover layer CIC can be fixed to the display panel PN, the bend protection layer BPL, and the circuit board CB by adhesive method.

[0096] In one or more embodiments, because the overlay CIC covers the alignment mark AM, the rigidity of the area defining the alignment mark AM can be supplemented by the overlay CIC even if no separate component (e.g., a protective film) is disposed between the display panel PN and the overlay panel CP. Therefore, even if the alignment of the alignment mark AM is confirmed, the recognition rate of the alignment mark AM may not be reduced.

[0097] In one or more embodiments, the first width W1 of the third region A3 of the display panel PN may be substantially equal to the second width W2 of the cover layer CIC. Here, the first width W1 may be the length of the third region A3 of the display panel PN in the first direction DR1, and the second width W2 may be the length of the cover layer CIC in the first direction DR1. In a plan view, the first side surface S1 at opposite ends of the third region A3 of the display panel PN along the first direction DR1 and the second side surface S2 at opposite ends of the cover layer CIC along the first direction DR1 may be stacked (e.g., aligned). In other words, in the third region A3 of the display panel PN, the display panel PN may have first side surfaces S1, one of which is located at an end (first end) of the upper surface of the display panel PN along the first direction DR1, and the other of which is located at the other end of the upper surface of the display panel PN along the first direction DR1 opposite to the first end. The first side surface S1 may extend in the second direction DR2. The cover layer CIC may have a second side surface S2 adjacent to the first side surface S1. Similar to the first side surface S1, the second side surface S2 is located at opposite ends of the upper surface of the cover layer CIC along the first direction DR1. The second side surface S2 may also extend in the second direction DR2, and each of the second side surfaces S2 may be aligned with a corresponding first side surface S1 in the first side surface S1.

[0098] When the second region A2 of the display panel PN bends, bending stress can occur at each of the first point P1 on the first region A1 and the second point P2 on the third region A3, and curvature can be formed at the point in the second region A2 where the maximum bending stress occurs. In such an embodiment, if (for example, when) the point where the maximum bending stress occurs is close to the central region between the first point P1 and the second point P2, an appropriate or suitable curvature can be formed to prevent or reduce the possibility of drive failure of the display device 10.

[0099] In one or more embodiments, because the cover panel CP and the display panel PN can be in direct contact with each other, a first point P1 can be adjacent to the point where the bending protective layer BPL and the adhesive layer AL contact, and a second point P2 can be adjacent to the point where the bending protective layer BPL and the cover layer CIC contact. To form an appropriate or suitable curvature in the second region A2, the first thickness TH1 of the cover layer CIC and the second thickness TH2 of the bending protective layer BPL can be adjusted. Here, the first thickness TH1 can be the length of the cover layer CIC in the third direction DR3, and the second thickness TH2 can be the length of the bending protective layer BPL in the third direction DR3. For example, the point generating the maximum bending stress can be controlled or selected by adjusting the first thickness TH1 and the second thickness TH2.

[0100] For example, if the first thickness TH1 is relatively thin and the second thickness TH2 is relatively thick, the point where the maximum bending stress occurs may be relatively close to the first point P1, thus failing to form an appropriate or suitable curvature and potentially causing a drive failure of the display device 10.

[0101] Therefore, in one or more embodiments, the first thickness TH1 can be adjusted proportionally to the second thickness TH2. For example, if (e.g., when) the second thickness TH2 is relatively thick, the first thickness TH1 can also be relatively thick, and if (e.g., when) the second thickness TH2 is relatively thin, the first thickness TH1 can also be relatively thin. However, in this disclosure, the first thickness TH1 is not limited, and the first thickness TH1 can be varied in various ways, taking into account the second thickness TH2, the materials included in the cover layer CIC, and / or the physical properties of the materials (e.g., modulus), etc.

[0102] Figure 5 This illustrates one or more embodiments according to the present disclosure, including... Figure 1 A plan view of the display panel, bending protective layer, cover layer and circuit board in the display device. Figure 6 It is according to one or more embodiments of this disclosure along Figure 5 The sectional view taken from line III-III'. Figure 7 It is according to one or more embodiments of this disclosure along Figure 5A sectional view taken from line IV-IV'.

[0103] For example, Figure 5 It could be a plan view showing the state of the display panel PN before it is bent. Figure 6 It can be a sectional view taken from the third region A3, and Figure 7 It can be a cross-sectional view taken from the display area DA.

[0104] Reference Figure 1 , Figure 4 , Figure 5 , Figure 6 and Figure 7 The display device 10 may include a display panel PN and a cover layer CIC.

[0105] The display panel PN may include a display area DA and a non-display area NDA. Pixels PX arranged along a first direction DR1 and a second direction DR2 may be arranged in the display area DA. Since each of the pixels PX can emit light, the display area DA can display an image. Lines connected to the pixels PX may be further arranged in the display area DA. For example, the lines may include data lines DL, gate signal lines, and / or power lines, etc. The lines may extend along the first direction DR1 or the second direction DR2.

[0106] The driver for the pixel PX can be located in the non-display area NDA. For example, the driver may include a data driver DIC, a gate driver, a power voltage generator, and / or a timing controller. The pixel PX can emit light based on signals received from the driver.

[0107] The display panel PN may include a substrate SUB, a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a via insulating layer VIA, a light-emitting element LE, a pixel defining layer PDL, and a packaging layer TFE. The transistor TR may include an active pattern ACT, a gate electrode GE, a first electrode SD1, and a second electrode SD2. The light-emitting element LE may include a pixel electrode PE, a light-emitting layer EL, and a common electrode CE.

[0108] The substrate SUB can include transparent or opaque materials. For example, the substrate SUB can include plastic, glass, quartz, and / or silicon. These can be used alone or in combination with each other.

[0109] A buffer layer (BFR) can be disposed on the substrate SUB. The buffer layer BFR can prevent or reduce the possibility of metal atoms and / or impurities diffusing into the transistor TR. Furthermore, if (for example, when) the surface of the substrate SUB is substantially non-uniform, the buffer layer BFR can improve the flatness of the substrate SUB surface. The buffer layer BFR can comprise inorganic materials, such as silicon oxide (SiO₂). x, where 0 < x ≤ 2), silicon nitride (Si x N y , where 0 < x ≤ 3 and 0 < y ≤ 4, for example, Si3N4) and / or silicon oxynitride (SiO x N y , where, for example, 0 < x ≤ 2 and 0 < y ≤ 2), etc. These can be used alone or in combination with each other.

[0110] The active pattern ACT can be disposed on the buffer layer BFR. The active pattern ACT can include a source region, a drain region, and a channel region between the source region and the drain region. The active pattern ACT can include a silicon semiconductor material or an oxide semiconductor material. Examples of the silicon semiconductor material can include amorphous silicon and / or polycrystalline silicon, etc. Examples of the oxide semiconductor material can include indium gallium zinc oxide (IGZO) and / or indium tin zinc oxide (ITZO), etc. These can be used alone or in combination with each other.

[0111] The gate insulating layer GI can be disposed on the active pattern ACT and can cover the active pattern ACT. The gate insulating layer GI can include an inorganic material, such as silicon oxide, silicon nitride, and / or silicon oxynitride, etc. These can be used alone or in combination with each other.

[0112] The gate electrode GE can be disposed on the gate insulating layer GI. The gate electrode GE can be stacked with the channel region of the active pattern ACT in a plan view. The gate electrode GE can include a metal, an alloy, a conductive metal nitride, a conductive metal oxide, and / or a transparent conductive material, etc. These can be used alone or in combination with each other.

[0113] The interlayer insulating layer ILD can be disposed on the gate electrode GE and can cover the gate electrode GE. The interlayer insulating layer ILD can include an inorganic material, such as silicon oxide, silicon nitride, and / or silicon oxynitride, etc. These can be used alone or in combination with each other.

[0114] The first electrode SD1 and the second electrode SD2 can be disposed on the interlayer insulating layer ILD. The first electrode SD1 can be connected to the source region of the active pattern ACT through a first contact hole penetrating (e.g., through) the gate insulating layer GI and the interlayer insulating layer ILD. In addition, the second electrode SD2 can be connected to the drain region of the active pattern ACT through a second contact hole penetrating (e.g., through) the gate insulating layer GI and the interlayer insulating layer ILD. For example, each of the first electrode SD1 and the second electrode SD2 can include a metal, an alloy, a conductive metal nitride, a conductive metal oxide, and / or a transparent conductive material, etc. These can be used alone or in combination with each other.

[0115] Therefore, the transistor TR, including the active pattern ACT, the gate electrode GE, the first electrode SD1, and the second electrode SD2, can be arranged on the substrate SUB.

[0116] The via insulating layer VIA can be disposed on the interlayer insulating layer ILD and can cover the first electrode SD1 and the second electrode SD2. The via insulating layer VIA can include organic materials such as phenolic resin, acrylic resin, polyimide resin, polyamide resin, silicone resin and / or epoxy resin. These can be used alone or in combination with each other.

[0117] The pixel electrode PE can be disposed on the via insulating layer VIA. The pixel electrode PE can be connected to the second electrode SD2 (or the first electrode SD1) through a contact hole penetrating (e.g., through) the via insulating layer VIA. The pixel electrode PE can include metals, alloys, conductive metal nitrides, conductive metal oxides, and / or transparent conductive materials, etc. These can be used individually or in combination with each other.

[0118] A pixel defining layer (PDL) may be disposed on a via insulating layer (VIA) and may cover at least a portion of the pixel electrode (PE). An opening exposing at least a portion of the upper surface of the pixel electrode (PE) may be defined in the pixel defining layer (PDL). The pixel defining layer (PDL) may comprise organic or inorganic materials. For example, the pixel defining layer (PDL) may comprise organic materials such as epoxy resin and / or siloxane resin. For another example, the pixel defining layer (PDL) may comprise organic or inorganic materials including a light-blocking material having a black color.

[0119] The light-emitting layer (EL) can be disposed on the pixel electrode (PE). The EL can be disposed on the pixel electrode (PE) exposed through the pixel limiting layer (PDL). The EL can include a material capable of emitting light of a set or predetermined color.

[0120] The common electrode (CE) can be disposed on the light-emitting layer (EL). The common electrode (CE) can include metals, alloys, conductive metal nitrides, conductive metal oxides, and / or transparent conductive materials. These can be used individually or in combination with each other.

[0121] Therefore, a light-emitting element LE, including a pixel electrode PE, a light-emitting layer EL, and a common electrode CE, can be arranged on a substrate SUB. The light-emitting element LE can be electrically connected to a transistor TR. The light-emitting element LE can generate and / or emit light corresponding to the drive current supplied from the transistor TR. The transistor TR and the light-emitting element LE can correspond to each of the pixels PX; for example, each of the pixels PX can include the transistor TR and the light-emitting element LE as described above.

[0122] The encapsulation layer TFE can be disposed on the common electrode CE. The encapsulation layer TFE can protect the light-emitting element LE from external oxygen and / or moisture, or reduce the possibility that the light-emitting element LE will be exposed to the aforementioned substances. The encapsulation layer TFE may include at least one inorganic layer and at least one organic layer. For example, the encapsulation layer TFE may have a structure in which the inorganic layer and the organic layer are stacked alternately.

[0123] A cover layer CIC may be disposed in a third region A3 on the display panel PN to cover the data driver DIC and the alignment mark AM. The cover layer CIC may include a first cover layer CIC1 and a second cover layer CIC2 disposed on the first cover layer CIC1. In one or more embodiments, the first cover layer CIC1 may cover the alignment mark AM, and the second cover layer CIC2 may not cover the alignment mark AM. The first cover layer CIC1 may extend in a first direction DR1 to cover the alignment mark AM. In a plan view, the first cover layer CIC1 may be superimposed on the alignment mark AM, and the second cover layer CIC2 may not be superimposed on the alignment mark AM.

[0124] In one or more embodiments, the third width W21 of the first cover layer CIC1 may be greater than the fourth width W22 of the second cover layer CIC2. Here, the third width W21 may be the length of the first cover layer CIC1 in the first direction DR1, and the fourth width W22 may be the length of the second cover layer CIC2 in the first direction DR1. The third width W21 may be substantially equal to the first width W1 of the display panel PN, and the fourth width W22 may be less than the first width W1 of the display panel PN.

[0125] In the plan view, the third side surfaces S21 at opposite ends of the first cover layer CIC1 along the first direction DR1 can be superimposed (e.g., aligned) with the first side surfaces S1 of the display panel PN, and the fourth side surfaces S22 at opposite ends of the second cover layer CIC2 along the first direction DR1 can be not superimposed (e.g., aligned) with the first side surfaces S1 of the display panel PN. In other words, the first cover layer CIC1 may have third side surfaces S21, one of which is located at an end (first end) of the upper surface of the first cover layer CIC1 along the first direction DR1, and the other of which is located at the opposite end of the upper surface of the first cover layer CIC1 along the first direction DR1. The third side surfaces S21 may extend in the second direction DR2. The second cover layer CIC2 may have a fourth side surface S22, and similar to the third side surface S21, the fourth side surface S22 is located at opposite ends of the upper surface of the second cover layer CIC2 along the first direction DR1. The fourth side surface S22 may also extend in the second direction DR2. Each of the third side surfaces S21 may be aligned with a corresponding first side surface S1 in the first side surfaces S1. The fourth side surface S4 may not be aligned with either the first side surface S1 or the third side surface S21.

[0126] Compared to the fourth side surface S22 protruding in the first direction DR1 and in the direction opposite to the first direction DR1, the third side surface S21 may protrude further in the first direction DR1 and in the direction opposite to the first direction DR1. For example, the second width W2 of the cover layer CIC may correspond to the third width W21 of the first cover layer CIC1, and the second side surface S2 of the cover layer CIC may correspond to the third side surface S21 of the first cover layer CIC1 (e.g., aligned with the third side surface S21 of the first cover layer CIC1).

[0127] The first cover layer CIC1 may include a first transport layer TL1 and a second transport layer TL2 disposed on the first transport layer TL1. The first transport layer TL1 can bond the second transport layer TL2 to the display panel PN, the bend protection layer BPL, or the circuit board CB. The first cover layer CIC1 may include an optically transparent material. For example, the first transport layer TL1 may include a pressure-sensitive adhesive, an optically transparent adhesive, and / or an optically transparent resin, etc., and the second transport layer TL2 may include polyethylene terephthalate, acrylic acid, and / or polyimide, etc. The first cover layer CIC1 can improve the impact resistance and / or protective function of the cover layer CIC.

[0128] The first thickness TH1 of the cover layer CIC can be the sum of the third thickness TH11 of the first cover layer CIC1 and the fourth thickness TH12 of the second cover layer CIC2. Here, the third thickness TH11 can be the length of the first cover layer CIC1 in the third direction DR3, and the fourth thickness TH12 can be the length of the second cover layer CIC2 in the third direction DR3. In one or more embodiments, the third thickness TH11 of the first cover layer CIC1 can be adjusted to form an appropriate or suitable curvature in the second region A2. For example, the thickness of each of the first transmission layer TL1 and the second transmission layer TL2 can be adjusted.

[0129] For example, if (e.g., when) the second thickness TH2 of the bending protective layer BPL is relatively thick, the third thickness TH11 may also be relatively thick, and if (e.g., when) the second thickness TH2 is relatively thin, the third thickness TH11 may also be relatively thin. However, in this disclosure, the third thickness TH11 is not limited, and the third thickness TH11 can be varied in various ways, taking into account the second thickness TH2, the material included in the first covering layer CIC1, and / or the physical properties of the material (e.g., modulus), etc.

[0130] The first cover layer CIC1 covering the alignment mark AM can be optically transparent. Therefore, even after the display panel PN is bent, an image of the alignment mark AM covered by the first cover layer CIC1 can be captured below the display device 10, and the alignment mark AM can still be identified. Furthermore, because the first cover layer CIC1 covers the alignment mark AM, it can supplement the rigidity of the area defining the alignment mark AM. Therefore, the recognition rate of the alignment mark AM can be improved.

[0131] The second cover layer CIC2 may include a first conductive layer CL1, a second conductive layer CL2 disposed on the first conductive layer CL1, and an organic layer OL disposed on the second conductive layer CL2. The first conductive layer CL1 may bond the second conductive layer CL2 to the first cover layer CIC1. The second cover layer CIC2 may include a conductive material. For example, the first conductive layer CL1 may include a conductive adhesive, and the second conductive layer CL2 may include a metal, alloy, and / or conductive metal oxide, etc. The organic layer OL may include an organic insulating material. For example, the organic layer OL may include polyethylene terephthalate, etc. In one or more embodiments, the organic layer OL may include an organic material with a black color and may be used as a light-blocking element. The second cover layer CIC2 can shield against static electricity. The second cover layer CIC2 can prevent or reduce the possibility that the display panel PN and / or circuit board CB, etc., may be damaged by external static electricity.

[0132] A display device 10 according to one or more embodiments of the present disclosure may include: a display panel PN, including a first region A1 defining a display area DA, a second region A2 defined as a curved region, and a third region A3 defining an alignment mark AM; a cover panel CP in contact with the first region A1 and the third region A3; and a cover layer CIC extending to cover the alignment mark AM on the third region A3. Because the region defining the alignment mark AM can be supported by the cover layer CIC, even if no separate component is arranged between the display panel PN and the cover panel CP, the recognition rate of the alignment mark AM can be improved when confirming the alignment of the alignment mark after bending the display panel PN. Therefore, the display device 10 can be thin, and the manufacturing cost can be reduced.

[0133] Figure 8 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure. Figure 9 According to one or more embodiments of this disclosure Figure 8 A magnified plan view of region A. Figure 10 It is according to one or more embodiments of this disclosure along Figure 9 A sectional view taken by line V-V'.

[0134] In addition to the CIC overlay, refer to Figure 8 , Figure 9 and Figure 10 The described display device 20 can be used with reference to Figures 1 to 7 The display device 10 described is substantially the same as or similar to the one described below. Redundant descriptions will not be provided below, or may be simplified.

[0135] For example, Figure 8 It can correspond to Figure 5 The floor plan, and Figure 9 and Figure 10 It can be a view showing the area in which the display panel PN, circuit board CB, and cover layer CIC are stacked in a plan view.

[0136] Reference Figure 8 , Figure 9 and Figure 10 The display device 20 may include a display panel PN, a bending protective layer BPL, a circuit board CB, and a cover layer CIC.

[0137] The display panel PN may include a display area DA and a non-display area NDA, which may correspond to the display area of ​​the display image and the non-display area of ​​the display device 20, respectively.

[0138] The display panel PN may include a first region A1, a second region A2, and a third region A3. The first region A1 may be the region defining the display area DA, the second region A2 may be the region bent about a bending axis, and the third region A3 may be the region located below the first region A1 after the second region A2 has been bent. The display panel PN may include a data driver DIC and an alignment mark AM disposed in the third region A3.

[0139] The bendable protective layer BPL can be disposed in the second region A2 on the display panel PN, and can be further disposed in a portion of the first region A1 and a portion of the third region A3 on the display panel PN. The bendable protective layer BPL can be bent together with the second region A2.

[0140] The circuit board CB can be arranged in a portion of the third region A3 on the display panel PN. For example, the circuit board CB can be coupled to one end of the third region A3. The circuit board CB can be electrically connected to the display panel PN.

[0141] The circuit board CB may also include conductive patterns CT disposed in a third region A3 of the display panel PN. For example, the conductive patterns CT may be arranged to be separated from each other along a first direction DR1 (e.g., spaced apart or separated). The conductive patterns CT may include metals, alloys, conductive metal nitrides, conductive metal oxides, and / or transparent conductive materials, etc. These may be used individually or in combination with each other.

[0142] The overlay layer CIC can be disposed in a third region A3 on the display panel PN. The overlay layer CIC can cover the data driver DIC and alignment mark AM, and can further cover a portion of the bend protection layer BPL and a portion of the circuit board CB. In one or more embodiments, the conductive pattern CT can be superimposed on the overlay layer CIC in a plan view. The overlay layer CIC can cover the conductive pattern CT.

[0143] In one or more embodiments, the first width W1 of the third region A3 of the display panel PN may be substantially equal to the second width W2 of the cover layer CIC. In a plan view, the first side surface S1 at the opposite ends of the third region A3 of the display panel PN along the first direction DR1 and the second side surface S2 at the opposite ends of the cover layer CIC along the first direction DR1 may be stacked respectively.

[0144] The cover layer CIC may include a first cover layer CIC1 and a second cover layer CIC2 disposed on the first cover layer CIC1. The first cover layer CIC1 may include a first transmission layer TL1 and a second transmission layer TL2 disposed on the first transmission layer TL1. The second cover layer CIC2 may include a first conductive layer CL1, a second conductive layer CL2 disposed on the first conductive layer CL1, and an organic layer OL disposed on the second conductive layer CL2.

[0145] In one or more embodiments, the width of the first cover layer CIC1 may be greater than the width of the second cover layer CIC2. The width of the first cover layer CIC1 may be substantially equal to the first width W1, and the width of the second cover layer CIC2 may be less than the first width W1. In a plan view, the third side surface S21 at the opposite ends of the first cover layer CIC1 along the first direction DR1 may overlap with the first side surface S1, and the fourth side surface S22 at the opposite ends of the second cover layer CIC2 along the first direction DR1 may not overlap with the first side surface S1. Compared to the fourth side surface S22 protruding in the first direction DR1 and in the direction opposite to the first direction DR1, the third side surface S21 may further protrude in the first direction DR1 and in the direction opposite to the first direction DR1. For example, the second side surface S2 of the cover layer CIC may correspond to the third side surface S21 of the first cover layer CIC1.

[0146] In one or more embodiments, the first overlay layer CIC1 may define a first opening OP1. The first opening OP1 may penetrate the first overlay layer CIC1 on a third-direction DR3. The first opening OP1 may be superimposed on a conductive pattern CT in a plan view. For example, the conductive pattern CT may be contained within the first opening OP1.

[0147] The conductive pattern CT can be connected to the second cover layer CIC2 through the first opening OP1. For example, the second cover layer CIC2 can cover the upper surface of the conductive pattern CT. The second cover layer CIC2 may include a conductive material. The conductive pattern CT and the second cover layer CIC2 can shield against static electricity or unwanted current that may be generated when the display device 20 is driven.

[0148] although Figure 9 The diagram shows the first opening OP1 superimposed on the second cover layer CIC2 in a plan view, but this disclosure is not limited thereto. For example, the first opening OP1 may be partially superimposed on the second cover layer CIC2.

[0149] Figure 11 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure. Figure 12 According to one or more embodiments of this disclosure Figure 11 A magnified plan view of region B. Figure 13 It is according to one or more embodiments of this disclosure along Figure 12 A sectional view taken from line VI-VI'.

[0150] In addition to the CIC overlay, refer to Figure 11 , Figure 12 and Figure 13 The described display device 30 can be used with reference to Figures 1 to 7 The display device 10 described is substantially the same as or similar to the one described below. Redundant descriptions will not be provided below, or may be simplified.

[0151] For example, Figure 11 It can correspond to Figure 5 The floor plan, and Figure 12 and Figure 13 It could be a view showing the third area A3.

[0152] Reference Figure 11 , Figure 12 and Figure 13 The display device 30 may include a display panel PN, a bending protective layer BPL, a circuit board CB, and a cover layer CIC.

[0153] The display panel PN may include a display area DA and a non-display area NDA, which may correspond to the display area of ​​the display image and the non-display area of ​​the display device 30, respectively.

[0154] The display panel PN may include a first region A1, a second region A2, and a third region A3. The first region A1 may be the region defining the display area DA, the second region A2 may be the region bent about a bending axis, and the third region A3 may be the region located below the first region A1 after the second region A2 has been bent. The display panel PN may include a data driver DIC and an alignment mark AM disposed in the third region A3.

[0155] The bendable protective layer BPL can be disposed in the second region A2 on the display panel PN, and can be further disposed in a portion of the first region A1 and a portion of the third region A3 on the display panel PN. The bendable protective layer BPL can be bent together with the second region A2.

[0156] The circuit board CB can be arranged in a portion of the third region A3 on the display panel PN. For example, the circuit board CB can be coupled to one end of the third region A3. The circuit board CB can be electrically connected to the display panel PN.

[0157] The cover layer CIC can be arranged in the third area A3 on the display panel PN. The cover layer CIC can cover the data driver DIC and alignment mark AM, and can further cover a portion of the bend protection layer BPL and a portion of the circuit board CB.

[0158] In one or more embodiments, the first width W1 of the third region A3 of the display panel PN may be substantially equal to the second width W2 of the cover layer CIC. In a plan view, the first side surface S1 at the opposite ends of the third region A3 of the display panel PN along the first direction DR1 and the second side surface S2 at the opposite ends of the cover layer CIC along the first direction DR1 may be stacked respectively.

[0159] The cover layer CIC may include a first cover layer CIC1 and a second cover layer CIC2 disposed on the first cover layer CIC1. The first cover layer CIC1 may include a first transmission layer TL1 and a second transmission layer TL2 disposed on the first transmission layer TL1. The second cover layer CIC2 may include a first conductive layer CL1, a second conductive layer CL2 disposed on the first conductive layer CL1, and an organic layer OL disposed on the second conductive layer CL2.

[0160] In one or more embodiments, the third width W21 of the first cover layer CIC1 may be greater than the fourth width W22 of the second cover layer CIC2. The third width W21 may be substantially equal to the first width W1, and the fourth width W22 may be less than the first width W1. In a plan view, the third side surface S21 at opposite ends of the first cover layer CIC1 along the first direction DR1 may overlap with the first side surface S1, and the fourth side surface S22 at opposite ends of the second cover layer CIC2 along the first direction DR1 may not overlap with the first side surface S1. The third side surface S21 may protrude further in the first direction DR1 and in the direction opposite to the first direction DR1, compared to the fourth side surface S22 protruding in both the first direction DR1 and the direction opposite to the first direction DR1. For example, the second width W2 of the cover layer CIC may correspond to the third width W21 of the first cover layer CIC1, and the second side surface S2 of the cover layer CIC may correspond to the third side surface S21 of the first cover layer CIC1.

[0161] In one or more embodiments, the first transport layer TL1 may define a second opening OP2. The second opening OP2 may penetrate the first transport layer TL1 on a third-direction DR3. The second opening OP2 may be superimposed on a data driver DIC in a plan view. For example, the data driver DIC may be housed within the second opening OP2.

[0162] The planar area of ​​the second opening OP2 can be larger than the planar area of ​​the data driver DIC. For example, the edge of the data driver DIC and the edge of the second opening OP2 can be separated from each other and / or separated (e.g., spaced apart or separated) by a distance D. For example, the distance D can be about 300 μm or greater, but this disclosure is not limited thereto.

[0163] The second transport layer TL2 and the second cover layer CIC2 can be arranged on the upper surface of the data driver DIC. Because the cover layer CIC defines the second opening OP2 in which the data driver DIC is arranged, drive failure of the data driver DIC due to deformation of the first cover layer CIC1 can be prevented or reduced.

[0164] Figure 14 , Figure 15 and Figure 16 This is a view illustrating a method of manufacturing a display device according to one or more embodiments of the present disclosure. For example, Figure 14 It could be a perspective view showing a method for manufacturing a display device. Figure 15 It can be Figure 14 The floor plan, and Figure 16 It can be along Figure 15 A sectional view taken from line VII-VII'.

[0165] Reference Figure 14 , Figure 15 and Figure 16 The described method for manufacturing a display device may be a manufacturing reference. Figures 1 to 7 The described display device 10, reference Figures 8 to 10 The described display device 20 or reference Figures 11 to 13 The method of the display device 30 is described below. Redundant descriptions will be omitted or simplified in the following text.

[0166] Reference Figure 14 , Figure 15 and Figure 16 A preliminary display panel P_PN can be mounted (e.g., supplied) on a carrier film CR. The carrier film CR can be used to transport the preliminary display panel P_PN. The carrier film CR can protect the lower part of the preliminary display panel P_PN.

[0167] The initial display panel P_PN may include a first area A1, a second area A2, a third area A3, and a dummy area A4. The first area A1, the second area A2, and the third area A3 may be arranged sequentially in a direction opposite to the second direction DR2. The second area A2 may be arranged between the first area A1 and the third area A3.

[0168] A dummy region A4 may define a first region A1, a second region A2, and a third region A3. In a plan view, the dummy region A4 may surround (e.g., encircle) the first region A1, the second region A2, and the third region A3. Furthermore, the dummy region A4 may define a cutting line CTL. The boundary between the dummy region A4 and each of the first region A1, the second region A2, and the third region A3 may be defined as a cutting line CTL.

[0169] The preliminary display panel P_PN may include a data driver DIC and an alignment mark AM arranged in the third region A3. For example, the alignment mark AM may be defined as being adjacent to the side surfaces of the preliminary display panel P_PN at opposite sides of each other along the first direction DR1 in the third region A3.

[0170] A preliminary polarization layer P_POL and a preliminary bending protection layer P_BPL can be formed on the preliminary display panel P_PN. The preliminary polarization layer P_POL can be formed in a first region A1 on the preliminary display panel P_PN and a portion of a dummy region A4 adjacent to the first region A1. The preliminary bending protection layer P_BPL can be formed in a second region A2 on the preliminary display panel P_PN and a portion of the first region A1, a portion of the third region A3, and a portion of the dummy region A4 adjacent to the second region A2, respectively.

[0171] A circuit board CB can be mounted on the preliminary display panel P_PN. The circuit board CB can be integrated into a portion of the third area A3 on the preliminary display panel P_PN.

[0172] A preliminary cover layer P_CIC can be further formed on the preliminary display panel P_PN. The preliminary cover layer P_CIC can be formed in a third region A3 on the preliminary display panel P_PN and a portion of the dummy region A4 adjacent to the third region A3. The preliminary cover layer P_CIC can cover the data driver DIC and the alignment mark AM. The preliminary cover layer P_CIC can further cover a portion of the preliminary bend protection layer P_BPL and a portion of the circuit board CB.

[0173] For example, the circuit board CB, the preliminary cover layer P_CIC, the preliminary bend protection layer P_BPL, and the preliminary polarization layer P_POL can be arranged sequentially along the second direction DR2 on the preliminary display panel P_PN.

[0174] The preliminary cover layer P_CIC may include a preliminary first cover layer P_CIC1 and a second cover layer P_CIC2 disposed on the preliminary first cover layer P_CIC1. The preliminary first cover layer P_CIC1 may include a preliminary first transport layer P_TL1 and a preliminary second transport layer P_TL2 disposed on the preliminary first transport layer P_TL1. The preliminary first transport layer P_TL1 may bond the preliminary second transport layer P_TL2 to the preliminary display panel P_PN, the preliminary bend protection layer BPL, and / or the circuit board CB. The preliminary first cover layer P_CIC1 may include an optically transparent material. For example, the preliminary first transport layer P_TL1 may include a pressure-sensitive adhesive, an optically transparent adhesive, and / or an optically transparent resin, etc., and the preliminary second transport layer P_TL2 may include polyethylene terephthalate, acrylic acid, and / or polyimide, etc.

[0175] In one or more embodiments, the initial first overlay layer P_CIC1 may cover the alignment mark AM, and the second overlay layer CIC2 may not cover the alignment mark AM. In a plan view, the initial first overlay layer P_CIC1 may be superimposed on the alignment mark AM, and the second overlay layer CIC2 may not be superimposed on the alignment mark AM.

[0176] Furthermore, a preliminary first overlay layer P_CIC1 can be formed in a third region A3 on the preliminary display panel P_PN and a portion of a dummy region A4 adjacent to the third region A3, and a second overlay layer CIC2 can be formed in the third region A3 on the preliminary display panel P_PN. In a plan view, the preliminary first overlay layer P_CIC1 can be superimposed on the dummy region A4, and the second overlay layer CIC2 can be not superimposed on the dummy region A4. For example, the preliminary first overlay layer P_CIC1 can extend in a first direction DR1 to cover the alignment mark AM and superimpose on the dummy region A4 in a plan view, and the cutting line CTL can be defined in the preliminary first overlay layer P_CIC1.

[0177] Subsequently, the preliminary polarizing layer P_POL, the preliminary bending protection layer P_BPL, the preliminary cover layer P_CIC, and the preliminary display panel P_PN can be cut along the dummy region A4 (e.g., along the boundary defining the dummy region A4). For example, the preliminary polarizing layer P_POL, the preliminary bending protection layer P_BPL, the preliminary cover layer P_CIC, and the preliminary display panel P_PN can be cut along the cutting line CTL, and the portions of the dummy region A4 of the preliminary display panel P_PN, as well as the portions of the preliminary polarizing layer P_POL, the preliminary bending protection layer P_BPL, and the preliminary cover layer P_CIC that overlap with the dummy region A4 in the plan view, can be removed.

[0178] Therefore, refer to, for example Figure 1 , Figure 2 , Figure 5 and Figure 6 It can form a display panel PN including a first region A1, a second region A2 and a third region A3, and can form a polarization layer POL, a bending protection layer BPL, a circuit board CB and a cover layer CIC including a first cover layer CIC1 and a second cover layer CIC2 on the display panel PN.

[0179] The polarizing layer POL can be formed in the first region A1 of the display panel PN, and the bending protective layer BPL can be formed in the second region A2, a portion of the first region A1, and a portion of the third region A3 of the display panel PN. The cover layer CIC can be formed in the third region A3 of the display panel PN, and can be formed to cover the alignment mark AM.

[0180] Subsequently, the window WM can be bonded to the polarizing layer POL, and the cover panel CP can be bonded to the lower part of the display panel PN. The second region A2 of the display panel PN can be bent, and the third region A3 can be arranged below the first region A1 to face the first region A1 on the third-direction DR3. Therefore, a display device in which the first region A1 and the third region A3 of the display panel PN are in direct contact with the upper and lower surfaces of the cover panel CP, respectively, can be manufactured.

[0181] Display devices 10, 20, and 30 according to one or more embodiments of the present disclosure can be applied to various electronic devices. Electronic devices according to one or more embodiments of the present disclosure may include the aforementioned display device 10, display device 20, or display device 30, and may also include modules or devices with additional functions in addition to display device 10, display device 20, or display device 30.

[0182] Figure 17 This is a block diagram illustrating an electronic device according to one or more embodiments of the present disclosure.

[0183] Reference Figure 17 The electronic device 1000 may include a display module 1010, a processor 1020, a memory 1030, and a power module 1040.

[0184] The processor 1020 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0185] The memory 1030 can store data information necessary for the operation of the processor 1020 or the display module 1010. When the processor 1020 executes the application stored in the memory 1030, image data signals and / or input control signals can be transmitted to the display module 1010, and the display module 1010 can process the received signals and output image information through the display screen.

[0186] The power module 1040 may include a power module such as a power adapter or battery device, and a power conversion module that converts the power supplied by the power module to generate the power necessary for the operation of the electronic device 1000.

[0187] At least one of the components of the electronic device 1000 described above may be included in the display device according to one or more of the above embodiments. Furthermore, some of the modules functionally included in a single module may be included in the display device, while other modules may be disposed separately from the display device. For example, the display device may include a display module 1010, and the processor 1020, memory 1030, and power module 1040 may be disposed as other devices in the electronic device 1000 besides the display device.

[0188] Figure 18 This is a schematic diagram illustrating an electronic device according to one or more embodiments of the present disclosure.

[0189] Reference Figure 18 The various electronic devices to which the display device according to one or more embodiments of this disclosure is applied may include not only image display electronic devices, but also wearable electronic devices including display modules or vehicle electronic devices 1000_3 including display modules, etc. Image display electronic devices may be smartphones 1000_1a, tablet PCs 1000_1b, laptop computers 1000_1c, TVs 1000_1d, or desktop monitors 1000_1e, etc. Wearable electronic devices may be smart glasses 1000_2a, head-mounted displays 1000_2b, or smartwatches 1000_2c, etc. Vehicle electronic devices 1000_3 may be central information displays (CID) or interior mirror displays installed on the dashboard and central instrument panel of a vehicle, etc.

[0190] This disclosure can be applied to one or more suitable display devices. For example, this disclosure applies to one or more suitable display devices, such as display devices for vehicles, ships and / or aircraft, portable communication devices, display devices for exhibitions or information transmission, and / or medical display devices. In one or more embodiments, the display devices discussed herein may be included in electronic devices such as portable communication devices (such as mobile phones), medical display devices, vehicles, ships and / or aircraft.

[0191] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms (such as those defined in a general dictionary) shall be interpreted as having the same meaning as they have in the relevant field and / or the context (background) of this specification, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0192] Furthermore, in describing embodiments of this disclosure, the use of "may" refers to "one or more embodiments of this disclosure".

[0193] As used herein, the terms “basic,” “about,” and similar terms are used as approximations rather than terms of degree and are intended to account for the inherent biases of measured or calculated values ​​that would be recognized by one of ordinary skill in the art. As used herein, “basic” includes the stated value and means within an acceptable range of deviation for a particular value, as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, “basic” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0194] Furthermore, any numerical range disclosed and / or enumerated herein is intended to include all subranges with the same numerical precision contained within the enumerated range. For example, the range “1.0 to 10.0” is intended to include all subranges between the enumerated minimum value of 1.0 and the enumerated maximum value of 10.0 (and inclusive), i.e., a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit enumerated herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit enumerated in this specification is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to amend this specification (including the claims) to expressly describe any subranges contained within the range expressly enumerated herein.

[0195] The display device, electronic device, or any other related device, manufacturing equipment, or components for manufacturing the display device according to embodiments of the present disclosure described herein can be implemented using any suitable hardware, firmware (e.g., application-specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, various components of the device can be formed on an integrated circuit (IC) chip or on separate IC chips. Furthermore, various components of the device can be implemented on a flexible printed circuit film, a tape-on-a-chip (TCP), a printed circuit board (PCB), or formed on a substrate. Additionally, various components of the device can be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system components for performing the various functions described herein. The computer program instructions are stored in memory, which can be implemented in the computing device using standard memory devices such as random access memory (RAM). The computer program instructions can also be stored in other non-transitory computer-readable media such as CD-ROMs or flash drives. Furthermore, those skilled in the art will recognize that, without departing from the scope of embodiments of the present disclosure, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed across one or more other computing devices.

[0196] In view of the whole of this disclosure, those skilled in the art will understand that each suitable feature of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and may be technically interlocked and operated in various suitable ways, and unless otherwise stated or implied, each embodiment may be implemented independently of each other or in combination with each other in any suitable way.

[0197] It will be understood that, unless otherwise described, the description of features or aspects in each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Therefore, it will be apparent to those skilled in the art that, unless specifically stated otherwise, features, characteristics, and / or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. It will be understood that the foregoing is illustrative of various exemplary embodiments and is not to be construed as limiting to the specific embodiments disclosed herein, and various modifications to the disclosed embodiments and other exemplary embodiments are included within the spirit and scope of this disclosure as defined in the appended claims and their equivalents.

Claims

1. A display device, the display device comprising: The display panel includes a first region, a second region, and a third region, wherein the second region is adjacent to the first region and is bent about a bending axis extending in one direction, and the third region is adjacent to the second region and includes alignment marks. A cover layer is placed below the third area of ​​the display panel and covers the alignment marks; as well as A cover panel is located between the first and third regions of the display panel and is in contact with the display panel.

2. The display device according to claim 1, wherein, The first width of the third region of the display panel in one direction is equal to the second width of the cover layer in one direction.

3. The display device according to claim 2, wherein, In the plan view, the first side surface of the third region of the display panel at opposite ends in one direction overlaps with the second side surface of the cover layer at opposite ends in one direction.

4. The display device according to claim 1, wherein, The cover panel includes: A first surface, in contact with the first area of ​​the display panel; and The second surface contacts the third area of ​​the display panel.

5. The display device according to claim 1, wherein, The third region of the display panel is below the first region of the display panel.

6. The display device according to claim 3, wherein, The covering layer includes: The first covering layer includes an optically transparent material; and A second cover layer is applied over the first cover layer and includes a conductive material.

7. The display device according to claim 6, wherein, The first overlay layer overlaps with the alignment mark in the plan view, and The second overlay layer does not overlap with the alignment mark in the plan view.

8. The display device according to claim 6, wherein, The third width of the first covering layer in one direction is greater than the fourth width of the second covering layer in one direction.

9. The display device according to claim 8, wherein, The third width of the first overlay layer is equal to the first width of the third region of the display panel.

10. The display device according to claim 6, wherein, In the plan view, the third side surface of the first cover layer at the opposite ends in one direction does not overlap with the fourth side surface of the second cover layer at the opposite ends in one direction.

11. The display device according to claim 10, wherein, In the plan view, the third side surface of the first cover layer is superimposed on the first side surface of the display panel.

12. The display device according to claim 6, further comprising: The circuit board is attached to the third region of the display panel. The cover layer covers at least a portion of the circuit board.

13. The display device according to claim 12, wherein, The circuit board includes a conductive pattern superimposed on the cover layer in the plan view, and The first cover layer is defined by an opening that overlaps with the conductive pattern in the plan view.

14. The display device according to claim 6, wherein, The display panel includes a data driver, which is located in the third area, and The overlay layer covers the data driver.

15. The display device according to claim 14, wherein, The first overlay layer includes a first transport layer and a second transport layer on top of the first transport layer, and The first transport layer is defined by an opening that overlaps with the data driver in the plan view.

16. A method comprising the steps of: A preliminary display panel is supplied, the preliminary display panel including a first region, a second region, a third region, and a dummy region, the second region being adjacent to the first region and flexible, the third region being adjacent to the second region and including alignment marks, and the dummy region defining the first region, the second region, and the third region; A preliminary overlay layer is formed on the preliminary display panel, covering the alignment marks in the third region and the dummy region; The preliminary display panel and the preliminary cover layer are cut along the boundary defining the dummy area to form a display panel including the first area, the second area and the third area, and a cover layer covering the alignment mark; as well as The cover panel is attached to the lower part of the display panel. The method is used to manufacture a display device.

17. The method according to claim 16, wherein, The first width of the third region of the display panel in one direction is equal to the second width of the overlay layer in that direction.

18. The method according to claim 17, wherein, In the plan view, The first side surface of the third region of the display panel at opposite ends in one direction is superimposed on the second side surface of the cover layer at opposite ends in one direction.

19. The method of claim 16, further comprising the step of: The second region of the display panel is bent about a bending axis extending in one direction to position the third region of the display panel below the first region of the display panel.

20. The method according to claim 19, wherein, The first surface of the cover panel contacts the first area of ​​the display panel, and The second surface of the cover panel is in contact with the third area of ​​the display panel.

21. The method according to claim 18, wherein, The steps for forming the preliminary covering layer include: A first overlay layer is formed, which is superimposed on the alignment mark in the plan view; and A second cover layer is formed on the first cover layer, the second cover layer not overlapping the alignment mark in the plan view.

22. The method according to claim 21, wherein, After the step of cutting the preliminary display panel and the preliminary cover layer, the third width of the first cover layer in one direction is equal to the first width of the third region of the display panel.

23. The method according to claim 21, wherein, After the step of cutting the preliminary display panel and the preliminary cover layer, in the plan view, the third side surface of the first cover layer at opposite ends in one direction is superimposed on the first side surface of the display panel.

24. The method of claim 16, further comprising the step of: Combine the third region with the circuit board. The circuit board includes a conductive pattern superimposed on the cover layer in a plan view, and the cover layer defines an opening superimposed on the conductive pattern in the plan view.

25. The method according to claim 16, wherein, The display panel includes a data driver, which is located in the third area. The overlay layer covers the data drive, and The overlay is defined in a plan view by an opening that overlaps with the data driver.

26. An electronic device, the electronic device comprising: The display device includes: The display panel includes a first region, a second region, and a third region, wherein the second region is adjacent to the first region and is bent about a bending axis extending in one direction, and the third region is adjacent to the second region and includes alignment marks. A cover layer, located beneath the third region of the display panel, and covering the alignment marks; and A cover panel is located between the first and third regions of the display panel and is in contact with the display panel.

27. The electronic device according to claim 26, wherein, The electronic device is a portable communication device, a medical display device, a vehicle, a ship, or an aircraft.