Chip abnormity detection method and device, electronic equipment, storage medium and chip

Abstract

The invention provides a chip abnormity detection method, which comprises the steps of performing hard decoding processing on a test video to obtain first original pixel data of the test video, determining whether a target chip has decoding abnormity or not based on reference pixel data and the first original pixel data, and if yes, judging whether the target chip has the decoding abnormity or not. And processing the first original pixel data to obtain second original pixel data under the condition of determining that the target chip does not have the decoding abnormity, determining whether the target chip has the coding abnormity or not based on the reference pixel data and the second original pixel data, and if yes, determining that the target chip has the coding abnormity. And under the condition of determining that the target chip does not have the coding abnormity, determining that the target chip is not abnormal. According to the scheme disclosed by the invention, the encoding abnormity and the decoding abnormity of the hardware encoding and decoding chip can be effectively detected, potential problems of the intelligent equipment can be found in time, and the video quality of the intelligent equipment is improved.

Description

Technical Field

[0001] This disclosure relates to the field of chip technology, and in particular to a method, apparatus, electronic device, storage medium, and chip for detecting chip anomalies. Background Technology

[0002] With the widespread adoption of smartphones, tablets, digital cameras, and other smart devices, video functionality has become a crucial factor for many when purchasing such devices. To provide better video capabilities, many smart devices utilize hardware codec chips for efficient video encoding and decoding. However, sometimes these smart devices containing hardware codec chips may malfunction before being sold, leading to problems such as video playback, recording, or other related operations failing, or displaying distorted / green screens. Therefore, how to detect malfunctions in hardware codec chips is a pressing issue that needs to be addressed. Summary of the Invention

[0003] This disclosure provides a method and apparatus for detecting chip anomalies, an electronic device, a storage medium, and a chip, to solve problems in related technologies. It can effectively detect anomalies in hardware codec chips, promptly identify potential problems in smart devices, and improve the video quality of smart devices.

[0004] The first aspect of this disclosure provides a method for detecting chip anomalies, the method comprising:

[0005] The test video is hardware decoded to obtain the first raw pixel data of the test video;

[0006] Determine whether the target chip has a decoding anomaly based on the reference pixel data and the first original pixel data;

[0007] If it is determined that there is no decoding anomaly in the target chip, the first raw pixel data is processed to obtain the second raw pixel data;

[0008] Based on the reference pixel data and the second original pixel data, determine whether the target chip has any coding anomalies;

[0009] If it is determined that the target chip does not have any coding anomalies, then the target chip is deemed to be without anomalies.

[0010] In some embodiments of this disclosure, determining whether the target chip has a decoding anomaly based on the reference pixel data and the first original pixel data includes:

[0011] The decoding time of the hardware decoding process for the first raw pixel data of each frame is obtained;

[0012] If it is determined that there is no abnormality in the decoding time, then the pixel values ​​are compared between the reference pixel data and the first original pixel data;

[0013] Count the number of abnormal pixel values ​​and determine whether the number of abnormal pixel values ​​is greater than a preset abnormal threshold;

[0014] If the number of abnormal pixel values ​​is greater than the preset abnormal threshold, it is determined that the target chip has a decoding abnormality;

[0015] If the number of abnormal pixel values ​​is less than or equal to the preset abnormal threshold, it is determined that the target chip does not have a decoding abnormality.

[0016] In some embodiments of this disclosure, the method further includes:

[0017] If it is determined that the decoding time is abnormal, then it is determined that the target chip has a decoding abnormality.

[0018] In some embodiments of this disclosure, processing the first raw pixel data to obtain second raw pixel data includes:

[0019] The first original pixel data is encoded to obtain the first video frame compressed data.

[0020] The first video frame compressed data is hardware decoded to obtain the second raw pixel data.

[0021] In some embodiments of this disclosure, determining whether the target chip has an encoding anomaly based on the reference pixel data and the second original pixel data includes:

[0022] Obtain the encoding duration of the hard-coded processing of the first original pixel in each frame;

[0023] If it is determined that there is no abnormality in the encoding duration, then the similarity between the reference pixel data and the second original pixel data is compared.

[0024] If the similarity is determined to be greater than the preset similarity threshold, then the target chip is determined to have no coding anomalies.

[0025] In some embodiments of this disclosure, the method further includes:

[0026] If it is determined that the encoding duration is abnormal, then it is determined that the target chip has an encoding abnormality.

[0027] In some embodiments of this disclosure, the step of performing hardware decoding on the test video to obtain the first raw pixel data of the test video includes:

[0028] According to the encoding format of the target chip, obtain the test video with the corresponding encoding format;

[0029] The test video is decapsulated to obtain the compressed data of the second video frame;

[0030] The compressed data of the second video frame is hardware decoded to obtain the first raw pixel data of the test video.

[0031] In some embodiments of this disclosure, before processing the first raw pixel data to obtain the second raw pixel data, the method further includes:

[0032] Obtain the video parameters of the compressed data of the second video frame;

[0033] Configure the encoding parameters of the hard-coded process as the video parameters.

[0034] In some embodiments of this disclosure, the decoding time of the hardware decoding process for acquiring the first raw pixel data of each frame includes:

[0035] When the hardware encoder in the target chip is invoked to decode the first raw pixel data, a timer is triggered to start counting.

[0036] After the hardware encoder completes one decoding operation, the timer is triggered to end the timing.

[0037] The decoding time of the first original pixel data is obtained based on the start and end times of the timer.

[0038] A second aspect of this disclosure provides a chip anomaly detection device, the device comprising:

[0039] The decoding unit is used to perform hardware decoding on the test video to obtain the first raw pixel data of the test video.

[0040] The judgment unit is used to determine whether there is a decoding abnormality in the target chip based on the reference pixel data and the first original pixel data;

[0041] The processing unit is configured to process the first raw pixel data to obtain the second raw pixel data when it is determined that there is no encoding / decoding abnormality in the target chip;

[0042] The first determining unit is configured to determine whether the target chip has an encoding anomaly based on the reference pixel data and the second original pixel data;

[0043] The second determining unit is used to determine that the target chip is without anomalies if it is determined that the target chip does not have any coding anomalies.

[0044] In some embodiments of this disclosure, the determining unit is further configured to:

[0045] The decoding time of the hardware decoding process for the first raw pixel data of each frame is obtained;

[0046] If it is determined that there is no abnormality in the decoding time, then the pixel values ​​are compared between the reference pixel data and the first original pixel data;

[0047] Count the number of abnormal pixel values ​​and determine whether the number of abnormal pixel values ​​is greater than a preset abnormal threshold;

[0048] If the number of abnormal pixel values ​​is greater than the preset abnormal threshold, it is determined that the target chip has a decoding abnormality;

[0049] If the number of abnormal pixel values ​​is less than or equal to the preset abnormal threshold, it is determined that the target chip does not have a decoding abnormality.

[0050] In some embodiments of this disclosure, the determining unit is further configured to:

[0051] If it is determined that the decoding time is abnormal, then it is determined that the target chip has a decoding abnormality.

[0052] The processing unit is further configured to:

[0053] The first original pixel data is encoded to obtain the first video frame compressed data.

[0054] The first video frame compressed data is hardware decoded to obtain the second raw pixel data.

[0055] In some embodiments of this disclosure, the first determining unit is further configured to:

[0056] Obtain the encoding duration of the hard-coded processing of the first original pixel in each frame;

[0057] If it is determined that there is no abnormality in the encoding duration, then the second original pixel data is hard-decoded into the second original pixel data.

[0058] The similarity between the reference pixel data and the second original pixel data is compared.

[0059] If the similarity is determined to be greater than the preset similarity threshold, then the target chip is determined to have no coding anomalies.

[0060] In some embodiments of this disclosure, the first determining unit is further configured to:

[0061] If it is determined that the encoding duration is abnormal, then it is determined that the target chip has an encoding abnormality.

[0062] In some embodiments of this disclosure, the decoding unit is further configured to:

[0063] According to the encoding format of the target chip, obtain the test video with the corresponding encoding format;

[0064] The test video is decapsulated to obtain the compressed data of the second video frame;

[0065] The compressed data of the second video frame is hardware decoded to obtain the first raw pixel data of the test video.

[0066] In some embodiments of this disclosure, the apparatus further includes:

[0067] The acquisition unit is used to acquire video parameters of the second video frame compressed data before processing the first original pixel data to obtain the second original pixel data;

[0068] A configuration unit is used to configure the encoding parameters of the hard-coded processing as the video parameters.

[0069] In some embodiments of this disclosure, the determining unit is further configured to:

[0070] When the hardware decoder in the target chip is invoked to decode the test video, a timer is triggered to start counting down.

[0071] After the hardware encoder completes one decoding operation, the timer is triggered to end the timing.

[0072] The decoding time of the first original pixel data is obtained based on the start and end times of the timer.

[0073] A third aspect of this disclosure provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods described in the first aspect of this disclosure.

[0074] A fourth aspect of this disclosure provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the methods described in the first aspect of this disclosure.

[0075] A fifth aspect of this disclosure provides a chip including one or more interfaces and one or more processors. The interfaces are used to receive signals from the memory of an electronic device and send signals to the processors, the signals including computer instructions stored in the memory. When the processor executes the computer instructions, it causes the electronic device to perform the method described in the first aspect of this disclosure. This effectively detects anomalies in hardware codec chips, promptly identifies potential problems in smart devices, and improves the video quality of smart devices.

[0076] In summary, the chip anomaly detection method proposed in this disclosure includes hardware decoding of a test video to obtain first raw pixel data of the test video; determining whether a target chip has a decoding anomaly based on reference pixel data and the first raw pixel data; if the target chip does not have a decoding anomaly, processing the first raw pixel data to obtain second raw pixel data; determining whether the target chip has an encoding anomaly based on the reference pixel data and the second raw pixel data; and if the target chip does not have an encoding anomaly, determining that the target chip is anomaly-free. The solution of this disclosure can effectively detect encoding and decoding anomalies in hardware codec chips, promptly identify potential problems in smart devices, and improve the video quality of smart devices.

[0077] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0078] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0079] Figure 1 A flowchart illustrating a chip anomaly detection method provided in this embodiment of the disclosure;

[0080] Figure 2 A flowchart illustrating a chip anomaly detection method provided in this embodiment of the disclosure;

[0081] Figure 3 A flowchart illustrating a chip anomaly detection method provided in this embodiment of the disclosure;

[0082] Figure 4 A flowchart illustrating a chip anomaly detection method provided in this embodiment of the disclosure;

[0083] Figure 5 A flowchart illustrating a chip anomaly detection method provided in this embodiment of the disclosure;

[0084] Figure 6 A schematic diagram of the structure of a chip anomaly detection device provided in an embodiment of this disclosure;

[0085] Figure 7 A schematic diagram of the structure of a chip anomaly detection device provided in an embodiment of this disclosure;

[0086] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure;

[0087] Figure 9 This is a schematic diagram of the structure of a chip provided in an embodiment of the present disclosure. Detailed Implementation

[0088] Embodiments of this disclosure are described in detail below. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this disclosure, and should not be construed as limiting this disclosure.

[0089] With the widespread adoption of smartphones, tablets, digital cameras, and other smart devices, video functionality has become a crucial factor for many when purchasing such devices. To provide better video capabilities, many smart devices utilize hardware codec chips for efficient video encoding and decoding. However, sometimes these smart devices containing hardware codec chips may malfunction before being sold, leading to problems such as video playback, recording, or other related operations failing, or displaying distorted / green screens. Therefore, how to detect malfunctions in hardware codec chips is a pressing issue that needs to be addressed.

[0090] Therefore, to address the problems existing in related technologies, this disclosure proposes a chip anomaly detection method, including hardware decoding of a test video to obtain first raw pixel data of the test video; determining whether a target chip has a decoding anomaly based on reference pixel data and the first raw pixel data; if the target chip does not have a decoding anomaly, processing the first raw pixel data to obtain second raw pixel data; determining whether the target chip has an encoding anomaly based on the reference pixel data and the second raw pixel data; and if the target chip does not have an encoding anomaly, determining that the target chip is anomaly-free. The solution of this disclosure can effectively detect anomalies in hardware encoding / decoding chips, promptly identify potential problems in smart devices, and improve the video quality of smart devices.

[0091] This disclosure is not exhaustive, but merely illustrative of some embodiments, and is not intended to limit the scope of protection of this disclosure. Unless otherwise specified, each step in a particular embodiment can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, a solution after removing some steps in a particular embodiment can also be implemented as an independent embodiment, and the order of the steps in a particular embodiment can be arbitrarily interchanged. Furthermore, the optional implementation methods in a particular embodiment can be arbitrarily combined; moreover, the embodiments can be arbitrarily combined, for example, some or all steps of different embodiments can be arbitrarily combined, and a particular embodiment can be arbitrarily combined with the optional implementation methods of other embodiments.

[0092] In each of the disclosed embodiments, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of the embodiments are consistent and can be referenced by each other. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0093] The terminology used in the embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure.

[0094] In this embodiment of the disclosure, unless otherwise stated, elements expressed in the singular form, such as "a," "an," "the," "the," "the," "the," "the," "the," "this," etc., can mean "one and only one," or "one or more," "at least one," etc. For example, when using articles such as "a," "an," "the," etc. in translation, the noun following the article can be understood as either a singular expression or a plural expression.

[0095] In some embodiments, the terms “in response to…”, “in response to determining…”, “in the case of…”, “when…”, “if…”, “if…”, etc., can be used interchangeably.

[0096] In some embodiments, the terms “greater than,” “greater than or equal to,” “not less than,” “more than,” “more than or equal to,” “not less than,” “higher than,” “higher than or equal to,” “not lower than,” and “above” can be used interchangeably, as can the terms “less than,” “less than or equal to,” “not greater than,” “less than,” “less than or equal to,” “not more than,” “lower than,” “lower than or equal to,” “not higher than,” and “below”.

[0097] The prefixes such as "first" and "second" in the embodiments of this disclosure are only for distinguishing different descriptive objects and do not constitute restrictions on the position, order, priority, number or content of the descriptive objects. For the description of the descriptive objects, please refer to the description in the claims or the context of the embodiments. The use of prefixes should not constitute unnecessary restrictions.

[0098] In the embodiments disclosed herein, "multiple" refers to two or more.

[0099] In the embodiments disclosed herein, terms such as “import”, “input”, and “read in” can be used interchangeably.

[0100] In some embodiments, devices, etc., can be interpreted as physical or virtual, and their names are not limited to the names recorded in the embodiments. Terms such as “device”, “equipment”, “circuit”, “network element”, “node”, “function”, “unit”, “section”, “system”, “network”, “chip”, “chip system”, “entity”, and “subject” can be used interchangeably.

[0101] In some embodiments, the terms "terminal", "terminal device", "user equipment (UE)", "user terminal", "mobile station (MS)", "mobile terminal (MT)", "subscriber station", "mobile unit", "subscriber unit", "wireless unit", "remote unit", "mobile device", "wireless device", "wireless communication device", "remote device", "mobile subscriber station", "access terminal", "mobile terminal", "wireless terminal", "remote terminal", "handset", "user agent", "mobile client", and "client" can be used interchangeably.

[0102] Figure 1 This is a flowchart illustrating a chip anomaly detection method provided in an embodiment of this disclosure. This method can be applied to application scenarios such as smart terminals, for example, pre-sale inspection of smart terminals, or post-sale after-sales service of smart terminals performed by a terminal with integrated image processing capabilities or an image processor within the terminal, or by other devices suitable for image processing to output multi-layered images; this disclosure does not limit the scope of the application. Figure 1 As shown, the method for detecting chip malfunctions includes steps 101-105.

[0103] Step 101: Perform hardware decoding on the test video to obtain the first raw pixel data of the test video.

[0104] In order to detect the hardware codec chip in the smart terminal, when acquiring the test video, it is necessary to select a test video that corresponds to the encoding format supported by the smart terminal. The specific content of the test video is not limited in this embodiment.

[0105] To ensure comprehensive testing, the number of test videos is consistent with the number of encoding formats supported by the smart terminal; that is, one test video corresponds to one encoding format supported by the smart terminal.

[0106] In some embodiments, to improve detection efficiency, when at least two test videos exist, at least two threads are started to perform parallel hardware decoding processing on different test videos to obtain the first raw pixel data of the test videos. In this embodiment, the first raw pixel data includes, but is not limited to, YUV data or RGB data; this embodiment does not impose any limitation.

[0107] As one implementation of this disclosure, the test video is hardware decoded using any hardware decoder. Specific embodiments of this disclosure will not be described in detail.

[0108] Step 102: Determine whether there is a decoding anomaly in the target chip based on the reference pixel data and the first original pixel data.

[0109] In some embodiments, decoding anomalies manifest as decoding time during hardware decoding and / or anomalies in the first raw pixel data of the test video obtained after hardware decoding.

[0110] The reference pixel data is pre-provided data, which is the pixel data of the video corresponding to the encoding format supported by the smart terminal after correct hardware decoding, and provides a reference or basis for detecting whether there are abnormal decoding errors during the detection process.

[0111] Step 103: If it is determined that there is no decoding abnormality in the target chip, the first raw pixel data is processed to obtain the second raw pixel data.

[0112] If it is determined that there are no decoding anomalies in the target chip, the detection of encoding anomalies in the target chip continues.

[0113] As one implementation of this disclosure, processing the first original pixel data includes, but is not limited to, encoding the first original pixel data first, and then hardware decoding the encoded result to obtain the second original pixel data.

[0114] Corresponding to the decoding process, in order to improve detection efficiency, when there are at least two first original pixel data, at least two threads are started to process the different first original pixel data in parallel to obtain the second original pixel data.

[0115] Step 104: Determine whether the target chip has an encoding anomaly based on the reference pixel data and the second original pixel data.

[0116] In some embodiments, encoding anomalies manifest as anomalies in the encoding duration during hard encoding and / or in the second raw pixel data obtained after hard decoding.

[0117] The reference pixel data is pre-provided data, which is the pixel data of the video corresponding to the encoding format supported by the smart terminal after correct hard encoding, and provides a reference or basis for detecting whether there are any abnormalities during the detection process.

[0118] Step 105: If it is determined that the target chip has no coding abnormality, then the target chip is determined to be without abnormality.

[0119] In some embodiments, when the target chip has no encoding anomaly and no decoding anomaly, it is determined that the target chip has no anomaly; when there is an encoding anomaly and / or a decoding anomaly, it is determined that the target chip has an anomaly.

[0120] In specific implementation, decoding anomalies are characterized by issues such as screen flickering / green screen, while encoding anomalies are characterized by issues such as hardware encoder jamming, screen flickering / green screen, etc. The displayed content of these anomalies may differ for different smart devices; therefore, this disclosure does not limit the specific anomalies presented.

[0121] In summary, the chip anomaly detection method proposed in this disclosure includes hardware decoding of a test video to obtain first raw pixel data of the test video; determining whether a target chip has a decoding anomaly based on reference pixel data and the first raw pixel data; if the target chip does not have a decoding anomaly, processing the first raw pixel data to obtain second raw pixel data; determining whether the target chip has an encoding anomaly based on the reference pixel data and the second raw pixel data; and if the target chip does not have an encoding anomaly, determining that the target chip is anomaly-free. The solution of this disclosure can effectively detect anomalies in hardware encoding / decoding chips, promptly identify potential problems in smart devices, and improve the video quality of smart devices.

[0122] Figure 2 The flowchart of a chip anomaly detection method proposed in this disclosure is further illustrated. Based on Figure 2 The illustrated embodiment further explains step 102. Figure 2 This may include the following steps:

[0123] Step 1021: Obtain the decoding time of the hardware decoding process for the first original pixel data of each frame.

[0124] If it is determined that the decoding time is not abnormal, then proceed to step 1022; if it is determined that the decoding time is abnormal, then proceed to step 1024.

[0125] When performing the hardware decoding process to acquire the first raw pixel data of each frame, the decoding time can be implemented in ways including, but not limited to, the following: Figure 3 As shown, it includes:

[0126] In step 10211, when the hardware decoder in the target chip is invoked to decode the test video, a timer is triggered to start counting.

[0127] In this embodiment of the disclosure, the test video is decoded by calling a hardware decoder. From a machine implementation perspective, a timer is set in front of the hardware decoder, and the counter is triggered once before the decoding is performed to start the timing.

[0128] Step 10212: After the hardware decoder completes one decoding operation, the timer is triggered to end the timing.

[0129] After decoding is complete, a timer is triggered once to obtain the end of the counter's countdown.

[0130] Step 10213: Obtain the decoding duration of the hard decoding process for the first original pixel data based on the start and end times of the timer.

[0131] The decoding time of one hardware decoding process for the first raw pixel data is obtained by the difference between the end of the timer and the start of the timer.

[0132] In one implementation of this disclosure, when a decoding duration exceeds a preset duration threshold, an anomaly in the decoding duration can be determined, resulting in more accurate detection. In another implementation, after a decoding duration exceeds the preset duration threshold, the number of anomalies is counted. When the number of anomalies reaches a preset number of anomalies, an anomaly in the decoding duration can be determined. For example, the preset duration threshold includes, but is not limited to, 3 seconds or 4 seconds. The preset number of anomalies includes, but is not limited to, 3 or 4 times; however, this disclosure does not specify a particular number.

[0133] Step 1022: Compare pixel values ​​based on the reference pixel data and the first original pixel data.

[0134] The first original pixel data is compared with the reference pixel data frame by frame, pixel by pixel.

[0135] For example, when the reference pixel data is YUV data, the Y, U, and V values ​​of each frame can be calculated and compared to determine if they are the same. If the Y value, U value, and / or V value are different, the pixel value is considered abnormal; if the Y value, U value, and V value are the same, the pixel value is considered normal.

[0136] For example, when the reference pixel data is RGB data, the R, G, and B values ​​of each frame can be calculated and compared to determine if they are the same. If the R value, G value, and / or B value are different, the pixel value is considered abnormal; if the R value, G value, and B value are the same, the pixel value is considered normal.

[0137] Step 1023: Count the number of abnormal pixel values ​​and determine whether the number of abnormal pixel values ​​is greater than a preset abnormal threshold.

[0138] If the number of abnormal pixel values ​​is determined to be greater than the preset abnormal threshold, step 1023 is executed; if the number of abnormal pixel values ​​is determined to be less than or equal to the preset abnormal threshold, step 1024 is executed.

[0139] In some embodiments, the preset anomaly threshold is an empirical value, which may include, but is not limited to, 3 pixels, 5 pixels, etc. No specific limitation is made.

[0140] Step 1024: Determine that the target chip has a decoding anomaly.

[0141] Decoding anomalies are characterized by issues such as screen tearing / green screen during decoding.

[0142] In some embodiments, after a decoding error occurs, a message indicating that the video codec chip detection failed is displayed, and the video hardware codec test ends.

[0143] Step 1025: Determine that the target chip does not have any decoding anomalies.

[0144] If no decoding error is found, continue with the target chip's encoding error detection.

[0145] Figure 4 The flowchart of a chip anomaly detection method proposed in this disclosure is further illustrated. Based on Figure 4 The illustrated embodiment further explains step 104. Figure 4 This may include the following steps:

[0146] Step 1041: Obtain the encoding duration of the hard-coded processing of the first original pixel in each frame.

[0147] If it is determined that the encoding duration is not abnormal, then proceed to step 1042; if it is determined that the encoding duration is abnormal, then proceed to step 1044.

[0148] In this embodiment of the disclosure, the test video is encoded by calling a hardware encoder. From a machine implementation perspective, a timer is set before the hardware encoder. The counter is triggered once before encoding is performed to start the timing. After encoding is completed, the timer is triggered once to obtain the end of the counter's timing.

[0149] The encoding duration of one hard-coded processing of the first original pixel data is obtained by the difference between the end of the timer and the start of the timer.

[0150] Step 1042: Compare the similarity between the reference pixel data and the second original pixel data;

[0151] If the similarity is determined to be greater than the preset similarity threshold, then proceed to step 1043; if the similarity is determined to be less than or equal to the preset similarity threshold, then proceed to step 1044.

[0152] Processing the first raw pixel data to obtain the second raw pixel data includes: encoding the first raw pixel data to obtain first video frame compressed data, and performing hardware decoding on the first video frame compressed data to obtain the second raw pixel data.

[0153] The purpose of obtaining the second original pixel data in this embodiment is to determine whether the encoding result of the encoded first original pixel data is correct. The encoding and hardware decoding processes are the same as those described in any of the above embodiments, and therefore will not be repeated here.

[0154] The second original pixel data is compared frame by frame with the reference pixel data. In some embodiments, the comparison method is to determine the similarity between the second original pixel data and the reference pixel data by calculating the peak signal-to-noise ratio (PSNR) or the structural similarity index (SSIM). If a set threshold is set, such as a PSNR value less than 40, the encoded frame data (second original pixel data) is determined to be abnormal, and the number of abnormal encoded frames is accumulated. If it exceeds a certain preset abnormal threshold (such as more than 3 frames), it is determined that the video hard-coded by the target chip has abnormal problems such as screen tearing / green screen.

[0155] After identifying the anomaly, a message indicating a failure in the video codec chip detection was displayed, and the video hardware codec test was terminated.

[0156] If the preset anomaly threshold is not exceeded, decoding continues. Additionally, to shorten the detection time, the encoding screen distortion / green screen detection algorithm can be processed in parallel in another thread. That is, after completing... Figure 3 The thread that triggers encoding detection afterwards.

[0157] Step 1043: Determine that the target chip does not have any coding anomalies.

[0158] Step 1044: Determine that the target chip has a coding anomaly.

[0159] In some embodiments of this disclosure, during execution Figure 4 Previously, it was necessary to obtain the video parameters of the second video frame compressed data and configure the encoding parameters of the hardware encoding process to be the video parameters. That is, the parameters of the hardware decoding process are completely consistent with the parameters of the hardware decoding process. The video parameters include any one or any combination of media type, frame rate, bit rate, resolution, profile, and level, without any specific limitation.

[0160] Figure 5 The flowchart of a chip anomaly detection method proposed in this disclosure is further illustrated. Based on Figure 5 The illustrated embodiment further explains step 101. Figure 5 This may include the following steps:

[0161] Step 1011: Obtain the test video with the corresponding encoding format according to the encoding format of the target chip.

[0162] For example, when the smart terminal supports AVC and HEVC encoding formats, there is one test video in AVC encoding format and one test video in HEVC encoding format, respectively. It should be noted that the above are merely illustrative examples, and this disclosure does not limit the encoding format or quantity.

[0163] Step 1012: Decapsulate the test video to obtain the second video frame compressed data.

[0164] After decapsulation, the compressed data of each second video frame is obtained, such as buffer data.

[0165] Step 1013: Perform hardware decoding on the compressed data of the second video frame to obtain the first original pixel data of the test video.

[0166] The buffer data is sent to the hardware decoder for hardware decoding processing to obtain the first raw pixel data of the test video. Additionally, to shorten the detection time, the decoding algorithm for detecting screen tearing / green screen can be processed in parallel in another thread. That is, after completing... Figure 2 The thread that triggers decoding and detection is then activated.

[0167] Corresponding to the chip anomaly detection method described above, this invention also proposes a chip anomaly detection device. Since the device embodiments of this invention correspond to the method embodiments described above, details not disclosed in the device embodiments can be referred to in the method embodiments described above, and will not be repeated here.

[0168] Figure 6 This is a schematic diagram of a chip anomaly detection device provided in an embodiment of the present disclosure. The chip anomaly detection device includes:

[0169] A second aspect of this disclosure provides a chip anomaly detection device, the device comprising:

[0170] Decoding unit 21 is used to perform hardware decoding on the test video to obtain the first raw pixel data of the test video;

[0171] Judgment unit 22 is used to determine whether there is a decoding abnormality in the target chip based on the reference pixel data and the first original pixel data;

[0172] Processing unit 23 is used to process the first original pixel data to obtain second original pixel data when it is determined that there is no encoding abnormality in the target chip;

[0173] The first determining unit 24 is used to determine whether the target chip has an encoding abnormality based on the reference pixel data and the second original pixel data;

[0174] The second determining unit 25 is used to determine that the target chip is not abnormal if it is determined that the target chip is not encoding abnormal.

[0175] In summary, the chip anomaly detection method proposed in this disclosure includes hardware decoding of a test video to obtain first raw pixel data of the test video; determining whether a target chip has a decoding anomaly based on reference pixel data and the first raw pixel data; if the target chip does not have a decoding anomaly, processing the first raw pixel data to obtain second raw pixel data; determining whether the target chip has an encoding anomaly based on the reference pixel data and the second raw pixel data; and if the target chip does not have an encoding anomaly, determining that the target chip is anomaly-free. The solution of this disclosure can effectively detect anomalies in hardware encoding / decoding chips, promptly identify potential problems in smart devices, and improve the video quality of smart devices.

[0176] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the judgment unit 22 is further configured to:

[0177] The decoding time of the hardware decoding process for the first raw pixel data of each frame is obtained;

[0178] If it is determined that there is no abnormality in the decoding time, then the pixel values ​​are compared between the reference pixel data and the first original pixel data;

[0179] Count the number of abnormal pixel values ​​and determine whether the number of abnormal pixel values ​​is greater than a preset abnormal threshold;

[0180] If the number of abnormal pixel values ​​is greater than the preset abnormal threshold, it is determined that the target chip has a decoding abnormality;

[0181] If the number of abnormal pixel values ​​is less than or equal to the preset abnormal threshold, it is determined that the target chip does not have a decoding abnormality.

[0182] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the judgment unit 22 is further configured to:

[0183] If it is determined that the decoding time is abnormal, then it is determined that the target chip has a decoding abnormality.

[0184] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the processing unit 23 is further configured to:

[0185] The first original pixel data is encoded to obtain the first video frame compressed data.

[0186] The first video frame compressed data is hardware decoded to obtain the second raw pixel data.

[0187] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the first determining unit 24 is further configured to:

[0188] Obtain the encoding duration of the hard-coded processing of the first original pixel in each frame;

[0189] If it is determined that there is no abnormality in the encoding duration, then the similarity between the reference pixel data and the second original pixel data is compared.

[0190] If the similarity is determined to be greater than the preset similarity threshold, then the target chip is determined to have no coding anomalies.

[0191] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the first determining unit 24 is further configured to:

[0192] If it is determined that the encoding duration is abnormal, then it is determined that the target chip has an encoding abnormality.

[0193] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the decoding unit 21 is further configured to:

[0194] According to the encoding format of the target chip, obtain the test video with the corresponding encoding format;

[0195] The test video is decapsulated to obtain the compressed data of the second video frame;

[0196] The compressed data of the second video frame is hardware decoded to obtain the first raw pixel data of the test video.

[0197] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, before processing the first raw pixel data to obtain the second raw pixel data, the device further includes:

[0198] Acquisition unit 26 is used to acquire video parameters of the second video frame compressed data;

[0199] Configuration unit 27 is used to configure the encoding parameters of the hard-coded processing as the video parameters.

[0200] Furthermore, in one possible implementation of the embodiments of this disclosure, such as Figure 7 As shown, the judgment unit 22 is further configured to:

[0201] When the hardware decoder in the target chip is invoked to decode the test video, a timer is triggered to start counting down.

[0202] After the hardware encoder completes one decoding operation, the timer is triggered to end the timing.

[0203] The decoding time of the first original pixel data is obtained based on the start and end times of the timer.

[0204] Since the apparatus provided in this embodiment corresponds to the methods provided in the above embodiments, the implementation of the methods is also applicable to the apparatus provided in this embodiment, and will not be described in detail in this embodiment.

[0205] The methods and apparatus provided in the embodiments of this application have been described above. To implement the functions of the methods provided in the embodiments of this application, the electronic device may include a hardware structure and software modules, and may implement the above functions in the form of a hardware structure, software modules, or a hardware structure plus software modules. One of the above functions may be executed in the form of a hardware structure, software modules, or a hardware structure plus software modules.

[0206] Figure 8 This is a block diagram illustrating an electronic device 300 for implementing the above-described chip anomaly detection method according to an exemplary embodiment. For example, the electronic device 300 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0207] Reference Figure 8 The electronic device 300 may include one or more of the following components: processing component 302, memory 304, power supply component 306, multimedia component 308, audio component 310, input / output (I / O) interface 312, sensor component 314, and communication component 316.

[0208] Processing component 302 typically controls the overall operation of electronic device 300, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 302 may include one or more processors 320 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 302 may include one or more modules to facilitate interaction between processing component 302 and other components. For example, processing component 302 may include a multimedia module to facilitate interaction between multimedia component 308 and processing component 302.

[0209] Memory 304 is configured to store various types of data to support the operation of electronic device 300. Examples of such data include instructions for any application or method operating on electronic device 300, contact data, phonebook data, messages, pictures, videos, etc. Memory 304 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0210] Power supply component 306 provides power to various components of electronic device 300. Power supply component 306 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 300.

[0211] Multimedia component 308 includes a screen that provides an output interface between electronic device 300 and user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 308 includes a front-facing camera and / or a rear-facing camera. When electronic device 300 is in an operating mode, such as a shooting mode or video mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0212] Audio component 310 is configured to output and / or input audio signals. For example, audio component 310 includes a microphone (MIC) configured to receive external audio signals when electronic device 300 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 304 or transmitted via communication component 316. In some embodiments, audio component 310 also includes a speaker for outputting audio signals.

[0213] I / O interface 312 provides an interface between processing component 302 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0214] Sensor assembly 314 includes one or more sensors for providing state assessments of various aspects of electronic device 300. For example, sensor assembly 314 may detect the on / off state of electronic device 300, the relative positioning of components such as the display and keypad of electronic device 300, changes in position of electronic device 300 or a component of electronic device 300, the presence or absence of user contact with electronic device 300, orientation or acceleration / deceleration of electronic device 300, and temperature changes of electronic device 300. Sensor assembly 314 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 314 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 314 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0215] Communication component 316 is configured to facilitate wired or wireless communication between electronic device 300 and other devices. Electronic device 300 can access wireless networks based on communication standards, such as WiFi, 2G or 3G, 4G LTE, 5G NR (NewRadio), or combinations thereof. In one exemplary embodiment, communication component 316 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 316 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0216] In an exemplary embodiment, the electronic device 300 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0217] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 304 including instructions, which can be executed by a processor 320 of an electronic device 300 to perform the above-described method for image processing. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0218] Embodiments of this disclosure also provide a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the methods described in the above embodiments of this disclosure.

[0219] For cases where electronic devices can be chips or chip systems, see [link to relevant documentation]. Figure 9 The diagram shows the structure of the chip. Figure 9 The chip shown includes a processor 401 and an interface 402. There can be one or more processors 401, and multiple interfaces 402.

[0220] Optionally, the chip also includes a memory 403 for storing necessary computer programs and data.

[0221] Those skilled in the art will also understand that the various illustrative logical blocks and steps listed in the embodiments of this application can be implemented by electronic hardware, computer software, or a combination of both. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the functionality using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of this application.

[0222] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0223] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0224] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0225] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processing module, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (control method), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic device, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which programs can be printed, because programs can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0226] It should be understood that various parts of the embodiments of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0227] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware, and the program can be stored in a computer-readable storage medium. When executed, the program includes one or a combination of the steps of the method embodiments.

[0228] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc.

[0229] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for detecting chip anomalies, characterized in that, The method includes: The test video is hardware decoded to obtain the first raw pixel data of the test video; Determine whether the target chip has a decoding anomaly based on the reference pixel data and the first original pixel data; If it is determined that there is no decoding anomaly in the target chip, the first raw pixel data is processed to obtain the second raw pixel data; Based on the reference pixel data and the second original pixel data, determine whether the target chip has any coding anomalies; If it is determined that the target chip does not have any coding anomalies, then the target chip is deemed to be without anomalies.

2. The method according to claim 1, characterized in that, The step of determining whether the target chip has a decoding anomaly based on the reference pixel data and the first original pixel data includes: The decoding time of the hardware decoding process for the first raw pixel data of each frame is obtained; If it is determined that there is no abnormality in the decoding time, then the pixel values ​​are compared between the reference pixel data and the first original pixel data; Count the number of abnormal pixel values ​​and determine whether the number of abnormal pixel values ​​is greater than a preset abnormal threshold; If the number of abnormal pixel values ​​is greater than the preset abnormal threshold, it is determined that the target chip has a decoding abnormality; If the number of abnormal pixel values ​​is less than or equal to the preset abnormal threshold, it is determined that the target chip does not have a decoding abnormality.

3. The method according to claim 1, characterized in that, The method further includes: If it is determined that the decoding time is abnormal, then it is determined that the target chip has a decoding abnormality.

4. The method according to claim 1, characterized in that, The second raw pixel data is obtained by processing the first raw pixel data, including: The first original pixel data is encoded to obtain the first video frame compressed data. The first video frame compressed data is hardware decoded to obtain the second raw pixel data.

5. The method according to claim 3, characterized in that, The step of determining whether the target chip has encoding anomalies based on the reference pixel data and the second original pixel data includes: Obtain the encoding duration of the hard-coded processing of the first original pixel in each frame; If it is determined that there is no abnormality in the encoding duration, then the similarity between the reference pixel data and the second original pixel data is compared. If the similarity is determined to be greater than the preset similarity threshold, then the target chip is determined to have no coding anomalies.

6. The method according to claim 5, characterized in that, The method further includes: If it is determined that the encoding duration is abnormal, then it is determined that the target chip has an encoding abnormality.

7. The method according to claim 1, characterized in that, The step of performing hardware decoding on the test video to obtain the first raw pixel data of the test video includes: According to the encoding format of the target chip, obtain the test video with the corresponding encoding format; The test video is decapsulated to obtain the compressed data of the second video frame; The compressed data of the second video frame is hardware decoded to obtain the first raw pixel data of the test video.

8. The method according to claim 7, characterized in that, Before processing the first raw pixel data to obtain the second raw pixel data, the method further includes: Obtain the video parameters of the compressed data of the second video frame; Configure the encoding parameters of the hard-coded process as the video parameters.

9. The method according to claim 2, characterized in that, The decoding time for the hardware decoding process that acquires the first raw pixel data of each frame includes: When the hardware encoder in the target chip is invoked to decode the first raw pixel data, a timer is triggered to start counting. After the hardware encoder completes one decoding operation, the timer is triggered to end the timing. The decoding time of the first original pixel data is obtained based on the start and end times of the timer.

10. A chip anomaly detection device, characterized in that, The device includes: The decoding unit is used to perform hardware decoding on the test video to obtain the first raw pixel data of the test video. The judgment unit is used to determine whether there is a decoding abnormality in the target chip based on the reference pixel data and the first original pixel data; The processing unit is configured to process the first raw pixel data to obtain the second raw pixel data when it is determined that there is no decoding abnormality in the target chip; The first determining unit is configured to determine whether the target chip has an encoding anomaly based on the reference pixel data and the second original pixel data; The second determining unit is used to determine that the target chip is without anomalies if it is determined that the target chip does not have any coding anomalies.

11. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-9.

12. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-9.

13. A chip, characterized in that, It includes one or more interfaces and one or more processors; the interfaces are used to receive signals from the memory of an electronic device and send the signals to the processors, the signals including computer instructions stored in the memory, which, when executed by the processors, cause the electronic device to perform the method of any one of claims 1-9.

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