Monolithic integrated chip and preparation method thereof

Abstract

The invention relates to a monolithic integrated chip and a preparation method thereof, in particular to a monolithic integrated chip which comprises a solid silicon area and a hollow area. The entity silicon area is provided with a pressure sensor and an acceleration sensor; the hollow area is provided with an angle sensor and piezoelectric actuators, the piezoelectric actuators are symmetrically arranged in the hollow area, the angle sensor is arranged in the hollow area where the piezoelectric actuators generate stress deformation, and the temperature sensor is arranged close to the angle sensor. According to the invention, a plurality of sensors with different functions and a piezoelectric actuator are integrated on the same chip through a common technological process, and the plurality of sensors are flexibly configured and can be adapted to various platforms and application scenes.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and particularly relates to a monolithic integrated chip and its fabrication method. Background Technology

[0002] MEMS actuators are miniature actuators manufactured based on MEMS technology. They can be classified into piezoelectric, electrothermal, electrostatic, and electromagnetic technologies based on their actuation methods. Among them, piezoelectric technology is increasingly widely used due to its advantages such as high precision, high reliability, resistance to electromagnetic interference, and low power consumption. Currently, MEMS piezoelectric actuators are mainly used in products that require precise control, such as inkjet printheads, micromirrors, and micropumps.

[0003] The principle of piezoelectric actuators is to apply a certain voltage to both ends of a piezoelectric material to cause deformation of the piezoelectric material and thus generate a driving force. In order to detect the actual deformation of the piezoelectric material, some researchers have integrated several piezoresistive angle sensors on the actuator chip. Then, through the detection and processing of the back-end circuit, a closed-loop control of the piezoelectric actuator can be achieved, thereby improving the accuracy and reliability of the product.

[0004] However, piezoresistive angle sensors cannot perform in-situ temperature compensation and can only be compensated by an external temperature sensor. However, the external temperature sensor cannot reflect the true temperature information on the angle sensor, which will affect the accuracy of angle measurement to some extent.

[0005] Therefore, how to achieve in-situ temperature compensation for piezoresistive angle sensors at a lower process cost, and to provide other sensing information such as ambient air pressure and the acceleration experienced by the device for piezoelectric actuators, has become an urgent problem to be solved. Summary of the Invention

[0006] This application provides a monolithic integrated chip and its fabrication method, which integrates a pressure sensor, an acceleration sensor, an angle sensor, a temperature sensor, and a piezoelectric actuator on the same chip through a shared process flow. Multiple sensors share the same injection / diffusion region, passivation layer, and electrode layer, reducing repetitive processes and completing the multi-functional integration of the chip without adding additional processes. The process flow is optimized, and the structure is released in one step, avoiding damage caused by multiple etching processes.

[0007] Other objects and advantages of the present invention can be further understood from the technical features disclosed herein.

[0008] To achieve one or more of the above objectives or other objectives, the present invention provides a monolithic integrated chip and a method for fabricating the same.

[0009] A monolithic integrated chip includes: a solid silicon region and a hollow region;

[0010] The solid silicon region is equipped with a pressure sensor and an acceleration sensor, and the solid silicon region retains a bottom substrate layer except for the sensor locations.

[0011] An angle sensor and a piezoelectric actuator are provided in the hollow region, and the bottom substrate layer of the hollow region is completely removed; the piezoelectric actuators are symmetrically arranged in the hollow region, the angle sensor is located in the region where the piezoelectric actuator undergoes stress deformation, and the temperature sensor is located close to the angle sensor.

[0012] The pressure sensor, acceleration sensor, and angle sensor have the same sensitive structure and contain at least one basic design unit.

[0013] The basic design unit includes a first basic design unit and a second basic design unit;

[0014] The first basic design unit is composed of X-type doped silicon of a first concentration, wherein the first concentration is greater than 1e18cm-3;

[0015] The second basic design unit is composed of X-type doped silicon of a first concentration and X-type doped silicon of a second concentration connected together, wherein the first concentration is greater than 1e17cm-3 and less than the second concentration, and the second concentration is greater than 1e18cm-3 and greater than the first concentration.

[0016] The sensitive structure of the temperature sensor contains at least one basic design unit;

[0017] The basic design units include doped basic design units, diode-type basic design units, and metallic basic design units;

[0018] The doped basic design unit is composed of X-type doped silicon of a first concentration, wherein the first concentration is greater than 1e18cm-3;

[0019] The diode-type basic design unit is composed of X-type doped silicon of a first concentration and Y-type doped silicon of a third concentration connected together, wherein both the first concentration and the third concentration are greater than 1e17cm-3.

[0020] The metallic base design unit consists of a conductive layer made of a conductive material.

[0021] Both the X-type doping and the Y-type doping are either n-type doping or p-type doping.

[0022] The X-type doping and Y-type doping types in the diode-based basic design unit are different.

[0023] The piezoelectric actuator includes a piezoelectric layer and electrode layers respectively disposed above and below the piezoelectric layer;

[0024] The piezoelectric layer and the electrode layer are stacked together, and the thickness of each single layer is less than 3 μm.

[0025] The accelerometer also includes a mass block structure and a spring structure; the mass block structure is formed from a bottom substrate layer and causes inertial deformation when acceleration is applied to the device;

[0026] The spring structure is composed of an upper structure after the bottom substrate layer has been etched away, which causes stress in the sensitive structural region when acceleration is applied to the device.

[0027] The pressure sensor also includes a thin-film structure;

[0028] The thin film structure is composed of an upper structure after the bottom substrate layer has been etched away. When pressure is applied to the device, it causes deformation, resulting in stress in the sensitive structural region.

[0029] A method for fabricating a monolithic integrated chip, comprising:

[0030] A semiconductor substrate is provided, on which an oxide layer and a doped layer are sequentially disposed;

[0031] Target ions are injected into the corresponding regions of the doped layer to form sensitive structures for angle sensors, doped / diode temperature sensors, pressure sensors, and acceleration sensors, respectively.

[0032] The first passivation layer is formed by deposition;

[0033] A piezoelectric layer and upper and lower electrode layers of a piezoelectric actuator are formed on the surface of the first passivation layer by magnetron sputtering, photolithography and etching processes.

[0034] Deposition forms a second passivation layer;

[0035] The second passivation layer is etched to form an electrical connection region;

[0036] A conductive layer is formed through magnetron sputtering, photolithography, and etching processes;

[0037] The device is fabricated by etching the front and back sides to release the corresponding structures.

[0038] The doped layer is a silicon doped layer, and the silicon doped layer is either n-type doped or p-type doped;

[0039] The passivation layer is a silicon dioxide layer or a silicon nitride layer, and the thickness of the passivation layer is less than 3 μm.

[0040] A method for fabricating a monolithic integrated chip, comprising:

[0041] A semiconductor substrate is provided, on which an oxide layer and a doped layer are sequentially disposed;

[0042] Target ions are injected into the corresponding regions of the doped layer to form sensitive structures for angle sensors, pressure sensors, and acceleration sensors, respectively.

[0043] The first passivation layer is formed by deposition;

[0044] A piezoelectric layer and upper and lower electrode layers of a piezoelectric actuator are formed on the surface of the first passivation layer by magnetron sputtering, photolithography and etching processes.

[0045] Deposition forms a second passivation layer;

[0046] The second passivation layer is etched to form an electrical connection region;

[0047] A conductive layer is formed through magnetron sputtering, photolithography, and etching processes, and the sensitive structure of the metal temperature sensor is formed simultaneously.

[0048] The device is fabricated by etching the front and back sides to release the corresponding structures.

[0049] The doped layer is a silicon doped layer, and the silicon doped layer is either n-type doped or p-type doped;

[0050] The passivation layer is a silicon dioxide layer or a silicon nitride layer, and the thickness of the passivation layer is less than 3 μm;

[0051] The sensitive structure of the metal temperature sensor consists of a conductive layer made of a conductive material with a thickness of less than 3 μm.

[0052] Compared with the prior art, the beneficial effects of the present invention mainly include:

[0053] This application provides a monolithic integrated chip and its fabrication method, which integrates a pressure sensor, an acceleration sensor, an angle sensor, a temperature sensor, and a piezoelectric actuator on the same chip through a shared process. It can not only detect changes in ambient air pressure, monitor external acceleration impacts, detect tilt or rotation angles, and realize micro-mechanical motion control, but also use the temperature sensor to provide in-situ temperature information and perform temperature compensation for other sensors. Multiple sensors can be flexibly configured to adapt to various platforms and application scenarios.

[0054] This application provides a monolithic integrated chip and its fabrication method, which integrates a pressure sensor, an acceleration sensor, an angle sensor, a temperature sensor, and a piezoelectric actuator on the same chip through a shared process flow. Multiple sensors share the same injection / diffusion region, passivation layer, and electrode layer, reducing repetitive processes and completing the multi-functional integration of the chip without adding additional processes. The process flow is optimized, and the structure is released in one step, avoiding damage caused by multiple etching processes.

[0055] To make the above and other objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0056] To more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 This is a top view of a schematic diagram of a monolithic integrated chip structure provided in Embodiment 1 of this application.

[0058] Figure 2 for Figure 1 Side view along AB.

[0059] Figure 3 Schematic diagram of the basic design unit provided for Embodiment 1 of this application Figure 1 .

[0060] Figure 4 Schematic diagram of the basic design unit provided for Embodiment 1 of this application Figure 2 .

[0061] Figure 5 This is a schematic diagram of the piezoelectric actuator structure provided in Embodiment 1 of this application.

[0062] Figure 6 Schematic diagram of the side structure of the accelerometer provided in Embodiment 1 of this application Figure 1 .

[0063] Figure 7 Schematic diagram of the side structure of the pressure sensor provided in Embodiment 1 of this application Figure 1 .

[0064] Figure 8 This is a top view of a schematic diagram of a monolithic integrated chip structure provided in Embodiment 2 of this application.

[0065] Figure 9 for Figure 8Side view along AB.

[0066] Figure 10 This is a top view of a schematic diagram of a monolithic integrated chip structure provided in Embodiment 3 of this application.

[0067] Figure 11 for Figure 10 Side view along AB.

[0068] Figure 12 This is a top view of a schematic diagram of a monolithic integrated chip structure provided in Embodiment 4 of this application.

[0069] Figure 13 for Figure 12 Side view along AB.

[0070] Figure 14 Schematic diagram of the side structure of the accelerometer provided in Embodiment 1 of this application Figure 2 .

[0071] Figure 15 Schematic diagram of the side structure of the pressure sensor provided in Embodiment 1 of this application Figure 2 .

[0072] Figure 16 This is a schematic diagram of a method for fabricating a monolithic integrated chip, as provided in Embodiment 5 of this application.

[0073] Figure 17 This is a schematic diagram of a method for fabricating a monolithic integrated chip according to Embodiment 6 of this application.

[0074] Figure 18 This is a schematic flowchart of a method for fabricating a monolithic integrated chip, as provided in Embodiment 7 of this application.

[0075] Figure 19 This is a schematic flowchart of a method for fabricating a monolithic integrated chip, as provided in Embodiment 8 of this application. Detailed Implementation

[0076] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the accompanying drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front, or back, are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting the present invention.

[0077] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0078] Example 1

[0079] like Figure 1 As shown, a monolithic integrated chip includes:

[0080] Solid silicon region 1 and hollow region 2;

[0081] The solid silicon region 1 is equipped with a pressure sensor 11 and an acceleration sensor 12; the hollow region 2 is equipped with an angle sensor 22 and a piezoelectric actuator 21. The piezoelectric actuator 21 is symmetrically arranged in the hollow region 2, and the angle sensor 22 is located in the area where the piezoelectric actuator 21 experiences greater stress during deformation; the temperature sensor 13 is located close to the angle sensor 22 to provide in-situ temperature compensation for the angle sensor 22, which can provide more accurate results under high and low temperature conditions.

[0082] Piezoresistive temperature sensors can perform in-situ temperature compensation, which aims to provide more accurate results under high and low temperature conditions.

[0083] Piezoresistive pressure sensors can provide ambient air pressure information for devices. The purpose is that, because the air damping experienced by the actuator chip is different under different air pressures, the back-end circuitry can process the air pressure information to maintain a constant response speed of the actuator chip under different air pressures.

[0084] Piezoresistive accelerometers can provide information about the acceleration experienced by a device. Their purpose is to prevent the actuator chip from being damaged under large accelerations. By processing the acceleration information in combination with the angle sensor information through the back-end circuit, it is possible to determine whether the actuator chip is abnormal, thereby prompting for replacement or disposal.

[0085] like Figure 2 As shown, the solid silicon region 1 retains the bottom substrate layer 10 except for the sensor location, while the bottom substrate layer 10 of the hollow region 2 is completely removed.

[0086] The actuator in this application is a MEMS piezoelectric actuator 21, and the sensors include a piezoresistive angle sensor 22, a temperature sensor 13, a piezoresistive pressure sensor 11, and a piezoresistive acceleration sensor 12.

[0087] Specifically, the pressure sensor 11, acceleration sensor 12, and angle sensor 22 have identical sensing structures and each contains at least one basic design unit; the basic design unit includes a first basic design unit and a second basic design unit, such as... Figure 3 As shown;

[0088] like Figure 3 As shown, the first basic design unit is composed of X-type doped silicon 31 with a first concentration. The X-type doping can be either n-type or p-type doping, and the first concentration is greater than 1e18cm-3. Each design has no specified shape, as long as it has a certain length, width and thickness.

[0089] like Figure 3 As shown, the second basic design unit is composed of X-type doped silicon 31 with a first concentration and X-type doped silicon 32 with a second concentration. The X-type doping can be either n-type or p-type doping. The first concentration is greater than 1e17cm-3 and less than the second concentration, and the second concentration is greater than 1e18cm-3 and greater than the first concentration. Each design has no specified shape, as long as it has a certain length, width and thickness.

[0090] This application describes n-type doping: doping a semiconductor material with a pentavalent element (such as phosphorus, arsenic, etc.);

[0091] This application describes p-type doping: doping semiconductor materials with trivalent elements (such as boron, aluminum, etc.).

[0092] Specifically, the sensitive structure of the temperature sensor 13 includes at least one basic design unit; the basic design unit includes a doped basic design unit, a diode basic design unit, and a metallic basic design unit, such as... Figure 4 As shown;

[0093] like Figure 4 As shown, the doped basic design unit is composed of X-type doped silicon 41 with a first concentration, wherein the X-type doping can be either n-type or p-type doping, and the first concentration is greater than 1e18cm-3.

[0094] The diode-type basic design unit is composed of X-type doped silicon 41 with a first concentration and Y-type doped silicon 42 with a third concentration. The X-type doping and Y-type doping are different types of doping. Both X-type doping and Y-type doping are either n-type doping or p-type doping. The first concentration and the third concentration are both greater than 1e17cm-3.

[0095] The metallic base design unit consists of a conductive layer 43, which is made of conductive materials such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single-crystal silicon, and doped polycrystalline silicon. Each design has no specified shape, as long as it has a certain length, width, and thickness.

[0096] like Figure 5 As shown, the piezoelectric actuator includes a piezoelectric layer 51 and electrode layers 52 respectively disposed above and below the piezoelectric layer 51; wherein, in the single-layer piezoelectric layer design there is only one piezoelectric layer 51, with an electrode layer 52 above and below it; in order to improve the actuation force, the double-layer piezoelectric layer design has two piezoelectric layers 51, with an electrode layer 52 above and below it; this application may also have more sandwich-structured multi-layer piezoelectric layer designs.

[0097] The piezoelectric layer 51 and the electrode layer 52 are stacked. The piezoelectric layer 51 is composed of piezoelectric materials such as lead zirconate titanate, lithium niobate, aluminum nitride, scandium-doped aluminum nitride, polyvinylidene fluoride, and quartz. The electrode layer 52 is composed of single or multiple conductive materials such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single crystal silicon, and doped polycrystalline silicon. The thickness of the piezoelectric layer 51 and the upper and lower electrode layers 52 is less than 3 μm.

[0098] like Figure 6 As shown, the accelerometer 12 also includes a mass block structure 101 and a spring structure 102;

[0099] The mass block structure 101 is formed from the bottom substrate layer 10 and causes inertial deformation when acceleration is applied to the device;

[0100] The spring structure 102 is composed of the upper structure after the bottom substrate layer 10 has been etched away, which causes sufficient stress concentration in the sensitive area when acceleration is applied to the device.

[0101] like Figure 14 The diagram shows different structures of the piezoresistive accelerometer 12. If two etchings are performed on the back side, three different designs can be obtained through different etching processes.

[0102] The over-etched structure 121 of the mass block reduces the mass of the mass block, which can be applied to scenarios with greater acceleration / lower sensitivity;

[0103] The over-etched structure 122 of the spring reduces the spring stiffness and makes the spring easier to bend, which can be applied to scenarios with smaller acceleration / higher sensitivity;

[0104] The underetched structure 123 of the spring increases the spring stiffness and makes the spring less prone to bending, making it suitable for applications with greater acceleration and lower sensitivity.

[0105] like Figure 7 As shown, the pressure sensor 11 also includes a thin film structure 103;

[0106] The thin film structure 103 is composed of the upper structure after the bottom substrate layer 10 is etched away. It causes deformation when pressure is applied to the device, so as to generate sufficient stress concentration in the sensitive area.

[0107] like Figure 15 The diagram shows different structures of the piezoresistive pressure sensor 11. If two etchings are performed on the back side, two different designs can be obtained through different etching processes.

[0108] The over-etched structure 111 reduces the stiffness of the thin film, making it more easily deformable and applicable to scenarios with lower pressure and higher sensitivity.

[0109] The thin film underetch structure 112 increases the stiffness of the thin film, making it less prone to deformation and applicable to scenarios with higher pressure and lower sensitivity.

[0110] Example 2

[0111] like Figure 8 As shown, a monolithic integrated chip includes: a solid silicon region 1 and a hollow region 2;

[0112] The solid silicon region 1 is equipped with a pressure sensor 11 and a temperature sensor 13; the hollow region 2 is equipped with an angle sensor 22 and a piezoelectric actuator 21. The piezoelectric actuator 21 is symmetrically arranged in the hollow region 2, and the angle sensor 22 is located in the area where the stress is greater when the piezoelectric actuator 21 deforms; the temperature sensor 13 is as close as possible to the angle sensor 22.

[0113] like Figure 9 As shown, the solid silicon region 1 retains the bottom substrate layer 10 except for the sensor location, while the bottom substrate layer 10 of the hollow region 2 is completely removed.

[0114] Example 3

[0115] like Figure 10 As shown, a monolithic integrated chip includes: a solid silicon region 1 and a hollow region 2;

[0116] The solid silicon region 1 is equipped with an acceleration sensor 12 and a temperature sensor 13; the hollow region 2 is equipped with an angle sensor 22 and a piezoelectric actuator 21. The piezoelectric actuator 21 is symmetrically arranged in the hollow region 2, and the angle sensor 22 is located in the area where the stress is greater when the piezoelectric actuator 21 deforms; the temperature sensor 13 is as close as possible to the angle sensor 22.

[0117] like Figure 11 As shown, the solid silicon region 1 retains the bottom substrate layer 10 except for the sensor location, while the bottom substrate layer 10 of the hollow region 2 is completely removed.

[0118] Example 4

[0119] like Figure 12 As shown, a monolithic integrated chip includes: a solid silicon region 1 and a hollow region 2;

[0120] A temperature sensor 13 is provided in the solid silicon region 1; an angle sensor 22 and a piezoelectric actuator 21 are provided in the hollow region 2. The piezoelectric actuator 21 is symmetrically arranged in the hollow region 2, and the angle sensor 22 is located in the region where the stress is greater when the piezoelectric actuator 21 deforms; the temperature sensor 13 is as close as possible to the angle sensor 22.

[0121] like Figure 13 As shown, the solid silicon region 1 retains the bottom substrate layer 10 except for the sensor location, while the bottom substrate layer 10 of the hollow region 2 is completely removed.

[0122] Example 5

[0123] like Figure 16 As shown, a method for fabricating a monolithic integrated chip includes:

[0124] Step S1: Provide a semiconductor substrate 1, and sequentially deposit an oxide layer 2 and a doped layer 3 on the semiconductor substrate; wherein, the doped layer serves as a device layer, and the doped layer is n-type doped silicon;

[0125] Step S2: Target ions are injected into the corresponding regions of the doped layer 3 to form the sensitive structure 31 of the angle sensor, the sensitive structure 321 of the doped / diode temperature sensor, the sensitive structure 33 of the pressure sensor, and the sensitive structure 34 of the acceleration sensor, respectively.

[0126] Step S3: Deposit to form the first passivation layer 4; wherein, the first passivation layer 4 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD, PECVD, or thermal oxidation; if LPCVD or thermal oxidation is used, SiO2 will be generated simultaneously on the back side. Figure 16 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 16 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0127] Step S4: The piezoelectric layer of the piezoelectric actuator and the upper and lower electrode layers 5 are formed on the surface of the first passivation layer 4 by front-side evaporation / magnetron sputtering, photolithography and etching processes;

[0128] Step S5: Deposit to form a second passivation layer 6; wherein, the second passivation layer 6 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD or PECVD; if LPCVD process is used, SiO2 will be generated simultaneously on the back side. Figure 16 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 16 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0129] Step S6: Etch the second passivation layer 6 on the front side once or multiple times to form the electrical connection region 61;

[0130] Step S7: Form conductive layer 7 through front-side evaporation / magnetron sputtering, photolithography, and etching processes; wherein, conductive layer 7 is mainly used for electrical connection with external circuits, and can be composed of single-layer or multi-layer materials, such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single-crystal silicon, doped polycrystalline silicon, etc.; the thickness of a single-layer material should be less than 3 μm;

[0131] Step S8: Etch on the front and back sides of the device to release the corresponding structure and complete the fabrication of the device.

[0132] Example 6

[0133] like Figure 17 As shown, a method for fabricating a monolithic integrated chip includes:

[0134] Step S1: Provide a semiconductor substrate 1, and sequentially deposit an oxide layer 2 and a doped layer 3 on the semiconductor substrate; wherein, the doped layer serves as a device layer, and the doped layer is n-type doped silicon;

[0135] Step S2: Target ions are injected into the corresponding regions of the doped layer 3 to form the sensitive structure 31 of the angle sensor, the sensitive structure 33 of the pressure sensor, and the sensitive structure 34 of the acceleration sensor, respectively.

[0136] Step S3: Deposit to form the first passivation layer 4; wherein, the first passivation layer 4 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD, PECVD, or thermal oxidation; if LPCVD or thermal oxidation is used, SiO2 will be generated simultaneously on the back side. Figure 17 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 17 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0137] Step S4: The piezoelectric layer of the piezoelectric actuator and the upper and lower electrode layers 5 are formed on the surface of the first passivation layer 4 by front-side evaporation / magnetron sputtering, photolithography and etching processes;

[0138] Step S5: Deposit to form a second passivation layer 6; wherein, the second passivation layer 6 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD or PECVD; if LPCVD process is used, SiO2 will be generated simultaneously on the back side. Figure 17 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 17 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0139] Step S6: Etch the second passivation layer 6 to form the electrical connection region 61;

[0140] Step S7: The conductive layer 7 is formed by front-side evaporation / magnetron sputtering, photolithography and etching processes, and the sensitive structure 322 of the metal temperature sensor is formed at the same time; the sensitive structure 322 of the metal temperature sensor is composed of the conductive layer 7, which is made of a conductive material and the thickness of the conductive material should be less than 3 μm.

[0141] The conductive layer 7 is mainly used for electrical connection with external circuits and can be composed of single or multiple layers of materials, such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single crystal silicon, doped polycrystalline silicon, and other conductive materials; the thickness of a single layer should be less than 3 μm.

[0142] Step S8: Etch on the front and back sides of the device to release the corresponding structure and complete the fabrication of the device.

[0143] Example 7

[0144] like Figure 18 As shown, a method for fabricating a monolithic integrated chip includes:

[0145] Step S1: Provide a semiconductor substrate 1, and sequentially deposit an oxide layer 2 and a doped layer 3 on the semiconductor substrate; wherein, the doped layer serves as a device layer and is p-type doped silicon;

[0146] Step S2: Implant target ions into the corresponding regions of the doped layer 3 to form the sensitive structure 31 of the angle sensor, the sensitive structure 321 of the doped / diode temperature sensor, the sensitive structure 33 of the pressure sensor, and the sensitive structure 34 of the acceleration sensor, respectively. The above devices should be placed in the n-well 300 formed in advance by implantation / diffusion.

[0147] Step S3: Deposit to form the first passivation layer 4; wherein, the first passivation layer 4 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD, PECVD, or thermal oxidation; if LPCVD or thermal oxidation is used, SiO2 will be generated simultaneously on the back side. Figure 18 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 18 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0148] Step S4: The piezoelectric layer of the piezoelectric actuator and the upper and lower electrode layers 5 are formed on the surface of the first passivation layer 4 by front-side evaporation / magnetron sputtering, photolithography and etching processes;

[0149] Step S5: Deposit to form a second passivation layer 6; wherein, the second passivation layer 6 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD or PECVD; if LPCVD process is used, SiO2 will be generated simultaneously on the back side. Figure 18 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 18 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0150] Step S6: Etch the second passivation layer 6 on the front side once or multiple times to form the electrical connection region 61;

[0151] Step S7: Form conductive layer 7 through front-side evaporation / magnetron sputtering, photolithography, and etching processes; wherein, conductive layer 7 is mainly used for electrical connection with external circuits, and can be composed of single-layer or multi-layer materials, such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single-crystal silicon, doped polycrystalline silicon, etc.; the thickness of a single-layer material should be less than 3 μm;

[0152] Step S8: Etch on the front and back sides of the device to release the corresponding structure and complete the fabrication of the device.

[0153] Example 8

[0154] like Figure 19 As shown, a method for fabricating a monolithic integrated chip includes:

[0155] Step S1: Provide a semiconductor substrate 1, and sequentially deposit an oxide layer 2 and a doped layer 3 on the semiconductor substrate; wherein, the doped layer serves as a device layer and is p-type doped silicon;

[0156] Step S2: Implant target ions into the corresponding regions of the doped layer 3 to form the sensitive structure 31 of the angle sensor, the sensitive structure 33 of the pressure sensor, and the sensitive structure 34 of the acceleration sensor, respectively. The above devices should be placed in the n-well 300 formed in advance by implantation / diffusion.

[0157] Step S3: Deposit to form the first passivation layer 4; wherein, the first passivation layer 4 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD, PECVD, or thermal oxidation; if LPCVD or thermal oxidation is used, SiO2 will be generated simultaneously on the back side. Figure 19 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 19 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0158] Step S4: The piezoelectric layer of the piezoelectric actuator and the upper and lower electrode layers 5 are formed on the surface of the first passivation layer 4 by front-side evaporation / magnetron sputtering, photolithography and etching processes;

[0159] Step S5: Deposit to form a second passivation layer 6; wherein, the second passivation layer 6 can be a single-layer film such as SiO2 or SiN, or a multilayer composite film; wherein the process for generating SiO2 can be LPCVD or PECVD; if LPCVD process is used, SiO2 will be generated simultaneously on the back side. Figure 19 Simplified diagram not shown; the process for generating SiN can be LPCVD or PECVD; if LPCVD is used, SiN will be generated simultaneously on the back side. Figure 19 Simplified notation is not shown; furthermore, the thickness of a single layer of SiO2 or SiN should be less than 3 μm;

[0160] Step S6: Etch the second passivation layer 6 to form the electrical connection region 61;

[0161] Step S7: The conductive layer 7 is formed by front-side evaporation / magnetron sputtering, photolithography and etching processes, and the sensitive structure 322 of the metal temperature sensor is formed at the same time; the sensitive structure 322 of the metal temperature sensor is composed of the conductive layer 7, which is made of a conductive material and the thickness of the conductive material should be less than 3 μm.

[0162] The conductive layer 7 is mainly used for electrical connection with external circuits and can be composed of single or multiple layers of materials, such as Au, Ti, TiN, Al, Cu, Mo, SnO2, Ni, Pt, GaN, graphite, doped single crystal silicon, doped polycrystalline silicon, and other conductive materials; the thickness of a single layer should be less than 3 μm.

[0163] Step S8: Etch on the front and back sides of the device to release the corresponding structure and complete the fabrication of the device.

[0164] This application provides a monolithic integrated chip and its fabrication method, which integrates a pressure sensor, an acceleration sensor, an angle sensor, a temperature sensor, and a piezoelectric actuator on the same chip through a shared process flow. Multiple sensors share the same injection / diffusion region, passivation layer, and electrode layer, reducing repetitive processes and completing the multi-functional integration of the chip without adding additional processes. The process flow is optimized, and the structure is released in one step, avoiding damage caused by multiple etching processes.

[0165] The common English terms or letters used in this invention for clarity of description are for illustrative purposes only and are not limiting interpretations or specific uses. They should not be used to limit the scope of protection of this invention based on their possible Chinese translations or specific letters.

[0166] It should also be noted that in this article, relational terms such as “first” and “second” are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

Claims

1. A monolithic integrated chip, characterized in that, include: Solid silicon regions and hollow regions; The solid silicon region is equipped with a pressure sensor and an acceleration sensor, and the solid silicon region retains a bottom substrate layer except for the sensor locations. An angle sensor and a piezoelectric actuator are provided in the hollow region, and the bottom substrate layer of the hollow region is completely removed; the piezoelectric actuators are symmetrically arranged in the hollow region, the angle sensor is located in the region where the piezoelectric actuator undergoes stress deformation, and the temperature sensor is located close to the angle sensor.

2. The monolithic integrated chip according to claim 1, characterized in that, The pressure sensor, acceleration sensor, and angle sensor have the same sensitive structure and contain at least one basic design unit.

3. A monolithic integrated chip according to claim 2, characterized in that, The basic design unit includes a first basic design unit and a second basic design unit; The first basic design unit is composed of X-type doped silicon of a first concentration, wherein the first concentration is greater than 1e18cm-3; The second basic design unit is composed of X-type doped silicon of a first concentration and X-type doped silicon of a second concentration connected together, wherein the first concentration is greater than 1e17cm-3 and less than the second concentration, and the second concentration is greater than 1e18cm-3 and greater than the first concentration.

4. A monolithic integrated chip according to claim 1, characterized in that, The sensitive structure of the temperature sensor contains at least one basic design unit; The basic design units include doped basic design units, diode-type basic design units, and metallic basic design units; The doped basic design unit is composed of X-type doped silicon of a first concentration, wherein the first concentration is greater than 1e18cm-3; The diode-type basic design unit is composed of X-type doped silicon of a first concentration and Y-type doped silicon of a third concentration connected together, wherein both the first concentration and the third concentration are greater than 1e17cm-3. The metallic base design unit consists of a conductive layer made of a conductive material.

5. A monolithic integrated chip according to claim 4, characterized in that, Both the X-type doping and the Y-type doping are either n-type doping or p-type doping. The X-type doping and Y-type doping types in the diode-based basic design unit are different.

6. A monolithic integrated chip according to claim 1, characterized in that, The piezoelectric actuator includes a piezoelectric layer and electrode layers respectively disposed above and below the piezoelectric layer; The piezoelectric layer and the electrode layer are stacked together, and the thickness of each single layer is less than 3 μm.

7. A monolithic integrated chip according to claim 2, characterized in that, The accelerometer also includes a mass block structure and a spring structure; the mass block structure is formed from a bottom substrate layer and causes inertial deformation when acceleration is applied to the device; The spring structure is composed of an upper structure after the bottom substrate layer has been etched away, which causes stress in the sensitive structural region when acceleration is applied to the device.

8. A monolithic integrated chip according to claim 2, characterized in that, The pressure sensor also includes a thin-film structure; The thin film structure is composed of an upper structure after the bottom substrate layer has been etched away. When pressure is applied to the device, it causes deformation, resulting in stress in the sensitive structural region.

9. A method for fabricating a monolithic integrated chip, characterized in that, include: A semiconductor substrate is provided, on which an oxide layer and a doped layer are sequentially disposed; Target ions are injected into the corresponding regions of the doped layer to form sensitive structures for angle sensors, doped / diode temperature sensors, pressure sensors, and acceleration sensors, respectively. The first passivation layer is formed by deposition; A piezoelectric layer and upper and lower electrode layers of a piezoelectric actuator are formed on the surface of the first passivation layer by magnetron sputtering, photolithography and etching processes. Deposition forms a second passivation layer; The second passivation layer is etched to form an electrical connection region; A conductive layer is formed through magnetron sputtering, photolithography, and etching processes; The device is fabricated by etching the front and back sides to release the corresponding structures.

10. The method for fabricating a monolithic integrated chip according to claim 9, characterized in that, The doped layer is a silicon doped layer, and the silicon doped layer is either n-type doped or p-type doped; The passivation layer is a silicon dioxide layer or a silicon nitride layer, and the thickness of the passivation layer is less than 3 μm.

11. A method for fabricating a monolithic integrated chip, characterized in that, include: A semiconductor substrate is provided, on which an oxide layer and a doped layer are sequentially disposed; Target ions are injected into the corresponding regions of the doped layer to form sensitive structures for angle sensors, pressure sensors, and acceleration sensors, respectively. The first passivation layer is formed by deposition; A piezoelectric layer and upper and lower electrode layers of a piezoelectric actuator are formed on the surface of the first passivation layer by magnetron sputtering, photolithography and etching processes. Deposition forms a second passivation layer; The second passivation layer is etched to form an electrical connection region; A conductive layer is formed through magnetron sputtering, photolithography, and etching processes, and the sensitive structure of the metal temperature sensor is formed simultaneously. The device is fabricated by etching the front and back sides to release the corresponding structures.

12. The method for fabricating a monolithic integrated chip according to claim 11, characterized in that, The doped layer is a silicon doped layer, and the silicon doped layer is either n-type doped or p-type doped; The passivation layer is a silicon dioxide layer or a silicon nitride layer, and the thickness of the passivation layer is less than 3 μm; The sensitive structure of the metal temperature sensor consists of a conductive layer made of a conductive material with a thickness of less than 3 μm.

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