Pixel circuit of short-wave infrared image sensor

Abstract

The invention discloses a pixel circuit of a short-wave infrared image sensor, which relates to the technical field of photoelectric detection and comprises the following steps of: replacing a photosensitive element connected with a transmission gate transistor in a 4T active pixel sensor framework with a photoelectric conversion device; the photoelectric conversion device includes: a photodiode and a field effect transistor; the photodiode comprises a germanium epitaxial layer, a silicon substrate doped well region and a germanium doped region, the field effect transistor comprises a gate electrode, a doped source region and a doped drain region, the photoelectric conversion device is divided into an N-type photoelectric conversion device and a P-type photoelectric conversion device; and the N-type field effect transistor is regulated and controlled by the voltage of the doped well region of the P-well silicon substrate. And the P-type field effect transistor is regulated and controlled by the voltage of the P-type doped source region. According to the invention, the exposure time is greatly shortened, the response speed is improved, high-sensitivity detection of weak light is realized, and the pixel sensitivity is greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photoelectric detection and imaging, in particular to a short-wave infrared image sensor pixel circuit. BACKGROUND

[0002] Infrared image sensors are a class of core devices for detecting invisible infrared radiation and converting it into an electrical signal, widely used in night vision imaging, security monitoring, free space optical communication, biomedical detection, industrial defect detection and other fields. According to the response range of different waveband infrared light, infrared image sensors can be divided into four categories: near infrared (NIR, 700-1100 nm), short-wave infrared (SWIR, 1.1-3 μm), mid-wave infrared (MWIR, 3-8 μm) and long-wave infrared (LWIR, 8-15 μm). Among them, short-wave infrared image sensors have become the focus of research and industry in recent years due to their advantages such as fog imaging capability and working without cooling. SWIR sensors are particularly suitable for infrared communication, night imaging, silicon wafer perspective detection, moisture content measurement and other scenarios.

[0003] The most widely used active pixel circuit for Ge-on-Si detectors is a four-transistor structure, known as 4T-APS. The working principle of 4T-APS is as follows: first, open the reset switch Trst and the transfer gate TX, charge the voltage on the floating diffusion node capacitor C FD and the junction capacitor C PD of Ge-on-Si PIN to the reset voltage Vrst, and then close Trst and TX after resetting; then the pixel starts to expose, the photo-generated charge generated by the Ge-on-Si PIN under light moves to the cathode and anode respectively, thereby recombining with the reset charge, the longer the exposure time, the more charge recombination; after exposure, open TX again, at this time the charge on C PD , actually electrons, will transfer to C FD , thereby converting the charge change on C PD to voltage change on C FD , because it is generally small, according to V=Q / C, the voltage change on C FD will be greater than the voltage change on C PD , thereby realizing the conversion and amplification of photo-generated charge to voltage signal, and then turning off TX; finally, the voltage signal is read out through the selection switch Tsel, and Tsf forms a voltage follower, which plays a buffering and isolation role in the circuit.

[0004] The existing 4T-APS circuit is to realize photoelectric conversion and signal amplification by using the redistribution of photo-generated charges between the junction capacitor of the photodiode and the floating diffusion node capacitor, but the photo-generated current of the photodiode is small, so the accumulation speed of the charge is slow, if a higher gain, that is, a higher sensitivity is wanted, the pixel exposure time will be long, which will affect the complexity of the array back-end circuit and the frame rate of the readout. SUMMARY

[0005] Therefore, it is necessary to provide a short-wave infrared image sensor pixel circuit aiming at the above technical problems.

[0006] The short-wave infrared image sensor pixel circuit provided by the embodiment of the present application replaces the light-sensitive element connected to the transfer gate transistor in the 4T active pixel sensor architecture of the active pixel circuit with a photoelectric conversion device; The photoelectric conversion device comprises a photodiode and a field effect transistor; the photodiode comprises a germanium epitaxial layer, a silicon substrate doped well region and a germanium doped region; and the field effect transistor comprises a gate electrode, a doped source region and a doped drain region. When the germanium doped region is an N-type germanium doped region, the silicon substrate doped well region is a P-well silicon substrate doped well region, the doped drain region is an N-type doped drain region and the doped source region is an N-type doped source region, the photodiode is an NIP-type photodiode, the field effect transistor is an N-type field effect transistor, and the photoelectric conversion device is an N-type photoelectric conversion device. When the germanium doped region is a P-type germanium doped region, the silicon substrate doped well region is an N-well silicon substrate doped well region, the doped drain region is a P-type doped drain region and the doped source region is a P-type doped source region, the photodiode is a PIN-type photodiode, the field effect transistor is a P-type field effect transistor, and the photoelectric conversion device is a P-type photoelectric conversion device. The N-type field effect transistor is regulated by the voltage of the P-well silicon substrate doped well region, and the P-type field effect transistor is regulated by the voltage of the P-type doped source region.

[0007] Optionally, the N-type photoelectric conversion device comprises an NIP germanium photodiode N-end bias electrode, an N-type germanium doped region, an N-type doped source region, a germanium epitaxial layer, an N-type doped drain region and a P-well silicon substrate doped well region. The germanium epitaxial layer is formed on one side of the surface of the P-well silicon substrate doped well region, the N-type germanium doped region is formed above the germanium epitaxial layer, and the NIP photodiode N-end bias electrode is formed on one side of the surface of the N-type germanium doped region. The gate insulating layer and the gate electrode are sequentially formed on the surface of the P-well silicon substrate doped well region, and the N-type doped source region and the N-type doped drain region are respectively formed in the P-well silicon substrate doped well region on both sides of the gate electrode. The source electrode is formed above the N-type doped source region of the P-well silicon substrate doped well region, and the drain electrode is formed above the N-type doped drain region of the P-well silicon substrate doped well region.

[0008] Optionally, the P-type photoelectric conversion device comprises: a PIN germanium photodiode P end bias electrode, a P-type germanium doped region, a P-type doped source region, a germanium epitaxial layer, a P-type doped drain region and an N-well silicon substrate doped well region. The N-well silicon substrate doped well region is formed on one side of the surface of the N-well silicon substrate doped well region, and the germanium epitaxial layer is formed above the N-well silicon substrate doped well region. The N-well silicon substrate doped well region is formed on one side of the surface of the N-well silicon substrate doped well region, and the germanium epitaxial layer is formed above the N-well silicon substrate doped well region. The N-well silicon substrate doped well region is formed on one side of the surface of the N-well silicon substrate doped well region, and the germanium epitaxial layer is formed above the N-well silicon substrate doped well region.

[0009] Optionally, the 4T active pixel sensor architecture comprises: a reset transistor, a transfer gate transistor, a source follower transistor, a selection transistor, a floating diffusion node and an adjustable capacitor. The source electrode of the reset transistor is connected to a reset voltage line, and the drain electrode of the reset transistor is connected to the floating diffusion node. The source electrode of the reset transistor is connected to a reset voltage line, and the drain electrode of the reset transistor is connected to the floating diffusion node. The gate electrode of the source follower transistor is connected to the floating diffusion node, and the source electrode of the source follower transistor is connected to the selection transistor. The drain electrode of the selection transistor is connected to the source electrode of the source follower transistor, and the source electrode of the selection transistor is connected to a column output line. The gate electrodes of the reset transistor, the transfer gate transistor, the source follower transistor and the selection transistor are connected to corresponding voltage signals, one end of the adjustable capacitor is connected to the floating diffusion node, and the other end of the adjustable capacitor is grounded.

[0010] Optionally, when the reset transistor is turned on and the transfer gate transistor is turned off, the capacitor of the floating diffusion node is charged to a reset voltage; the transfer gate transistor is turned on, and the capacitor of the floating diffusion node is charged and discharged by the drain-source current of the photoelectric conversion device. When the photoelectric conversion device is an N-type photoelectric conversion device, the discharge operation is performed; when the photoelectric conversion device is a P-type photoelectric conversion device, the charging operation is performed; and the exposure time of the photoelectric conversion device is determined according to the conduction time of the transfer gate transistor. When the charging and discharging operation is completed, the transfer gate transistor is turned off, and the selection transistor is turned on to read the voltage signal of the floating diffusion node.

[0011] Compared with the prior art, the short-wave infrared image sensor pixel circuit provided by the embodiment of the present application has the following advantages: The existing active pixel circuit realizes the conversion and amplification of photo-generated charges to voltage by using the redistribution of charges between capacitors, which determines that the response speed is slow, and there is a contradiction between high sensitivity and low reset noise.

[0012] The photoelectric conversion device is composed of a photodiode and a field effect transistor, the photo-generated charge generation efficiency of the photodiode is high, and enough charges can be accumulated in a very short time; the fast response and high efficient signal transmission capability of the field effect transistor enable the charges to be quickly read and processed. Compared with the existing active pixel circuit, the photoelectric conversion device greatly shortens the exposure time and improves the response speed.

[0013] In addition, as the source of photo-generated charges, the special structure of the photodiode greatly improves the generation efficiency of photo-generated electron-hole pairs; and the field effect transistor plays a key role in signal amplification and regulation, and can accurately amplify the weak photo-generated current generated by the photodiode, and effectively control the flow of current and the output of signal through the adjustment of the gate voltage. This cooperative working mechanism enables the pixel to generate clear and distinguishable electrical signals even under extremely weak light conditions, realizes high sensitivity detection of weak light, and greatly improves the sensitivity of the pixel. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 The existing 4T-APS circuit schematic diagram of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 2 The existing 4T-APS timing diagram of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 3 The device structure diagram of N-type GePD-MOS of a short-wave infrared image sensor pixel circuit provided in an embodiment, Figure 4 The equivalent circuit diagram of N-type GePD-MOS of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 5 The device structure diagram of N-type GePD-MOS 4T-APS of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 6 The timing diagram of N-type GePD-MOS 4T-APS of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 7 The device structure diagram of P-type GePD-MOS of a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 8Equivalent circuit diagram of P-type GePD-MOS for a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 9 Device structure diagram of P-type GePD-MOS 4T-APS for a short-wave infrared image sensor pixel circuit provided in an embodiment; Figure 10 Timing diagram of P-type GePD-MOS 4T-APS for a short-wave infrared image sensor pixel circuit provided in an embodiment Figure 11 Circuit schematic diagram of a short-wave infrared image sensor pixel circuit provided in an embodiment, Figure 11 (a) in the circuit schematic diagram of N-type GePD-MOS 4T-APS, Figure 11 (b) in the circuit schematic diagram of P-type GePD-MOS 4T-APS.

[0015] In the figure, 1, NIP germanium photodiode N-bias electrode; 2, N-type germanium doped region n + Ge; 3, gate electrode; 4, germanium epitaxial layer; 5, source electrode; 6, gate insulating layer; 7, drain electrode; 8, N-type doped source region n + ; 9, N-type doped drain region n + ; 10, P-well silicon substrate doped well region p + Si; 11, PIN germanium photodiode P-bias electrode; 12, P-type germanium doped region p + Ge; 13, gate electrode; 14, germanium epitaxial layer; 15, source electrode; 16, gate insulating layer; 17, drain electrode; 18, P-type doped source region p + ; 19, P-type doped drain region p + ; 20, N-well silicon substrate doped well region n + Si. DETAILED DESCRIPTION

[0016] In order to make the purpose, technical solutions and advantages of the present application clearer and more apparent, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0017] Short-wave infrared (SWIR) image sensors have great application potential in intelligent driving, industrial detection and other fields. However, the current image sensors in the field of short-wave infrared imaging face multiple technical barriers. The mainstream infrared imaging system relies on InGaAs material and current integration amplifier (CTIA) architecture, which has high responsivity and excellent imaging quality, but its manufacturing cost is high, the system power consumption is large, the peripheral circuit is complex, and the material heterostructure integration difficulty leads to poor compatibility with standard CMOS process platform, which is difficult to meet the industrialization needs of low cost, high resolution and large-scale array integration. Silicon-based germanium detectors have good absorption in the short-wave infrared band, and the preparation process is compatible with CMOS, which is a good choice to replace InGaAs detectors, but its responsivity in the short-wave infrared band is low, the quantum efficiency is low, the dark current is high, and the spectral range is mostly within 1.7 μm. At the same time, the current infrared image sensor based on silicon-based germanium mainly adopts 4T-APS (Active Pixel Sensor, APS) active pixel structure, which has bottlenecks in sensitivity, dynamic range, speed and other aspects, and cannot meet the needs of emerging applications.

[0018] Active pixel sensor (APS) is a basic unit of image sensor chip, and the array composed of such pixel units can image, and each pixel sensor unit has a photosensitive unit and multiple transistors. Among them, the function of the photosensitive unit is to realize photoelectric conversion and convert incident photons into electrons. The function of each transistor is to realize signal reset, transmission and selection as a switch and signal amplification as an amplifier device. The transistor in APS is generally a metal oxide semiconductor field effect transistor (MOSFET). The active pixel sensor is proposed to solve the problems of large noise, narrow dynamic range, low sensitivity and the need for signal amplification outside the array of passive pixel circuit.

[0019] Current mainstream short-wave infrared image sensors mostly use indium gallium arsenide (InGaAs) as the photosensitive material, and combine with the current transfer amplifier (CTIA) architecture to realize the collection and amplification of image signals. Such devices have high responsivity, excellent image quality and stable imaging performance, and are widely used in military reconnaissance, optical communication, precision detection and other high-end scenarios. However, InGaAs material is usually epitaxially grown on an InP substrate, and the hetero-material property leads to complex process, low yield and high manufacturing cost. In addition, InGaAs sensors usually cannot be monolithically integrated with CMOS readout circuits, and need to be packaged by hybrid bonding, which not only increases the system size and power consumption, but also brings complexity of peripheral driving and timing control. These problems make it difficult for InGaAs-based image sensors to meet the actual needs of emerging short-wave infrared applications in terms of low cost, large scale and high integration. Silicon-based germanium detectors are considered an ideal solution to replace InGaAs detectors because of their good absorption ability in the short-wave infrared band and high compatibility with CMOS process. However, the responsivity of such detectors in the short-wave infrared band is relatively low, the quantum efficiency is limited, the dark current is high, and the spectral response range is usually limited to within 1.7 μm. The infrared image sensors built on the basis of such devices mostly use 4T active pixel sensor architecture (4T-APS). Although this architecture has been widely used in visible light imaging, it still faces problems such as insufficient sensitivity, limited dynamic range and slow response speed, making it difficult to meet the growing demand for high-performance infrared imaging systems in emerging application scenarios.

[0020] The above technology has the following defects: 1. The responsivity of traditional silicon-based germanium photodetectors in the short-wave infrared band is relatively low, the quantum efficiency is low, the dark current is high, and the spectral range is mostly within 1.7 μm.

[0021] 2. Due to the limitations of photosensitive elements and exposure methods, the sensitivity and dynamic range (sensitivity refers to the conversion gain when converting optical signals into electrical signals, and dynamic range refers to the range between the weakest and strongest light that can be detected) of existing 4T-APS have reached a bottleneck. Although these indicators can be slightly improved by optimizing the process, this structure cannot meet the needs of some emerging applications.

[0022] 3. Due to the need for sensitivity, the suspended diffusion capacitance C FD of the existing 4T-APS must be much smaller than the junction capacitance of the photodiode, but small C FD will increase the reset noise of the pixel (noise generated by the Ron of Trst and the associated capacitance during each reset operation, proportional to KT / C).

[0023] An embodiment of the present application provides a short-wave infrared image sensor pixel circuit, the circuit comprising: The photosensitive element connected to the transfer gate transistor in the 4T active pixel sensor architecture is replaced by a photoelectric conversion device. The photoelectric conversion device comprises a photodiode and a field effect transistor. The photodiode comprises a germanium epitaxial layer, a silicon substrate doped well region and a germanium doped region. The field effect transistor comprises a gate electrode, a doped source region and a doped drain region.

[0024] When the germanium doped region is an N-type germanium doped region, the silicon substrate doped well region is a P-well silicon substrate doped well region, the doped drain region is an N-type doped drain region, and the doped source region is an N-type doped source region, the photodiode is an NIP-type photodiode, the field effect transistor is an N-type field effect transistor, and the photoelectric conversion device is an N-type photoelectric conversion device. When the germanium doped region is a P-type germanium doped region, the silicon substrate doped well region is an N-well silicon substrate doped well region, the doped drain region is a P-type doped drain region, and the doped source region is a P-type doped source region, the photodiode is a PIN-type photodiode, the field effect transistor is a P-type field effect transistor, and the photoelectric conversion device is a P-type photoelectric conversion device.

[0025] The N-type field effect transistor is regulated by the voltage of the P-well silicon substrate doped well region. The P-type field effect transistor is regulated by the voltage of the P-type doped source region.

[0026] The N-type photoelectric conversion device comprises an NIP germanium photodiode N-end bias electrode 1, an N-type germanium doped region 2, an N-type doped source region 8, a germanium epitaxial layer 4, an N-type doped drain region 9 and a P-well silicon substrate doped well region 10.

[0027] The P-well silicon substrate doped well region 10 is formed with the germanium epitaxial layer 4 on one side of its surface, the N-type germanium doped region 2 is formed above the germanium epitaxial layer 4, and the NIP photodiode N-end bias electrode 1 is formed on one side of the surface of the N-type germanium doped region 2. The gate insulating layer 6 and the gate electrode 3 are sequentially formed on the surface of the P-well silicon substrate doped well region 10, and the N-type doped source region 8 and the N-type doped drain region 9 are respectively formed in the P-well silicon substrate doped well region 10 on both sides of the gate electrode 3. The source electrode 5 is formed above the N-type doped source region 8, and the drain electrode 7 is formed above the N-type doped drain region 9.

[0028] The P-type photoelectric conversion device comprises a PIN germanium photodiode P-end bias electrode 11, a P-type germanium doped region 12, a P-type doped source region 18, a germanium epitaxial layer 14, a P-type doped drain region 19 and an N-well silicon substrate doped well region 20.

[0029] The N-well silicon substrate doped well region 20 surface on one side of the formation of a germanium epitaxial layer 14, the formation of a P-type germanium doped region 12 above the germanium epitaxial layer 14, the surface of the P-type germanium doped region 12 on one side of the formation of PIN photodiode P end bias electrode 11. The N-well silicon substrate doped well region 20 surface sequentially formed gate insulating layer 16 and gate electrode 13, in the P-well silicon substrate doped well region 20 on both sides of the gate electrode 13 respectively form a P-type doped source region 18 and P-type doped drain region 19. N-well silicon substrate doped well region 20 on the P-type doped source region 18 above the formation of the source electrode 5, N-well silicon substrate doped well region 20 on the P-type doped drain region 19 above the formation of the drain electrode 7.

[0030] The formation includes a series of process steps, including but not limited to: substrate preparation, preparation before epitaxial growth, germanium epitaxial layer growth, post-epitaxial growth and subsequent processes (lithography and etching, doping and annealing, etc.).

[0031] The 4T active pixel sensor architecture includes: a reset transistor, a transfer gate transistor, a source follower transistor, a selection transistor, a floating diffusion node and an adjustable capacitor.

[0032] The source of the reset transistor is connected to the reset voltage line, and the drain of the reset transistor is connected to the floating diffusion node. The source of the transfer gate transistor is connected to the drain of the photosensitive element, and the drain of the transfer gate transistor is connected to the floating diffusion node. The gate of the source follower transistor is connected to the floating diffusion node, and the source of the source follower transistor is connected to the selection transistor. The drain of the selection transistor is connected to the source of the source follower transistor, and the source of the selection transistor is connected to the column output line. The gates of the reset transistor, the transfer gate transistor, the source follower transistor and the selection transistor are connected to the corresponding voltage signals, one end of the floating diffusion node is connected to the adjustable capacitor, and the other end of the adjustable capacitor is grounded.

[0033] When the reset transistor is turned on and the transfer gate transistor is turned off, the capacitor of the floating diffusion node is charged to the reset voltage. When the transfer gate transistor is turned on, the capacitor of the floating diffusion node is charged and discharged by the drain-source current of the photoelectric conversion device.

[0034] When the photoelectric conversion device is an N-type photoelectric conversion device, the discharge operation is performed. When the photoelectric conversion device is a P-type photoelectric conversion device, the charging operation is performed. The exposure time of the photoelectric conversion device is determined according to the conduction time of the transfer gate transistor. After the charging and discharging operation is completed, the transfer gate transistor is turned off and the selection transistor is turned on to read the voltage signal of the floating diffusion node.

[0035] The specific implementation is as follows: The most widely used active pixel circuit for Ge-on-Si detectors is 4T-APS, and the circuit schematic diagram of the existing 4T-APS is as shown in Figure 1 The working timing diagram of the existing 4T-APS is as shown in Figure 2as shown.

[0036] 1、Short-wave infrared image sensor pixel circuit based on the traditional 4T-APS architecture, light sensitive element using a new type of photoelectric converter GePD-MOS device structure. Figure 3 The proposed GePD-MOS device structure diagram is shown, Figure 4 The corresponding equivalent circuit diagram is shown. As shown in the figure, the silicon substrate doped well region, germanium epitaxial layer and germanium doped region constitute a PIN type photodiode (PD) for detecting incident light, converting light intensity into photocharge. At the same time, the silicon substrate doped well region, doped source region, doped drain region, gate insulating layer and gate electrode constitute an N type field effect transistor (MOSFET) for amplifying the photoelectric current generated by the photodiode.

[0037] When the germanium material absorbs short-wave infrared radiation to generate electron-hole pairs, the electrons drift to the silicon substrate under the action of built-in electric field, and the threshold voltage of the MOS tube is changed by changing the substrate voltage, further changing the drain-source current. Therefore, the GePD-MOS is actually a "light-controlled current source". In addition, the gain of the device can be adjusted by controlling the gate voltage of the MOS tube. The proposed new pixel is named GePD-MOS 4T-APS. In this pixel, the output signal can fully inherit the characteristics of GePD-MOS, so the pixel can obtain high sensitivity and wide dynamic range. In addition, due to the high quantum efficiency of the device, the pixel still has good responsivity above 1.7 μm, which expands the spectral response.

[0038] 2、The short-wave infrared imaging pixel circuit is composed of N-type GePD-MOS and 4T-APS, and the circuit principle diagram is shown in Figure 11 (a), and the device structure diagram is shown in Figure 5 Because the substrate voltage of GePD-MOS will change with light, it should be isolated from the substrate of other transistors. Here, deep N well (DNW) process is used to achieve this requirement. The drain of GePD-MOS is connected to the left end of the transmission gate, and the source is connected to the ground. The pixel circuit works in three stages of reset, integration and readout. First, reset, that is, open M rst , and charge the FD point voltage to a fixed value. This process is similar to 4T-APS, but here the transmission gate M tx must be closed. After reset is completed, M tx can be opened, and the integration stage begins. The integration stage is to collect the photocharge generated by the photodiode. The photocharge is collected in the capacitor C FDIntegration, i.e. discharging, is performed because the drain-source current of GePD-MOS is different under different illumination, so the degree of discharge is also different. In C FD M tx is turned off before the charge stored on the capacitor is completely discharged FD At this time, V Sel is stable to a certain voltage value, which is different under different illumination, and this integration process is also the exposure process of the pixel. Finally, V FD is read out according to the timing, and the working timing diagram of the entire pixel circuit is shown in Figure 6 .

[0039] The above integration process, i.e. exposure, is different from the traditional exposure method, and the exposure time is much smaller than that of the traditional APS. This exposure method determines that the pixel can have a very fast working speed. Because the single pixel has an extremely high response speed, the array can adopt a row scanning and column reading mode, i.e. one column selection switch is added to each column, all columns share one backend processing circuit, and the output voltage of a certain pixel in the current column is selected by controlling the column selection switch. This mode can greatly reduce the complexity of the backend analog circuit, so that more pixels can be integrated in the same area, i.e. the resolution of the array is improved. In addition, this high-speed characteristic also increases the frame rate of the pixel array reading.

[0040] Because of the different exposure methods, the size of C FD is no longer limited by the requirement of sensitivity, so C FD can be increased by process adjustment, thereby reducing the reset noise.

[0041] 3. The photosensitive element can be replaced by a P-type GePD-MOS (P-type refers to the MOS tube in the device being a P-type MOSFET). Figure 7 shows a device structure diagram, Figure 8 and the corresponding equivalent circuit diagram is shown. As shown in the figure, unlike the N-type GePD-MOS, the silicon substrate doped well region, germanium epitaxial layer and germanium doped region constitute an NIP type photodiode (PD).

[0042] 4. Correspondingly, the infrared pixel circuit is composed of a P-type GePD-MOS and a 4T-APS, and the circuit principle diagram and device structure diagram are shown in Figure 11 (b) and Figure 9 of the figure. Unlike the N-type, the transfer tube M tx uses the drain-source current of GePD-MOS to integrate CFD and charge it. The subsequent principle is the same as the N-type. Since the transfer gate M tx in the circuit principle diagram is a P-tube, it is turned off when the gate is at a high level and turned on when the gate is at a low level. The corresponding working timing is shown in Figure 10as shown.

[0043] According to the above embodiment, the beneficial effects that can be achieved by the present application include but are not limited to: 1. The sensitivity and dynamic range of the existing active pixel circuit have reached the limit, and the main factor limiting these indicators is the photosensitive element. The present application uses a new type of photosensitive element GePD-MOS to greatly improve these indicators.

[0044] 2. The existing active pixel circuit uses the redistribution of charges between capacitors to realize the conversion and amplification of photo-generated charges to voltage. This mechanism determines that the response speed is very slow, and there is a contradiction between high sensitivity and low reset noise. In the present application, the exposure mode based on the new infrared photosensitive element GePD-MOS can make the pixel response extremely fast. Because of the speed advantage, the complexity of the back-end circuit can be reduced, the array resolution can be improved, and the frame rate can be improved. In addition, there is no contradiction between sensitivity and reset noise, and the reset noise can be reduced by connecting additional capacitors in parallel.

[0045] The above-described embodiments only express several embodiments of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of protection of the present application.

Claims

1. A pixel circuit for a short-wave infrared image sensor, characterized in that, Replace the photosensitive element connected to the transmission gate transistor in the 4T active pixel sensor architecture with a photoelectric conversion device; The photoelectric conversion device includes a photodiode and a field-effect transistor; the photodiode includes a germanium epitaxial layer, a silicon substrate doped well region, and a germanium doped region; the field-effect transistor includes a gate electrode, a doped source region, and a doped drain region. When the germanium doped region is an N-type germanium doped region, the silicon substrate doped well region is a P-well silicon substrate doped well region, the doped drain region is an N-type doped drain region and the doped source region is an N-type doped source region, the photodiode is an NIP type photodiode, the field-effect transistor is an N-type field-effect transistor, and the photoelectric conversion device is an N-type photoelectric conversion device. When the germanium doped region is a P-type germanium doped region, the silicon substrate doped well region is an N-well silicon substrate doped well region, the doped drain region is a P-type doped drain region and the doped source region is a P-type doped source region, the photodiode is a PIN photodiode, the field-effect transistor is a P-type field-effect transistor, and the photoelectric conversion device is a P-type photoelectric conversion device. The N-type field-effect transistor is voltage-controlled by the doped well region of the P-well silicon substrate, and the P-type field-effect transistor is voltage-controlled by the doped source region of the P-type substrate.

2. The pixel circuit of a short-wave infrared image sensor as described in claim 1, characterized in that, The N-type photoelectric conversion device includes: an N-terminal bias electrode (1) of a NIP germanium photodiode, an N-type germanium doped region (2), an N-type doped source region (8), a germanium epitaxial layer (4), an N-type doped drain region (9), and a P-well silicon substrate doped well region (10). The germanium epitaxial layer (4) is formed on one side of the surface of the doped well region (10) of the P-well silicon substrate, and an N-type germanium doped region (2) is formed above the germanium epitaxial layer (4). The N-terminal bias electrode (1) of the NIP photodiode is formed on one side of the surface of the N-type germanium doped region (2). A gate insulating layer (6) and a gate electrode (3) are sequentially formed on the surface of the doped well region (10) of the P-well silicon substrate. An N-type doped source region (8) and an N-type doped drain region (9) are formed inside the doped well region (10) of the P-well silicon substrate on both sides of the gate electrode (3). The P-well silicon substrate doped well region (10) forms the source electrode (5) above the N-type doped source region (8), and the P-well silicon substrate doped well region (10) forms the drain electrode (7) above the N-type doped drain region (9).

3. The pixel circuit of a short-wave infrared image sensor as described in claim 1, characterized in that, The P-type photoelectric conversion device includes: a P-end bias electrode (11) of a PIN germanium photodiode, a P-type germanium doped region (12), a P-type doped source region (18), a germanium epitaxial layer (14), a P-type doped drain region (19), and an N-well silicon substrate doped well region (20). The germanium epitaxial layer (14) is formed on one side of the surface of the N-well silicon substrate doped well region (20), the P-type germanium doped region (12) is formed above the germanium epitaxial layer (14), and the P-terminal bias electrode (11) of the PIN photodiode is formed on one side of the surface of the P-type germanium doped region (12). A gate insulating layer (16) and a gate electrode (13) are sequentially formed on the surface of the N-well silicon substrate doped well region (20). A P-type doped source region (18) and a P-type doped drain region (19) are formed inside the P-well silicon substrate doped well region (20) on both sides of the gate electrode (13). The N-well silicon substrate doped well region (20) forms a source electrode (5) above the P-type doped source region (18), and the N-well silicon substrate doped well region (20) forms a drain electrode (7) above the P-type doped drain region (19).

4. The pixel circuit of a short-wave infrared image sensor as described in claim 1, wherein the 4T active pixel sensor architecture comprises: Reset transistor, transmission gate transistor, source follower transistor, selection transistor, floating diffusion node, and adjustable capacitor; The source of the reset transistor is connected to the reset voltage line, and the drain of the reset transistor is connected to the floating diffusion node. The source of the transmission gate transistor is connected to the drain of the photosensitive element, and the drain of the transmission gate transistor is connected to the floating diffusion node. The source follows the gate of the transistor and is connected to the floating diffusion node; the source follows the transistor and is connected to the selection transistor. The drain of the select transistor is connected to the source of the source follower transistor, and the source of the select transistor is connected to the column output line. The gates of the reset transistor, the transmission gate transistor, the source follower transistor, and the select transistor are connected to the corresponding voltage signals. The floating diffusion node is connected to one end of an adjustable capacitor, and the other end of the adjustable capacitor is grounded.

5. The pixel circuit of a short-wave infrared image sensor as described in claim 4, characterized in that, When the reset transistor is turned on and the transmission gate transistor is turned off, the capacitor of the floating diffusion node is charged to the reset voltage; when the transmission gate transistor is turned on, the capacitor of the floating diffusion node is charged and discharged through the drain-source current of the photoelectric conversion device. Specifically, when the photoelectric conversion device is an N-type photoelectric conversion device, a discharge operation is performed; when the photoelectric conversion device is a P-type photoelectric conversion device, a charging operation is performed; and the exposure time of the photoelectric conversion device is determined according to the conduction time of the transmission gate transistor. After the charging and discharging operation is completed, the transmission gate transistor is turned off, and the selection transistor is turned on to read the voltage signal of the floating diffusion node.

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