Spread spectrum clock signal simulation method and device, equipment and storage medium

Abstract

The invention discloses a spread spectrum clock signal simulation method, device and equipment and a storage medium, and relates to the field of electronic computers.The spread spectrum clock signal simulation method comprises the steps that modulation parameters input in a command line mode are received on the basis of a parameter transfer function, and values can be assigned to variables in target program codes on the basis of the modulation parameters; and realizing the following logics: determining a linear variation and an incremental step length of a spread spectrum clock period according to the modulation parameter, and simulating to obtain a spread spectrum clock signal according to the linear variation and the incremental step length. Thus, simulation of the spread spectrum clock signal is realized in a software simulation mode, and hardware circuits such as a frequency divider and a voltage-controlled oscillator for simulating the spread spectrum clock signal do not need to be integrated in a front-end verification platform, so that the complexity of the front-end verification platform can be greatly reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic computers, and particularly relates to a spread spectrum clock signal simulation method and device, equipment and a storage medium. BACKGROUND

[0002] In electronic devices, especially in high-speed data transmission and clock signal systems, spread spectrum clocking (SSC) is widely used as a technology to reduce electromagnetic interference (EMI). The core principle is to disperse the energy originally concentrated at a single frequency point into a wider frequency band range by modulating the clock frequency, thereby suppressing the electromagnetic radiation peak. SSC technology has become a major means of optimizing electromagnetic compatibility (EMC).

[0003] Currently, in some technologies, the simulation of a spread spectrum clock signal requires a generation circuit with spread spectrum clock function to be directly integrated into a verification platform. Such a verification method significantly increases the complexity of the verification platform, and because the generation circuit is deeply coupled with the verification platform, each parameter adjustment requires a redesign of the hardware mode. Therefore, there is an urgent need for a technical solution that can decouple the generation circuit and the verification platform to reduce the complexity of the front-end verification platform. SUMMARY

[0004] The present application provides a spread spectrum clock signal simulation method, a spread spectrum clock signal simulation device, an electronic device, a computer-readable storage medium and a computer program product to at least solve the problems of high verification platform complexity and long compilation time simulation time in related technologies.

[0005] The present application provides a spread spectrum clock signal simulation method, comprising:

[0006] The parameter transfer function receives the modulation parameters input in the command line, and the modulation parameters are used to indicate the source clock period, modulation depth, modulation period and spread spectrum mode of the spread spectrum clock signal, wherein the modulation period is greater than the source clock period;

[0007] Based on the modulation parameters, the variables in the target program code are assigned values, and the following logic is implemented during the running process of the target program code:

[0008] According to the source clock period and the modulation period, the number of source clock periods included in half a modulation period is determined, wherein the half modulation period refers to the period in which the frequency of the spread spectrum clock signal gradually rises or gradually falls;

[0009] determine a linear variation amount and an incremental step length of the spread spectrum clock period according to the spread spectrum mode, the modulation depth and the number of source clock periods;

[0010] simulate the spread spectrum clock signal according to the linear variation amount and the incremental step length.

[0011] The application further provides a spread spectrum clock signal simulation device, comprising:

[0012] a parameter receiving module, configured to receive the modulation parameters input in a command line mode through a parameter transfer function, the modulation parameters being used to indicate a source clock period, a modulation depth, a modulation period and a spread spectrum mode of a spread spectrum clock signal, wherein the modulation period is greater than the source clock period;

[0013] a simulation module, configured to assign values to variables in the target program code based on the modulation parameters, and realize the following logic in a running process of the target program code:

[0014] determine a number of source clock periods included in a half modulation period according to the source clock period and the modulation period, wherein the half modulation period refers to a period in which the frequency of the spread spectrum clock signal gradually increases or gradually decreases;

[0015] determine a linear variation amount and an incremental step length of the spread spectrum clock period according to the spread spectrum mode, the modulation depth and the number of source clock periods;

[0016] simulate the spread spectrum clock signal according to the linear variation amount and the incremental step length.

[0017] The application further provides an electronic device, comprising a memory configured to store a computer program and a processor configured to execute the computer program to realize the steps of any one of the spread spectrum clock signal simulations.

[0018] The application further provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program is executed by a processor to realize the steps of any one of the spread spectrum clock signal simulations.

[0019] In the technical solutions of some embodiments of the present application, a target program code for realizing the simulation of the spread spectrum clock signal is developed in advance, and in the target program code, a variable is used to represent the modulation parameter, then the modulation parameter input in a command line mode is received through a parameter passing function, and the variable in the target program code is assigned a value based on the modulation parameter. In this way, the target program code can simulate the required spread spectrum clock signal according to the modulation parameter. The present application realizes the simulation of the spread spectrum clock signal through software, and can greatly reduce the complexity of the front-end verification platform without integrating hardware circuits such as frequency dividers and voltage-controlled oscillators for simulating the spread spectrum clock signal in the front-end verification platform. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0021] Figure 1 A flowchart of a spread spectrum clock signal generation method provided by some embodiments of the present application is shown in FIG. 1.

[0022] Figure 2 A schematic diagram of a spread spectrum mode as an intermediate expansion is shown in FIG. 2.

[0023] Figure 3 A schematic diagram of a spread spectrum mode as an upper expansion is shown in FIG. 3.

[0024] Figure 4 A schematic diagram of a spread spectrum mode as a lower expansion is shown in FIG. 4.

[0025] Figure 5 A module schematic diagram of a spread spectrum clock signal simulation device provided by some embodiments of the present application is shown in FIG. 5.

[0026] Figure 6 A module schematic diagram of an electronic device provided by some embodiments of the present application is shown in FIG. 6. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0028] It should be noted that in the description of the present application, the terms "comprising", "containing" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or device. The terms "first", "second" and the like in the present application are used to distinguish similar objects, not to describe a specific order or sequence.

[0029] In order to enable those skilled in the art to better understand the present application, the present application will be further described in detail below in combination with the drawings and specific embodiments.

[0030] At present, spread spectrum clock is a key technology for reducing EMI peak by periodically modulating the frequency of reference clock. The core features of spread spectrum clock include modulation waveform and key parameters, wherein the modulation waveform includes linear modulation and nonlinear modulation; the key parameters include modulation depth, modulation period and spread spectrum mode. In the existing front-end verification technology, in order to test the compatibility of the spread spectrum clock of the chip, the verification platform needs to provide SSC signal to the clock port of the DUT (Device Under Test). The main way to provide SSC signal is to realize it through hardware circuit model integration. The specific implementation path is realized through phase-locked loop (PLL) and direct digital frequency synthesizer (DDFS). However, these technologies have the following problems:

[0031] 1) Significantly increase the complexity of the verification platform. Since the generation of spread spectrum clock is usually based on phase-locked loop or generated through direct digital frequency synthesizer, the generated spread spectrum clock often has a complex generation circuit. When we need to test the spread spectrum clock function of the DUT, we need to integrate the generation circuit into the verification platform, so it will increase the complexity of the verification platform, and also increase the compilation time of the verification environment and the simulation time of the use case.

[0032] 2) Unable to dynamically modify the modulation parameters of the spread spectrum clock. Since the spread spectrum clock is integrated in the verification platform, when different spread spectrum clock signals are needed, the related modulation parameters of the generated spread spectrum clock need to be modified, and then the spread spectrum clock is regenerated through the phase-locked loop or the direct digital frequency synthesizer, and the newly generated spread spectrum clock circuit is integrated into the verification platform. This way not only increases the repeated compilation process, but also increases the verification workload.

[0033] 3) Duty cycle control is missing. Since the hardware PLL model usually outputs a fixed 50% duty cycle, it is not possible to test the performance of the DUT under asymmetric clock (such as 40% / 60% duty cycle), resulting in single test results and missing duty cycle control.

[0034] In view of this, the present application provides a spread spectrum clock signal simulation method, which can solve the above problems. The spread spectrum clock signal simulation method can be applied to a front-end verification platform. The front-end verification platform can include, but is not limited to, an electromagnetic compatibility test platform, a simulation and modeling platform, a hardware prototype platform, a system verification platform, etc. For a better understanding of the present application, reference can be made to Figure 1 The flowchart of the spread spectrum clock signal simulation method provided by some embodiments of the present application is shown in the figure. Figure 1 The spread spectrum clock signal simulation method includes the following steps:

[0035] In step S101, the modulation parameters input in the command line are received through the parameter passing function. The modulation parameters are used to indicate the source clock period, modulation depth, modulation period and spread spectrum mode of the spread spectrum clock signal, wherein the modulation period is greater than the source clock period.

[0036] Specifically, when receiving the command line input modulation parameters through the parameter passing function, a structured interface needs to be involved to ensure the formatted input and parsing of the parameters. The parameter passing function can be implemented based on a command line parameter parsing library (such as the argparse module of Python or the getopt function of C language). The user inputs the parameters through the command line, and the parameter passing function converts the input string into a data type recognizable by the system. For example, the source clock period needs to be parsed into a time unit, the modulation depth is parsed into a percentage value, the modulation period is parsed into a frequency unit, and the spread spectrum mode is parsed into a predefined enumeration type. In addition, the parameter passing function needs to include verification logic to ensure that the input parameters meet the physical constraint conditions (such as the modulation period must be greater than the source clock period); if the input parameters do not meet the constraints, the system needs to return an error prompt and terminate the process.

[0037] In this embodiment, the modulation parameters for generating the spread spectrum clock signal mainly include the source clock period, the modulation depth, the modulation period and the spread spectrum mode. Among them, the source clock period refers to the time length of one complete period of the original clock signal before spread spectrum modulation, and the reciprocal of the source clock period is the source clock frequency, that is, the reference clock frequency. The source clock period is the basis for modulation, and all modulation effects are based on it. The modulation depth represents the maximum allowed deviation of the spread spectrum clock frequency relative to the source clock frequency, which is usually expressed in percentage. The modulation period refers to the time required for the spread spectrum clock signal to complete one complete modulation cycle, for example, from the lowest frequency to the highest frequency, and back to the lowest frequency. The modulation period defines the speed or rate of frequency change, and the modulation frequency is the inverse of the modulation period. The spread spectrum mode is the spread spectrum mode, which can be divided into intermediate expansion, upward expansion and downward expansion according to the difference between the spread spectrum clock and the source clock. For a better understanding of the present application, reference can be made to Figures 2 to 4 Where the abscissa represents time and the ordinate represents frequency, f m represents the modulation frequency, 1 / fm represents the modulation period, f represents the source clock frequency (i.e. the reference frequency), f+Δf represents the highest frequency of the spread clock, and f-Δf represents the lowest frequency of the spread clock. The mid-spread is a spread mode in which the average frequency of the spread clock is the same as the source clock frequency, the up-spread is a spread mode in which the lowest frequency of the spread clock is equal to the source clock frequency, and the down-spread is a spread mode in which the highest frequency of the spread clock is equal to the source clock frequency. For the mid-spread mode, the modulation does not change the average period / frequency of the clock, but makes the average period / frequency dynamically change around the nominal value.

[0038] In the embodiment, the spread modulation is achieved by slightly and continuously modulating the position of the clock edge (i.e. period jitter) within each source clock period to realize the slow change of the frequency. In order to generate a smooth and continuous frequency change trend, the slight changes need to be accumulated over multiple source clock periods. Therefore, the modulation period needs to be much larger than the source clock period, which is a basic prerequisite and physical constraint for the spread clock technology to be effective.

[0039] In step S102, the variables in the target program code are assigned based on the modulation parameters, and in the running process of the target program code, the following logic is implemented: the number of source clock periods included in a half modulation period is determined according to the source clock period and the modulation period, wherein the half modulation period refers to the period in which the frequency of the spread clock signal gradually increases or gradually decreases; the linear change amount and the incremental step of the spread clock period are determined according to the spread mode, the modulation depth and the number of source clock periods; and the spread clock signal is simulated according to the linear change amount and the incremental step.

[0040] Specifically, for the modulation parameters obtained in the command line mode, the spread clock signal is finally obtained by executing step S102. For example, based on the modulation parameters obtained in the command line, the process variables in the program code (such as the number of source clock periods in a half modulation period, the linear change amount of the spread clock period) are calculated, and the spread clock signal is simulated through the variables in the program code.

[0041] In the embodiment, when the number of source clock periods included in a half modulation period is determined based on the source clock period and the modulation period in the modulation parameters, since the change of the clock frequency is symmetrical in the spread clock modulation process, a complete modulation period can be divided into two symmetrical half modulation periods, and in the first half modulation period, the frequency changes from the reference value to the extreme value (increases or decreases according to the spread mode), and in the second half modulation period, the frequency returns from the extreme value to the reference value.

[0042] In the embodiment, the calculation formula of the number of source clock periods included in a half modulation period can be shown as expression (1).

[0043]

[0044] wherein, N half represents the number of source clock periods included in a half modulation period, T mod represents a modulation period, T source represents a source clock period.

[0045] In the embodiment, when determining the linear variation amount of the spread spectrum clock period based on the spread spectrum mode, the modulation depth and the number of source clock periods in a half modulation period in the modulation parameters, since the linear variation amount is a macroscopic concept, it refers to the total amount of variation (such as the time length of the source clock period to be increased or decreased in a half modulation period) of the spread spectrum clock period required in the entire modulation process. The increment step is a microscopic implementation, which refers to the specific value to be adjusted in each source clock period. Due to the difference in physical characteristics of the spread spectrum mode, the mathematical expression and the symbol direction of the linear variation amount and the increment step change with the spread spectrum mode. For example, in the intermediate expansion spread spectrum mode, the linear variation amount represents that the spread spectrum clock period is symmetrically changed from the minimum spread spectrum clock period to the maximum spread spectrum clock period; the increment step represents that each source clock period is increased or decreased by a double step length. For another example, in the up-expansion spread spectrum mode, the linear variation amount represents that the spread spectrum clock period is decreased from the source clock period to the minimum spread spectrum clock period value; the increment step represents a fixed step length of each source clock period to be decreased. For another example, in the down-expansion spread spectrum mode, the linear variation amount represents that the spread spectrum clock period is increased from the source clock period to the maximum spread spectrum clock period value; the increment step represents a fixed step length of each source clock period to be increased.

[0046] In the embodiment, in the intermediate expansion spread spectrum mode, the calculation formula of the linear variation amount can be shown as expression (2); the calculation formula of the increment step can be shown as expression (3).

[0047] ΔT total = 2δ·T source (2)

[0048]

[0049] wherein, about N half , T source , please refer to the above related description, which will not be repeated here. ΔT total represents the linear variation amount, ΔT step represents the increment step, and δ represents the modulation depth.

[0050] In the embodiment, in the up-expansion spread spectrum mode, the calculation formula of the linear variation amount can be shown as expression (4); the calculation formula of the increment step can be shown as expression (5).

[0051] ΔT total = -δ·Tsource (4)

[0052]

[0053] Wherein, about N half , T source , ΔT total , ΔT step , δ, please refer to the above description, here is not repeated. The symbol is negative means reduce.

[0054] In this embodiment, in the up-extended spread spectrum mode, the calculation formula of the linear variation can be shown as expression (6); the calculation formula of the incremental step can be shown as expression (7).

[0055] ΔT total = δ·T source (6)

[0056]

[0057] Wherein, about N half , T source , ΔT total , ΔT step , δ, please refer to the above description, here is not repeated. The symbol is positive means increase.

[0058] In this embodiment, based on the linear variation and the incremental step, the initial timestamp is equal to 0, and the initial period is equal to the source clock period as the starting point, a complete modulation period (i.e. the first half modulation period and the second half modulation period) iteration is performed to ensure that the cumulative incremental step in the half period is equal to the linear variation, and the spread spectrum clock signal is simulated.

[0059] In the technical scheme of some embodiments of the application, the target program code for realizing the simulation of the spread spectrum clock signal is developed in advance, and in the target program code, the modulation parameters are represented by variables, then the modulation parameters input in the command line are received through the parameter passing function, and the variables in the target program code are assigned values based on the modulation parameters. In this way, the target program code can simulate the required spread spectrum clock signal according to the modulation parameters. The simulation of the spread spectrum clock signal is realized by software in the application, which can greatly reduce the complexity of the front-end verification platform without integrating frequency divider, voltage controlled oscillator and other hardware circuits for simulating the spread spectrum clock signal in the front-end verification platform.

[0060] In some embodiments, the simulation of the spread spectrum clock signal according to the linear variation and the incremental step in step S102 comprises:

[0061] According to the linear variation and the increment step, the high level duration and the low level duration of the spread spectrum clock signal in each spread spectrum clock cycle are determined;

[0062] According to the high level duration and the low level duration, the spread spectrum clock signal is simulated.

[0063] Specifically, in the spread spectrum clock signal generation process, the linear variation and the increment step are the core parameters for dynamic adjustment of the spread spectrum clock cycle. By superimposing the source clock cycle and the linear variation, each spread spectrum clock cycle can be calculated. For example, if the source clock cycle is 10 ns and the linear variation is 1 ns, then the spread spectrum clock cycle sequence is 10 ns, 9 ns, 8 ns, and so on. In order to generate an actual output digital waveform, each spread spectrum clock cycle needs to be split into a high level duration and a low level duration.

[0064] By default, the duty cycle is set to 50%, i.e. the high level duration is equal to the low level duration, and both are half of the spread spectrum clock cycle. This splitting logic is implemented through program code, for example, by iterating through the spread spectrum clock cycle sequence, dynamically calculating the high level and low level time of each spread spectrum clock cycle, and storing it as a time sequence. Through the time sequence, the spread spectrum clock signal is simulated.

[0065] In the above embodiment, by dynamically splitting the spread spectrum clock cycle into a high level duration and a low level duration, the spread spectrum clock signal is ensured to maintain waveform continuity while changing in frequency, avoiding signal distortion caused by sudden period changes.

[0066] In some embodiments, the modulation parameters further include a duty cycle of the spread spectrum clock signal, and the duty cycle in each spread spectrum clock cycle is the same;

[0067] According to the linear variation and the increment step, the high level duration and the low level duration of the spread spectrum clock signal in each spread spectrum clock cycle are determined, comprising:

[0068] According to the duty cycle, the high level duration in each spread spectrum clock cycle is determined;

[0069] According to the linear variation, the increment step and the high level duration, the low level duration in each spread spectrum clock cycle is determined.

[0070] Specifically, in the spread spectrum clock signal generation process, the modulation parameters further include a duty cycle of the spread spectrum clock signal. The duty cycle of the spread spectrum clock signal represents the ratio of the high level duration in the spread spectrum clock cycle to the entire spread spectrum clock cycle time, usually expressed in percentage. Based on the increment step and the duty cycle, the high level duration in the spread spectrum clock cycle can be determined, and then according to the high level duration, the low level duration in each spread spectrum clock cycle can be determined.

[0071] In the embodiment, the calculation method of the high level duration can be shown as expression (8), and the calculation method of the low level duration can be shown as expression (9).

[0072] T high = D·T current (8)

[0073] T low = T current -T high (9)

[0074] Wherein, T high represents the high level duration, T low represents the low level duration, T current represents the instantaneous spread spectrum clock period, and D represents the duty cycle (value range 0<D<1). For example, the current instantaneous spread spectrum clock period is 10 ns, and the duty cycle is 20%, so the high level duration is 2 ns, and the low level duration is 8 ns.

[0075] In the above embodiment, the duty cycle is specified in the modulation parameter, and the spread spectrum clock signal is simulated based on the duty cycle. When the duty cycle is a constant value, the high level duration and the low level duration can be calculated by expressions (8) and (9) when the spread spectrum clock period dynamically changes due to the increment step, so that the waveform characteristics are stable while the frequency modulation is maintained, and more forms of spread spectrum clock signals can be simulated, which is more suitable. For example, in the design of asymmetric waveform, it is necessary to ensure that the power distribution of the signal meets the system requirements by fixing the duty cycle. For example, a 20% duty cycle spread spectrum clock can reduce the average current consumption while maintaining the EMI suppression effect of frequency modulation.

[0076] In some embodiments, the modulation parameter further includes a duty cycle of the spread spectrum clock signal, and the duty cycle in each spread spectrum clock period is not the same;

[0077] According to the linear variation and the increment step, the high level duration and the low level duration of the spread spectrum clock signal in each spread spectrum clock period are determined, comprising:

[0078] Before simulating the spread spectrum clock signal, according to the duty cycle, the linear variation and the increment step of the first spread spectrum clock period, the high level duration and the low level duration in the first spread spectrum clock period are triggered to be calculated;

[0079] From the first spread spectrum clock cycle, in the order of spread spectrum clock cycles, in the previous spread spectrum clock cycle, according to the duty cycle, the linear variation and the incremental step of the next spread spectrum clock cycle, the high level duration and the low level duration in the next spread spectrum clock cycle are triggered to be calculated.

[0080] Specifically, when the duty cycle needs to be dynamically changed (such as adapting to different application scenarios or optimizing EMI performance) during the simulation of the spread spectrum clock signal based on the linear variation, the incremental step and the duty cycle, the high level duration and the low level duration in each spread spectrum clock cycle are recursively calculated according to the duty cycle, the linear variation and the incremental step of each cycle, so as to obtain the simulated spread spectrum clock signal.

[0081] In this embodiment, the duty cycle of the first spread spectrum clock cycle is determined by a preset parameter, and the calculation method of the high level duration and the low level duration can be combined with reference to expressions (8) and (9). From the second spread spectrum clock cycle, the duty cycle of each spread spectrum clock cycle can be independently set (such as dynamically modulating the duty cycle according to application requirements). Based on the linear variation and the incremental step of the previous spread spectrum clock cycle, the current spread spectrum clock cycle is calculated, and the high level duration and the low level duration are calculated in combination with the independently set duty cycle.

[0082] In this embodiment, from the second spread spectrum clock cycle, the calculation method of the current spread spectrum clock cycle can be as shown in expression (10), the calculation method of the high level duration can be as shown in expression (11), and the calculation formula of the low level duration can be as shown in expression (12).

[0083]

[0084]

[0085] Among them, about ΔT step Please refer to the above related description, which will not be repeated here. In the above expression, the value range of n (2≤n≤N), N represents the total number of spread spectrum clock cycles in the entire spread spectrum modulation process, represents the nth spread spectrum clock cycle, represents the (n-1)th spread spectrum clock cycle, D n represents the duty cycle of the nth spread spectrum clock cycle (value range 0 n <1), represents the duration of the high level in the nth spread spectrum clock cycle, represents the duration of the low level in the nth spread spectrum clock cycle.

[0086] In the above embodiment, the duty cycle of each spread spectrum clock cycle is set independently to adapt to different application scenarios. The high and low duration of the first spread spectrum clock cycle is calculated according to the duty cycle, linear variation and incremental step of the first spread spectrum clock cycle, combined with reference expression (8) and expression (9), and then the high and low duration of each spread spectrum clock cycle after the second spread spectrum clock cycle is calculated according to expression (10), expression (11) and expression (12). Thus, the spread spectrum clock signal is simulated according to the obtained high and low duration. For example, if the spread spectrum clock has an incremental step of -1 ns, the first spread spectrum clock cycle is 10 ns, and the duty cycle of the first spread spectrum clock cycle is 30%, then the high and low duration of the first spread spectrum clock cycle is 3 ns and 7 ns respectively; if the duty cycle of the second spread spectrum clock cycle is 40%, then the second spread spectrum clock cycle is 9 ns, and the high and low duration of the second spread spectrum clock cycle is 3.6 ns and 5.4 ns respectively.

[0087] In some embodiments, before determining the high and low duration of the next spread spectrum clock cycle, the method further comprises:

[0088] determining whether the duty cycles of the previous and next spread spectrum clock cycles are the same;

[0089] if the duty cycles of the previous and next spread spectrum clock cycles are the same, stopping triggering the calculation of the high and low duration of the next spread spectrum clock cycle, and taking the high and low duration of the previous spread spectrum clock cycle as the high and low duration of the next spread spectrum clock cycle.

[0090] Specifically, before determining the high and low duration of the next spread spectrum clock cycle, it is necessary to determine whether the duty cycles of the previous and next spread spectrum clock cycles are the same. If the duty cycles of the previous and next spread spectrum clock cycles are the same, it can be determined that the duty cycles of the previous and next spread spectrum clock cycles are constant, so the high and low duration of the previous spread spectrum clock cycle is taken as the high and low duration of the next spread spectrum clock cycle. If the duty cycles of the previous and next spread spectrum clock cycles are not the same, then the high and low duration of the next spread spectrum clock cycle is calculated according to the duty cycle of the next spread spectrum clock cycle.

[0091] In the above embodiment, by determining whether the duty cycles of adjacent spread spectrum clock cycles are the same, redundant calculation is avoided, resource utilization is improved, and waveform continuity and stability are ensured.

[0092] In some embodiments, the modulation parameter further comprises a duration of the spread spectrum clock signal, and the method of recording the spread spectrum clock signal comprises:

[0093] When the spread spectrum clock signal is triggered, a timer is started to time, and the timing duration of the timer is the duration of the spread spectrum clock signal.

[0094] In response to receiving a notification from the timer indicating the end of timing, the simulation of the spread spectrum clock signal is terminated, wherein the timer is timed according to a reference clock signal that is different from the spread spectrum clock signal.

[0095] Specifically, based on the original modulation parameters (such as modulation period, modulation depth), the duration of the spread spectrum clock signal is added as a key parameter to record the total output duration of the simulated spread spectrum clock signal. When the spread spectrum clock signal is triggered, it is controlled by a timer, and the timing duration of the timer is consistent with the duration of the spread spectrum clock signal. For example, when the spread spectrum clock signal is triggered, a timer is started, and the timing duration is set to 100 microseconds. At this time, the spread spectrum clock signal is continuously output. When the timer timing reaches 100 microseconds, a timing end notification is sent, and the spread spectrum clock signal simulation is terminated.

[0096] In this embodiment, the timer can be timed according to a reference clock signal (different from the spread spectrum clock signal) to ensure that the timing accuracy is independent of the period change of the spread spectrum clock. For example, if the frequency of the reference clock signal is 100 MHz (corresponding to a period of 10 ns), the timer can achieve high-precision timing of the spread spectrum clock signal through the precise technology reference clock period.

[0097] In the above embodiment, the timer and the reference clock signal are used to accurately control the simulation duration of the spread spectrum clock and optimize resource utilization. The decoupling of the reference clock signal and the spread spectrum clock signal also avoids mutual interference, especially in the context of high-frequency modulation, which improves system stability.

[0098] In some embodiments, the parameter transfer function and the target program code are encapsulated as a task module, the task module is integrated in a front-end verification platform, the front-end verification platform includes a simulated test object, the task module is connected to a clock port of the test object, and the task module is used to provide a spread spectrum clock signal to the test object to test the spread spectrum clock function of the test object.

[0099] Specifically, the parameter transfer function (such as a modulation period, a modulation depth) of the spread spectrum clock signal and target program code (such as a signal generation algorithm) are encapsulated as a task module. The task module can be implemented through containerization technology (such as Docker) or a modular framework (such as a Python plug-in), and supports dynamic loading and configuration. The front-end verification platform includes a simulated test object (such as a digital circuit model, a communication protocol stack), and the task module is connected to a clock port of the test object through an interface protocol. The task module generates a spread spectrum clock signal according to preset modulation parameters, and transmits the spread spectrum clock signal to the clock port of the test object through a data channel. When the test object receives the spread spectrum clock signal, the test object collects and analyzes the spread spectrum clock signal in real time through a monitoring module of the platform, and verifies whether the spread spectrum clock function meets the design specification.

[0100] In the above embodiments, the task module supports dynamic adjustment of modulation parameters, adapts to testing requirements in multiple scenarios, and realizes generation and testing of the spread spectrum clock signal through software modular design, thereby saving integration costs. Moreover, modular encapsulation supports code reuse and rapid iteration, thereby shortening the development cycle of the testing platform.

[0101] From the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software and a general hardware platform as required, and of course, can also be implemented by hardware, but in many cases, the former is a better implementation.

[0102] Corresponding to the spread spectrum clock signal simulation method, the present application also provides a spread spectrum clock signal simulation device. For reference Figure 5 The module schematic diagram of the spread spectrum clock signal simulation device provided for some embodiments of the present application is shown in the figure. Figure 5 In some embodiments, the data storage device includes:

[0103] The parameter receiving module 501 is configured to receive modulation parameters input in a command line manner through a parameter transfer function, and the modulation parameters are used to indicate a source clock period, a modulation depth, a modulation period and a spread spectrum mode of the spread spectrum clock signal, wherein the modulation period is greater than the source clock period.

[0104] The simulation module 502 is configured to assign values to variables in the target program code based on the modulation parameters, and in a running process of the target program code, the following logic is implemented: determining a number of source clock periods included in a half modulation period according to the source clock period and the modulation period, wherein the half modulation period refers to a period in which the frequency of the spread spectrum clock signal gradually increases or gradually decreases; determining a linear variation amount and an incremental step of the spread spectrum clock period according to the spread spectrum mode, the modulation depth and the number of source clock periods; and simulating the spread spectrum clock signal according to the linear variation amount and the incremental step.

[0105] In some embodiments, the simulation module 502 is specifically configured to:

[0106] determine the high-level duration and the low-level duration of the spread spectrum clock signal in each spread spectrum clock cycle according to the linear variation amount and the incremental step;

[0107] simulate the spread spectrum clock signal according to the high-level duration and the low-level duration.

[0108] In some embodiments, the modulation parameters further include a duty cycle of the spread spectrum clock signal, and the duty cycle in each spread spectrum clock cycle is the same; and the simulation module 502 is specifically configured to:

[0109] determine the high-level duration in each spread spectrum clock cycle according to the duty cycle;

[0110] determine the low-level duration in each spread spectrum clock cycle according to the linear variation amount, the incremental step and the high-level duration.

[0111] In some embodiments, the modulation parameters further include a duty cycle of the spread spectrum clock signal, and the duty cycle in at least part of the spread spectrum clock cycles is different; and the simulation module 502 is specifically configured to:

[0112] before simulating the spread spectrum clock signal, trigger calculation of the high-level duration and the low-level duration in the first spread spectrum clock cycle according to the duty cycle of the first spread spectrum clock cycle, the linear variation amount and the incremental step;

[0113] starting from the first spread spectrum clock cycle, in the order of the spread spectrum clock cycles, in a previous spread spectrum clock cycle, trigger calculation of the high-level duration and the low-level duration in a next spread spectrum clock cycle according to the duty cycle of the next spread spectrum clock cycle, the linear variation amount and the incremental step.

[0114] In some embodiments, before determining the high-level duration and the low-level duration in the next spread spectrum clock cycle, the simulation module 502 is further configured to:

[0115] determine whether the duty cycles of the previous and next spread spectrum clock cycles are the same;

[0116] if the duty cycles of the previous and next spread spectrum clock cycles are the same, stop triggering calculation of the high-level duration and the low-level duration in the next spread spectrum clock cycle, and take the high-level duration and the low-level duration in the previous spread spectrum clock cycle as the high-level duration and the low-level duration in the next spread spectrum clock cycle.

[0117] In some embodiments, the modulation parameters further include a duration of the spread spectrum clock signal; and the simulation module 502 is further configured to:

[0118] When the spread spectrum clock signal is triggered, a timer is started to time, and the timing duration of the timer is the duration of the spread spectrum clock signal;

[0119] In response to receiving the notification representing the end of the timing sent by the timer, the simulation of the spread spectrum clock signal is stopped, wherein the timer is timed according to a reference clock signal, and the reference clock signal is different from the spread spectrum clock signal.

[0120] In some embodiments, the parameter transfer function and the target program code are encapsulated as a task module, the task module is integrated in a front-end verification platform, the front-end verification platform includes a simulated test object, and the task module is connected to a clock port of the test object to provide the spread spectrum clock signal to the test object to test the spread spectrum clock function of the test object.

[0121] The features of the embodiments of the spread spectrum clock signal simulation device can be referred to the related descriptions of the embodiments of the sample data processing method, which will not be repeated here.

[0122] In combination with the above Figure 6 The embodiments of the present application also provide an electronic device, including a memory 10 and a processor 20, the memory 10 stores a computer program, and the processor 20 is configured to run the computer program to perform the steps in any of the above data storage method embodiments.

[0123] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program, wherein the computer program is configured to perform the steps in any of the above data storage method embodiments when running.

[0124] In an example embodiment, the above computer readable storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0125] The embodiments of the present application also provide a computer program product, which includes a computer program, and the computer program is executed by a processor to implement the steps in any of the above data storage method embodiments.

[0126] The embodiments of the present application also provide another computer program product, which includes a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps in any of the above data storage method embodiments.

[0127] Those skilled in the art will further realize that the mere concepts, teachings, and embodiments described herein are merely meant to provide an enabling description of the applications and are not intended to limit the scope of the applications. Therefore, embodiments or examples described herein are not meant to be limiting, but merely to aid in the understanding of the overall more complete disclosure of the applications. Accordingly, those skilled in the art will recognize that modifications and variations of the described implementations can be made without departing from the spirit or scope of the applications. Therefore, it is intended that such modifications and variations be included within the scope of the applications.

[0128] The method, device, equipment and storage medium for simulating spread spectrum clock signal provided by the present application are described in detail above. The principles and implementation manners of the present application are described by applying specific examples in the present document. The above description of the embodiments is only for helping to understand the method of the present application and its core idea. It should be pointed out that, for those skilled in the art, some improvements and modifications can be made to the present application without departing from the principles of the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A method of spread spectrum clock signal simulation, comprising: The method comprises: receiving modulation parameters input in a command line mode through a parameter transfer function, the modulation parameters being used to indicate a source clock period of a spread spectrum clock signal, a modulation depth, a modulation period and a spread spectrum mode, wherein the modulation period is greater than the source clock period; assigning values to variables in the target program code based on the modulation parameters, and implementing the following logic during running of the target program code: determining a number of source clock periods included in a half modulation period according to the source clock period and the modulation period, wherein the half modulation period refers to a period during which the frequency of the spread spectrum clock signal gradually increases or gradually decreases; determining a linear variation amount and an incremental step of the spread spectrum clock period according to the spread spectrum mode, the modulation depth and the number of source clock periods; simulating the spread spectrum clock signal according to the linear variation amount and the incremental step.

2. The method of claim 1, wherein, The simulating the spread spectrum clock signal according to the linear variation amount and the incremental step comprises: determining a high level duration and a low level duration of the spread spectrum clock signal in each spread spectrum clock period according to the linear variation amount and the incremental step; simulating the spread spectrum clock signal according to the high level duration and the low level duration.

3. The method of claim 2, wherein, The modulation parameters further comprise a duty cycle of the spread spectrum clock signal, and the duty cycle in each spread spectrum clock period is the same; The determining the high level duration and the low level duration of the spread spectrum clock signal in each spread spectrum clock period according to the linear variation amount and the incremental step comprises: determining the high level duration in each spread spectrum clock period according to the duty cycle; determining the low level duration in each spread spectrum clock period according to the linear variation amount, the incremental step and the high level duration.

4. The method of claim 2, wherein, The modulation parameters further comprise a duty cycle of the spread spectrum clock signal, and the duty cycle in at least part of the spread spectrum clock periods is not the same; The determining the high level duration and the low level duration of the spread spectrum clock signal in each spread spectrum clock period according to the linear variation amount and the incremental step comprises: before simulating the spread spectrum clock signal, triggering calculation of the high level duration and the low level duration in a first spread spectrum clock period according to the duty cycle of the first spread spectrum clock period, the linear variation amount and the incremental step; starting from the first spread spectrum clock period, in a previous spread spectrum clock period according to the duty cycle of a next spread spectrum clock period, the linear variation amount and the incremental step, triggering calculation of the high level duration and the low level duration in the next spread spectrum clock period in a sequence of the spread spectrum clock periods.

5. The method of claim 4, wherein, Before determining the high level duration and the low level duration in the next spread spectrum clock period, the method further comprises: judging whether the duty cycles of the previous and next spread spectrum clock periods are the same; If the duty cycles of the two spread spectrum clock cycles are the same, the high and low duration of the next spread spectrum clock cycle is stopped from being calculated, and the high and low duration of the previous spread spectrum clock cycle is taken as the high and low duration of the next spread spectrum clock cycle.

6. The method of claim 1, wherein, The modulation parameters further include a duration of the spread spectrum clock signal; and the method further includes: When the spread spectrum clock signal is triggered to be simulated, a timer is started to time, and a timing duration of the timer is the duration of the spread spectrum clock signal; In response to receiving a notification representing the end of timing sent by the timer, the simulation of the spread spectrum clock signal is stopped, wherein the timer is timed according to a reference clock signal, and the reference clock signal is different from the spread spectrum clock signal.

7. The method of claim 1, wherein, The parameter transfer function and the target program code are encapsulated as a task module, the task module is integrated in a front-end verification platform, the front-end verification platform includes a simulated object under test, and the task module is connected to a clock port of the object under test to provide a spread spectrum clock signal to the object under test to test a spread spectrum clock function of the object under test.

8. A spread spectrum clock signal simulation apparatus, comprising: The device includes: A parameter receiving module configured to receive the modulation parameters input in a command line manner through a parameter transfer function, the modulation parameters being used to indicate a source clock cycle, a modulation depth, a modulation period and a spread spectrum mode of a spread spectrum clock signal, wherein the modulation period is greater than the source clock cycle; A simulation module configured to assign values to variables in the target program code based on the modulation parameters, and implement the following logic during a running process of the target program code: Determine a number of source clock cycles included in a half modulation period according to the source clock cycle and the modulation period, wherein the half modulation period refers to a period in which the frequency of the spread spectrum clock signal gradually increases or gradually decreases; Determine a linear variation amount and an incremental step of a spread spectrum clock cycle according to the spread spectrum mode, the modulation depth and the number of source clock cycles; Simulate the spread spectrum clock signal according to the linear variation amount and the incremental step.

9. An electronic device, comprising: Include: A memory configured to store a computer program; A processor configured to implement the steps of the spread spectrum clock signal simulation method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer program is stored in the computer readable storage medium, and the computer program is executed by the processor to implement the steps of the spread spectrum clock signal simulation method according to any one of claims 1 to 7.

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