Data query method and device, electronic equipment and storage medium

Abstract

The invention relates to the field of data storage, in particular to a data query method and device, electronic equipment and a storage medium, a logical block address range of each node is stored in a cache of the storage medium, and the logical block address range comprises a latest accessed logical block address. The information can reflect the distribution condition of the hot data. When a data access request arrives, the address of the target logic block can be matched with the address range of the node, so that active sensing of hot data is realized. If the target logical block address is in the address range of a node, it can be determined that the node stores target data. Finally, the target data can be directly inquired and obtained from the cache according to the matching result, and a long I / O path is not needed. The data reading efficiency and the response speed can be improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of data storage, and particularly relates to a data query method and device, electronic equipment and storage medium. BACKGROUND

[0002] At present, the upper storage system accesses the solid state disk by means of the NVMe interface of the host end, and the I / O instruction of the NVMe interface covers three parameters, namely the start logical block address (StartLBA), the number of data blocks to be transmitted (NLB), and the physical address register or the scatter-gather list (PRP / SGL). No matter whether the storage system stores data in the form of a file or a bare disk, the I / O interaction between the storage system and the solid state disk needs to be converted into a logical block address (LBA) to implement access.

[0003] The regularity of the LBA address can reflect the workload characteristics of the upper storage system. Therefore, through analysis, it is found that the data of many storage systems has the attributes of hot and cold, that is, some data is frequently accessed and used, and some data is rarely accessed or used. The data frequently accessed is called "hot data", and the data rarely accessed is called "cold data". The frequency of user access to hot data is also high. However, the solid state disk does not have a special processing mechanism for hot data access, resulting in low data reading efficiency and response speed. SUMMARY

[0004] Therefore, the embodiments of the present disclosure provide a data query method and device, electronic equipment and storage medium to solve the problem that the solid state disk does not have a special processing mechanism for hot data access, resulting in low data reading efficiency and response speed.

[0005] In a first aspect, the embodiments of the present disclosure provide a data query method, characterized in that the method comprises:

[0006] obtaining a data access request currently received by a storage medium, wherein the data access request carries a target logical block address;

[0007] reading the logical block address range stored by each node from the cache of the storage medium, wherein the cache comprises a plurality of nodes, and the logical block address range comprises at least one latest accessed logical block address;

[0008] matching the target logical block address with the logical block address range in each node to obtain a matching result;

[0009] obtaining target data according to the data query operation corresponding to the matching result, and returning the target data to the host device corresponding to the data access request.

[0010] The present disclosure stores the logical block address range of each node in the cache of the storage medium, and the logical block address range includes the latest accessed logical block address. In this way, the distribution of hot data can be reflected. When a data access request arrives, the target logical block address can be matched with the address range of the node to achieve active perception of hot data. If the target logical block address is in the address range of a certain node, it can be determined that the node stores the target data. Finally, the target data can be directly queried from the cache according to the matching result, without going through a long I / O path. The efficiency and response speed of data reading can be improved.

[0011] In a second aspect, the present disclosure provides a data query device, and the device comprises:

[0012] The acquisition module is configured to acquire a data access request currently received by the storage medium, wherein the data access request carries a target logical block address.

[0013] The reading module is configured to read the logical block address range stored by each node from the cache of the storage medium, wherein the cache comprises a plurality of nodes, and the logical block address range comprises at least one latest accessed logical block address.

[0014] The matching module is configured to match the target logical block address with the logical block address range in each node to obtain a matching result.

[0015] The processing module is configured to acquire target data according to a data query operation corresponding to the matching result, and return the target data to a host device corresponding to the data access request.

[0016] In a third aspect, the present disclosure provides an electronic device, which comprises a memory and a processor, the memory and the processor are communicatively connected, the memory stores computer instructions, and the processor executes the computer instructions to perform the method of the first aspect or any of the corresponding embodiments thereof.

[0017] In a fourth aspect, the present disclosure provides a computer readable storage medium, which stores computer instructions, and the computer instructions are used to make a computer execute the method of the first aspect or any of the corresponding embodiments thereof. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the specific embodiments of the present disclosure or the prior art, the drawings required to be used in the specific embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor.

[0019] Figure 1 is a flowchart of a data query method according to some embodiments of the present disclosure;

[0020] Figure 2 is a flowchart of a data query method according to some embodiments of the present disclosure;

[0021] Figure 3 is a schematic diagram of a cache structure in a storage medium according to some embodiments of the present disclosure;

[0022] Figure 4 is a structural block diagram of a data query device according to an embodiment of the present disclosure;

[0023] Figure 5 is a hardware structure schematic diagram of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in an optional embodiment of the present disclosure will be described clearly and completely below with reference to the drawings in the optional embodiment of the present disclosure. Obviously, the described embodiments are some of the embodiments of the present disclosure, but not all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present disclosure.

[0025] According to the embodiments of the present disclosure, a data query method, device, electronic device and storage medium are provided. It should be noted that the steps shown in the flowchart of the drawings can be executed in a computer system such as a group of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order from that shown here.

[0026] The current upper storage system accesses the solid state disk through the host end NVMe interface, and the I / O command of the NVMe interface is composed of three parameters, including StartLBA, NLB and PRP / SGL. Whether the storage system stores data in the form of a file or a bare disk, the I / O interaction with the solid state disk needs to be parsed into LBA (logical block address) for access, which is the characteristic of the block device.

[0027] Specifically, the meanings of the above three parameters are as follows:

[0028] StartLBA (SLBA): refers to the block address of the solid state disk, indicating which block in the solid state disk to start accessing.

[0029] NLB: indicates the number of data blocks that need to be accessed in the solid state disk, i.e. the data range to be accessed.

[0030] PRP / SGL: indicates the source address or destination address of the data to be accessed, i.e. the location of the data on the host side.

[0031] The regularity of the LBA address can reflect the workload characteristics of the upper layer storage system. Through analysis, the data of many storage systems has hot and cold properties, i.e. part of the data is frequently accessed (hot data), and the solid state disk does not have a special processing mechanism for these hot data, for the following reasons:

[0032] ① The solid state disk cannot actively perceive the heat of the data in the upper layer storage system, so it cannot directly identify which data is hot data and can only passively execute read operations. This results in poor processing effect of the solid state disk for hot data.

[0033] ② When processing LBA read operations, the solid state disk needs to query the L2P table to determine the storage location of the data in the NAND flash medium, then read the data from the NAND flash and transmit it to the host side. In this process, the I / O path is relatively long, increasing the time and complexity of data access. This is one of the reasons why the solid state disk responds slowly to hot data.

[0034] Therefore, due to the inability of the solid state disk to actively perceive data heat and the relatively long I / O path, its processing effect for hot data is not ideal, for example: data read efficiency.

[0035] In this embodiment, a data query method is provided, Figure 1 is a flowchart of a data query method according to an embodiment of the present disclosure, as Figure 1 shown, the flow includes the following steps:

[0036] Step S101, obtaining a data access request currently received by the storage medium, wherein the data access request carries a target logical block address.

[0037] In an optional embodiment of the present disclosure, the storage medium can be a flash memory or a flash memory grain in the flash memory. The storage medium acquires a current data access request received by the storage medium, mainly a read or write request sent by a host or other device to the storage medium. The data access request carries a target logical block address, indicating the address of a logical block where the target data of the request operation is located. The logical block address is a unit used to identify data in a logical address space, usually composed of multiple logical block address bits, each bit representing the index of a logical block. After receiving the data access request, the storage medium determines the specific data to be read according to the target logical block address in the request.

[0038] Step S102, reading the logical block address range stored by each node in the cache of the storage medium, wherein the cache includes multiple nodes, and the logical block address range includes at least one latest accessed logical block address.

[0039] Specifically, the cache of the storage medium is acquired, and each node in the cache is traversed. For each node, the logical block address range stored therein is read. The logical block address range is usually composed of at least one latest accessed logical block address. It can be a logical block address or a range of logical block addresses. The logical block address range represents the address range of the logical block occupied by the data stored in the node. These address ranges can be acquired by reading the metadata or other information in the node. For each node, the logical block address range stored therein can be recorded by a linked list.

[0040] Step S103, matching the target logical block address with the logical block address range in each node to obtain a matching result.

[0041] Specifically, the target logical block address and the logical block address range of each node are acquired. Each node is traversed. For each node, the target logical block address is compared with the logical block address range of the node. If the target logical block address is within the logical block address range of the node, it can be determined that the target logical block address matches the node. The matching result can be recorded, for example, the matching node is marked as matching successfully. The above steps are repeated by continuing to traverse other nodes until all nodes are traversed. After the traversal is completed, the matching result is obtained.

[0042] Step S104, acquiring the target data according to the data query operation corresponding to the matching result, and returning the target data to the host device corresponding to the data access request.

[0043] Specifically, the target logical block address is matched with the logical block address range of each node in the cache. If the matching result shows that there is a target node that matches successfully, the target node is moved to the first position of the cache. The target data stored in the node that matches successfully is obtained and returned to the host device. If the matching result shows that there is no node that matches successfully, the target logical block address is used to read data from the flash memory through L2P lookup. The read data is stored in the cache and placed in the first node of the cache.

[0044] The method provided by the embodiment can obtain a data access request, can learn about the access demand of the host to the storage medium in a timely manner, and can perform subsequent processing. The distribution of the data blocks stored in the current cache can be learned by reading the logical block address range in the cache, so that further matching and query operations are performed. The node where the data is located can be determined by comparing the target logical block address with the address range of each node, so that the efficiency of data query is improved. According to the matching result, the target data is obtained and returned to the host device of the corresponding data access request, so that the demand of the host for data is met.

[0045] Specifically, the cache of the storage medium stores the logical block address range of each node, including the latest accessed logical block address. These information can reflect the distribution of hot data. When a data access request arrives, the target logical block address can be matched with the address range of each node. If the target logical block address is in the address range of a node, it can be determined that the node stores the target data. According to the matching result, the target data can be directly queried and obtained from the cache without going through a long I / O path. The efficiency and response speed of data reading can be improved.

[0046] Figure 2 is a flowchart of a data query method according to an embodiment of the present disclosure, as shown in Figure 1 The flowchart includes the following steps:

[0047] In step S201, a data access request currently received by a storage medium is obtained, wherein the data access request carries a target logical block address. For details, refer to step S101 in the above embodiment, which will not be described here in detail.

[0048] In step S202, the logical block address range stored by each node in the cache of the storage medium is read, wherein the cache includes a plurality of nodes, and the logical block address range includes at least one latest accessed logical block address. For details, refer to step S102 in the above embodiment, which will not be described here in detail.

[0049] Step S203, the target logical block address is matched with the logical block address range in each node to obtain a matching result. For details, refer to step S103 in the above embodiment, which will not be described in detail here.

[0050] Step S204, the target data is obtained according to the matching result corresponding to the data query operation, and the target data is returned to the host device corresponding to the data access request.

[0051] In an optional embodiment of the present disclosure, the target data is obtained according to the matching result corresponding to the data query operation, including the following steps a1-a3:

[0052] Step a1, if the matching result is that there is a target logical block address range matching the target logical block address, the node corresponding to the target logical block address range is set as the first node.

[0053] If the matching result is that there is a target logical block address range matching the target logical block address. According to the target logical block address range, the corresponding node is found. This node is set as the first node.

[0054] Step a2, the first node is moved to the starting position of the cache as the head node of the cache, and it is inquired from the first node whether there is target data corresponding to the target logical block address.

[0055] The first node is moved from the current position to the starting position of the cache. It can be realized by adjusting the position of the node in the cache, for example, when using a linked list or array structure, the first node can be moved to the head of the linked list or the starting position of the array. It is inquired from the first node whether there is target data corresponding to the target logical block address. First, according to the target logical block address, the logical block address range stored in the first node is found. It is checked whether the target logical block address is within the range. If the target logical block address is within the range, it indicates that there is target data. The target data stored in the node can be further read.

[0056] Step a3, if the first node has target data corresponding to the target logical block address, the target data is read from the first node.

[0057] For example, assume there is a data structure comprising the following nodes: Node 1: logical block address range 1-10, data: Data1 Node 2: logical block address range 11-20, data: Data2 Node 3: logical block address range 21-30, data: Data3 Now we want to find the node of logical block address 15 and read the corresponding target data. According to the description in the above example, the following steps are taken: first, take Node 2 (logical block address range 11-20) as the first node, because the logical block address range of this node contains the target logical block address 15. Move the first node to the starting position of the cache as the head node of the cache. Query from the first node to check whether there is target data of logical block address 15. In the first node, the target data of logical block address 15 is found. 5. The target data can be read from the first node, that is, Data2.

[0058] In an optional embodiment of the present disclosure, the method further comprises: if the target data corresponding to the target logical block address does not exist in the first node, obtaining the target data from the data buffer using the pointer of the first node, wherein the target data is read from the flash memory using the target logical block address and stored in the data buffer.

[0059] Specifically, the target data is read from the flash memory according to the target logical block address and stored in the data buffer. As shown in the storage medium, a data buffer is provided for storing the target data read from the flash memory. In the first node, a pointer pointing to the data buffer is found. Using the pointer of the first node, the target data is obtained from the data buffer. Figure 3

[0060] In short, first read the target data from the flash memory and store it in the data buffer, and then use the pointer of the first node to obtain the target data from the data buffer. Here is an example: assume that the target logical block address is address A, the corresponding storage location in the flash memory is location X, and the read target data is stored in the data buffer at location Y. Read the target data corresponding to address A from the flash memory and store it in the data buffer at location Y. Find the pointer pointing to the data buffer in the first node, pointing to location Y. Using the pointer of the first node, obtain the target data from the data buffer at location Y.

[0061] In an optional embodiment of the present disclosure, the target data is obtained according to the matching result of the data query operation, comprising the following steps b1-b3:

[0062] Step b1, if the matching result is that there is no target logical block address range matching the target logical block address, determine the target physical address corresponding to the logical block address based on the mapping relationship between the logical block address and the physical address.

[0063] ​When the matching result is that there is no target logical block address range matching the target logical block address, we need to determine the target physical address corresponding to the logical block address through the mapping relationship between the logical block address and the physical address. In this case, a mapping table or a mapping function can be used to store the corresponding relationship between the logical block address and the physical address. This mapping table or mapping function can be determined by some algorithm or configuration. Suppose there is a mapping table as follows: logical block address: address 1 - physical address: address A, logical block address: address 2 - physical address: address B, logical block address: address 3 - physical address: address C. Now we want to determine the target physical address of the logical block address 2. First, find the entry of the logical block address 2 in the mapping table. In the table, the target physical address of the logical block address 2 is found to be address B. Therefore, according to the above steps, it is determined that the target physical address corresponding to the logical block address 2 is address B.

[0064] Step b2, reading the target data from the flash memory using the target physical address and storing the target data to the data buffer.

[0065] First, determine the location of the target data stored in the flash memory according to the target physical address. Use the flash read operation to read the target data from the flash memory. Then store the target data to the data buffer. In short, find the location of the target data stored in the flash memory according to the target physical address, then read the target data from the flash memory and store it to the data buffer. For example: suppose the target physical address is address B, and the corresponding storage location in the flash memory is location X. Determine that the flash memory storage location corresponding to the target physical address address B is location X. Use the flash read operation to read the target data from location X. Store the read target data to the data buffer.

[0066] Step b3, determine the second node from the cache and use the pointer of the second node to obtain the target data from the data buffer.

[0067] In an optional embodiment of the present disclosure, determining the second node from the cache comprises: obtaining the number of used nodes in the cache; determining whether the number of used nodes reaches a preset node number; if the number of used nodes does not reach the preset node number, moving the data stored in each node in the cache in turn to the rear to obtain a first node in an idle state, and taking the first node in the idle state as the second node.

[0068] Specifically, the number of used nodes in the cache is calculated. The number of used nodes is compared with the preset number of nodes to determine whether the preset number of nodes is reached. If the number of used nodes does not reach the preset number of nodes, the data stored in each node in the cache is moved backward in turn, i.e., the data of node i is copied to the position of node i+1. Finally, the first node in the idle state (the original first node) is obtained, and the data of the node is empty. The idle node is used as the second node.

[0069] In short, first, the number of used nodes in the cache is obtained, and then it is determined whether the preset number of nodes is reached. If the preset number of nodes is not reached, the data stored in each node in the cache is moved backward in turn to obtain the first node in the idle state, and the node is used as the second node. The following is an example: assuming that the preset number of nodes is 5, and the number of used nodes in the current cache is 3, nodes 1, 2, and 3 are used. It is determined whether a new node needs to be added: the number of used nodes in the cache is obtained: the number of used nodes is 3. It is determined whether the number of used nodes reaches the preset number of nodes: the number of used nodes is 3, and the preset number of nodes is 5. Therefore, the number of used nodes does not reach the preset number of nodes. The data stored in each node in the cache is moved backward in turn: the data of node 3 is copied to the position of node 4. The data of node 2 is copied to the position of node 3. The data of node 1 is copied to the position of node 2. Finally, the first node in the idle state (the original first node (the position of node 1)) is obtained, and the data of the node is empty at this time. The idle node is used as the second node.

[0070] The embodiment determines the target physical address based on the mapping relationship between the logical block address and the physical address, directly reads data from the flash memory to the data buffer, and then obtains the data through the node in the cache, which can improve the efficiency of data access. Unnecessary intermediate steps and data copying are avoided, and the overhead of data transmission is reduced. At the same time, the target data in the data buffer is stored in the cache, and the data is obtained through the pointer of the node, which can reduce frequent access and update of the cache. By reading the target data from the flash memory only when needed and storing it in the data buffer, the storage space can be used more efficiently. This on-demand reading and caching method can avoid unnecessary data loading and save storage resources.

[0071] In an optional embodiment of the present disclosure, the method further comprises: if the number of used nodes reaches the preset number of nodes, emptying the data stored in the last node in the cache, and moving the data stored in the other nodes in the cache backward in turn to obtain the first node in the idle state, and using the first node in the idle state as the second node.

[0072] Specifically, the data of the last node is emptied or reset to the initial state. The data stored in the nodes other than the last node in the cache is moved backward in turn: starting from the previous node, the data of node i is copied to the position of node i+1. In reverse order, the data of node i-1 is copied to the position of node i until the first node is moved. Finally, since the data of the last node has been emptied, the second last node is now in the idle state. The node is taken as the first node in the idle state. The first node in the idle state is taken as the second node. In short, if the number of used nodes reaches the preset number of nodes, the data of the last node is emptied, and the data stored in the nodes other than the last node is moved backward in turn, and finally the first node in the idle state is obtained and taken as the second node.

[0073] The following is an example: assuming that the preset number of nodes is 5, and the number of used nodes in the current cache is 5, node 1, node 2, node 3, node 4 and node 5 have been used. To determine whether a new node needs to be added: empty the data of the last node in the cache: the data of node 5 is emptied. The data stored in the nodes other than the last node in the cache is moved backward in turn: the data of node 4 is copied to the position of node 5. The data of node 3 is copied to the position of node 4. The data of node 2 is copied to the position of node 3. The data of node 1 is copied to the position of node 2. The first node in the idle state is obtained: since the data of the last node has been emptied, node 1 is now in the idle state. The first node in the idle state is taken as the second node.

[0074] In an optional embodiment of the present disclosure, the method further comprises: obtaining the data change of each node in the cache; and updating the logical block address range stored by the node using the data change.

[0075] The data change of each node in the cache can be obtained by the following steps: first, a data version number (or referred to as a data change identifier) needs to be maintained on each node. The data version number can be an incremental integer or a timestamp indicating the update of the data. When a data update operation occurs, the cache node updates the corresponding data and the corresponding data version number. Periodically or as needed, a query request can be sent to the node to obtain the data version number of each node. After the node returns the data version number, the data version number of each node can be compared with the previously obtained version number to determine whether the data has changed. The logical block address range stored by the node can be updated according to the data change, in the following manner: when the data update causes the logical block address range stored by the node to change, the node can send a notification message to other nodes to inform them of the data change. After receiving the notification message, other nodes can update the logical block address range stored by themselves according to the data change. The way to update the logical block address range can be determined according to the specific system design, for example, by reallocating the logical block address or adjusting the data backup strategy.

[0076] The embodiment also provides a data query device for implementing the above-mentioned embodiments and preferred embodiments, which has been described above. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware or a combination of software and hardware is also possible and is contemplated.

[0077] The embodiment provides a data query device, as shown in Figure 4 The device comprises:

[0078] The obtaining module 41 is configured to obtain a data access request currently received by the storage medium, wherein the data access request carries a target logical block address.

[0079] The reading module 42 is configured to read the logical block address range stored by each node from the cache of the storage medium, wherein the cache comprises a plurality of nodes, and the logical block address range comprises at least one latest accessed logical block address.

[0080] The matching module 43 is configured to match the target logical block address with the logical block address range in each node to obtain a matching result.

[0081] The processing module 44 is configured to obtain target data for a data query operation according to the matching result, and return the target data to a host device corresponding to the data access request.

[0082] In an optional embodiment of the present disclosure, the processing module 44 is configured to, if the matching result is that there is a target logical block address range matching the target logical block address, take a node corresponding to the target logical block address range as a first node, move the first node to a start position of the cache as a head node of the cache, and query whether there is target data corresponding to the target logical block address from the first node; and if there is target data corresponding to the target logical block address in the first node, read the target data from the first node.

[0083] In an optional embodiment of the present disclosure, the device further comprises:

[0084] If there is no target data corresponding to the target logical block address in the first node, the target data is obtained from the data buffer by using a pointer of the first node, wherein the target data is read from the flash memory by using the target logical block address and then stored in the data buffer.

[0085] In an optional embodiment of the present disclosure, the processing module 44 comprises:

[0086] The determining unit is configured to, if the matching result is that there is no target logical block address range matching the target logical block address, determine a target physical address corresponding to the logical block address based on a mapping relationship between the logical block address and the physical address.

[0087] The reading unit is configured to read target data from the flash memory by using the target physical address and store the target data in the data buffer.

[0088] The processing unit is configured to determine a second node from the cache and obtain the target data from the data buffer by using a pointer of the second node.

[0089] In an optional embodiment of the present disclosure, the processing unit is configured to obtain a number of used nodes in the cache, determine whether the number of used nodes reaches a preset number of nodes, if the number of used nodes does not reach the preset number of nodes, move data stored in each node in the cache to the rear in sequence to obtain a head node in an idle state, and take the head node in the idle state as the second node.

[0090] In an optional embodiment of the present disclosure, the processing unit is further configured to, if the number of used nodes reaches the preset number of nodes, empty data stored in a last node in the cache, move data stored in each node in the cache to the rear in sequence except the last node to obtain a head node in an idle state, and take the head node in the idle state as the second node.

[0091] In an optional embodiment of the present disclosure, the device further comprises an updating module configured to obtain a data change condition of each node in the cache, and update a logical block address range stored in the node by using the data change condition.

[0092] Referring to Figure 5 , Figure 5 is a structural schematic diagram of an electronic device provided by an optional embodiment of the present disclosure, as Figure 5 shown, the electronic device includes one or more processors 10, a memory 20, and an interface for connecting various components, including a high-speed interface and a low-speed interface. Various components are communicatively connected to each other by different buses, and can be mounted on a common mainboard or in other ways as needed. The processor can process instructions executed within the electronic device, including instructions stored in the memory or on the memory to display graphical information of a GUI on an external input / output device, such as a display device coupled to the interface. In some optional embodiments, multiple processors and / or buses can be used with multiple memories and multiple memory, if necessary. Also, multiple electronic devices can be connected, each providing part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system).

[0093] The processor 10 can be a central processor, a network processor, or a combination thereof. The processor 10 can further include a hardware chip. The hardware chip can be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device can be a complex programmable logic device, a field programmable logic gate array, a generic array logic, or any combination thereof.

[0094] The memory 20 stores instructions executable by the at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0095] The memory 20 can include a program storage area and a data storage area. The program storage area can store an operating system and application programs required by at least one function; the data storage area can store data created by use of the electronic device according to the display of a small program landing page, and the like. In addition, the memory 20 can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some optional embodiments, the memory 20 can optionally include a memory disposed remotely with respect to the processor 10, and these remote memories can be connected to the electronic device through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0096] The memory 20 can include a volatile memory, such as a random access memory; the memory can also include a non-volatile memory, such as a flash memory, a hard disk, or a solid state disk; the memory 20 can also include a combination of the above types of memories.

[0097] The electronic device also includes a communication interface 30 for the electronic device to communicate with other devices or communication networks.

[0098] The embodiments of the present disclosure further provide a computer readable storage medium, the method according to the embodiments of the present disclosure can be implemented in hardware, firmware, or be implemented as computer code recorded in a storage medium, or be implemented through network downloading and originally stored in a remote storage medium or a non-transitory machine readable storage medium and to be stored in a local storage medium, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor or programmable or special purpose hardware. Wherein, the storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk or a solid state disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that the computer, processor, microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, processor or hardware, the method shown in the above embodiments is implemented.

[0099] Although the embodiments of the present disclosure are described in conjunction with the accompanying drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present disclosure, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A data query method, characterized by, The method comprises: acquiring a data access request currently received by a storage medium, wherein the data access request carries a target logical block address; reading a logical block address range stored by each node from a cache of the storage medium, wherein the cache comprises a plurality of nodes, and the logical block address range comprises at least one latest accessed logical block address; matching the target logical block address with the logical block address range in each node to obtain a matching result; acquiring target data according to a data query operation corresponding to the matching result, and returning the target data to a host device corresponding to the data access request.

2. The method of claim 1, wherein, The acquiring of the target data according to the data query operation corresponding to the matching result comprises: if the matching result is that there is a target logical block address range matching the target logical block address, taking the node corresponding to the target logical block address range as a first node; moving the first node to a starting position of the cache as a head node of the cache, and querying whether there is target data corresponding to the target logical block address from the first node; if there is target data corresponding to the target logical block address in the first node, reading the target data from the first node.

3. The method of claim 2, wherein, The method further comprises: if there is no target data corresponding to the target logical block address in the first node, acquiring the target data from a data buffer area by using a pointer of the first node, wherein the target data is read from a flash memory by using the target logical block address and then stored in the data buffer area.

4. The method of claim 1, wherein, The acquiring of the target data according to the data query operation corresponding to the matching result comprises: if the matching result is that there is no target logical block address range matching the target logical block address, determining a target physical address corresponding to the logical block address based on a mapping relationship between the logical block address and a physical address; reading the target data from a flash memory by using the target physical address, and storing the target data in a data buffer area; determining a second node from the cache, and acquiring the target data from the data buffer area by using a pointer of the second node.

5. The method of claim 4, wherein, The determining of the second node from the cache comprises: acquiring a number of used nodes in the cache; determining whether the number of used nodes reaches a preset number of nodes; if the number of used nodes does not reach the preset number of nodes, moving data stored by each node in the cache backward in turn to obtain a head node in an idle state, and taking the head node in the idle state as the second node.

6. The method of claim 5, wherein, The method further comprises: if the number of used nodes reaches the preset number of nodes, emptying data stored by a last node in the cache, moving data stored by other nodes in the cache backward in turn to obtain a head node in an idle state, and taking the head node in the idle state as the second node.

7. The method of claim 1, wherein, The method further comprises: acquiring a data change condition of each node in the cache; updating the logical block address range stored by the node by using the data change condition.

8. A data query apparatus, characterized by comprising: The device comprises: An acquisition module is configured to acquire a data access request currently received by a storage medium, wherein the data access request carries a target logical block address; A reading module is configured to read a logical block address range stored by each node from a cache of the storage medium, wherein the cache includes a plurality of nodes, and the logical block address range includes at least one latest accessed logical block address; A matching module is configured to match the target logical block address with the logical block address range in each node to obtain a matching result; A processing module is configured to acquire target data according to a data query operation corresponding to the matching result, and return the target data to a host device corresponding to the data access request.

9. An electronic device, comprising: The method comprises the following steps: A memory and a processor are in communication connection with each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the method in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions, and the computer instructions are used to make a computer execute the method in any one of claims 1 to 7.

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