A two-wire cascaded LED driving circuit and a communication method thereof

Abstract

The application provides a double-line cascaded LED driving circuit and a communication method thereof, which adopts two lines, namely a clock line and a data line, and realizes data communication and connection between LED drivers through a two-line input and two-line output communication mode; meanwhile, the LED driver obtains a forwarding identifier in input data through a data cascaded circuit arranged in the LED driver, and takes the clock signal and the data corresponding to the forwarding identifier as input driving data of a next-stage LED driver based on the forwarding identifier, so that the LED driver of the whole driving unit only needs to drive one LED driver, high-speed data transmission can be realized, and the wiring mode and hardware wiring difficulty between a controller and the LED driver and between the LED drivers are simplified.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a two-wire cascaded LED driving circuit and its communication method. Background Technology

[0002] In display systems, drivers are often arranged in a cascaded manner. A dedicated cascaded communication interface is required between the controller and the drivers, as well as between the drivers themselves, to enable the controller to control all drivers in the cascaded system and to issue commands such as address allocation, register configuration, register information readback, status information readback, display data configuration, and display data synchronization.

[0003] Commonly used general-purpose communication interfaces include I2C, SPI, and UART, as well as related proprietary interfaces evolved from these general-purpose interfaces. The I2C interface consists of two lines, SDA and SCL. Its advantages are simple circuitry and the ability for one controller to connect to multiple devices. Its disadvantages are slow speed and high controller resource consumption. The SPI interface consists of four lines: SCK / CS / MISO / MOSI. Its advantage is high speed, but it requires more control pins from the controller. There is also a single-wire return-to-zero (RZ) code interface protocol, which uses a single-input, single-output method. Its advantage is that single-wire communication consumes fewer controller pins. Its disadvantages are that it typically relies on a high-speed clock inside the driver chip for sampling and decoding, requiring a certain level of internal clock frequency and accuracy. Furthermore, its transmission rate is generally only a few hundred kHz, which cannot meet the real-time transmission of large amounts of data from multiple driver chips.

[0004] Therefore, a low-cost, high-efficiency, high-reliability, and high-stability cascaded communication method is particularly important in display systems. Summary of the Invention

[0005] In order to overcome the shortcomings of the prior art, the present invention provides a dual-wire cascaded LED driving circuit and its communication method.

[0006] To achieve the above objectives, the present invention provides a dual-line cascaded LED driving circuit, comprising at least one driving unit, each driving unit comprising multiple cascaded LED drivers, each LED driver having a clock signal terminal and a data terminal for corresponding connection with adjacent LED drivers; each LED driver includes: a data cascade circuit for acquiring a forwarding identifier in the input data, and forwarding the clock signal and the data corresponding to the forwarding identifier to the next-level LED driver through the clock signal terminal and the data terminal of the output terminal based on the forwarding identifier; the data corresponding to the forwarding identifier is one or a combination of parsed DI data or the status information of the current-level LED driver.

[0007] Preferably, the LED driver further includes: a data decoding circuit for acquiring clock signals and parsing data to obtain forwarding identifiers, an LED control circuit, and an LED driving unit for driving LED lights, connected in sequence; the current stage data cascading circuit is connected to the data decoding circuit in the next stage LED driving circuit.

[0008] Preferably, the LED driving circuit further includes: a controller connected to each driving unit, and a driving enhancement buffer circuit is provided between the controller and the driving unit. After the driving enhancement buffer circuit is connected to a clock signal terminal of the controller, it outputs a driving clock consistent with the received clock signal to the clock signal terminal of each driving unit to drive the first-stage LED driver in each driving unit; the data terminal of each driving unit is connected to the controller.

[0009] Preferably, the clock signal terminal of each drive unit is connected to the controller.

[0010] This invention also provides a communication method applicable to multiple cascaded LED drivers, the specific steps of which include:

[0011] The primary LED driver acquires the driving clock and driving data and decodes them;

[0012] The data cascade circuit generates the current LED driver's status information based on the decoded clock signal and data, and obtains the forwarding identifier from the decoded data; the first-stage driver outputs the driving clock signal and the data corresponding to the forwarding identifier to the subsequent LED driver through a two-wire output method; the data corresponding to the forwarding identifier is one or a combination of the parsed DI data or the status information of the current LED driver.

[0013] The data cascading circuit in the subsequent LED driver transmits the current stage's drive clock signal and data sequentially to the subsequent stage based on the clock signal and data of the preceding LED driver.

[0014] Preferably, when each LED driver performs data decoding, it acquires driving data at the rising or falling edge of the input clock signal and transmits data at the falling or rising edge of the input clock; or, after receiving the data, it delays the clock signal by a certain amount and outputs the acquired data at the falling or rising edge of the delayed clock signal; wherein, the delayed clock is 1 to 8 CKI clocks.

[0015] Preferably, the data structure includes: a start frame, a frame header, a chip ID, an address field, a data length, a data segment, and an end frame; the address field is used to define the register address inside the driver chip, and the lengths of the start frame and the end frame are integer multiples of a set length.

[0016] Preferably, the driving data structure also includes: a status return identifier.

[0017] When any LED driver is specified, a status return flag is added to its input data; after receiving the data, the corresponding LED driver parses it to obtain the serial number and address of the specified LED driver, and sends the current LED driver's internal status information to the next level LED driver;

[0018] When controlling all cascaded LED drivers, the system obtains the corresponding status information instructions and sequentially sends the status information of each LED driver at the specified location.

[0019] Preferably, the status information inside the LED driver includes: power supply voltage undervoltage status information, temperature overtemperature status information, temperature alarm status information, output voltage high warning status information, output voltage low warning status information, output open circuit status information, output short circuit status information, and reserved fields.

[0020] The present invention provides a dual-wire cascaded LED driving circuit and its communication method, the advantages of which are:

[0021] 1. This invention employs two clock lines (CLK) and data lines (DATA) to achieve data communication between LED drivers through a two-line input and two-line output communication method. That is, each LED driver is equipped with a clock signal terminal and a data terminal for connection to adjacent LED drivers. This cascaded interface structure allows the driver chip of the entire driving unit to drive only one LED driver. Due to the low line load, high-speed data transmission can be achieved. Furthermore, the wiring between LED drivers is simple, and hardware routing is easy.

[0022] 2. The LED driver generates status information after receiving driving data. Each LED driver has a data cascading circuit. The data cascading circuit can obtain the forwarding identifier in the input data and use the clock signal and the data corresponding to the forwarding identifier as the input driving data of the next-level LED driver to drive the next-level LED driver. In this way, the present invention only needs to provide the clock signal and the corresponding driving data to the first-level LED driver. The driving data and driving signals of the subsequent LED drivers are provided by the previous-level LED driver, which can achieve low-cost connection and ensure the reliability and stability of driving the LED drivers. Attached Figure Description

[0023] Figure 1 The internal circuit block diagram of the dual-line cascaded LED driver circuit provided by the present invention;

[0024] Figure 2A schematic diagram showing the connection between the controller and the driver in the dual-line cascaded LED driving circuit provided by the present invention;

[0025] Figure 3 This is a schematic diagram illustrating the connection application of a two-wire cascaded controller and driver (M-string, clock independent);

[0026] Figure 4 This is a schematic diagram illustrating the connection application of a single-line cascaded controller and driver.

[0027] Figure 5 This is a schematic diagram illustrating the connection between a two-wire cascaded controller and a driver (M-string, clock multiplexing).

[0028] Figure 6 This is a timing diagram for the communication of a two-wire cascaded interface;

[0029] Figure 7 This is a diagram of the communication frame structure for a two-line cascaded interface.

[0030] Figure 8 Timing diagram returned for selecting the first-stage LED driver state;

[0031] Figure 9 Timing diagram returned for selecting the second-stage LED driver state;

[0032] Figure 10 Return a timing diagram for the status of all cascaded LED drivers;

[0033] Figure 11 This is a diagram showing the merged return of all driver states when there are all cascaded LED drivers.

[0034] Figure 12 A schematic diagram defining the internal state information of the LED driver. Detailed Implementation

[0035] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0036] like Figure 1 , 2As shown, the present invention provides a dual-line cascaded LED driver circuit, comprising: at least one driver unit, each driver unit including multiple cascaded LED drivers, each LED driver having a clock signal terminal and a data terminal for corresponding connection with adjacent LED drivers; each LED driver including: a data cascade circuit for acquiring a forwarding identifier in the input data, and forwarding the clock signal and the data corresponding to the forwarding identifier to the next-level LED driver through the clock signal terminal and the data terminal of the output terminal based on the forwarding identifier; the data corresponding to the forwarding identifier is one or a combination of parsed DI data or the status information of the current-level LED driver.

[0037] Specifically, this invention employs two clock lines (CLK) and data lines (DATA) to achieve data communication between LED drivers through a two-line input and two-line output communication method. Each LED driver has a clock signal terminal and a data terminal connected to the adjacent LED driver. This cascaded interface structure allows the driver chip of the entire driving unit to drive only one LED driver. Due to the low line load, high-speed data transmission can be achieved. Furthermore, the wiring between LED drivers is simple, and hardware routing is easy. In addition, each LED driver internally generates status information after receiving driving data. The data cascade circuit within each LED driver can obtain the forwarding identifier in the input data and use the clock signal and the corresponding data as the input driving data for the next-level LED driver based on the forwarding identifier. This enables the driving of the next-level LED driver. In this way, this invention only needs to provide the clock signal and corresponding driving data to the first-level LED driver. The driving data and driving signals for subsequent LED drivers are provided by the previous-level LED driver, achieving both low-cost connection and reliable and stable LED driver driving. The data corresponding to the forwarding identifier includes: the parsed DI data and / or the status information of the current LED driver. The forwarding data is determined by the parsed forwarding identifier.

[0038] In this embodiment, the LED driver further includes: a data decoding circuit for acquiring clock signals and parsing data to obtain forwarding identifiers, an LED control circuit, and an LED driving unit for driving LED lights, connected in sequence; the current stage data cascading circuit is connected to the data decoding circuit in the next stage LED driving circuit.

[0039] Specifically, the LED driver internally receives corresponding clock signals and drive data via a dual-wire input clock (CKI) and data (DI). The drive data is decoded by a data decoding circuit to obtain the specific control logic within the drive data, and this decoded logic is input to the LED control circuit. Based on the received control logic, the LED control circuit outputs corresponding control signals to the LED driver unit, ultimately controlling the LED driver circuit through a switch to achieve driving operation. A data cascade circuit is located at the output of the data decoding circuit. Based on the decoded data and / or the current internal state information of the LED driver (including internal undervoltage, overvoltage, overtemperature, etc.), the data cascade circuit transmits this information through its output data port DO to the subsequent data decoding circuit, thereby driving each LED driver. During decoding, the data decoding circuit receives serial DI data and converts it into parallel data such as... Figure 6 The frame format data shown is used to control the LED driver by defining different frame header fields.

[0040] The LED driving circuit also includes: a controller connected to each driving unit, with the clock signal terminal of each driving unit connected to the controller. A driving enhancement buffer circuit is also provided between the controller and the driving unit. After the driving enhancement buffer circuit is connected to a clock signal terminal of the controller, it outputs a driving clock consistent with the received clock signal to the clock signal terminal of each driving unit to drive the primary LED driver in each driving unit; the data terminal of each driving unit is connected to the controller.

[0041] Specifically, one controller can control multiple drive units simultaneously, such as Figure 3 As shown in the illustration, in one embodiment of the present invention, the clock line (CLK) and data line (DATA) of each driver unit are connected to a controller. The corresponding controller needs to provide at least 2*M I / O resources to control all driver chips. Figure 4 The diagram illustrates a common single-wire cascaded controller and driver connection application. This doubles the controller's I / O resources, and the LED driver and controller are connected via a two-wire connection, simplifying wiring and reducing complexity. The invention also provides another embodiment, which differs from the previous one in that it shares the clock for all driver units, such as... Figure 5As shown, a drive enhancement buffer circuit is configured to enhance the load driving capability, and the driving capability can be selected according to the actual application. The drive enhancement buffer circuit amplifies the input clock signal, ensuring that each output clock is equal to the input clock, thus avoiding clock delay. Therefore, the clock signal output by the drive enhancement buffer circuit only needs to satisfy the first-stage driver of each driving unit; subsequent LED drivers are provided by the internal circuitry of the first-stage LED driver. In this embodiment, the corresponding controller needs to provide at least M+1 IO resources to control all driver chips, achieving resources comparable to a single-wire cascade protocol while simultaneously providing a more efficient, reliable, and stable data transmission protocol.

[0042] Based on the above-described cascaded dual-wire LED driving circuit, the present invention also provides a communication method, the specific steps of which include:

[0043] The primary LED driver acquires the driving clock and driving data and decodes them;

[0044] The data cascade circuit generates the current LED driver's status information based on the decoded clock signal and data, and obtains the forwarding identifier from the decoded data; the first-stage driver outputs the driving clock signal and the data corresponding to the forwarding identifier to the subsequent LED driver through a two-wire output method; the data corresponding to the forwarding identifier is one or a combination of the parsed DI data or the status information of the current LED driver.

[0045] The data cascading circuit in the subsequent LED driver transmits the current stage's drive clock signal and data sequentially to the subsequent stage based on the clock signal and data of the preceding LED driver.

[0046] like Figure 6 The diagram shows the communication timing of a two-wire interface. During data decoding, each LED driver stage acquires drive data at the rising or falling edge of the input clock signal and transmits data at the falling or rising edge of the input clock signal; alternatively, after receiving data, it delays the clock signal and outputs the acquired data at the falling or rising edge of the delayed clock signal. The delay clock is 1 to 8 CKI clock cycles.

[0047] Specifically, the timing of data acquisition by the data decoding circuit corresponds to the timing of data transmission by the external controller. That is, if the external controller (MCU) sends data DI on the falling edge of the input clock CKI, the LED driver needs to sample and capture the data of DI on the rising edge of the input clock CKI to ensure data reliability. Conversely, if the external controller (MCU) sends data DI on the rising edge of the input clock CKI, the LED driver needs to sample and capture the data of DI on the falling edge of the input clock CKI to ensure data reliability.

[0048] In this embodiment, the data frame length is in bytes (8 bits). The data cascading circuit automatically forwards the received DI data and / or internal status flags that need to be forwarded. Taking the fastest data cascading transmission method as an example, the data cascading circuit module inside each LED driver samples the data at the rising edge of the CKI input at the falling edge of the clock CKI input and outputs it to the next stage chip through data DO. Taking the slowest data cascading method as an example, the data decoding circuit inside each LED driver needs to receive 8 bits of data and then output the received 8 bits of data sequentially to the next stage LED driver through data DO at the falling edges of the next 8 clock CKI inputs. Therefore, for each LED driver, the delay range of its CKO and DO outputs relative to the CKI and DI inputs can be selected from 1 to 8 CKI clock cycles. At the same time, this method of sampling data at the rising edge of CKI and sending data at the falling edge of CKI (conversely, sampling data at the falling edge of CKI and sending data at the rising edge of CKI) can ensure that the data of the next stage chip has been established and maintained before the arrival of its CKI rising edge, ensuring the correctness of data sampling.

[0049] In this embodiment, the data structure includes: a start frame, a frame header, a chip ID, an address field, a data length, a data segment, and an end frame; the address field is used to define the register address inside the driver chip, and the lengths of the start frame and the end frame are integer multiples of a set length.

[0050] like Figure 7As shown, the specific command data structure of this invention consists of: a start frame, a frame header, a chip ID, an address field, a data length, a data segment, and an end frame. The start and end frame lengths are integer multiples of 8 bits. The start and end frames can be defined with the same fields or different fields. The frame header field is used to define different command types, such as register read / write operation instructions. The chip ID field is used to define the ID address of each driver chip, or a broadcast ID (an ID address that all chips will match). The address field is used to define the register address inside the driver chip. The data length field is used to define the number of bytes of data to be written, typically used for writing to consecutive address registers inside the driver. The data segment is used to define the data content.

[0051] In this embodiment, the driving data structure also includes: a status return flag. When any LED driver is specified to drive, a status return flag is added to its input data. After receiving the data, the corresponding LED driver parses and obtains the serial number and specified address of the specified LED driver, and sends the status information inside the current LED driver to the next level LED driver. When controlling all cascaded LED drivers to drive, the corresponding status information instruction is obtained, and the status information inside each level LED driver is sent sequentially at the specified position.

[0052] Specifically, such as Figure 8 , 9 The diagram shows the timing sequence for the selected LED driver's status return. When any LED driver is selected, frame header 1 is defined as a command to access the status information of the selected LED driver. After receiving frame header 1, the LED driver parses it to obtain the serial number and address of the selected LED driver, and then sends the current status information of the LED driver in the next frame window. For example... Figure 10 As shown, when controlling all LED drivers to work, frame header 2 is defined as the instruction to access the status information of all cascaded drivers. After receiving frame header 2, the LED driver sequentially sends the status information inside each LED driver at the specified position.

[0053] The status return identifiers mentioned above only return the status information generated at each level. In another embodiment, the return identifiers of the previous level and the current level can be merged into a final return identifier, i.e., as shown above. Figure 11 As shown, when driving the second level, the status return identifier of the first level is JK. When driving the third level, the status return identifiers in its input data include JK and PQ. When driving the fourth level, the status return identifiers in its input include JK, PQ, and MN, and so on.

[0054] like Figure 12As shown, the internal state information of the LED driver is defined as follows, and the specific description is shown in Table 1:

[0055]

[0056] Table 1

[0057] Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort should fall within the scope of protection of the present invention.

Claims

1. A communication method for a two-wire cascaded LED driver circuit, applied to multiple cascaded LED drivers, wherein each LED driver is provided with a clock signal terminal and a data terminal for corresponding connection with adjacent LED drivers; each LED driver includes: A data cascade circuit is used to acquire a forwarding identifier from the input data, and based on the forwarding identifier, forward the clock signal and the data corresponding to the forwarding identifier to the next-stage LED driver through the clock signal terminal and data terminal of the output terminal; the data corresponding to the forwarding identifier is one or a combination of parsed DI data or the status information of the current-stage LED driver; characterized in that the specific steps include: The primary LED driver acquires the driving clock and driving data and decodes them; The data cascade circuit generates the current LED driver's status information based on the decoded clock signal and data, and obtains the forwarding identifier from the decoded data; the first-stage driver outputs the driving clock signal and the data corresponding to the forwarding identifier to the subsequent LED driver through a two-wire output method; the data corresponding to the forwarding identifier is one or a combination of the parsed DI data or the status information of the current LED driver. The data cascading circuit in the subsequent LED driver transmits the current stage's drive clock signal and data sequentially to the subsequent stage based on the clock signal and data of the preceding LED driver.

2. The communication method for the dual-wire cascaded LED driver circuit according to claim 1, characterized in that, When each LED driver decodes data, it acquires driving data at the rising or falling edge of the input clock signal and transmits data at the falling or rising edge of the input clock; or, after receiving the data, it delays the clock signal by a certain amount and outputs the acquired data at the falling or rising edge of the delayed clock signal; wherein, the delayed clock is 1 to 8 CKI clocks.

3. The communication method for the dual-wire cascaded LED driver circuit according to claim 2, characterized in that, The data structure includes: a start frame, a frame header, a chip ID, an address field, a data length, a data segment, and an end frame; the address field is used to define the register address inside the driver chip, and the lengths of the start frame and the end frame are integer multiples of a set length.

4. The communication method for the dual-wire cascaded LED driver circuit according to claim 3, characterized in that, The driver data structure also includes: a status return identifier. When any LED driver is specified, a status return flag is added to its input data; after receiving the data, the corresponding LED driver parses it to obtain the serial number and address of the specified LED driver, and sends the current LED driver's internal status information to the next level LED driver; When controlling all cascaded LED drivers, the system obtains the corresponding status information instructions and sequentially sends the status information of each LED driver at the specified location.

5. The communication method for the dual-wire cascaded LED driver circuit according to claim 4, characterized in that, The status information inside the LED driver includes: power supply voltage undervoltage status information, temperature overtemperature status information, temperature alarm status information, output voltage high warning status information, output voltage low warning status information, output open circuit status information, output short circuit status information, and reserved fields.

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