Control method, control device and storage medium of multi-inverter parallel system

Abstract

The application relates to the technical field of inverters, and discloses a control method and a control device of a multi-inverter parallel system and a storage medium, the control method comprising the following steps: controlling a host inverter to communicate with a battery management module to obtain state information of a battery; and controlling the host inverter to respectively communicate with multiple slave inverters and sending the state information of the battery to the slave inverters. According to the technical scheme, the host inverter is used to communicate with the battery management module and to uniformly send the state information of the battery to the multiple slave inverters, so that the wiring structure of the system is effectively simplified, and the problems of complex wiring and difficult installation caused by the connection of each inverter with the battery are avoided. Meanwhile, the host inverter is used to uniformly manage BMS data, the state of the battery is synchronously mastered by each inverter in the parallel system, and the cooperative control capability and the operation stability of the system are improved.

Description

Technical Field

[0001] This invention relates to the field of inverter technology, and in particular to a control method, control device and storage medium for a multi-inverter parallel system. Background Technology

[0002] With the development of photovoltaic power generation and energy storage technologies, lithium batteries have gradually become the core energy unit of energy storage systems, while inverters, as the conversion bridge between DC and AC power, play a crucial role in system operation. To improve system power capacity and operational flexibility, parallel operation of multiple inverters is widely adopted. However, in multi-inverter parallel systems, the communication architecture design between the inverters and the battery management system (BMS) faces numerous challenges. In existing technologies, inverters and lithium batteries typically exchange data via RS485 or CAN communication protocols. In practical applications, inverters are often connected to batteries via Ethernet ports and network cables, with RS485 or CAN communication agreed upon. However, in multi-inverter systems, if each inverter needs to be individually connected to the battery pack for communication, it leads to cumbersome wiring, complex wiring harness fabrication, affects the system's structural aesthetics and stability, and also increases installation and maintenance costs. Summary of the Invention

[0003] This invention provides a control method, control device, and storage medium for a multi-inverter parallel system to solve the aforementioned technical problems.

[0004] The first aspect of this invention provides a control method for a multi-inverter parallel system, the multi-inverter parallel system comprising: a master inverter, multiple slave inverters, and a battery management module, wherein the master inverter is connected to the battery management module, the battery management module is connected to a battery, and the master inverter is also connected to the multiple slave inverters respectively, the control method comprising:

[0005] The main inverter is controlled to communicate with the battery management module to obtain battery status information;

[0006] The master inverter is controlled to communicate with multiple slave inverters respectively, and the status information of the battery is sent to the slave inverters;

[0007] When it is detected that the slave inverter has not detected communication data for more than a preset number of times within a preset time, a new master inverter is obtained from the multiple slave inverters, and the new master inverter re-establishes a communication connection with the power management module.

[0008] Optionally, controlling the communication between the host inverter and the battery management module includes:

[0009] The host inverter is controlled to periodically poll the battery management module to obtain battery status information.

[0010] Optionally, sending the battery status information to the slave inverter includes:

[0011] The battery status information is stored in a local buffer and periodically sent to the slave inverter according to a preset schedule.

[0012] Optionally, the control method further includes:

[0013] When the slave inverter fails to detect communication data for a preset number of times within a preset time, a new master inverter is obtained from the multiple slave inverters, and the new master inverter re-establishes a communication connection with the power management module.

[0014] Optionally, obtaining a new master inverter from the plurality of slave inverters includes:

[0015] Obtain the CAN communication identifiers of multiple slave inverters, and select the slave inverter with the smallest identifier to become the new master inverter.

[0016] Optionally, obtaining a new master inverter from the plurality of slave inverters includes:

[0017] Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value;

[0018] Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter;

[0019] The slave inverter with the highest score is selected as the master inverter.

[0020] Optionally, the control method further includes:

[0021] Monitor the operating status parameters of the main inverter;

[0022] When the operating status parameters meet the first preset condition, the main inverter is replaced. The first preset condition is at least one of the following: the main controller operating time exceeds a set value, the processor occupancy rate continuously exceeds a threshold, and the temperature of the main inverter exceeds a safe range.

[0023] The monitoring of the operating status parameters of the host inverter also includes:

[0024] When the number of slave inverters connected to the master inverter is greater than a preset value, the current parameters of each slave inverter are obtained, and the score of the current state of each slave inverter is obtained.

[0025] The number of secondary master inverters and redundant master inverters is increased based on the score of the current state of each slave inverter.

[0026] A second aspect of the present invention provides a control device for a multi-inverter parallel system, the multi-inverter parallel system comprising: a master inverter, multiple slave inverters, and a battery management module, wherein the master inverter is connected to the battery management module, the battery management module is connected to a battery, and the master inverter is also connected to the multiple slave inverters respectively, the control device comprising:

[0027] The battery status information acquisition module is used to control the host inverter to communicate with the battery management module in order to obtain the status information of the battery;

[0028] A battery status information sending module is used to control the master inverter to communicate with multiple slave inverters respectively, and send the battery status information to the slave inverters;

[0029] When the master inverter setting module detects that the slave inverter has not detected communication data for more than a preset number of times within a preset time, it obtains a new master inverter from the multiple slave inverters and re-establishes a communication connection between the new master inverter and the power management module.

[0030] Optionally, the host inverter setting module is specifically used for:

[0031] Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value;

[0032] Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter;

[0033] The slave inverter with the highest score is selected as the master inverter.

[0034] A third aspect of the present invention provides an electronic device, comprising: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the method described in the first aspect.

[0035] A fourth aspect of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect.

[0036] The technical advantages of this invention are as follows: By utilizing the communication between the master inverter and the battery management module and uniformly disseminating battery status information to multiple slave inverters, the system wiring structure is effectively simplified, avoiding the complexity of wiring harnesses and installation difficulties caused by connecting each inverter to the battery separately; at the same time, by uniformly managing BMS data through the master inverter, the synchronous monitoring of battery status by each inverter in the parallel system is achieved, improving the system's collaborative control capability and operational stability. Attached Figure Description

[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0039] Figure 2 This is a flowchart of a control method for a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0040] Figure 3 This is another flowchart of a control method for a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0041] Figure 4 This is another flowchart of a control method for a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0042] Figure 5 This is another flowchart of a control method for a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0043] Figure 6 This is a schematic diagram of the structure of a control method device for a multi-inverter parallel system provided in Embodiment 1 of the present invention;

[0044] Figure 7 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention;

[0045] In the diagram: 101, main inverter; 102, slave inverter; 103, battery management module; 104, CAN bus. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] It should be understood that the invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.

[0048] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this invention, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0049] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0050] To fully understand this invention, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this invention. Preferred embodiments of the invention are described in detail below; however, in addition to these detailed descriptions, the invention may have other embodiments.

[0051] Example 1

[0052] This embodiment provides a control method for a multi-inverter parallel system, such as... Figure 1 As shown, the multi-inverter parallel system includes: a master inverter 101, multiple slave inverters 102, and a battery management module 103. The master inverter 101 is connected to the battery management module 103, and the master inverter 101 is also connected to the multiple slave inverters 102 via a CAN bus 104. The control method includes:

[0053] Step S101. Control the main inverter 101 to communicate with the battery management module 103 to obtain battery status information.

[0054] Step S102. The control master inverter 101 communicates with multiple slave inverters 102 respectively, and sends the battery status information to the slave inverters 102.

[0055] Step S103. When the slave inverter 102 fails to detect communication data for more than a preset number of times within a preset time, a new master inverter 101 is obtained from the multiple slave inverters 102, and the new master inverter re-establishes a communication connection with the power management module.

[0056] The master inverter 101 communicates with the battery management module 103 via an RS485 interface according to control commands, periodically acquiring battery status information; caching, processing, or transcoding the battery information; and sending the processed battery information to multiple slave inverters 102 via the CAN bus 104. The slave inverters 102 are responsible for receiving battery information sent by the master inverter, and their functions include: receiving battery status data broadcast by the master inverter 101 via the CAN bus 104; and adjusting local operating parameters, such as charging and discharging power limits, based on the received battery information. The battery management module 103 is mainly used to monitor and manage the operating status of the battery pack, and its functions include: real-time detection of the voltage, current, and temperature of each battery cell or module; calculation of the battery's state of charge and health status; reporting charging and discharging requirements, alarms, and fault status; and communicating with the master inverter 101 via the RS485 bus.

[0057] In step S101, the real-time operating status of the current battery system is acquired to provide basic data for system coordinated control. The master inverter 101 accesses the battery management module 103 through the RS485 communication interface. Data such as battery SOC, voltage, current, temperature, and fault status are acquired through polling or timed interrupts. The data acquisition cycle can be set to once every 50ms to ensure real-time performance. The acquired data is stored in the internal cache of the master inverter 101 or in a specified array structure. In step S102, all slave inverters 102 are ensured to have consistent and complete battery status information to achieve unified control of the parallel system. The locally cached BMS status information is packaged into data frames. The data is broadcast to all slave inverters 102 via the CAN bus 104. The slave inverters 102 receive the CAN data frames through interrupt response. Each slave stores the received information in a local variable and updates its own operating status (such as power limiting, charging stop, etc.) based on this.

[0058] The master inverter 101 is responsible for communicating with the external control system or monitoring platform and coordinating the operation of each slave inverter 102. If a slave inverter 102 fails to receive communication data from the master inverter within a specified time window (e.g., 5 seconds) for multiple consecutive times (e.g., 3 times), the control system will consider the master inverter 101 to be abnormal or disconnected. In this case, a new inverter will be selected from the remaining normally operating slave inverters 102 as the master inverter to restore the system's communication and scheduling capabilities. The new master inverter 101 will automatically assume communication and management responsibilities to maintain continuous system operation. The master inverter replacement decision can be made based on priority rules, communication quality, load capacity, or ID number. After taking over, the newly selected master inverter 101 will begin broadcasting synchronization signals and coordination instructions to other slave inverters 102, thereby realizing automatic switching of the system's master control role and rapid restoration of the communication link, ensuring that the system can still operate stably in the event of a master inverter failure. The selected new master inverter will: initiate serial communication with the BMS (e.g., RS485) and re-establish the handshake; periodically poll BMS data (e.g., every 50ms); broadcast battery status information to other slave inverters; all other slave inverters will stop competing and enter a waiting and synchronization state; receive BMS information broadcast by the new master inverter; and update local control parameters (e.g., power limit, stop charging, adjust current, etc.). If the new master inverter still cannot communicate with the BMS within the set time (e.g., three failed handshakes), the system can automatically select the next slave with the smallest CAN ID as a backup; until communication is successfully established or the system enters protection mode.

[0059] The technical advantages of this embodiment are as follows: By using the master inverter 101 to communicate with the battery management module 103 and uniformly send battery status information to multiple slave inverters 102, the system wiring structure is effectively simplified, avoiding the complex wiring harnesses and installation difficulties caused by connecting each inverter to the battery separately; at the same time, by uniformly managing BMS data through the master inverter 101, the battery status of each inverter in the parallel system can be synchronously monitored, improving the system's collaborative control capability and operational stability.

[0060] Furthermore, by automatically selecting a new master inverter 101 from multiple slave inverters 102 if the slave inverter 102 fails to receive communication data from the master inverter 102 within a preset time, the system effectively achieves rapid switching of the master control role and self-recovery of system communication. This solution avoids the problem of the entire system being paralyzed due to a failure of the master inverter 101, improves the fault tolerance and operational stability of the multi-inverter system, and ensures that the system can continue to work in coordination under abnormal conditions, demonstrating high practicality and reliability.

[0061] In one implementation, the controller inverter 101 communicates with the battery management module 103, including:

[0062] The control host inverter 101 periodically polls the battery management module 103 to obtain battery status information.

[0063] The battery status information includes the battery's state of charge, charge / discharge requirements, battery temperature information, and fault status information.

[0064] The main inverter 101 establishes a connection with the battery management module 103 via an RS485 communication interface; a fixed polling period is set, for example, polling once every 50ms; each time the main inverter 101 polls, it sends a set of request commands to the battery management module 103; after responding, the battery management module 103 returns a frame of data containing status information; the main inverter 101 receives the response data and stores it in a buffer or internal variable; this process is triggered periodically by a serial port task in the embedded system (such as RTOS) to ensure stable operation. The specific content of the battery status information is as follows: the battery's state of charge (SOC) indicates the current percentage of battery charge; it is used to determine whether charging or discharging is allowed; the main inverter 101 can set the operating mode (such as power limiting, discharging prohibited, etc.) according to the SOC. Charging / discharging requirements include instructions or current limits indicating whether charging / discharging is currently allowed; the BMS provides these instructions based on internal protection logic (such as temperature, voltage, etc.); the main inverter 101 adjusts the power output or input according to these requirements. Battery temperature information includes multiple temperature points of the battery pack (such as cells, casing, etc.); excessively high or low temperatures can affect charging and discharging capabilities and may trigger protection mechanisms; the main inverter 101 determines whether to derating or suspend operation based on the temperature information. Fault status information includes abnormal conditions inside the battery, such as overvoltage, undervoltage, overtemperature, communication interruption, etc.; upon receiving fault information, the main unit should stop charging and discharging, issue an alarm, or enter a protection state; this can be used to link the safety strategies of the entire system.

[0065] The technical advantages of this implementation are as follows: By periodically polling the battery management module 103 through the master inverter 101, complete battery status information, including state of charge, charge / discharge requirements, temperature information, and fault status, is obtained and uniformly distributed to the slave inverter 102, achieving efficient synchronization and sharing of battery information in a multi-inverter parallel system. This method not only simplifies the communication structure and improves system integration, but also significantly enhances the coordination and control capabilities between inverters and the response speed to battery anomalies, thereby improving the safety, reliability, and intelligence level of system operation.

[0066] In one implementation, the master inverter 101 communicates with multiple slave inverters 102, including:

[0067] Data is transmitted between the inverter and multiple slave inverters 102 via CAN communication.

[0068] Sending battery status information to slave inverter 102, including:

[0069] The battery status information is stored in a local buffer and periodically sent to the slave inverter 102 according to a preset schedule.

[0070] In this system, a CAN bus 104 connection is established between the master inverter 101 and the slave inverter 102. Each inverter is assigned a unique CAN ID to ensure data frame identification and management. The master inverter uses broadcast or multicast mode to send data frames via CAN. CAN communication has a priority mechanism and an error detection mechanism, making it suitable for parallel control systems with high real-time requirements. After receiving battery status information, the master inverter 101 does not immediately transmit it; the data is first stored in a locally defined data structure (such as a structure array or a circular buffer). The buffer structure supports fast reading and updating, adapting to multi-task scheduling. If new data appears, the old data is overwritten to ensure that the latest information is sent. The master inverter 101 has an internal CAN transmission task (e.g., scheduled every 8ms). Each time a task is triggered, it reads the latest battery information from the local buffer; packages the read information into data frames according to the CAN protocol format; and broadcasts it to all slave inverters 102 via the CAN bus 104. The slave inverters 102 receive the data, parse it, and update their internal status information tables.

[0071] The technical advantages of this implementation are as follows: By establishing a communication link based on the CAN bus 104 between the master inverter 101 and multiple slave inverters 102, and storing the battery status information obtained from the battery management module 103 in a local buffer, the information is periodically sent to each slave inverter 102 in accordance with a preset scheduling cycle, thus achieving unified and efficient distribution of battery information. This method not only simplifies the system architecture and reduces communication redundancy, but also ensures that each unit in the multi-inverter system has real-time control over the battery status, improving the consistency, response speed, and stability of system operation.

[0072] As one implementation, obtaining a new master inverter 101 from a plurality of slave inverters 102 includes:

[0073] Obtain the CAN communication identifiers of multiple slave inverters 102, and select the slave inverter 102 with the smallest identifier to become the new master inverter 101.

[0074] In multi-inverter systems, CAN bus communication typically uses a unique identifier (ID) for each node for communication management and priority determination. The CAN communication identifier is a unique address number assigned to each inverter in CAN bus communication. The control module uses this number to sort the inverters, thereby enabling rapid and unique identification and assignment of the master control role. After assuming master control responsibilities, the inverter selected as the new master automatically activates the master communication broadcast function to maintain communication synchronization with other slave units, ensuring the continuity and consistency of the system's master control functions.

[0075] The technical advantages of this implementation are as follows: by acquiring the CAN communication identifiers of multiple slave inverters 102 and selecting the slave inverter 102 with the smallest identifier as the new master inverter 101, a fast and deterministic switch of the master control role is achieved; this scheme does not require an additional negotiation mechanism and has the advantages of simple logic, rapid response, and conflict avoidance. It can automatically restore the system communication and coordination functions when the master fails, significantly improving the stability and autonomous operation capability of the multi-inverter system.

[0076] As one implementation method, the control method further includes:

[0077] After receiving battery status information, the slave inverter 102 controls the local control parameters to dynamically adjust the inverter output.

[0078] This step is used to enable the slave inverter 102 to dynamically adjust its output control strategy according to the current state of the battery (e.g., voltage, current, SOC, temperature, etc.), ensuring the safe, stable, and efficient operation of the entire energy storage system. The specific principle is as follows: Battery status information is collected by the master control unit or battery management system (BMS) and forwarded or directly broadcast to all slave inverters 102 via the master inverter 101; the slave inverters 102 update their local control parameters (e.g., output voltage setpoint, current limit value, PWM duty cycle, power factor angle, etc.) in real time based on this status information; thereby matching the inverter's output characteristics (e.g., power, voltage, current) with the battery status, achieving coordinated operation and avoiding problems such as overcharging, over-discharging, and current surges; suitable for complex scenarios such as dynamic load changes, battery charging / discharging switching, and grid-connected / off-grid mode switching. Based on a preset response strategy, the control module adjusts the inverter's output parameters, such as the output voltage setpoint, current limit, or power distribution strategy, so that the operating state of the slave inverter 102 matches the battery state in real time, thereby achieving adaptive control of the system power flow and improving the flexibility and safety of system operation.

[0079] As an example, the execution entity is a DSP chip, specifically a TMS320F28069, with a frequency of 90MHz. The RS485 communication configuration is a baud rate of 115200, 8 data bits, no parity check, 1 stop bit, and receive / transmit sampling interrupts. The CAN communication configuration is a baud rate of 500K, 16 mailboxes (smaller mailbox numbers have higher priority), extended frame mode, and receive / transmit using MJ78 interrupts. The software system uses μC / OS-II, a real-time operating system kernel that includes basic functions such as task scheduling, task management, time management, memory management, and inter-task communication and synchronization. It is used in the software for multi-task operation and switching, such as parallel operation tasks and serial port tasks for BMS communication. After startup, the host inverter successfully communicates with the power manager. The serial port task runs every 50ms, meaning the host inverter polls the battery pack every 50ms to obtain battery SOC, battery charge / discharge requirements, battery temperature, and battery fault information data, storing this data in a custom buffer and updating the buffer contents promptly. The parallel operation task runs once every 8ms, therefore, the master inverter's transmission of BMS information updates to the slave inverters is rapid. The master inverter broadcasts a data frame containing the stored BMS information array to the CAN bus 104. The slave inverter receives the data, saves the battery pack data, and implements BMS information management. A heartbeat frame detection exists between the master and slave inverters. If a slave inverter fails to receive information from the master inverter for more than three consecutive times, it is determined that the master inverter has failed or is powered down. Based on the CAN ID values ​​between the slave inverters, the one with the smaller CAN ID automatically becomes the master inverter, performing communication with the battery BMS and transmitting BMS information to the slave inverters.

[0080] As one implementation method, to avoid the uncertainty and potential risks of solely using the CAN ID with the smallest value as the new host, such as Figure 3 As shown, this embodiment introduces the following steps:

[0081] Step S201: Obtain the current parameters of each slave inverter. The current parameters include communication status, battery information integrity, operating status, processor load status, and identifier priority value.

[0082] Among them, the communication status (Comm) indicates whether the recent CAN communication is normal and whether there are any abnormal frame drops; the battery information integrity (BMS) indicates whether complete battery status information has been successfully received; the operating status (State) indicates whether the internal temperature, voltage, and current are within the allowable range; the processor load status (Load) indicates whether the current task load of the MCU or DSP is too high; and the identifier priority value (ID) is the relative priority of the local CAN ID value.

[0083] Step S202: Substitute the current parameters of each slave inverter into the preset formula to obtain the score of the current state of each slave inverter.

[0084] The preset formula is:

[0085] Score =ɑ1×Comm +ɑ2×BMS +ɑ3×State +ɑ4×Load + ɑ5×ID;

[0086] Where a1~a5 are the system's preset weighting factors, and all scores are normalized to the range of [0, 1]. The higher the value, the more suitable the current inverter is as the host.

[0087] Step S203: Determine the slave inverter with the highest score as the master inverter.

[0088] Each slave inverter periodically (e.g., every 1 second) broadcasts its current status rating via the CAN bus. All slaves listen to this broadcast and maintain a local "master candidate sorting table" recording the current rating data of each slave. This table is sorted from highest to lowest rating and used for subsequent master switchover decisions. In case of identical ratings, the slave with the smaller CAN ID is given priority.

[0089] The technical advantages of this implementation are as follows: By introducing a scoring mechanism for the main inverter, when the main inverter fails, it no longer relies solely on ID priority logic, but instead selects the most suitable main inverter for the current system conditions based on a dynamic evaluation of the global real-time status. Its advantages include: improving the accuracy and success rate of main control switching; reducing the probability of takeover failure due to main inverter malfunction; ensuring uninterrupted broadcasting of battery status information; and realizing the distributed self-recovery capability of the multi-inverter system, thereby improving overall fault tolerance and stability.

[0090] As one implementation method, to further improve the long-term stability of the system and the load balancing of the main control module, this implementation proposes a main control role rotation and main control fatigue management mechanism. This mechanism is used to proactively and orderly rotate the main control role when the main inverter has been running continuously for a long time or when the system detects excessive operating pressure, thereby reducing the workload of the main control module, extending equipment life, and improving the overall reliability of the system. Figure 4 As shown, the specific steps include:

[0091] Step S301: Monitor the operating status parameters of the main inverter.

[0092] Step S302: When the operating status parameters meet the first preset condition, replace the main inverter.

[0093] The operating status parameters include operating time, processor utilization, and system module temperature. The first preset conditions are: the master inverter's operating time exceeds the set value (e.g., 24 hours); the processor utilization continuously exceeds the threshold (e.g., 80%); and the temperature of the master inverter exceeds the safe range. Once any of the above conditions are met, the master inverter broadcasts the transfer of control role via the CAN bus, informing other slave inverters that it is ready to take over the master control responsibilities.

[0094] The technical advantages of this implementation are as follows: By introducing main control operation status monitoring, fatigue scoring calculation, and a main control role rotation mechanism, it effectively avoids overload, heat loss, and lifespan reduction problems that may occur if a single inverter undertakes main control tasks for a long time. The system realizes dynamic scheduling and automatic handover of main control responsibilities, improving the balance of inverter usage and overall system reliability while ensuring stable system operation. It is particularly suitable for photovoltaic-storage or energy storage inverter systems that operate continuously for long periods of time.

[0095] As one implementation method, a higher-order intelligent control strategy is proposed to further address the following issues: In large-scale multi-inverter parallel systems, the single master control mode has certain problems, and frequent master control switching may cause control interruptions or scheduling conflicts; for distributed inverter clusters, a collaborative control architecture is more suitable. Most of the above implementation methods adopt a master-slave communication structure with a single master controller and multiple slave controllers. Once the master inverter fails or communication fails, a new master controller needs to be re-elected and BMS communication and system scheduling tasks need to be rebuilt, which poses risks of response delays and control oscillations.

[0096] like Figure 5 As shown, the monitoring of the operating status parameters of the main inverter includes:

[0097] Step S401. When the number of slave inverters connected to the master inverter is greater than a preset value, obtain the current parameters of each slave inverter and obtain the score of the current state of each slave inverter.

[0098] Step S402. Add a secondary master inverter and a redundant master inverter based on the score of the current state of each slave inverter.

[0099] In the following scenarios, single-master inverters have significant shortcomings: a large number of inverter nodes in the system (≥6 units); a large spatial distribution span (e.g., deployment across buildings or cabinets); strong load dynamics and frequent scheduling; and the need for highly reliable continuous power supply (e.g., UPS, data centers, microgrids). Therefore, a redundant scheduling mechanism with multiple master controllers is proposed to achieve distributed scheduling and automatic master controller collaboration, enhancing the stability and real-time control of parallel systems. The specific steps are as follows: Based on the scoring mechanism, the top two slave inverters are selected as master inverters, referred to as: Secondary Master (SM); and Redundant Master (RM). The original master inverter is referred to as Primary Master (PM). Each master controller node periodically synchronizes the following data via CAN or an independent master controller interconnection link (MC-Link): Battery Management Module (BMS) status information; current scheduling table and power control parameters; abnormal alarm status; master controller load and processing capacity assessment; and synchronization timestamps (to maintain scheduling synchronization). The master control division of labor strategy includes, but is not limited to: PM responsible for master scheduling and BMS communication; SM responsible for data takeover preparation and anomaly monitoring; RM only maintains synchronization, does not interfere with scheduling, and is in hot standby mode. When PM detects its own communication anomaly or task blockage, it will actively send a master control degradation frame to SM. If PM unexpectedly goes offline, SM will immediately enter takeover mode after detecting that it has not received PM synchronization frames for several consecutive times: quickly activate the BMS communication module; restore the scheduling table using the most recent synchronization status data; broadcast a "master control takeover confirmation frame"; and other inverters update their current master control roles. Master control collaborative load scheduling optimization: under conditions of large task volume and highly distributed load, PM and SM can execute a parallel scheduling division of labor mechanism. For example, PM is responsible for communication with BMS and total system power management; SM is responsible for slave status collection and power limiting policy issuance; the two work together to complete master control scheduling, improving control efficiency and response speed.

[0100] The technical advantages of this implementation method are as follows: This implementation method breaks through the limitations of the traditional single master control structure and achieves: in the event of any master control failure, the system automatically and quickly takes over with zero interruption; task cache and status synchronization prevent system reset or parameter loss; supports parallel execution and distributed optimization of master control tasks; and can be applied to parallel systems with larger scale and more complex topologies.

[0101] Based on the above implementation, to further shorten the master control takeover delay, improve the takeover success rate, and avoid conflicts between multiple master control commands, this implementation proposes a multi-master control hot synchronization and hierarchical takeover mechanism. This mechanism is applicable to multi-inverter parallel systems with dual or multiple master control architectures. By pre-running the master control task shadow process in the redundant master control and taking over in a hierarchical order when the master control fails, millisecond-level switching is achieved, improving system fault tolerance and operational stability. The system includes a master master control (PM), a slave master control (SM), and a redundant master control (RM). High-speed data synchronization is achieved between master control nodes through a master control interconnection link (MC-Link); slave inverters maintain bidirectional communication with the current master control node. Specifically, the following steps are included:

[0102] When the secondary master controller (SM) detects that the primary master controller (PM) has experienced a preset number of consecutive heartbeat frame timeouts (e.g., 3 times), it triggers a level 1 takeover, and the SM immediately releases output suppression and enters the formal master control state. If the SM experiences a communication timeout or BMS data acquisition failure during the takeover process, a level 2 takeover is triggered, and the redundant master controller (RM) directly takes over the master control responsibilities and broadcasts a takeover confirmation message. This level 1 and level 2 takeover mechanism ensures that even if the secondary master controller fails to take over, the redundant master controller can still complete the takeover in a very short time, guaranteeing continuous system operation. When a declining trend in the primary master controller's operating status is detected (e.g., increased communication latency, high CPU utilization, increased AI prediction risk), the secondary master controller broadcasts a "takeover preparation signal" to the redundant master controller and all slaves in advance, entering takeover preparation mode. In takeover preparation mode, all nodes switch to high-frequency data refresh mode and complete key parameter synchronization, thus completing the switchover immediately when the takeover signal is formally triggered. If the primary master controller resumes normal operation during the preparation process, the takeover preparation signal is revoked, maintaining the existing master control structure.

[0103] The technical advantages of this implementation are as follows: through the multi-master control hot synchronization mechanism, the secondary master control and redundant master control can complete the master control takeover in milliseconds; the hierarchical takeover mechanism ensures that the redundant master control can quickly intervene when the secondary master control fails to take over; the pre-takeover prediction and confirmation can complete the takeover preparation in advance and reduce system jitter; the task conflict resolution mechanism avoids execution conflicts caused by concurrent control of multiple master control, thereby significantly improving the system's fault tolerance, operational continuity and control stability.

[0104] Example 2

[0105] This second embodiment provides a control device for a multi-inverter parallel system, such as... Figure 6 As shown, it includes:

[0106] The multi-inverter parallel system includes: a master inverter 101, multiple slave inverters 102, and a battery management module 103. The master inverter 101 is connected to the battery management module 103, and the master inverter 101 is also connected to the multiple slave inverters 102 respectively. The control device includes:

[0107] The battery status information acquisition module 201 is used to control the main inverter to communicate with the battery management module in order to obtain the battery status information;

[0108] The battery status information sending module 202 is used to control the master inverter to communicate with multiple slave inverters respectively and send the battery status information to the slave inverters.

[0109] When the master inverter setting module 203 detects that the slave inverter has not detected communication data for more than a preset number of times within a preset time, it obtains a new master inverter from multiple slave inverters and re-establishes a communication connection between the new master inverter and the power management module.

[0110] Furthermore, the battery status information acquisition module 201 is specifically used to: control the host inverter to periodically poll and access the battery management module to obtain battery status information.

[0111] Furthermore, the battery status information includes the battery's state of charge, charge / discharge requirements, battery temperature information, and fault status information.

[0112] Furthermore, the battery status information sending module 202 is specifically used for:

[0113] The control host inverter and multiple slave inverters transmit data via CAN communication.

[0114] Furthermore, the battery status information sending module 202 is also specifically used for:

[0115] The battery status information is stored in a local buffer and sent to the slave inverter periodically according to a preset schedule.

[0116] Furthermore, the master inverter setting module is specifically used to: obtain the CAN communication identifiers of multiple slave inverters, and select the slave inverter with the smallest identifier to become the new master inverter.

[0117] Furthermore, the control device also includes:

[0118] The data update module is used to control the slave inverter to update its local control parameters after receiving battery status information, so as to achieve dynamic adjustment of the inverter output.

[0119] Furthermore, the control device is also used for:

[0120] Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value;

[0121] Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter;

[0122] The slave inverter with the highest score is selected as the master inverter.

[0123] Furthermore, the control device is also used for:

[0124] Monitor the operating status parameters of the main inverter;

[0125] When the operating status parameters meet the first preset condition, the main inverter is replaced. The first preset condition is at least one of the following: the main controller running time exceeds the set value, the processor occupancy rate continuously exceeds the threshold, and the temperature of the main inverter exceeds the safe range.

[0126] Furthermore, the control device is also used for:

[0127] When the number of slave inverters connected to the master inverter exceeds a preset value, the current parameters of each slave inverter are obtained, and the score of the current state of each slave inverter is obtained.

[0128] The number of secondary master inverters and redundant master inverters is increased based on the current state score of each slave inverter.

[0129] This application also provides an electronic device, such as... Figure 7 As shown, the electronic device 2 includes: at least one processor 20, a memory 21, and a computer program 22 stored in the memory 21 and executable on at least one processor 20. When the processor 20 executes the computer program, it implements the steps in any of the above method embodiments, or when the processor 20 executes the computer program, it implements the functions of each module / unit in the above device embodiments.

[0130] For example, a computer program can be divided into one or more modules / units, one or more of which are stored in memory and executed by a processor to complete this application. One or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in an electronic device.

[0131] Those skilled in the art will understand that Figure 7 This is merely an example of an electronic device and does not constitute a limitation on the electronic device. It may include more or fewer components than shown, or combine certain components, or different components. For example, an electronic device may also include input / output devices, network access devices, buses, etc.

[0132] The aforementioned processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0133] Memory can be an internal storage unit of an electronic device, such as a hard drive or RAM. Memory can also be an external storage device of an electronic device, such as a plug-in hard drive, SmartMedia Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, memory can include both internal and external storage units of an electronic device.

[0134] This application also provides a readable storage medium storing a computer program, which, when executed by a processor, implements the steps described in the above-described method embodiments.

[0135] This application provides a computer program product that, when run on an electronic device, enables a mobile terminal to execute the steps described in the above-described method embodiments.

[0136] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of this application can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. A computer-readable medium can include at least: any entity or device capable of carrying computer program code to a photographing device / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.

[0137] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0138] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0139] In the embodiments provided in this application, it should be understood that the disclosed apparatus / device and method can be implemented in other ways. For example, the apparatus / device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0140] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0141] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A control method for a multi-inverter parallel system, characterized in that, The multi-inverter parallel system includes: a master inverter, multiple slave inverters, and a battery management module. The battery management module is connected to a battery, the master inverter is connected to the battery management module, and the master inverter is also connected to the multiple slave inverters via a CAN bus. The control method includes: The main inverter is controlled to communicate with the battery management module to obtain battery status information; The master inverter is controlled to communicate with multiple slave inverters respectively, and the status information of the battery is sent to the slave inverters; When it is detected that the slave inverter has not detected communication data for more than a preset number of times within a preset time, a new master inverter is obtained from the multiple slave inverters, and the new master inverter re-establishes a communication connection with the battery management module. The step of obtaining a new master inverter from the plurality of slave inverters includes: Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value; Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter; The slave inverter with the highest score is selected as the master inverter. The control method further includes: Monitor the operating status parameters of the main inverter; When the operating status parameters meet the first preset condition, the main inverter is replaced. The first preset condition is at least one of the following: the main controller running time exceeds a set value, the processor occupancy rate continuously exceeds a threshold, and the temperature of the main inverter exceeds a safe range. The monitoring of the operating status parameters of the host inverter also includes: When the number of slave inverters connected to the master inverter is greater than a preset value, the current parameters of each slave inverter are obtained, and the score of the current state of each slave inverter is obtained. The number of secondary master inverters and redundant master inverters is increased based on the score of the current state of each slave inverter. When the secondary inverter detects that the heartbeat frame timeout of the primary inverter has occurred for a preset number of consecutive times, it triggers a first-level takeover, and the secondary inverter immediately releases the output suppression and enters the formal master control state; when the secondary inverter experiences a communication timeout or BMS data acquisition failure during the takeover process, it triggers a second-level takeover, and the redundant primary inverter directly takes over the master control responsibilities and broadcasts takeover confirmation information. When a downward trend in the operating status of the master inverter is detected, the slave master inverter broadcasts a "takeover preparation signal" to the redundant master inverter and all slaves in advance, and enters the takeover preparation mode. In the takeover preparation mode, all nodes switch to high-frequency data refresh mode and complete the synchronization of key parameters, so as to complete the switch immediately when the takeover signal is officially triggered. If the master inverter resumes normal operation during the preparation process, the takeover preparation signal is canceled and the existing master control structure remains unchanged.

2. The control method according to claim 1, characterized in that, The control of the host inverter to communicate with the battery management module includes: The host inverter is controlled to periodically poll the battery management module to obtain battery status information.

3. The control method according to claim 1, characterized in that, Sending the battery status information to the slave inverter includes: The battery status information is stored in a local buffer and periodically sent to the slave inverter according to a preset schedule.

4. The control method according to claim 1, characterized in that, The step of obtaining a new master inverter from the plurality of slave inverters includes: Obtain the CAN communication identifiers of multiple slave inverters, and select the slave inverter with the smallest identifier to become the new master inverter.

5. A control device for a multi-inverter parallel system, characterized in that, The multi-inverter parallel system includes: a master inverter, multiple slave inverters, and a battery management module. The master inverter is connected to the battery management module, and the battery management module is connected to a battery. The master inverter is also connected to each of the multiple slave inverters. The control device includes: The battery status information acquisition module is used to control the host inverter to communicate with the battery management module in order to obtain the status information of the battery; A battery status information sending module is used to control the master inverter to communicate with multiple slave inverters respectively, and send the battery status information to the slave inverters; The master inverter setting module, when it detects that the slave inverter has not detected communication data for more than a preset number of times within a preset time, obtains a new master inverter from the multiple slave inverters and re-establishes a communication connection between the new master inverter and the battery management module. The master inverter setting module obtains a new master inverter from the plurality of slave inverters and performs the following steps: Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value; Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter; The slave inverter with the highest score is selected as the master inverter. The control device is also used to perform the following steps: Monitor the operating status parameters of the main inverter; When the operating status parameters meet the first preset condition, the main inverter is replaced. The first preset condition is at least one of the following: the main controller running time exceeds a set value, the processor occupancy rate continuously exceeds a threshold, and the temperature of the main inverter exceeds a safe range. After monitoring the operating status parameters of the main inverter, the control device also performs the following steps: When the number of slave inverters connected to the master inverter is greater than a preset value, the current parameters of each slave inverter are obtained, and the score of the current state of each slave inverter is obtained. The number of secondary master inverters and redundant master inverters is increased based on the score of the current state of each slave inverter. When the secondary inverter detects that the heartbeat frame timeout of the primary inverter has occurred for a preset number of consecutive times, it triggers a first-level takeover, and the secondary inverter immediately releases the output suppression and enters the formal master control state; when the secondary inverter experiences a communication timeout or BMS data acquisition failure during the takeover process, it triggers a second-level takeover, and the redundant primary inverter directly takes over the master control responsibilities and broadcasts takeover confirmation information. When a downward trend in the operating status of the master inverter is detected, the slave master inverter broadcasts a "takeover preparation signal" to the redundant master inverter and all slaves in advance, and enters the takeover preparation mode. In the takeover preparation mode, all nodes switch to high-frequency data refresh mode and complete the synchronization of key parameters, so as to complete the switch immediately when the takeover signal is officially triggered. If the master inverter resumes normal operation during the preparation process, the takeover preparation signal is canceled and the existing master control structure remains unchanged.

6. The control device according to claim 5, characterized in that, The host inverter setting module is specifically used for: Obtain the current parameters of each slave inverter, including communication status, battery information integrity, operating status, processor load status, and identifier priority value; Substitute the current parameters of each slave inverter into the preset formula to obtain the score value of the current state of each slave inverter; The slave inverter with the highest score is selected as the master inverter.

7. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 4.

Images