Method for modeling and analyzing common-mode conducted interference of sllc resonant converter

Abstract

The application provides a common-mode interference modeling and analysis method for an SLLC resonant converter, and belongs to the technical field of power electronics and electromagnetic compatibility; by extracting key parasitic parameters of a circuit, combining a transmission line theory and an equivalent circuit modeling technology, constructing a high-precision common-mode interference propagation path model, and introducing complex high-frequency line parasitic parameters, the application describes the propagation characteristics of common-mode currents; aiming at the calculation complexity problem caused by high-dimension modeling, the application proposes a model simplification strategy, effectively reduces the calculation complexity while ensuring the analysis accuracy through equivalent transformation and frequency domain order reduction processing; the application has the advantages of high precision, high efficiency, strong universality and the like, and is suitable for common-mode interference modeling analysis and electromagnetic compatibility design of the SLLC resonant converter and other various high-frequency power electronic devices.

Description

Technical Field

[0001] This invention belongs to the field of power electronics and electromagnetic compatibility technology, specifically relating to a common-mode conducted interference modeling and analysis method for SLLC resonant converters. Background Technology

[0002] SLLC resonant converters possess characteristics such as high efficiency, high power density, and low switching losses, making them particularly suitable for applications requiring high step-up ratios and high current inputs. They are widely used in photovoltaic inverters, electric vehicle charging modules, and microgrids. However, the switching noise caused by the high voltage change rate (dv / dt) and high current change rate (di / dt) resulting from high-frequency switching operations generates significant common-mode conducted electromagnetic interference (EMI) currents through non-ideal factors such as transformer winding distributed capacitance, parasitic coupling paths in the PCB layout, and capacitive connections between the heatsink and the chassis. This interference not only leads to excessive conducted electromagnetic emissions but can also cause equipment malfunctions, severely limiting the reliability of SLLC topologies in harsh electromagnetic environments.

[0003] Current research on common-mode interference analysis of resonant converters is mostly based on idealized models. For example, the resonant cavity is simplified to an ideal inductor and capacitor, ignoring the influence of key parasitic parameters such as PCB parasitic capacitance, transformer interlayer capacitance, and switching device junction capacitance. This leads to a significant decrease in interference prediction accuracy in high-frequency bands, especially above 5MHz, with simulation results generally deviating from measured values ​​by more than 30%. Some literature attempts to establish the common-mode voltage transfer function through frequency domain impedance analysis, but it does not fully consider the dynamic characteristics of SLLC topologies under multi-mode operation. In complex electromagnetic environments, it is difficult to comprehensively and accurately reveal the generation mechanism and propagation path of interference. At the same time, there are certain limitations in signal acquisition, interference source localization, and real-time analysis, which cannot meet the requirements for high-speed, high-precision detection of common-mode interference.

[0004] In engineering practice, to meet electromagnetic compatibility standards such as CISPR 32 and GJB 151B-2013, developers typically rely on trial and error to repeatedly adjust common-mode filter parameters or PCB layout. This experience-driven approach is not only time-consuming (a certain SLLC boost converter module requires more than five PCB iterations) but also leads to soaring costs due to a lack of theoretical guidance. Furthermore, traditional time-domain simulation requires microsecond-level steps to solve complex parasitic networks, with computation times reaching several hours, making it unsuitable for rapidly iterative design requirements. The limitations of existing technologies indicate an urgent need for a common-mode conducted interference modeling and analysis method that balances model accuracy, computational efficiency, and adaptability to multiple operating conditions, in order to systematically address the core pain points of SLLC resonant converter electromagnetic compatibility design. Summary of the Invention

[0005] To overcome the shortcomings of existing technologies and solve the problems of complex high-frequency parasitic parameters, cumbersome modeling process, and high computational dimensionality, this invention proposes a common-mode conducted interference modeling and analysis method for SLLC resonant converters.

[0006] A method for modeling and analyzing common-mode conducted interference in SLLC resonant converters includes the following steps: Step 1: Construct the common-mode conducted interference model of the SLLC resonant converter; The common-mode conducted interference model includes a common-mode interference source model and a common-mode propagation network model. The common-mode interference source includes a high-frequency common-mode voltage source and a common-mode current source. Based on the operating characteristics of the main circuit in the SLLC resonant converter and its high-frequency switching behavior, a common-mode interference source is constructed and equivalently represented. The voltage fluctuation behavior of the high-speed switching devices in the SLLC resonant converter during the turn-on and turn-off processes is equivalently represented as a common-mode voltage source. The high-speed switching devices include MOSFET devices or IGBT devices. Based on the interference mechanism of the SLLC resonant converter, the current fluctuation behavior of the high-speed switching devices in the SLLC resonant converter is equivalently represented as a common-mode current source. Either the common-mode current source or the common-mode voltage source is arbitrarily selected as the excitation source and input into the common-mode conducted interference model. Based on the common-mode interference source, the circuit parasitic parameters are extracted and processed to establish a common-mode propagation network model. Step 2: Predict common-mode conducted interference based on the common-mode conducted interference model; Step 2-1: Using the star-delta converter method, reconstruct the topology of the original SLLC resonant converter in the common-mode conducted interference model into an equivalent topology; Step 2-2: Using Norton's equivalent circuit and Thevenin's equivalent theorem, calculate the common-mode current under voltage source excitation and the common-mode current under current source excitation. Then, based on the common-mode current under voltage source excitation and the common-mode current under current source excitation, calculate the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. Finally, obtain the total mode current and total mode voltage of the SLLC resonant converter. Plot the graphs based on the common-mode current under voltage source excitation, the common-mode current under current source excitation, and the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. Calculate the frequency domain transfer function using the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. The frequency domain transfer function includes the frequency domain transfer function under voltage source excitation and the frequency domain transfer function under current source excitation. Steps 2-3: Use a stepwise simplification strategy to reduce the order of the frequency domain transfer function; the reduced-order simplified frequency domain transfer function is the prediction result.

[0007] Furthermore, the steps for establishing the common-mode propagation network model are as follows: The parasitic capacitance and parasitic inductance existing in the PCB traces and grounding loops are extracted to construct an equivalent common-mode propagation network model. The distributed parameter modeling method is adopted to model the PCB circuit conductors as a multi-segment transmission line model. The multi-segment transmission line model introduces equivalent capacitance and inductance parameters to describe the propagation and reflection characteristics of common-mode interference current in the circuit. Based on node analysis and electromagnetic field coupling theory, the parasitic capacitance and parasitic inductance existing in the grounding loop are constructed into a complete ground loop return current model. The ground loop return current model describes the complete propagation path and loop closure characteristics of the common-mode current in the system, and accurately describes the propagation and feedback process of the common-mode interference current in the circuit.

[0008] Furthermore, the stepwise simplification strategy is as follows: by removing higher-order terms and coefficients from the frequency domain transfer function, the factors affecting common-mode interference are classified and screened; within the target analysis frequency band, based on the common-mode response characteristics of the dominant transmission channel, the common-mode propagation path is identified, and higher-order coupling terms are deleted.

[0009] Furthermore, the steps for calculating the common-mode current under voltage source excitation and the common-mode current under current source excitation, and then calculating the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; finally obtaining the total mode current and total mode voltage of the SLLC resonant converter are as follows: Step 2-2-1: Obtain the common-mode current under voltage source excitation for:

[0010] In the formula i MG This represents the Norton equivalent current value of the interference voltage source. Z v This represents the Norton equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-2: Obtain the common-mode current under current source excitation :

[0011] In the formula V MG This represents the Thevenin equivalent voltage value of the interference current source. Z i This represents the Thevenin equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-3: Obtain the Laplace transform expression of the common-mode current under voltage source excitation. :

[0012] Based on Norton's equivalent circuit, , , , and To obtain the Laplace transform expression of the common-mode current under voltage source excitation. :

[0013] Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. Z 5. Z 41 , Z 44 , Z 45 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology. v It is the impedance value of the parallel impedance element. i MG is the current value of the equivalent current source, L is the inductance value of the equivalent inductor, C is the capacitance value of the equivalent capacitance, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude. M y y represents the denominator coefficient of the y-th mode composed of the capacitor and inductor parameters in the original SLLC topology, where y = 1, 2, 3, ..., 12; A x The x-th mode-molecule coefficient, representing the capacitance and inductance parameters in the original SLLC topology, is given by x = 1, 2, 3, ..., 11; where... A x for:

[0014] In the formula M y for:

[0015] in, This is the capacitance value of the first pair of parasitic capacitances to ground; This is the capacitance value of the second pair of parasitic capacitances to ground; This is the capacitance value of the seventh capacitor; This is the capacitance value of the eighth capacitor; This is the capacitance value of the sixth pair of parasitic capacitances to ground; This is the capacitance value of the third pair of parasitic capacitances to ground; This is the capacitance value of the fourth pair of parasitic capacitances to ground; The inductance value of the tenth parasitic inductance; This is the inductance value of the ninth parasitic inductance; The inductance value of the first parasitic inductance; The inductance value of the second parasitic inductance; The inductance value is the parasitic inductance on the source side of the first switching NMOS transistor; The inductance value is the parasitic inductance on the source side of the fourth switching NMOS transistor. Let be the inductance value of the parasitic inductance of the first rectifier diode. The inductance value is the parasitic inductance of the fourth rectifier diode; This is the capacitance value of the transformer resonant capacitor; This is the fifth parasitic inductance value; This is the eighth parasitic inductance value; This is the inductance value of the transformer's resonant inductance; The impedance value of the LISN; The parameters of the capacitor and inductor include: the first parasitic inductance L1 is the parasitic inductance between the positive input port and one set of bridge arms; the second parasitic inductance L2 is the parasitic inductance between the negative input port and another set of bridge arms; the third parasitic inductance L3 is the parasitic inductance between the two sets of bridge arms; the fourth parasitic inductance L4 is the parasitic inductance between the two sets of bridge arms; and the ninth parasitic inductance L... t1 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer; the tenth parasitic inductance L t2 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer is denoted as L5; the fifth parasitic inductance L5 and the sixth parasitic inductance L6 are the parasitic inductances between the two bridge arms; the seventh parasitic inductance L7 is the parasitic inductance between one bridge arm and the positive output port; the eighth parasitic inductance L8 is the parasitic inductance between the other bridge arm and the negative output port; the first parasitic capacitance to ground is C. a1 The parasitic capacitance to ground at the midpoint a1 of the side bridge arm; the second parasitic capacitance to ground C a2 The parasitic capacitance to ground at the midpoint a2 of the primary side bridge arm; the third parasitic capacitance to ground C d1 The parasitic capacitance to ground at the midpoint d1 of the secondary bridge arm; the fourth parasitic capacitance to ground C d2 The fifth parasitic capacitance to ground is Cp1, which is the parasitic capacitance to ground of the primary busbar; the sixth parasitic capacitance to ground is C... g1 The seventh capacitor C is the parasitic capacitance from the load terminal to ground. ps The common-mode port capacitor of the transformer; the eighth capacitor C sp For the common-mode port capacitance of the transformer; Qi For each power device in the primary-side circuit of the original SLLC topology; L pi1 For each power device in the primary-side circuit of the original SLLC topology Q i The drain-side parasitic inductance; L pi2 Each power device in the primary-side circuit of the original SLLC topology Q i Parasitic inductance on the source side; i = 1, 2, 3, 4; each rectifier diode D j The parasitic inductance is L sj1 and L sj2 , j = 1, 2, 3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under current source excitation. :

[0016] Based on Thevenin equivalent circuit and Z i , V MG , i CM Z L (s) and Z c (s), to obtain the Laplace transform expression of the common-mode current under current source excitation. :

[0017] Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. I Q2 The value represents the excitation amplitude of the current source, where... Z 5. Z 41 , Z 44 , Z L2 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology. i L is the impedance value of the series impedance element, C is the inductance value of the equivalent inductance element, s is the capacitance value of the equivalent capacitance element, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude, where...E z This represents the z-th mode binary coefficient composed of the capacitor and inductor parameters in the circuit, where z {2,4,6,…,12}; N y y represents the denominator coefficient of the y-th mode, which is composed of the capacitance and inductance parameters in the circuit. {1,2,3,…,12}; s is a complex variable in the complex frequency domain. I (s) represents the amplitude of the current source excitation; Step 2-2-5: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total common-mode current of the SLLC resonant converter. :

[0018] Step 2-2-6: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total mode voltage of the SLLC resonant converter. for:

[0019] in Z LISN This represents the impedance value of the LISN in the common-mode conduction current path, and the magnitude of the common-mode interference noise of the SLLC resonant converter is expressed by the total mode voltage expression.

[0020] The beneficial effects of this invention are as follows: First, because the common-mode conducted interference model is based on the complex high-frequency parasitic parameters of PCBs, the simplification of the model significantly reduces its complexity while maintaining computational accuracy. Second, this invention enables systematic analysis, modeling, and prediction of common-mode interference sources and their propagation paths in SLLC resonant converters, providing effective theoretical support and computational means for common-mode interference suppression design. It is applicable to the prediction and control of common-mode conducted interference in various power electronic devices such as photovoltaic inverters, electric vehicle charging modules, and microgrid power electronic converters. Finally, the simplified common-mode interference analysis method described in this invention is suitable for the early design stages, especially when system parameters are not yet fully defined. It can still provide effective interference prediction information, thereby assisting designers in making reasonable device selection and structural decisions in the early stages, providing theoretical basis and engineering guidance for suppressing common-mode interference, and has high engineering practicality and application value. Attached Figure Description

[0021] Figure 1 This is a flowchart of the method of the present invention; Figure 2 This is a circuit diagram of the SLLC resonant converter containing LISN of the present invention; Figure 3 The common-mode conducted coupling path of the SLLC resonant converter of the present invention is shown, wherein the common-mode current flow path is represented by a dashed line with an arrowhead; Figure 4 The common-mode interference equivalent circuit of the SLLC resonant converter of the present invention is shown in (a) and (b) is shown in Thevenin equivalent circuit. Figure 5 A comparison of the errors of different simplified expressions of the common-mode interference simplified analysis method of the present invention; Figure 6 This serves as a model verification for the simplified common-mode interference analysis method of the present invention. Figure 7 A spectrum of the common-mode current expression for different terms in the molecule of this invention; Q1 - First switching NMOS transistor; Q2 - Second switching NMOS transistor; Q3 - Third switching NMOS transistor; Q4 - Fourth switching NMOS transistor; D1 - First rectifier diode; D2 - Second rectifier diode; D3 - Third rectifier diode; D4 - Fourth rectifier diode; Lp11 - Parasitic inductance on the drain side of the first switching NMOS transistor; L p21 - Parasitic inductance on the drain side of the second switching NMOS transistor; L p31 - Parasitic inductance on the drain side of the third switching NMOS transistor; L p41 - Parasitic inductance on the drain side of the fourth switching NMOS transistor; L p12 - Parasitic inductance on the source side of the first switching NMOS transistor; L p22 - Parasitic inductance on the source side of the second switching NMOS transistor; L p32 - Parasitic inductance on the source side of the third switching NMOS transistor; L p42 - Parasitic inductance on the source side of the fourth NMOS switch; L1 - First parasitic inductance; L2 - Second parasitic inductance; L3 - Third parasitic inductance; L4 - Fourth parasitic inductance; L t1 - Ninth parasitic inductance; L t2 - Tenth parasitic inductance; L s11 - Parasitic inductance of the first rectifier diode; L s21 - Parasitic inductance of the second rectifier diode; L s31 - Parasitic inductance of the third rectifier diode; L s41 - Parasitic inductance of the fourth rectifier diode; L s12 - Parasitic inductance of the first rectifier diode; L s22 - Parasitic inductance of the second rectifier diode; L s32 - Parasitic inductance of the third rectifier diode; L s42- Parasitic inductance of the fourth rectifier diode; L5 - Fifth parasitic inductance; L6 - Sixth parasitic inductance; L7 - Seventh parasitic inductance; L8 - Eighth parasitic inductance; C a1 - First parasitic capacitance to ground; C a2 - Second parasitic capacitance to ground; C d1 - Third parasitic capacitance to ground; C d2 - Fourth parasitic capacitance to ground; Cp1 - Fifth parasitic capacitance to ground; C g1 -Sixth pair of parasitic capacitances to ground; C ps - Seventh capacitor; C sp -Eighth capacitor. Detailed Implementation

[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0023] The technical solution adopted by this invention to solve its technical problem is as follows: Step 1: Construct the common-mode conducted interference model of the SLLC resonant converter; The common-mode conducted interference model includes common-mode interference source and common-mode propagation network models; common-mode interference sources include high-frequency common-mode voltage sources and common-mode current sources; Based on the operating characteristics of the main circuit in the SLLC resonant converter and its high-frequency switching behavior, a common-mode interference source is constructed and equivalently derived. The voltage fluctuation behavior of the high-speed switching devices in the SLLC resonant converter during the turn-on and turn-off processes is equivalent to a common-mode voltage source; the high-speed switching devices include MOSFET devices or IGBT devices; according to the interference mechanism of the SLLC resonant converter, the current fluctuation behavior of the high-speed switching devices in the SLLC resonant converter is equivalent to a common-mode current source. Arbitrarily select one of the common-mode current source and the common-mode voltage source as the excitation source input into the common-mode conducted interference model; Based on the common-mode interference source, the parasitic parameters of the circuit are extracted and processed to establish a common-mode propagation network model; The steps to establish a common-mode propagation network model are as follows: The parasitic capacitance and parasitic inductance existing in the PCB traces and grounding loops are extracted to construct an equivalent common-mode propagation network model. The distributed parameter modeling method is adopted to model the PCB circuit conductors as a multi-segment transmission line model. The multi-segment transmission line model introduces equivalent capacitance and inductance parameters to describe the propagation and reflection characteristics of common-mode interference current in the circuit. Based on node analysis and electromagnetic field coupling theory, the parasitic capacitance and parasitic inductance existing in the grounding loop are constructed into a complete ground loop return current model. The ground loop return current model describes the complete propagation path and loop closure characteristics of the common-mode current in the system, and accurately describes the propagation and feedback process of the common-mode interference current in the circuit. Step 2: Predict common-mode conducted interference based on the common-mode conducted interference model; Step 2-1: Using the star-delta converter method, reconstruct the topology of the original SLLC resonant converter in the common-mode conducted interference model into an equivalent topology; the reconstructed equivalent topology is as follows. Figure 4 As shown; Step 2-2: Using Norton's equivalent circuit and Thevenin's equivalent theorem, calculate the common-mode current under voltage source excitation and the common-mode current under current source excitation. Then, based on the common-mode current under voltage source excitation and the common-mode current under current source excitation, calculate the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. Plot the graphs based on the common-mode current under voltage source excitation, the common-mode current under current source excitation, and the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. At the same time, adjust the higher-order terms according to the accuracy requirements of the common-mode conducted interference model to achieve accurate and simple modeling. Step 2-2-1: Obtain the common-mode current under voltage source excitation for:

[0024] In the formula i MG This represents the Norton equivalent current value of the interference voltage source. Z v This represents the Norton equivalent resistance value. Z LISN This indicates the impedance value of the LISN in the common-mode conduction current path; such as Figure 4 As shown; Step 2-2-2: Obtain the common-mode current under current source excitation :

[0025] In the formula V MG This represents the Thevenin equivalent voltage value of the interference current source. Z i This represents the Thevenin equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-3: Obtain the Laplace transform expression of the common-mode current under voltage source excitation. :

[0026] Based on Norton's equivalent circuit and , , , and To obtain the Laplace transform expression of the common-mode current under voltage source excitation. :

[0027] Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. Z 5. Z 41 , Z 44 , Z 45 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology circuit. v It is the impedance value of the parallel impedance element. i MG is the current value of the equivalent current source, L is the inductance value of the equivalent inductor, C is the capacitance value of the equivalent capacitance, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude. M y y represents the denominator coefficient of the y-th mode composed of the capacitor and inductor parameters in the original SLLC topology, where y = 1, 2, 3, ..., 12; A x The x-th mode-molecule coefficient, representing the capacitance and inductance parameters in the original SLLC topology, is given by x = 1, 2, 3, ..., 11; where... A x for:

[0028] In the formula M y for:

[0029] in, This is the capacitance value of the first pair of parasitic capacitances to ground; This is the capacitance value of the second pair of parasitic capacitances to ground; This is the capacitance value of the seventh capacitor; This is the capacitance value of the eighth capacitor; This is the capacitance value of the sixth pair of parasitic capacitances to ground; This is the capacitance value of the third pair of parasitic capacitances to ground; This is the capacitance value of the fourth pair of parasitic capacitances to ground; The inductance value of the tenth parasitic inductance; This is the inductance value of the ninth parasitic inductance; The inductance value of the first parasitic inductance; The inductance value of the second parasitic inductance; The inductance value is the parasitic inductance on the source side of the first switching NMOS transistor; The inductance value is the parasitic inductance on the source side of the fourth switching NMOS transistor. Let be the inductance value of the parasitic inductance of the first rectifier diode. The inductance value is the parasitic inductance of the fourth rectifier diode; This is the capacitance value of the transformer resonant capacitor; This is the fifth parasitic inductance value; This is the eighth parasitic inductance value; This is the inductance value of the transformer's resonant inductance; The impedance value of the LISN; like Figure 2 As shown, the capacitor and inductor parameters include: the first parasitic inductance L1 is the parasitic inductance between the positive input port and one set of bridge arms; the second parasitic inductance L2 is the parasitic inductance between the negative input port and another set of bridge arms; the third parasitic inductance L3 is the parasitic inductance between the two sets of bridge arms; the fourth parasitic inductance L4 is the parasitic inductance between the two sets of bridge arms; and the ninth parasitic inductance L... t1 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer; the tenth parasitic inductance L t2 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer is denoted as L5; the fifth parasitic inductance L5 and the sixth parasitic inductance L6 are the parasitic inductances between the two bridge arms; the seventh parasitic inductance L7 is the parasitic inductance between one bridge arm and the positive output port; the eighth parasitic inductance L8 is the parasitic inductance between the other bridge arm and the negative output port; the first parasitic capacitance to ground is C. a1 The parasitic capacitance to ground at the midpoint a1 of the side bridge arm; the second parasitic capacitance to ground C a2 The parasitic capacitance to ground at the midpoint a2 of the primary side bridge arm; the third parasitic capacitance to ground C d1 The parasitic capacitance to ground at the midpoint d1 of the secondary bridge arm; the fourth parasitic capacitance to ground C d2 The fifth parasitic capacitance to ground is Cp1, which is the parasitic capacitance to ground of the primary busbar; the sixth parasitic capacitance to ground is C... g1 The seventh capacitor C is the parasitic capacitance from the load terminal to ground. ps The common-mode port capacitor of the transformer; the eighth capacitor C sp For the common-mode port capacitance of the transformer; Q iFor each power device in the primary-side circuit of the original SLLC topology; L pi1 For each power device in the primary-side circuit of the original SLLC topology Q i The drain-side parasitic inductance; L pi2 Each power device in the primary-side circuit of the original SLLC topology Q i Parasitic inductance on the source side; i = 1, 2, 3, 4; each rectifier diode D j The parasitic inductance is L sj1 and L sj2 , j = 1, 2, 3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under current source excitation. :

[0030] Based on Thevenin equivalent circuit and Z i , V MG , i CM Z L (s) and Z c (s), to obtain the Laplace transform expression of the common-mode current under current source excitation. :

[0031] Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. I Q2 The value represents the excitation amplitude of the current source, where... Z 5. Z 41 , Z 44 , Z L2 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology circuit. i L is the impedance value of the series impedance element, C is the inductance value of the equivalent inductance element, s is the capacitance value of the equivalent capacitance element, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude, where... Ez This represents the z-th mode binary coefficient composed of the capacitor and inductor parameters in the circuit, where z {2,4,6,…,12}; N y y represents the denominator coefficient of the y-th mode, which is composed of the capacitance and inductance parameters in the circuit. {1,2,3,…,12}; s is a complex variable in the complex frequency domain. I (s) represents the amplitude of the current source excitation; Step 2-2-5: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total common-mode current of the SLLC resonant converter. :

[0032] Step 2-2-6: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total mode voltage of the SLLC resonant converter. for:

[0033] in Z LISN The impedance value of the LISN in the common-mode conduction current path is represented by the total mode voltage expression, which describes the magnitude of the common-mode interference noise of the SLLC resonant converter. Steps 2-3: Use a stepwise simplification strategy to reduce the order of the frequency domain transfer function; The strategy for gradual simplification is as follows: By removing higher-order terms and coefficients from the frequency domain transfer function, the factors affecting common-mode interference are classified and screened. Within the target analysis frequency band, the common-mode propagation path is identified based on the common-mode response characteristics of the dominant transmission channel, and higher-order coupling terms are deleted. The frequency domain transfer function includes the frequency domain transfer function under voltage source excitation. H CM ( s Frequency domain transfer function under current source excitation G CM ( s ).

[0034] Common-mode current transfer function under voltage source excitation H CM ( s The simplification method is as follows: in, a i and bi For each order of frequency domain coefficients, V Q1 (s) is the Laplace transform expression of voltage source excitation under voltage source excitation; the reduced-order model can significantly reduce computational complexity while maintaining computational accuracy within the main frequency band of the system; Step 3: Application of Common-Mode Conducted Interference Analysis Method for SLLC Resonant Converters The common-mode conducted interference analysis method of this invention can be widely applied to common-mode interference analysis and electromagnetic compatibility design in SLLC resonant converters and other typical power electronic devices. Preferably, the method can be applied in the early stages of SLLC resonant converter design, predicting the common-mode current spectrum distribution and conduction intensity through simulation to assist in the design of reasonable filter circuits, grounding structures, and device selection. Furthermore, the method is also applicable to system fault diagnosis and common-mode interference source tracing scenarios; through reverse model derivation, the excitation location and propagation path of common-mode interference can be accurately identified. The accuracy of the model is verified by comparing simulations and actual measurements. The results show that the method can effectively predict the common-mode current distribution under different operating conditions, providing a theoretical basis and engineering guidance for suppressing common-mode interference.

[0035] The method is also applicable to various power electronic devices with high-frequency operating characteristics, such as LLC converters, DAB converters, motor drivers, and photovoltaic inverters.

[0036] In summary, the common-mode conducted interference analysis method provided by this invention not only has the characteristics of high precision and high efficiency, but can also be widely used in a variety of power electronic devices. In particular, in SLLC resonant converters, it can significantly improve the electromagnetic compatibility of the system and ensure that the equipment meets stringent EMC standards.

[0037] The flowchart of the method of this invention is as follows Figure 1 As shown.

[0038] Firstly, the modeling of common-mode interference sources is based on the main circuit topology and high-frequency operating characteristics of the SLLC resonant converter to identify common-mode interference excitation sources in the system. High-speed switching devices, including MOSFETs or IGBTs, generate interference waveforms with high di / dt and high dv / dt at the moment of turn-on and turn-off. This interference signal can form a common-mode interference current through the parasitic capacitance between the device and ground. To characterize the excitation source, this embodiment equates the high-frequency disturbance behavior to: a common-mode voltage source, which is a common-mode voltage source when dv / dt dominates; or a common-mode current source, which is a common-mode current source when di / dt dominates; and injects it as a common-mode excitation into the equivalent system model.

[0039] Secondly, the modeling of the common-mode interference propagation path is based on the extraction of high-frequency parasitic parameters from the input cables, output cables, PCB traces, filters, and grounding structures of the SLLC resonant converter. The specific steps are as follows: 1. Extract parasitic parameters: including distributed capacitance and inductance between cables and between cables and ground, and calculate the parameters using EM modeling tools or analytical methods; EM modeling tools include Ansys Q3D; 2. Constructing a transmission line model: The PCB conductors are segmented and modeled as transmission lines, and equivalent series inductance and capacitance to ground are introduced to represent the reflection and propagation characteristics of interference current under high-frequency conditions.

[0040] 3. Return path modeling: Using electromagnetic field coupling theory, the grounding structure is equivalent to an equipotential surface, and a complete ground loop closed path is established to capture the return mechanism of common mode current.

[0041] Finally, a complete common-mode interference model was established, starting from the interference source and proceeding through the propagation path to the LISN.

[0042] Thirdly, regarding the model simplification method based on high-frequency parasitic parameters, this implementation method introduces a step-by-step simplification strategy to address the high-dimensional complexity problem in modeling: 1. Simplified circuit structure: The number of nodes is reduced by using techniques such as star-delta transformation; 2. Equivalent Source Transformation: Using Norton / Thevenin theorem, the excitation source is equivalently transformed into a lumped parameter form for unified analysis. The Norton equivalent circuit is shown below. Figure 4 As shown in (a), the Thevenin equivalent circuit is as follows: Figure 4 As shown in (b); 3. Frequency Domain Expression Extraction: Deriving the transfer function of common-mode current in the frequency domain: (1) Expression for common-mode current under voltage source excitation:

[0043] In the formula i MG This represents the Norton equivalent current value of the interference voltage source. Z v This represents the Norton equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path.

[0044] (2) Expression for common-mode current under current source excitation:

[0045] In the formula V MG This represents the Thevenin equivalent voltage value of the interference current source. Zi This represents the Thevenin equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path.

[0046] (3) Laplace transform expression of common-mode current under voltage source excitation:

[0047] In the formula A x (x=1,3,5,…,11) M y (y=1,2,3,…,12) represents the coefficients composed of the capacitance and inductance parameters in the circuit, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude.

[0048] (4) Laplace transform expression of common-mode current under current source excitation:

[0049] In the formula E x (x=2,4,6,…,12) N y (y=1,2,3,…,12) represents the coefficients composed of the capacitance and inductance parameters in the circuit, and s is a complex variable in the complex frequency domain. I (s) represents the excitation amplitude of the current source.

[0050] (5) Expression for the total mode current of the SLLC resonant converter:

[0051] In the formula This represents the common-mode current generated by mode one of the SLLC resonant converter. This represents the common-mode current generated by mode two of the SLLC resonant converter.

[0052] (6) Expression for the total mode voltage of the SLLC resonant converter:

[0053] In the formula This represents the common-mode current generated by mode one of the SLLC resonant converter. This represents the common-mode current generated by mode two of the SLLC resonant converter. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path.

[0054] 4. Implementation of the Order Reduction Strategy: A stepwise simplification strategy is introduced. Preferably, by removing higher-order terms and optimizing coefficients in the frequency domain expression, the dominant frequency component with the greatest impact on the system's amplitude-frequency characteristics is selected within the target frequency band. The error tolerance method is used to ignore higher-order terms whose amplitude contribution is less than a set threshold, thus achieving order reduction simplification. To intuitively compare the deviations between each reduced-order expression and the original expression, the spectral range of the reduced-order expression is limited when plotting the spectrum curve. As the frequency increases, the spectrum curve is stopped when the result of the reduced-order expression begins to deviate significantly from the original expression. This processing more clearly shows the impact range of different levels of order reduction on the spectral accuracy, such as... Figure 5 As shown.

[0055] analyze Figure 5 As the frequency increases, the separation points between different reduced-order expressions and the original expression gradually appear and show differences: (1) The curve with the numerator retaining the first term is in It begins to deviate from the original expression, exhibiting a significant deviation.

[0056] (2) The curves that retain the first and third cubic terms in the molecule can fit the frequency range well, which extends to... The left and right values ​​indicate that adding a cubic term significantly improves the fitting accuracy of the high-frequency band.

[0057] (3) The curves retaining the first, third, and fifth degree terms in the molecule further extend the fitting range, covering higher frequency bands, approximately .

[0058] (4) The curves for retaining the first, third, fifth, and seventh terms and the first, third, fifth, and seventh terms in the numerator are highly consistent with the original expression across the entire frequency range, except in the extremely high frequency range (close to the original expression). The presence of slight separation indicates that retaining more higher-order terms can significantly improve the fitting accuracy in the high-frequency band.

[0059] Overall, the reduced-order expression that retains lower-order terms in the numerator can effectively describe the dynamic characteristics in the low-to-mid-frequency range. However, as the frequency increases, ignoring the influence of higher-order terms will gradually increase the error between the reduced-order expression and the original expression. Therefore, it is necessary to find a reduced-order expression that meets the accuracy requirements based on the actual analytical needs. If the accuracy is insufficient, the number of higher-order terms retained needs to be further increased to ensure fitting accuracy.

[0060] 5. Simplified model form: The complex frequency domain transfer function... H CM (s) is approximated as a first- or second-order transfer function, which improves computational efficiency. A typical form is as follows:

[0061] 6. Model Validation: To verify the accuracy and practicality of the common-mode modeling method proposed in this invention, simulation and experimental comparison tests were conducted. The specific verification process is as follows: (1) Experimental platform construction This embodiment uses a 3kW SLLC resonant converter as the experimental object and builds the following common-mode interference test platform: The common-mode current at the input terminal was measured using a line impedance stabilization network (LISN); the spectrum was sampled using an EMI receiver; the EMI receiver was a Rohde & Schwarz ESR; the interference excitation source was generated by switching devices, and the measurement frequency band was 10kHz–10MHz, in accordance with the CE102 power line conducted emission test standard of GJB 151B-2013; the PCB layout, cable arrangement and grounding method were consistent with the actual use scenario.

[0062] (2) Frequency domain model simulation Using the modeling method proposed in this invention, a common-mode interference equivalent model of the SLLC resonant converter is constructed and its order reduced, and the frequency domain transfer function is imported into MATLAB. The input excitation signal adopts a typical switching voltage waveform, with an edge time of 10–100 ns and a switching frequency of 100 kHz as the simulation input.

[0063] The common-mode current spectrum distribution obtained from the simulation results is as follows: Figure 6 As shown, the data is compared with the measured data.

[0064] (3) Result Comparison and Analysis Within the 10kHz–10MHz frequency band, the simulation results agree well with the measured data. Specific performance is as follows: The error at the peak frequency is less than 3dB; the prediction accuracy of the primary and secondary harmonic frequencies is over 95%; the reduced-order model reduces simulation time by about 60% while maintaining accuracy; and the average modeling error is within ±4.1dB under multiple parameter sample verifications, meeting the engineering prediction accuracy requirements.

[0065] Furthermore, the common-mode interference variation trend predicted by this model under different grounding wiring schemes is consistent with the measured variation trend, further verifying the practicality and accuracy of the model.

[0066] Fourth, common-mode interference analysis and application: Based on the constructed and simplified common-mode interference model, this invention can be applied in the following scenarios: 1. Spectrum Simulation and Prediction: Frequency domain analysis is performed using MATLAB / Simulink or PSIM platforms to obtain the spectrum distribution of the system's common-mode current and common-mode voltage; 2. Electromagnetic compatibility assessment: Assess whether the intensity of common-mode interference complies with EMC standards such as CISPR, GJB 151B, or GB / T, providing a reference for filter design; 3. Initial system design optimization: In the early stages of design, even if some specific parameters are not yet fully determined, the common-mode current trend can be predicted through models to assist in the selection of filters, cable routing and grounding structures; 4. Fault diagnosis and interference source tracing: Combine the measured results to perform reverse model analysis, locate the interference source and its path, and improve the system debugging efficiency.

[0067] As can be seen from the above specific implementation methods, the common-mode interference modeling and simplified analysis method proposed in this invention has high precision, high efficiency and good versatility, can effectively improve the EMC design level of power electronic systems, and has broad application prospects and high engineering value.

Claims

1. A method for modeling and analyzing common-mode conducted interference in SLLC resonant converters, characterized in that, Includes the following steps: Step 1: Construct the common-mode conducted interference model of the SLLC resonant converter; The common-mode conducted interference model includes a common-mode interference source model and a common-mode propagation network model. The common-mode interference source includes a high-frequency common-mode voltage source and a common-mode current source. Based on the operating characteristics of the main circuit in the SLLC resonant converter and its high-frequency switching behavior, a common-mode interference source is constructed and equivalently represented. The voltage fluctuation behavior of the high-speed switching devices in the SLLC resonant converter during the turn-on and turn-off processes is equivalently represented as a common-mode voltage source. The high-speed switching devices include MOSFET devices or IGBT devices. Based on the interference mechanism of the SLLC resonant converter, the current fluctuation behavior of the high-speed switching devices in the SLLC resonant converter is equivalently represented as a common-mode current source. Either the common-mode current source or the common-mode voltage source is arbitrarily selected as the excitation source and input into the common-mode conducted interference model. Based on the common-mode interference source, the circuit parasitic parameters are extracted and processed to establish a common-mode propagation network model. Step 2: Predict common-mode conducted interference based on the common-mode conducted interference model; Step 2-1: Using the star-delta converter method, reconstruct the topology of the original SLLC resonant converter in the common-mode conducted interference model into an equivalent topology; Step 2-2: Using Norton's equivalent circuit and Thevenin's equivalent theorem, calculate the common-mode current under voltage source excitation and the common-mode current under current source excitation. Then, based on the common-mode current under voltage source excitation and the common-mode current under current source excitation, calculate the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation. Finally, obtain the total mode current and total mode voltage of the SLLC resonant converter. The graphs are plotted based on the common-mode current under voltage source excitation, the common-mode current under current source excitation, the Laplace transform expression of the common-mode current under voltage source excitation, and the Laplace transform expression of the common-mode current under current source excitation. The frequency domain transfer function is calculated using the common-mode current Laplace transform expression and the common-mode current Laplace transform expression under current source excitation; the frequency domain transfer function includes the frequency domain transfer function under voltage source excitation and the frequency domain transfer function under current source excitation. Steps 2-3: Use a stepwise simplification strategy to reduce the order of the frequency domain transfer function; the reduced-order simplified frequency domain transfer function is the prediction result. The stepwise simplification strategy is as follows: within the target frequency band, based on the common-mode response characteristics of the dominant transmission channel, identify the common-mode propagation path and delete higher-order coupling terms.

2. The common-mode conducted interference modeling and analysis method for SLLC resonant converters according to claim 1, characterized in that, The steps for establishing the common-mode propagation network model are as follows: The parasitic capacitance and parasitic inductance existing in the PCB traces and grounding loops are extracted to construct an equivalent common-mode propagation network model. The distributed parameter modeling method is adopted to model the PCB circuit conductors as a multi-segment transmission line model. The multi-segment transmission line model introduces equivalent capacitance and inductance parameters to describe the propagation and reflection characteristics of common-mode interference current in the circuit. Based on node analysis and electromagnetic field coupling theory, the parasitic capacitance and parasitic inductance existing in the grounding loop are constructed into a complete grounding loop return current model. The ground loop return current model characterizes the complete propagation path and loop closure characteristics of common-mode current in the system, accurately describing the propagation and feedback process of common-mode interference current in the circuit.

3. The common-mode conducted interference modeling and analysis method for SLLC resonant converters according to claim 1, characterized in that, The steps for calculating the common-mode current under voltage source excitation and the common-mode current under current source excitation, and then calculating the Laplace transform expressions for the common-mode current under voltage source excitation and the common-mode current under current source excitation based on the common-mode current under voltage source excitation and the common-mode current under current source excitation; finally, obtaining the total mode current and total mode voltage of the SLLC resonant converter are as follows: Step 2-2-1: Obtain the common-mode current under voltage source excitation for: In the formula i MG This represents the Norton equivalent current value of the interference voltage source. Z v This represents the Norton equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-2: Obtain the common-mode current under current source excitation : In the formula V MG This represents the Thevenin equivalent voltage value of the interference current source. Z i This represents the Thevenin equivalent resistance value. Z LISN This represents the impedance value of the LISN in the common-mode conduction current path; Step 2-2-3: Obtain the Laplace transform expression of the common-mode current under voltage source excitation. : Based on Norton's equivalent circuit and , , , and To obtain the Laplace transform expression of the common-mode current under voltage source excitation. : Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. Z 5. Z 41 , Z 44 , Z 45 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology. v It is the impedance value of the parallel impedance element. i MG is the current value of the equivalent current source, L is the inductance value of the equivalent inductor, C is the capacitance value of the equivalent capacitance, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude. M y Let y represent the denominator coefficient of the y-th mode composed of the capacitor and inductor parameters in the original SLLC topology, where y = 0, 1, 2, 3, ..., 12; A x The x-th mode-molecule coefficient, representing the capacitance and inductance parameters in the original SLLC topology, is given by x = 1, 2, 3, ..., 11; where... A x for: In the formula M y for: in, This is the capacitance value of the first pair of parasitic capacitances to ground; This is the capacitance value of the second pair of parasitic capacitances to ground; This is the capacitance value of the seventh capacitor; This is the capacitance value of the eighth capacitor; This is the capacitance value of the sixth pair of parasitic capacitances to ground; This is the capacitance value of the third pair of parasitic capacitances to ground; This is the capacitance value of the fourth pair of parasitic capacitances to ground; The inductance value of the tenth parasitic inductance; This is the inductance value of the ninth parasitic inductance; The inductance value of the first parasitic inductance; The inductance value of the second parasitic inductance; The inductance value is the parasitic inductance on the source side of the first switching NMOS transistor; The inductance value is the parasitic inductance on the source side of the fourth switching NMOS transistor. Let be the inductance value of the parasitic inductance of the first rectifier diode. The inductance value is the parasitic inductance of the fourth rectifier diode; This is the capacitance value of the transformer resonant capacitor; This is the fifth parasitic inductance value; This is the eighth parasitic inductance value; This is the inductance value of the transformer's resonant inductance; The impedance value of the LISN; The parameters of the capacitor and inductor include: the first parasitic inductance L1 is the parasitic inductance between the positive input port and one set of bridge arms; the second parasitic inductance L2 is the parasitic inductance between the negative input port and another set of bridge arms; the third parasitic inductance L3 is the parasitic inductance between the two sets of bridge arms; the fourth parasitic inductance L4 is the parasitic inductance between the two sets of bridge arms; and the ninth parasitic inductance L... t1 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer; the tenth parasitic inductance L t2 The parasitic inductance between the midpoint of the two bridge arms and the primary terminal of the transformer is denoted as L5; the fifth parasitic inductance L5 and the sixth parasitic inductance L6 are the parasitic inductances between the two bridge arms; the seventh parasitic inductance L7 is the parasitic inductance between one bridge arm and the positive output port; the eighth parasitic inductance L8 is the parasitic inductance between the other bridge arm and the negative output port; the first parasitic capacitance to ground is C. a1 The parasitic capacitance to ground at the midpoint a1 of the side bridge arm; the second parasitic capacitance to ground C a2 The parasitic capacitance to ground at the midpoint a2 of the primary side bridge arm; the third parasitic capacitance to ground C d1 The parasitic capacitance to ground at the midpoint d1 of the secondary bridge arm; the fourth parasitic capacitance to ground C d2 The fifth parasitic capacitance to ground is Cp1, which is the parasitic capacitance to ground of the primary busbar; the sixth parasitic capacitance to ground is C... g1 The seventh capacitor C is the parasitic capacitance from the load terminal to ground. ps The common-mode port capacitor of the transformer; the eighth capacitor C sp For the common-mode port capacitance of the transformer; Q i For each power device in the primary-side circuit of the original SLLC topology; L pi1 For each power device in the primary-side circuit of the original SLLC topology Q i The drain-side parasitic inductance; L pi2 Each power device in the primary-side circuit of the original SLLC topology Q i Parasitic inductance on the source side; i = 1, 2, 3, 4; each rectifier diode D j The parasitic inductance is L sj1 and L sj2 , j = 1, 2, 3, 4; Step 2-2-4: Obtain the Laplace transform expression of the common-mode current under current source excitation. : Based on Thevenin equivalent circuit and Z i , V MG , i CM Z L (s) and Z c (s), to obtain the Laplace transform expression of the common-mode current under current source excitation. : Z L (s) and Z c (s) are the impedance expressions for the inductor and capacitor in the complex frequency domain, respectively. I Q2 The value represents the excitation amplitude of the current source, where... Z 5. Z 41 , Z 44 , Z L2 Z is the impedance value of the equivalent impedance element obtained by transforming and combining the parasitic capacitance and parasitic inductance in the original SLLC topology. i L is the impedance value of the series impedance element, C is the inductance value of the equivalent inductance element, s is the capacitance value of the equivalent capacitance element, and s is a complex variable in the complex frequency domain. V (s) represents the voltage source excitation amplitude, where... E z This represents the z-th mode binary coefficient composed of the capacitor and inductor parameters in the circuit, where z {2,4,6,…,12}; N y y represents the denominator coefficient of the y-th mode, which is composed of the capacitance and inductance parameters in the circuit. {0,1,2,3,…,12}; s is a complex variable in the complex frequency domain. I (s) represents the amplitude of the current source excitation; Step 2-2-5: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total common-mode current of the SLLC resonant converter. : Step 2-2-6: Based on the Laplace transform expressions for the common-mode current under voltage source excitation and current source excitation, obtain the total mode voltage of the SLLC resonant converter. for: in Z LISN This represents the impedance value of the LISN in the common-mode conduction current path, and the magnitude of the common-mode interference noise of the SLLC resonant converter is expressed by the total mode voltage expression.

4. A terminal device, comprising a processor, a memory, and a computer program stored in the memory; characterized in that, When the processor executes the computer program, it implements the common-mode conducted interference modeling and analysis method for SLLC resonant converters as described in any one of claims 1-3.

5. A computer-readable storage medium storing a computer program; characterized in that, When the computer program is executed by the processor, it implements the common-mode conducted interference modeling and analysis method for SLLC resonant converters according to any one of claims 1-3.

Images