Server management methods and electronic devices

Abstract

This application discloses a server management method and electronic device, relating to the server field. The method includes: after determining that the host of the target server has completed a self-test, sending a first control command to a baseboard management controller; the first control command instructing the baseboard management controller to close the communication channel between the host and the baseboard management controller through a hardware control interface; receiving the monitoring result of the target server sent by the baseboard management controller; determining that the monitoring result indicates that the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, and sending the first control command again to the baseboard management controller to cause the baseboard management controller to close the communication channel between the host and the baseboard management controller through a hardware control interface. This application achieves high reliability and microsecond-level response for the state switching of the communication channel between the host and the baseboard management controller through dual-path redundancy control, eliminating the possibility of operating system misidentification.

Description

Technical Field

[0001] This application relates to the field of server technology, and in particular to a server management method and electronic device. Background Technology

[0002] In enterprise-level server management, the Baseboard Management Controller (BMC) is a core component. The Host to BMC (H2B) module, as a dedicated hardware channel, uses shared memory and hardware interface mapping technology to achieve critical functions such as firmware upgrades and hardware monitoring, ensuring efficient communication between the BMC and the host. However, H2B exists in the form of a PCI device, making it easily scanned and identified as an unidentified device by the OS (Operating System), leading to customer misjudgments and increased after-sales costs. Furthermore, OS-level operations may threaten BMC security. Therefore, hiding the H2B device under the OS has become a key requirement in server design.

[0003] Existing solutions mainly include two types: BMC process polling the POST status to disable H2B, and GPIO interrupt-triggered shutdown, with the latter offering better response speed. However, both solutions suffer from insufficient timing control. The polling solution has a 10%-15% recognition probability due to timing differences, while the interrupt solution may be blocked by high-priority interrupts, still resulting in a 3%-5% false recognition rate. These probabilistic failures cannot fully guarantee the independence of the BMC and the stability of the server. Summary of the Invention

[0004] This application provides a server management method and electronic device to at least solve the technical problem in the related art that probabilistic failures cannot fully guarantee the independence of the BMC and the stability of the server.

[0005] Firstly, this application provides a server management method, including:

[0006] In response to the host completing its self-test after determining the target server, a first control command is sent to the baseboard management controller; the first control command is used to instruct the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface.

[0007] Receive monitoring results of the target server sent by the baseboard management controller;

[0008] In response to the monitoring result indicating that the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, the first control command is sent to the baseboard management controller again, so that the baseboard management controller closes the communication channel between the host and the baseboard management controller through the hardware control interface.

[0009] Secondly, this application provides a server management method, including:

[0010] Receive the first control command, and based on the first control command, close the communication channel between the host and the baseboard management controller through the hardware control interface;

[0011] Periodically execute monitoring processes on the target server to obtain monitoring results;

[0012] Upon receiving the first control command again after sending out the monitoring results, the communication channel between the host and the baseboard management controller is closed via the hardware control interface.

[0013] Thirdly, this application provides a server management device, comprising:

[0014] The sending module is used to send a first control command to the baseboard management controller in response to the host completing the self-test after determining the target server; the first control command is used to instruct the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface.

[0015] The first receiving module is used to receive the monitoring results of the target server sent by the baseboard management controller;

[0016] The sending module is also used to respond to the determination that the monitoring result indicates that the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, and then send the first control command to the baseboard management controller again, so that the baseboard management controller closes the communication channel between the host and the baseboard management controller through the hardware control interface.

[0017] Fourthly, this application provides a server management device, comprising:

[0018] The second receiving module is used to receive the first control command;

[0019] The control module is used to close the communication channel between the host and the baseboard management controller through a hardware control interface based on the first control command.

[0020] The monitoring module is used to periodically execute monitoring processes on the target server in order to obtain the monitoring results of the target server;

[0021] The control module is also used to close the communication channel between the host and the baseboard management controller via the hardware control interface in response to receiving the first control command again after sending out the monitoring result.

[0022] Fifthly, this application provides an electronic device, including: a memory and a processor;

[0023] Memory, used to store computer programs;

[0024] A processor is used to implement the steps of a server management method, such as any one of the first aspects or any one of the second aspects, when executing a computer program.

[0025] In a sixth aspect, this application provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a data processor, implements the steps of the server management method as described in any of the first or second aspects.

[0026] In a seventh aspect, this application provides a computer program product, including a computer program that, when executed by a data processor, implements the steps of a server management method as described in any of the first or second aspects.

[0027] This application provides a server management method and electronic device that utilizes the self-test event of the target server's host as a precise trigger point. Upon confirmation of self-test completion, a first control command is actively sent to ensure that the communication channel between the host and the baseboard management controller (BMC) is closed before the OS boot process. After the first control command is sent, various reasons, such as communication failures or BMC processing delays, may prevent the communication channel from being successfully closed. By rechecking the monitoring results and sending the control command again, it can be ensured that the communication channel between the host and the BMC is ultimately closed, guaranteeing the consistency and accuracy of the operation. This redundant operation mechanism improves system reliability. Even if the first operation fails, the system still has the opportunity to complete the expected task through a second operation, avoiding resource waste and security risks caused by an unclosed communication channel, and ensuring the stable operation of the server. Attached Figure Description

[0028] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram illustrating an application scenario corresponding to a server management method provided in an embodiment of this application;

[0030] Figure 2 A schematic flowchart illustrating a server management method provided in an embodiment of this application;

[0031] Figure 3 A flowchart illustrating a server management method according to another embodiment of this application;

[0032] Figure 4 This is a schematic diagram of the structure of a server management device provided in one embodiment of this application;

[0033] Figure 5 A schematic diagram of the structure of a server management device provided in another embodiment of this application;

[0034] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0035] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, other embodiments obtained by those of ordinary skill in the art without creative effort are all within the protection scope of this application.

[0036] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0037] In enterprise-level server management systems, the Baseboard Management Controller (BMC) is a core component ensuring remote server monitoring, fault diagnosis, and firmware maintenance. Its efficient and secure communication with the host directly determines the reliability of server management. H2B (Host to BMC), as a dedicated hardware channel, utilizes shared memory and hardware interface mapping technology to achieve core functions such as rapid firmware upgrades, real-time hardware status monitoring, and transmission of critical control commands, providing high-speed support for direct data interaction between the BMC and the host. However, H2B is integrated into the hardware architecture as a PCI device. The hardware scan process during OS startup actively detects this device. If a compatible driver is lacking, an "unidentified device" message or a yellow exclamation mark will appear, easily leading to misjudgments of server hardware failures and increasing unnecessary after-sales troubleshooting costs. Simultaneously, software operations or attacks at the OS level may penetrate the BMC's independent management domain, threatening the security of underlying management functions. Therefore, ensuring that H2B devices are not displayed in the OS while guaranteeing core H2B functionality is a critical requirement in server design. To address the issue of H2B devices being misidentified in the OS, related technologies have mainly developed two types of solutions. One approach is a passive detection scheme using the BMC component monitoring process. This relies on the BMC's internal monitoring process to poll the POST (Power-On Self-Test) status. Upon detecting a POST completion flag, it calls the H2B status control interface to shut down the device. The second approach is a GPIO interrupt-triggered scheme. This transmits the POST completion signal in real-time via hardware GPIO pins. Upon receiving the interrupt, the BMC immediately executes the H2B shutdown operation, compressing the response time from seconds to milliseconds and improving control timeliness. However, the timing difference between the polling interval and the POST completion time means that in approximately 10%-15% of cases, the OS startup scan precedes the H2B shutdown operation, and the device is still detected. Higher-priority interrupts in the BMC system, such as power failures or hardware errors, may block the POST completion interrupt. For fast-starting OSs, there is still a 3%-5% probability of being scanned due to a delayed H2B shutdown. The lack of precise control over startup timing in these technologies leads to persistent probabilistic failures. This fails to completely eliminate customer misjudgments and also makes it difficult to guarantee the independence of BMC management functions and the stability of server operation.

[0038] Therefore, in addressing the technical challenges of the aforementioned technologies, to resolve the probabilistic failure of H2B channel closure caused by timing differences or interruption blocking in existing solutions due to single control logic, a dual mechanism of self-test completion trigger command sending and direct hardware control is adopted to replace the traditional single polling or single interrupt method. This ensures that after the host completes its self-test, it directly sends the first control command to the BMC, quickly executing the H2B channel closure operation through the hardware control interface, eliminating the need for software polling and preventing OS misidentification caused by timing lags. Secondly, to overcome the potential execution failure risks of single command sending, a closed-loop control structure of status monitoring and retry compensation is adopted. The BMC provides real-time feedback on the target server's self-test status and channel closure status. If the monitoring result indicates an anomaly where the self-test is complete but the channel is not closed, the first control command is immediately resent. Repeated triggering of the hardware control interface ensures the channel closure operation is implemented without manual intervention, while also avoiding failures caused by high-priority interrupt blocking, thus improving the hidden reliability and stability of the H2B channel.

[0039] Figure 1 This is a schematic diagram illustrating an application scenario of a server management method provided in an embodiment of this application. For example... Figure 1 As shown in the diagram, the application scenario includes: a baseboard management controller 101, a host 102, a communication channel (H2B) 103 between the host and the baseboard management controller, and a server management device 104.

[0040] It is understood that the baseboard management controller 101, the host 102, the communication channel (H2B) 103 between the host and the baseboard management controller, and the server management device 104 are all integrated in the server.

[0041] Specifically, after the server powers on, the host begins a self-test. Upon completion of the self-test, the Basic Input / Output System (BIOS) sends a message to the server management device 104. After confirming that the target server's host has completed the self-test, the server management device 104 sends a first control command to the baseboard management controller 101. Upon receiving the command, the baseboard management controller 101 closes the communication channel 103 between the host and the baseboard management controller via a hardware control interface. The baseboard management controller 101 periodically monitors the server status and generates monitoring results, which are then sent to the server management device 104. When the server management device 104 determines that the monitoring result indicates the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, it sends the first control command to the baseboard management controller 101 again, causing the baseboard management controller 101 to close the communication channel 103 between the host and the baseboard management controller via a hardware control interface.

[0042] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0043] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or modules, and may be electrical, mechanical, or other forms.

[0044] Figure 2 This is a flowchart illustrating a server management method according to an embodiment of this application, as shown below. Figure 2 As shown, the execution subject of this embodiment is a server management device. This server management device can be implemented through a computer program, or through a medium storing the relevant computer program, such as a USB flash drive and / or optical disc; alternatively, it can be implemented through a physical device that integrates or installs the relevant computer program, such as a chip or electronic device. The electronic device can be a computer or a server, etc. The server management method provided in this embodiment includes the following steps:

[0045] S201. In response to the host of the target server completing the self-test, a first control command is sent to the baseboard management controller; the first control command is used to instruct the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface.

[0046] The target server is the server that needs to shut down the communication channel between the host and the baseboard management controller. It includes the host, the baseboard management controller (BMC), and the hardware system of the communication channel between the host and the baseboard management controller, such as the H2B communication channel.

[0047] The host self-test refers to the process where the core computing units of the host and server, including the CPU, memory, and motherboard, perform POST (Power-On Self-Test) after power-on to check the hardware integrity. Once the self-test is complete, it means that the host hardware is ready and will soon enter the operating system (OS) boot process.

[0048] The Baseboard Management Controller (BMC) is an independent management module for the server, responsible for hardware monitoring, remote control, fault diagnosis, etc., and communicates with the host through a dedicated channel, such as H2B.

[0049] The first control command is a specific signal sent to the BMC, instructing the BMC to close the communication channel between the host and the BMC.

[0050] The hardware control interface refers to the physical circuit interface between the BMC and the channel, such as dedicated registers and GPIO pins, which directly control the opening or closing of the channel through hardware level signals or circuit switches.

[0051] The communication channel between the host and the BMC exists in the form of a PCI device, and high-speed data interaction between the host and the BMC is achieved through shared memory or hardware mapping.

[0052] Specifically, after the host is powered on, the Basic Input / Output System (BIOS) automatically initiates the POST process, sequentially testing the CPU, memory, PCI devices (including H2B), storage, and other hardware. When all hardware tests pass, the BIOS sends a self-test completion flag, triggering a hardware signal to the server management device, such as via the Intelligent Platform Management Interface (IPMI) command. Upon receiving the self-test completion flag and confirming that the target server's host has completed the self-test, the server management device sends a first control instruction to a designated register in the BMC. The BMC receives and parses the instruction, then sends a trigger signal to its internal hardware control interface. The hardware control interface then disconnects the physical connection of the H2B channel or disables its PCI device attributes.

[0053] S202, Receive the monitoring results of the target server sent by the baseboard management controller.

[0054] Among them, the monitoring results sent by the baseboard management controller refer to the status reports or data information generated by the BMC after real-time monitoring of the key status of the target server.

[0055] Specifically, the BMC uses hardware sensors and registers to collect real-time data on the host self-test progress and H2B channel status, ensuring monitoring coverage of core control points. The BMC encapsulates the collected status information into standardized data frames and sends them to the server management device. The server management device reads and verifies the monitoring results, such as verifying that the data has not been tampered with via checksums. If verification fails, a retransmission request is sent to the BMC.

[0056] S203. In response to determining that the monitoring result indicates that the host has completed the self-test and that the communication channel between the host and the baseboard management controller is not closed, the first control command is sent to the baseboard management controller again to cause the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface.

[0057] Among them, the monitoring result confirming that the host has completed the self-test means that the monitoring result sent by the BMC clearly indicates that the host has completed POST, such as the status field being 0x01, which means that the host hardware test has passed and it is about to enter the operating system startup process.

[0058] Specifically, the server management device extracts two fields from the parsed monitoring results: host self-test status and H2B channel status. If the host self-test status is complete and the H2B channel status is not closed, the retry condition is met. If either condition is not met, subsequent operations are not performed. Using the same transmission link and format as the initial command, the first control command is sent to the BMC again to ensure the consistency and reliability of the retry command and avoid execution failure due to command differences. After receiving the retry command, the BMC sends a trigger signal to the internal hardware control interface; the hardware control interface disconnects the physical connection of the H2B channel or disables its PCI device attributes.

[0059] Optionally, a short-term timer, such as 50ms, is started after the command is sent. If no confirmation of command reception is received from the BMC, the command is retransmitted, with a maximum of 3 retries to avoid infinite loops. After receiving the latest monitoring results from the BMC, the channel status is checked again: if it is closed, the process ends; if it is still not closed, an alarm can be triggered, and maintenance personnel can intervene to troubleshoot hardware faults.

[0060] This application provides a server management method that utilizes the self-test event of the target server's host as a precise trigger point. Upon confirmation of self-test completion, a first control command is actively sent to ensure that the communication channel closure between the host and the baseboard management controller (BMC) occurs before the OS startup process. After the first control command is sent, various reasons, such as communication failures or BMC processing delays, may prevent the communication channel from successfully closing. By rechecking the monitoring results and sending the control command again, it can be ensured that the communication channel between the host and the BMC is ultimately closed, guaranteeing the consistency and accuracy of the operation. This redundant operation mechanism improves system reliability. Even if the first operation fails, the system still has the opportunity to complete the expected task through a second operation, avoiding resource waste and security risks caused by an unclosed communication channel, and ensuring the stable operation of the server.

[0061] As an optional implementation, based on any of the above embodiments, determining that the target server's host has completed a self-test includes:

[0062] In response to receiving a message packet, determine whether the sender of the message packet is a basic input / output system.

[0063] In response to determining that the sender is a basic input / output system, the message packet is decrypted according to a preset decryption algorithm.

[0064] Determine whether the messages included in the decrypted message packet are of the preset message type.

[0065] In response to the determination of the preset message type, the message content is parsed. The message content includes the host's basic input / output system initialization completion status, the host's hardware self-test completion status, and the host's operating system boot preparation ready status.

[0066] If all states in the message content are in a completed state, then the host has completed its self-test.

[0067] Among them, a message packet refers to a structured data frame that contains key status information during the host self-test process, such as initialization status and hardware self-test status.

[0068] The Basic Input / Output System (BIOS) is the firmware program embedded on the server motherboard. It is responsible for hardware initialization, self-test (POST), and operating system boot after the host is powered on, and is the core controller of the host boot process.

[0069] The preset decryption algorithm refers to the encryption and decryption rules agreed upon with BMC in advance, such as AES-128 symmetric encryption, CRC check, etc., which are used to verify the legitimacy of message packets and prevent forgery or tampering.

[0070] Among them, the preset message type refers to a message identifier specifically used to notify the host of its self-test status, distinguishing it from other types of messages.

[0071] The BIOS initialization completion status of the host refers to the completion of the BIOS program loading and self-test environment preparation.

[0072] The host's hardware self-test completion status refers to the BIOS's completion of testing of the host's core hardware, including the CPU, memory, PCI devices, and storage.

[0073] The operating system boot ready state of the host refers to the sign that the BIOS has completed hardware configuration and boot device detection and is ready to enter the operating system loading process.

[0074] Specifically, after receiving a message packet, the server management device extracts the sender ID field from the packet header. It compares the extracted ID with a preset BIOS sender ID; if they match, the sender is determined to be the BIOS, and the process proceeds to the next step; otherwise, the message packet is discarded. The server management device's built-in decryption function uses a pre-agreed key with the BIOS to decrypt the encrypted data segment of the message packet. After decryption, it verifies the message packet's checksum; if they match, the message has not been tampered with; otherwise, it is marked as an invalid message, the process terminates, and an exception log is recorded. The decrypted message packet contains a message type field. This field is read and compared with a preset self-test status message type; if the field value matches, it is determined to be the target message type, and the message parsing stage begins; if they do not match, the message is forwarded according to the processing logic for the corresponding message type, and the self-test judgment process is not executed. The message content status value in the message buffer is read; only when BIOS initialization is complete, hardware self-test passes, and OS boot preparation is complete simultaneously is the host considered to have completed the self-test.

[0075] The server management method provided in this application, by first determining whether the sender of a received message packet is a Basic Input / Output System (PIS), can effectively prevent interference from illegal messages. Using a preset decryption algorithm to decrypt the message packet further enhances the security of information transmission. Determining whether the message in the decrypted message packet is a preset message type helps filter out irrelevant or erroneous messages, ensuring that the subsequently parsed message content truly reflects the host's self-test status. Through rigorous multi-stage verification, it can better adapt to complex environments, improve the system's fault tolerance to various abnormal situations, and ensure accurate and reliable determination of whether the host has completed its self-test under all circumstances.

[0076] As an optional implementation, based on any of the above embodiments, it further includes:

[0077] In response to the monitoring result indicating that the host power status is off, a second control command is sent to the board management controller.

[0078] The second control command is used to instruct the baseboard management controller to open the communication channel between the host and the baseboard management controller through the hardware control interface.

[0079] The monitoring result indicating that the host power status is off refers to the information returned by the BMC after monitoring the power status of the target server, indicating that the host has been powered off or the power is turned off.

[0080] The second control command is a dedicated command sent to the BMC, which instructs the BMC to reopen the H2B channel through the hardware control interface and restore the communication capability between the host and the BMC.

[0081] Specifically, the BMC acquires the host power status in real time through power status pins on the motherboard or communication with the power management chip. The BMC's monitoring process periodically reads the power status value; if the status is detected as off three times consecutively, it confirms that the host power is off, generates a power-off monitoring result, and sends it to the server management device. The server management device, based on the monitoring result, determines that the current power is off and sends a second control command to the BMC. Upon receiving the command, the BMC sends a trigger signal to its internal hardware control interface, which then opens the communication channel. In the server management method provided in this application embodiment, opening the communication channel is a necessary prerequisite when performing configuration changes, firmware upgrades, or other operations on a host in a powered-off state. Opening the communication channel when the host power is off makes it possible to remotely wake up the host. Operators can send a wake-up command through the baseboard management controller to restart the host. This ensures a high server boot success rate and meets high availability requirements.

[0082] As an optional implementation, based on any of the above embodiments, it further includes:

[0083] In response to the determination that the host has completed the self-test, the preset self-test status flag is switched to "completed".

[0084] In response to the monitoring result indicating that the host power status is off, the preset host status flag is switched to "power off".

[0085] In response to determining that the communication channel between the host and the board management controller is closed, the preset channel status flag is switched to closed.

[0086] By cyclically verifying the preset self-test status flag, preset host status flag, and preset channel status flag, it determines whether to perform a shutdown, startup, or skip operation on the communication channel between the host and the baseboard management controller.

[0087] Among them, the preset self-test status flag refers to the flag bit used to record whether the host has completed the self-test, such as bit 1 of the register. 0 indicates that it has not been completed and 1 indicates that it has been completed. It is one of the core bases for determining when to close the H2B channel.

[0088] Among them, the preset host status flag refers to the flag bit that records the host power status.

[0089] Among them, the preset channel status flag refers to the flag bit that records the current status of the H2B communication channel.

[0090] Among them, the cyclic verification refers to reading the above three flag bits at a fixed period, such as 10ms, and determining the next operation for the H2B channel through logical judgment, such as closing, opening or skipping.

[0091] Specifically, after confirming the host has completed its self-test, the flag update logic is triggered, writing a 1 to a preset register, such as the BMC's internal status register 0x1001, overwriting the original 0. After writing, the flag is read back to confirm the update; if this fails, it is retried three times to ensure the flag status is accurate. After confirming the host power is off, the host status flag update is triggered, writing a 0 to a preset register, such as 0x1002, overwriting the original 1. The flag update timestamp is recorded synchronously for tracing the state transition timing. After the BMC performs the H2B channel shutdown operation, the shutdown is confirmed successfully via feedback signals from the hardware control interface. A 0 is written to a preset register, such as 0x1003, overwriting the original 1. If the shutdown operation fails, the flag remains at 1, awaiting retry logic processing. A verification process is initiated once according to a preset cycle, reading the values ​​of the self-test status, host status, and channel status.

[0092] Furthermore, when the self-test status is completed, the host status is powered on, and the channel status is enabled, the first control command is triggered to close the H2B channel; when the host status is powered off and the channel status is disabled, the second control command is triggered to enable the H2B channel; other combined statuses, such as self-test not completed but channel enabled, or host powered on but channel disabled, will not be executed, and the verification will be performed after the status changes.

[0093] The server management method provided in this application, in response to different events such as host self-test completion, power-off, and communication channel closure, switches preset self-test status flags, preset host status flags, and preset channel status flags respectively. This explicit flag switching mechanism enables the server management system to clearly and accurately record the key states of the host at different times. By distinguishing them with independent flags, the management system can accurately identify the specific state of the current host, preventing operational errors caused by incorrect state judgments. Circularly verifying the preset self-test status flag, preset host status flag, and preset channel status flag provides an accurate decision-making basis for determining whether to close, open, or skip the communication channel operation. This decision-making mechanism based on accurate status greatly improves operational reliability and reduces system failures caused by misoperation.

[0094] As an optional implementation, based on any of the above embodiments, it further includes:

[0095] In response to the determination that the monitoring result shows that the host power is off and the temperature sensor reading is below the preset temperature threshold, a second control command is sent to the board management controller.

[0096] The host power status and temperature sensor readings are checked again after a preset interval.

[0097] In response to the monitoring result indicating that the host power is off and the temperature sensor reading is below the preset temperature threshold, the preset channel status flag is switched to "on".

[0098] Among them, the temperature sensor reading refers to the real-time temperature value collected by the temperature sensor inside the server, which is used to reflect the heat dissipation status of the host hardware.

[0099] The preset temperature threshold refers to a pre-set temperature critical value. A value below this threshold indicates that the host hardware has been sufficiently cooled and meets the temperature conditions for opening the H2B channel.

[0100] The preset duration refers to the interval between two status checks.

[0101] Specifically, the BMC reads the host power status register through the power management chip to confirm that the status is off and has been maintained for at least 5 seconds. It then reads the current reading from the temperature sensor via the I2C bus, packages it as a monitoring result, and sends it to the server management device. The server management device compares the collected temperature value with a preset threshold. If the temperature is lower than the preset threshold, the power-off condition and the temperature below the threshold are met, triggering the second control command sending process. The command is sent to the BMC via the bus or a dedicated signal line. Upon receiving the command, the BMC does not immediately open the channel but only activates the H2B power supply. After receiving the second control command, the BMC starts a preset duration timer. After the timer expires, it repeats the previous detection logic. In response to the second confirmation that the condition is met, it switches the preset channel status flag to "on". The BMC sends an enable signal through the hardware control interface to restore the physical connection of the channel and switches the preset channel status flag from "off" to "on".

[0102] The server management method provided in this application embodiment means that shutting down the host power supply means that its main computing and operating functions have stopped. If the communication channel is also kept closed at this time, although some energy can be saved, the ability to remotely monitor and manage the host will be lost. However, by operating as described above, the channel is opened under the premise of ensuring that the host temperature is within a safe range (below a preset threshold), which can not only meet the possible remote management needs in the future, but also avoid unnecessary energy waste, achieve precise energy utilization, and reduce the overall energy consumption cost of the data center.

[0103] As an optional implementation, based on any of the above embodiments, it further includes:

[0104] Receives a third control command sent through a preset expansion interface; the third control command includes instructions to open or close the communication channel between the control host and the board management controller.

[0105] The third control command is used to perform corresponding operations on the communication channel between the host and the baseboard management controller.

[0106] Among them, the preset extension interface refers to the external physical interface reserved by the server, which is used by operation and maintenance personnel to send control commands directly to the host or BMC through external devices.

[0107] The third control command refers to the manual control command sent through the preset extended interface, which contains a clear operation type.

[0108] Specifically, the default extended interface is in listening mode. When an external device, such as a laptop connected to a debugging terminal, connects via a serial port protocol or a dedicated debugging protocol, the interface module detects the communication signal and activates the receive mode. Externally sent third-party control commands must follow a preset format. The interface module parses the command header and verifies whether it conforms to the format specification; if not, it returns an invalid command message. External manual commands are executed first, overriding the results of the internal automatic control logic, ensuring that maintenance personnel can forcibly adjust the channel status to meet debugging needs. If the command is to close the H2B channel, the same hardware control logic as the internal first control command is invoked, sending a close signal through the H2B dedicated register to disable PCIe device attributes or disconnect the shared memory path. If the command is to open the H2B channel, the same logic as the internal second control command is invoked, sending an open signal to restore the channel's physical connection and device attributes.

[0109] The server management method provided in this application addresses the varying communication requirements between the host and the BMC across different business scenarios and management strategies. For example, during data center maintenance, the communication channel may need to be temporarily shut down to reduce interference; conversely, in scenarios requiring remote monitoring and management, the channel must be promptly activated. By receiving control commands through a preset extended interface, the communication channel status can be flexibly adjusted according to actual needs, meeting diverse management requirements. External management tools are supported for manually controlling the H2B status via commands, satisfying the needs of special scenarios such as debugging and troubleshooting.

[0110] As an optional implementation, based on any of the above embodiments, it further includes:

[0111] Obtain server load status information, including CPU utilization, memory usage, and hardware error count.

[0112] The monitoring cycle of the control board management controller is controlled according to the load information and preset adjustment rules.

[0113] Among them, server load status information refers to a set of key indicators that reflect the current operating pressure of the server and are used to determine the server load level. These indicators include CPU utilization, which is the percentage of time the CPU spends processing tasks per unit of time; memory utilization, which is the ratio of used memory capacity to total memory capacity; and hardware error count, which is the cumulative number of hardware abnormal events generated during server operation.

[0114] Among them, the preset adjustment rules refer to the predefined logic that dynamically adjusts the BMC monitoring cycle according to the load status, such as extending the cycle when the load is high and shortening the cycle when the load is low.

[0115] Specifically, the host OS calculates CPU utilization in real time through kernel processes and writes the data to a preset shared memory area; the host OS's memory management module calculates the ratio of used memory to total memory and writes it to another segment of shared memory; when server hardware errors occur, the error information is recorded in the system event log or a dedicated error register; the server management device periodically reads the shared memory area to obtain the current CPU utilization and memory usage; and accumulates the number of hardware errors through the IPMI protocol or by directly reading the error register.

[0116] Optionally, preset adjustment rules can be defined. For example, under low load (CPU utilization < 30%, memory usage < 40%, and hardware error count = 0), the monitoring cycle can be adjusted to 50ms. Under medium load (30% ≤ CPU utilization < 70%, 40% ≤ memory usage < 80%, and error count ≤ 5), the default cycle of 100ms can be maintained. Under high load (CPU utilization ≥ 70%, memory usage ≥ 80%, or error count > 5), the monitoring cycle can be adjusted to 500ms.

[0117] Furthermore, after obtaining the load information, the load status information is compared item by item with the above rules to determine the current load level. The corresponding monitoring period is then matched based on the determined level.

[0118] The server management method provided in this application, when the server load is low (e.g., CPU utilization and memory usage are low, and hardware error counts are few), indicates that the server is running stably and the probability of failure is relatively low. In this case, extending the monitoring cycle of the Server Management Console (BMC) according to preset adjustment rules can reduce the BMC's consumption of server resources, including CPU resources, memory resources, and network bandwidth. Because the BMC needs to collect and process various data during monitoring, frequent monitoring consumes certain system resources. Extending the monitoring cycle can effectively reduce this consumption, allowing server resources to be used more for processing business tasks.

[0119] As an optional implementation, based on any of the above embodiments, it further includes:

[0120] In response to the host completing its self-test after determining the target server, a command is sent to the preset hot-swap interrupt component to close the communication channel between the host and the board management controller, thereby closing the communication channel between the host and the board management controller.

[0121] Among them, the preset hot-swap interrupt component refers to an independent module in the server specifically designed to handle hardware hot-swap events, which supports the rapid control of hardware devices to power on or off, and channel connection or disconnection via interrupt signals.

[0122] The instruction to close the communication channel is a hardware-level control signal sent to the hot-plug interrupt component, which is used to trigger the component to perform the H2B channel closure operation.

[0123] Specifically, after the host BIOS completes its self-test, it generates a message packet containing the self-test completion status and sends it to the server management device. The server management device then sends a command to the status detection interface of the hot-swap interrupt component to close the communication channel between the host and the baseboard management controller. Upon receiving the command, the hot-swap interrupt component verifies the signal validity through its internal logic. After confirming that there are no errors, it enters the execution phase. The switching circuit integrated inside the hot-swap interrupt component responds to the command and disconnects the core signal link of the H2B channel.

[0124] The server management method provided in this application embodiment includes a pre-defined hot-swap interrupt component responsible for handling server hot-swap operations. After the host completes its self-test, the communication channel is closed. Reducing communication between the host and the BMC avoids system instability or data loss due to communication interruptions or anomalies, ensuring the smooth operation of hot-swap operations and further guaranteeing the smooth closure of the communication channel between the host and the baseboard management controller.

[0125] As an optional implementation, based on any of the above embodiments, it further includes:

[0126] Periodically send detection signals to the main process of the baseboard management controller.

[0127] If no response signal is received from the main process for a preset number of consecutive times, the main process is determined to be abnormal.

[0128] The preset backup process of the baseboard management controller is activated so that the baseboard management controller can use the preset backup process to execute the monitoring program and obtain monitoring results.

[0129] Among them, the detection signal refers to the heartbeat signal periodically sent to the BMC main process to confirm whether the main process is running normally.

[0130] Among them, the baseboard management controller main process refers to the main program in the BMC operating system that is responsible for the core management logic.

[0131] The preset number of consecutive attempts refers to the maximum number of consecutive times that the main process is allowed to be unresponsive, such as 3 times. If this number is exceeded, the main process is considered abnormal.

[0132] Among them, the preset backup process refers to a backup program that is pre-deployed in BMC and has the same function as the main process. It is usually in a dormant state and is only activated when the main process is abnormal, taking over the monitoring and control functions of the main process.

[0133] Specifically, a detection signal is sent to the BMC main process at a fixed period, such as 1 second / time, based on the main process's response performance. The detection signal uses a lightweight format and is sent to the main process's designated receiving interface via inter-process communication (IPC). When the main process is running normally, it will immediately return a response signal upon receiving the detection signal; if no response is received within a preset timeout period, a no-response count is incremented by 1; if a valid response is received, the count is reset to 0.

[0134] Furthermore, when the number of consecutive unresponsive events reaches a preset value, such as 3 times, the main process is determined to be abnormal, and the exception handling process is triggered. A preset backup process is invoked to wake up. After the backup process starts, it reads the current system state from the main process's configuration file to ensure that its execution context is consistent with that of the main process.

[0135] The server management method provided in this application involves the BMC main process undertaking important tasks such as monitoring server hardware status and managing remote access during server operation. If the main process malfunctions without timely and effective countermeasures, the server monitoring and management functions will fail. By periodically checking the main process status and quickly activating a backup process upon detecting anomalies, service interruption time caused by main process failure can be minimized, ensuring that the BMC can continuously provide monitoring and management services and guaranteeing stable server operation.

[0136] Figure 3 A flowchart illustrating a server management method according to another embodiment of this application is shown below. Figure 3 As shown, the execution entity in this embodiment is the baseboard management controller, and the server management method provided in this embodiment includes the following steps:

[0137] S301. Receive the first control command and, based on the first control command, close the communication channel between the host and the board management controller through the hardware control interface.

[0138] Specifically, the BMC receives the first control instruction via a dedicated communication link, verifies the instruction's validity and completeness, and its instruction parsing module reads the instruction data from the register to verify if the format conforms to the preset specifications. After confirming the validity of the first control instruction, the BMC sends a trigger signal to the driver module of the hardware control interface.

[0139] For example, if H2B is implemented based on PCIe, the hardware control interface sends a device de-enable signal to the PCIe root complex and simultaneously modifies the device presence bit in the PCI configuration space to 0, removing H2B from the PCI device list so that the OS cannot detect the device during scanning. If H2B is implemented based on shared memory, the control interface disconnects the address lines and data lines of the shared memory region.

[0140] Furthermore, after the channel is closed, the hardware control interface returns a low-level signal to the BMC through the status feedback pin to indicate that it has been closed, and updates the status register for subsequent monitoring logic to read.

[0141] S302. Periodically execute monitoring processes on the target server to obtain monitoring results of the target server.

[0142] Specifically, the monitoring period, such as 100ms, is pre-set in the BMC firmware and can be modified via a configuration file. An internal timer triggers the monitoring process. Upon startup, the monitoring process loads a pre-defined list of monitoring items, such as host power status, H2B channel status, and CPU temperature, and initializes the communication interfaces with each hardware sensor / register. A dedicated buffer is allocated in BMC memory to temporarily store the collected monitoring data, ensuring data integrity.

[0143] Furthermore, at each preset period, the BMC timer sends an interrupt signal to the monitoring process, waking it up to execute the data acquisition task. The current channel status is obtained by accessing the status register of the H2B hardware control interface. The acquired raw hardware data is converted into a unified format status identifier and packaged into monitoring results.

[0144] S303: In response to receiving the first control command again after sending out the monitoring result, the communication channel between the host and the board management controller is closed through the hardware control interface.

[0145] "Received the first control command again" means that after the BMC sends the monitoring results, it receives another command to close the H2B channel.

[0146] Specifically, after sending the monitoring results, the BMC maintains a listening state for the first control instruction. When a new instruction is received, it parses the instruction type. If the opcode matches the first control instruction and the timestamp is after the monitoring results were sent, it is determined to be a newly received first control instruction. After the BMC main processor confirms the instruction is valid, it sends a shutdown signal to the control register of the hardware control interface.

[0147] Furthermore, the BMC responds by sending feedback through the communication link to indicate the channel is closed, updating the preset channel status flag to "closed," and logging the retry operation. If the closure still fails, an alarm mechanism is triggered, indicating a possible hardware failure.

[0148] The server management method provided in this application passively closes the communication channel between the host and the BMC after receiving a first control command, effectively cutting off any unauthorized access paths that might be initiated against the host through this channel. It ensures that the communication channel closure operation between the host and the baseboard management controller occurs before the OS boot process. Periodically executing a monitoring process on the target server allows for continuous and real-time acquisition of various operational statuses of the target server. Receiving the first control command again provides flexibility for secondary control of the server. Closing the channel again after receiving the first control command ensures that the communication channel between the host and the BMC is ultimately closed, thereby guaranteeing the security and stability of the server.

[0149] As an optional implementation, based on any of the above embodiments, and based on a first control command, the communication channel between the host and the baseboard management controller is closed via a hardware control interface, including:

[0150] The first hardware control signal is generated based on the first control instruction.

[0151] The first hardware control signal is written to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface to close the communication channel between the host and the baseboard management controller.

[0152] The first hardware control signal refers to the hardware-level electrical signal or binary code generated according to the first control instruction, which is the underlying signal that directly controls the switching of the H2B channel hardware circuit.

[0153] Among them, the hardware register refers to the dedicated register in the H2B channel hardware circuit used to store control signals. By writing different values, it controls the electrical state of the channel and serves as a bridge between the hardware control interface and the channel circuit.

[0154] Specifically, the BMC receives the first control command, confirming that the core operation of the command is to shut down the H2B channel. Based on preset command and hardware signal mapping rules, it converts the shut-down command into a first hardware control signal. After signal generation, verification logic ensures that it conforms to the hardware register's reception specifications. Upon receiving the signal write command, the BMC's hardware control interface activates the physical connection with the H2B channel hardware register. Based on the preset register address, it sends an addressing signal via the address bus to locate the target register. If it's a parallel interface, the first hardware control signal is simultaneously transmitted to the register's 8-bit data pins via the data bus, completing one write operation. If it's a serial interface, the signal is sent bit-by-bit serially, with data synchronized via a clock line to ensure the register correctly receives each bit of data. After receiving the first hardware control signal, the register shuts down the communication channel between the host and the board management controller.

[0155] The server management method provided in this application reduces register read / write latency from milliseconds to microseconds by directly writing control signals to hardware registers to close the channel, instead of forwarding through intermediate layers such as the operating system kernel and driver framework. The time for a single read / write operation is typically less than 10μs, reducing protocol layer overhead. This significantly shortens the response time of the H2B shutdown operation, ensuring that the state switch is completed within the OS hardware scanning window.

[0156] As an optional implementation, based on any of the above embodiments, a first hardware control signal is written to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface, including:

[0157] Call the user-mode memory-mapped function to read the first current value of the hardware register.

[0158] The specific bit in the current value of the hardware register used to control the communication channel between the host and the board management controller is cleared by bitwise operations.

[0159] Perform an unlock operation on the hardware register.

[0160] The user-mode memory mapping function is called to write the first hardware control signal into the hardware register.

[0161] Perform a locking operation on the hardware register.

[0162] User-mode memory mapping functions refer to functions that run in the user mode of the BMC operating system, such as mmap, which are used to map the physical addresses of hardware registers to the virtual address space of user-mode processes, allowing software to directly access hardware registers through memory operations.

[0163] The first current value of the hardware register refers to the current binary value stored in the hardware register before the shutdown operation is performed, which includes the channel control bit and other status bits.

[0164] Among them, the specific bit controlling the communication channel refers to the binary bit in the hardware register specifically used to control the opening or closing of the H2B channel. For example, bit 0, 1 indicates opening and 0 indicates closing.

[0165] Among them, unlocking or locking refers to the protection mechanism of hardware registers. Unlocking, such as writing a specific key 0xAA, allows the register value to be modified before it can be modified to prevent accidental operation; locking after writing prevents further modification.

[0166] Specifically, the BMC's user-mode process calls the `mmap()` function to map the physical address of the hardware register to the process's virtual address. The mapping length is the register size, and the permissions are set to read and write. The mapped virtual address is accessed via a pointer, and the register's first current value is read. For example, if 0x81 is read (binary 10000001), the 0th bit being 1 indicates the channel is currently enabled. Based on the hardware design document, specific bits controlling the H2B channel are determined. Bitwise operations are performed on the first current value, clearing the 0th bit from 1 while leaving other bits unchanged. According to the register's protection mechanism, an unlock code is written to the register's unlock control bit or a dedicated unlock register. The first control signal is written to the mapped virtual address via pointer operations. This operation directly maps to the physical register address, completing the hardware signal write. The value of this virtual address is immediately read to confirm that the written first hardware control signal matches the current register value. If they do not match, the write operation is re-executed. A lock code is written to the register's lock control bit or a dedicated lock register, triggering the register to re-enable write protection.

[0167] The server management method provided in this application uses bitwise operations to clear specific bits, enabling precise modification of the parts of the hardware registers related to the host and BMC communication channel control, avoiding accidental operations on other irrelevant bits in the registers. This precise control prevents security vulnerabilities caused by accidental modification of other bits, ensuring that only specific communication control functions are changed, thus guaranteeing the safe operation of the server hardware. Unlocking and locking operations are performed on the hardware registers before and after writing the first hardware control signal, forming a protection mechanism that enhances system security and prevents improper changes to the communication channel state by software or erroneous operations. Calling user-mode memory-mapped functions for register read / write operations reduces the risk of system crashes or conflicts caused by improper kernel-mode operations compared to direct kernel-mode operations. User-mode operations are relatively independent and do not directly affect the core functions of the kernel, allowing the entire server system to maintain a more stable operating state during the process of closing the communication channel.

[0168] As an optional implementation, based on any of the above embodiments, after calling the user-mode memory mapping function to read the first current value of the hardware register, the method further includes:

[0169] The second current value of the hardware register is read through a caching mechanism.

[0170] Determine whether the first current value and the second current value are the same.

[0171] In response to a discrepancy, a specific bit in the current value of the hardware register used to control the communication channel between the host and the board management controller is cleared via bitwise operations.

[0172] The caching mechanism refers to the high-speed cache in the BMC operating system used to temporarily store the recently read values ​​of hardware registers. Its purpose is to reduce the frequency of direct access to hardware registers and improve read efficiency.

[0173] The second current value refers to the hardware register value read through the caching mechanism, that is, the most recent register read result stored in the cache.

[0174] Specifically, the BMC's user-mode process accesses a preset buffer and searches for the corresponding cache entry based on the physical address of the hardware register. If the record for that register exists in the cache, the cached value is retrieved as the second current value; if no record exists in the cache, the second current value is marked as invalid. If the second current value is invalid, it is directly determined to be inconsistent; if the second current value is valid, it is compared with the first current value in binary. If they are the same, it is determined to be consistent, indicating that the cache is valid and the hardware state has not changed; if they are different, it is determined to be inconsistent, indicating that the cache is invalid and the hardware state has been updated. Only when the first current value is determined to be ≠ the second current value, the first current value is used as the original data to locate a specific bit controlling the H2B channel and perform bitwise operations.

[0175] The server management method provided in this application addresses the issue that when a user-mode memory-mapped function reads a hardware register value, the first current value read may be inaccurate due to factors such as hardware transients or bus interference. By using a caching mechanism to read a second current value and compare it, this potential reading error can be detected. This avoids erroneous operations caused by incorrect data and ensures data accuracy. By comparing the two read values, it can be ensured that the operation is based on the correct register state, thus improving the accuracy of the operation.

[0176] As an optional implementation, based on any of the above embodiments, it further includes:

[0177] If the user-mode memory mapping function fails to read the first current value of the hardware register, the user-mode memory mapping function will be called again to read the first current value of the hardware register according to the preset retry mechanism.

[0178] The preset retry mechanism refers to a predefined retry strategy, including the number of retries, such as 3 times, the retry interval, such as 100ms, and the termination condition.

[0179] Specifically, after the user-mode process calls the memory-mapped function, it checks whether the returned register value is a preset invalid value. If so, it means that the first current value of the hardware register could not be read. A retry counter is started, initially with a value of 0, and a preset maximum number of retries and retry interval. The user-mode memory-mapped function is called again to read the hardware register value. If a valid value is successfully read during a retry, that value is used as the first current value, the retry process is terminated, and subsequent bitwise operations continue. If the cumulative number of retries reaches the maximum value and still fails, it is determined that the read has completely failed, and exception handling is triggered.

[0180] The server management method provided in this application addresses the issue that during server operation, reading hardware registers may fail due to various temporary factors, such as hardware transient failures, bus conflicts, and memory access conflicts. If the read operation is abandoned after only one attempt, subsequent operations based on the read result may not be able to proceed normally, thus affecting the stability of the entire system. By using a preset retry mechanism, the probability of successful reads is increased, ensuring that the system can obtain the current value of the hardware registers and maintain normal operation.

[0181] As an optional implementation, based on any of the above embodiments, it further includes:

[0182] In response to receiving a second control command, the communication channel between the host and the baseboard management controller is opened via the hardware control interface based on the second control command.

[0183] Based on the second control command, the communication channel between the host and the baseboard management controller is opened via the hardware control interface, including:

[0184] The second hardware control signal is generated based on the second control instruction.

[0185] Call the user-mode memory-mapped function to read the current value of the hardware register.

[0186] The specific bit in the current value of the hardware register used to control the communication channel between the host and the board management controller is cleared by bitwise operations.

[0187] Perform an unlock operation on the hardware register.

[0188] The user-mode memory mapping function is called to write the second hardware control signal into the hardware register, thereby enabling the communication channel between the host and the baseboard management controller.

[0189] The second hardware control signal refers to the hardware-level binary signal generated according to the second control instruction, which is used to directly control the hardware circuit of the H2B channel to turn on.

[0190] Specifically, after receiving the second control instruction, the BMC parses the opcode, verifies the sender identifier and check bit, and confirms that the instruction has not been tampered with and its source is legitimate. It checks whether the current system state meets the start-up conditions, such as the host power being off. If so, it calls the channel start-up processing function and enters the hardware signal generation stage. The BMC confirms that the core operation of the second control instruction is to start the H2B channel, which corresponds to setting a specific bit of the control channel to 1 in the hardware logic. It directly accesses the hardware registers through memory mapping to obtain the current status value, providing raw data for subsequent bitwise operations. The BMC user-mode process calls the mmap() function to map the physical address of the H2B channel hardware registers to the process's virtual address space. The mapping permissions are read and write, and the length is the register size. The mapped virtual address is accessed through a pointer to read the current register value.

[0191] Furthermore, specific bits of the control channel are set to 1 through bitwise operations. Based on the hardware design document, the specific bits controlling the H2B channel are determined. Operations are performed on the current value of the register, clearing bit 0 while leaving other bits unchanged. A preset unlock sequence is written to the protection control bit of the hardware register or a dedicated unlock register, triggering the register's internal logic to unlock the write protection. A user-mode memory mapping function is called to write the second hardware control signal to the hardware register. After the register receives the target value, its internal logic triggers the channel to open.

[0192] The server management method provided in this application generates a dedicated second hardware control signal based on a second control instruction. Borrowing operations accurately clear specific bits in the hardware register that control the communication channel, avoiding abnormal hardware status caused by misoperation of irrelevant bits, ensuring stable opening of the communication channel, and reducing system instability factors.

[0193] Server hardware states are constantly changing during operation. By calling user-mode memory-mapped functions to read the current values ​​of registers, the latest state can be grasped in a timely manner. This allows for adaptation to dynamic changes, ensuring that the operation of opening a communication channel matches the current hardware state and improving system stability. When unlocking and writing to hardware registers, they are first unlocked to make them writable, and then immediately locked after writing. Ordered operations avoid interference from other processes or operations during writing, preventing conflicts and ensuring the smooth completion of the communication channel opening operation, thus avoiding system failures.

[0194] Figure 4 This is a schematic diagram of the structure of a server management device provided in an embodiment of this application, as shown below. Figure 4 As shown, the server management device provided in this embodiment is located in an electronic device. The server management device provided in this embodiment includes: a sending module 41 and a first receiving module 42.

[0195] Specifically, the sending module 41 is used to send a first control command to the baseboard management controller in response to determining that the host of the target server has completed the self-test; the first control command is used to instruct the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface; the first receiving module 42 is used to receive the monitoring result of the target server sent by the baseboard management controller; the sending module 41 is also used to send the first control command to the baseboard management controller again in response to determining that the monitoring result indicates that the host has completed the self-test and the communication channel between the host and the baseboard management controller has not been closed, so that the baseboard management controller closes the communication channel between the host and the baseboard management controller through the hardware control interface.

[0196] Optionally, the server management device may also include a determination module, a decryption module, and a parsing module.

[0197] Accordingly, the determination module is used to determine whether the sender of the message packet is a basic input / output system in response to receiving the message packet; the decryption module is used to decrypt the message packet according to a preset decryption algorithm in response to determining that the sender is a basic input / output system; the determination module is also used to determine whether the message included in the decrypted message packet is a preset message type; the parsing module is used to parse the message content in response to determining that it is a preset message type, the message content includes the host's basic input / output system initialization completion status, the host's hardware self-test completion status, and the host's operating system boot ready status; the determination module is also used to determine that the host has completed the self-test in response to all statuses in the message content being complete.

[0198] Optionally, the sending module 41 is further configured to send a second control command to the baseboard management controller in response to determining that the monitoring result indicates that the host power status is off; the second control command is used to instruct the baseboard management controller to open the communication channel between the host and the baseboard management controller through the hardware control interface.

[0199] Optionally, the server management device may also include a switching module.

[0200] Accordingly, the switching module is used to switch the preset self-test status flag to "completed" in response to determining that the host has completed the self-test; to switch the preset host status flag to "power off" in response to determining that the monitoring result shows that the host power status is off; and to switch the preset channel status flag to "closed" in response to determining that the communication channel between the host and the board management controller is closed. The determining module is also used to determine, by cyclically verifying the preset self-test status flag, the preset host status flag, and the preset channel status flag, whether to perform a closing operation, a opening operation, or a skip operation on the communication channel between the host and the board management controller.

[0201] Optionally, the sending module 41 is further configured to send a second control command to the baseboard management controller in response to determining that the monitoring result shows the host power status is off and the temperature sensor reading is lower than a preset temperature threshold; the determining module is further configured to re-determine the host power status and temperature sensor reading after a preset time interval; the switching module is further configured to switch the preset channel status flag to on in response to determining that the monitoring result shows the host power status is off and the temperature sensor reading is lower than a preset temperature threshold.

[0202] Optionally, the server management device may also include an execution module.

[0203] Accordingly, the first receiving module 42 is also used to receive a third control instruction sent through a preset expansion interface; the third control instruction includes an instruction to open or close the communication channel between the host and the board management controller; the execution module is used to perform corresponding operations on the communication channel between the host and the board management controller according to the third control instruction.

[0204] Optionally, the server management device may also include an acquisition module and an adjustment module.

[0205] Accordingly, the acquisition module is used to acquire server load status information, including CPU utilization, memory usage, and hardware error count; the adjustment module is used to control the monitoring cycle of the baseboard management controller according to the load information and preset adjustment rules.

[0206] Optionally, the sending module 41 is further configured to send an instruction to a preset hot-swap interrupt component to close the communication channel between the host and the baseboard management controller in response to the host completing the self-test of the target server, so as to close the communication channel between the host and the baseboard management controller.

[0207] Optionally, the server management device may also include a control module.

[0208] Accordingly, the sending module 41 is also used to periodically send detection signals to the main process of the substrate management controller; the determining module is also used to determine that the main process is abnormal if no response signal is received from the main process for a preset number of consecutive times; the control module is used to control the activation of the preset backup process of the substrate management controller so that the substrate management controller uses the preset backup process to execute the monitoring program to obtain the monitoring results.

[0209] It should be noted that the technical effects of the server management device provided in this embodiment have been explained in the embodiments of the above-described server management method, and therefore will not be repeated in this embodiment.

[0210] Figure 5 This is a schematic diagram of the structure of a server management device provided in another embodiment of this application, as shown below. Figure 5As shown, the server management device provided in this embodiment is located in a baseboard management controller or electronic device. The server management device provided in this embodiment includes: a second receiving module 51, a control module 52, and a monitoring module 53.

[0211] Specifically, the second receiving module 51 is used to receive the first control command; the control module 52 is used to control the communication channel between the host and the baseboard management controller to close through the hardware control interface based on the first control command; the monitoring module 53 is used to periodically perform a monitoring process on the target server to obtain the monitoring results of the target server; the control module 52 is also used to control the communication channel between the host and the baseboard management controller to close through the hardware control interface in response to receiving the first control command again after sending out the monitoring results.

[0212] Optionally, when the control module 52 controls the communication channel between the host and the baseboard management controller to close based on the first control instruction through the hardware control interface, it is specifically used to: generate a first hardware control signal based on the first control instruction; and write the first hardware control signal to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface to close the communication channel between the host and the baseboard management controller.

[0213] Optionally, when the control module 52 writes the first hardware control signal to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface, it specifically performs the following: calling a user-mode memory mapping function to read the first current value of the hardware register; clearing the specific bit in the current value of the hardware register used to control the communication channel between the host and the baseboard management controller through bitwise operations; performing an unlock operation on the hardware register; calling a user-mode memory mapping function to write the first hardware control signal into the hardware register; and performing a lock operation on the hardware register.

[0214] Optionally, the server management device may also include a reading module, a determining module, and a clearing module.

[0215] Accordingly, the read module is used to read the second current value of the hardware register through a caching mechanism; the determine module is used to determine whether the first current value and the second current value are consistent; and the clear module is used to clear specific bits in the current value of the hardware register that are used to control the communication channel between the host and the baseboard management controller in response to the determination of inconsistency.

[0216] Optionally, the reading module is also configured to, if the call to the user-mode memory mapping function fails to read the first current value of the hardware register, call the user-mode memory mapping function again to read the first current value of the hardware register according to a preset retry mechanism.

[0217] Optionally, the control module 52 is further configured to, in response to receiving a second control instruction, control the opening of the communication channel between the host and the baseboard management controller via a hardware control interface based on the second control instruction; controlling the opening of the communication channel between the host and the baseboard management controller via a hardware control interface based on the second control instruction includes: generating a second hardware control signal based on the second control instruction; calling a user-mode memory mapping function to read the current value of a hardware register; clearing a specific bit in the current value of the hardware register used to control the communication channel between the host and the baseboard management controller through bitwise operations; performing an unlock operation on the hardware register; and calling a user-mode memory mapping function to write the second hardware control signal into the hardware register to open the communication channel between the host and the baseboard management controller.

[0218] It should be noted that the technical effects of the server management device provided in this embodiment have been explained in the embodiments of the above-described server management method, and therefore will not be repeated in this embodiment.

[0219] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, as shown below. Figure 6 As shown, the electronic device 60 provided in the embodiments of this application includes a memory 61 and a processor 62.

[0220] The memory 61 stores a computer program, and the processor 62 is configured to run the computer program to perform the steps in any of the above-described server management method embodiments.

[0221] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described server management method embodiments when it runs.

[0222] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0223] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described server management method embodiments.

[0224] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described server management method embodiments.

[0225] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for various specific applications, but such implementations should not be considered beyond the scope of this application.

[0226] The server management method and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A server management method, characterized in that, The method includes: In response to the host completing its self-test after determining that the target server has completed its self-test, a first control command is sent to the baseboard management controller; the first control command is used to instruct the baseboard management controller to close the communication channel between the host and the baseboard management controller through the hardware control interface; Receive the monitoring results of the target server sent by the baseboard management controller; In response to the monitoring result indicating that the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, the first control command is sent to the baseboard management controller again, so that the baseboard management controller closes the communication channel between the host and the baseboard management controller through the hardware control interface. In response to determining that the monitoring result shows that the host power is off and the temperature sensor reading is below a preset temperature threshold, a second control command is sent to the baseboard management controller. After a preset interval, the host power status and temperature sensor readings are checked again. In response to the monitoring result indicating that the host power is off and the temperature sensor reading is below the preset temperature threshold, the preset channel status flag is switched to "on".

2. The method according to claim 1, characterized in that, The process of determining the host of the target server to complete the self-test includes: In response to receiving a message packet, determine whether the sender of the message packet is a basic input / output system; In response to determining that the sender is a basic input / output system, the message packet is decrypted according to a preset decryption algorithm; Determine whether the message included in the decrypted message packet is a preset message type; In response to the determination of a preset message type, the message content is parsed. The message content includes the host's basic input / output system initialization completion status, the host's hardware self-test completion status, and the host's operating system boot preparation ready status. If all states in the message content are in a completed state, then it is determined that the host has completed the self-test.

3. The method according to claim 1, characterized in that, Also includes: In response to determining that the monitoring result indicates that the host power status is off, a second control command is sent to the baseboard management controller; The second control command is used to instruct the baseboard management controller to open the communication channel between the host and the baseboard management controller through the hardware control interface.

4. The method according to claim 1, characterized in that, Also includes: In response to the determination that the host has completed the self-test, the preset self-test status flag is switched to "completed". In response to the monitoring result indicating that the host power status is off, the preset host status flag is switched to "power off". In response to determining that the communication channel between the host and the board management controller is closed, the preset channel status flag is switched to closed; By cyclically verifying the preset self-test status flag, the preset host status flag, and the preset channel status flag, it is determined whether to perform a shutdown operation, an opening operation, or a skip operation on the communication channel between the host and the baseboard management controller.

5. The method according to claim 1, characterized in that, Also includes: Receive a third control command sent through a preset expansion interface; the third control command includes a command to open or close the communication channel between the control host and the baseboard management controller; The third control command is used to perform corresponding operations on the communication channel between the host and the baseboard management controller.

6. The method according to claim 1, characterized in that, Also includes: In response to the host completing its self-test after determining the target server, a command is sent to the preset hot-swap interrupt component to close the communication channel between the host and the board management controller, thereby closing the communication channel between the host and the board management controller.

7. The method according to claim 1, characterized in that, Also includes: Periodically send detection signals to the main process of the baseboard management controller; If no response signal is received from the main process for a preset number of consecutive times, the main process is determined to be abnormal. The preset backup process of the baseboard management controller is activated so that the baseboard management controller executes the monitoring program using the preset backup process to obtain monitoring results.

8. A server management method, characterized in that, The method includes: Receive a first control command, and based on the first control command, close the communication channel between the host and the baseboard management controller through the hardware control interface; Periodically execute monitoring processes on the target server to obtain monitoring results of the target server; In response to sending the monitoring result, when the server management device determines that the monitoring result indicates that the host has completed the self-test and the communication channel between the host and the baseboard management controller is not closed, the baseboard management controller receives the first control command again and controls the communication channel between the host and the baseboard management controller to close through the hardware control interface. Also includes: In response to receiving a second control command, the communication channel between the host and the baseboard management controller is opened via a hardware control interface based on the second control command. The step of opening the communication channel between the host and the baseboard management controller via the hardware control interface based on the second control command includes: A second hardware control signal is generated based on the second control instruction; Call the user-mode memory-mapped function to read the current value of the hardware register; The specific bit in the current value of the hardware register used to control the communication channel between the host and the baseboard management controller is cleared by bitwise operations. Perform an unlock operation on the hardware register; The user-mode memory mapping function is called to write the second hardware control signal into the hardware register, thereby enabling the communication channel between the host and the baseboard management controller.

9. The method according to claim 8, characterized in that, The step of closing the communication channel between the host and the baseboard management controller via the hardware control interface based on the first control command includes: A first hardware control signal is generated based on the first control instruction; The first hardware control signal is written to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface to close the communication channel between the host and the baseboard management controller.

10. The method according to claim 9, characterized in that, The step of writing the first hardware control signal to the hardware register corresponding to the communication channel between the host and the baseboard management controller through the hardware control interface includes: Call the user-mode memory mapping function to read the first current value of the hardware register; The specific bit in the current value of the hardware register used to control the communication channel between the host and the baseboard management controller is cleared by bitwise operations. Perform an unlock operation on the hardware register; The user-mode memory mapping function is invoked to write the first hardware control signal into the hardware register; A locking operation is performed on the hardware register.

11. The method according to claim 10, characterized in that, After calling the user-mode memory-mapped function to read the first current value of the hardware register, the method further includes: The second current value of the hardware register is read through a caching mechanism; Determine whether the first current value and the second current value are consistent; In response to a discrepancy, a specific bit in the current value of the hardware register used to control the communication channel between the host and the baseboard management controller is cleared via bitwise operations.

12. The method according to claim 10, characterized in that, Also includes: If the user-mode memory mapping function fails to read the first current value of the hardware register, the user-mode memory mapping function is called again to read the first current value of the hardware register according to the preset retry mechanism.

13. An electronic device, characterized in that, include: Memory, processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory, causing the processor to perform the method as described in any one of claims 1-7 or 8-12.

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