Vector graph and active perception closed loop based drawing intelligent auditing method and device

Abstract

The application relates to the technical field of image data processing, and discloses a blueprint intelligent auditing method and device based on a vector graph and active perception closed loop, wherein the method comprises the following steps: obtaining an engineering blueprint file to be audited and a compliance specification text; analyzing vector data of the engineering blueprint file, and converting the vector data into an attribute graph used for representing a blueprint topological structure and semantics; generating an auditing instruction based on the attribute graph and the compliance specification text through a multi-modal large language model planner; executing the auditing instruction on the attribute graph through a graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, and generating corresponding compliance verification results and diagnostic results; and generating a compliance auditing report containing traceable evidence based on the compliance verification results and the diagnostic results. The application can realize automatic auditing of engineering blueprint while improving the accuracy and reliability of the auditing results.

Description

Technical Field

[0001] This application relates to the field of image data processing technology, specifically to a method and apparatus for intelligent auditing of drawings based on vector spectrum and active perception closed loop. Background Technology

[0002] Compliance auditing of engineering drawings is a crucial step in ensuring the safety and quality of power and electrical engineering projects. Its efficiency, accuracy, and reliability directly impact project progress. With increasing design complexity and surging audit demands, the requirements for audit efficiency, topological logic identification accuracy, and result reliability are continuously rising. Traditional manual review methods are inefficient, and the results are easily influenced by subjective factors, making it difficult to guarantee consistency and traceability.

[0003] With the development of artificial intelligence technology, existing technologies have proposed intelligent drawing review methods based on multimodal large language models. These methods typically convert engineering drawings into pixel images for processing, thereby identifying individual components and symbols in the drawings. However, existing technologies struggle to accurately understand the connections and topological structures between components in the drawings, resulting in insufficient reliability in compliance checks that require precise topological reasoning. Therefore, existing drawing auditing technologies suffer from insufficient reliability in compliance judgment.

[0004] The preceding description is intended to provide general background information and does not necessarily constitute prior art. Summary of the Invention

[0005] This application provides a method and apparatus for intelligent auditing of drawings based on vector map spectrograms and active perception closed loop. It can improve the accuracy and reliability of audit results while realizing automated auditing of engineering drawings, and solve the problem of insufficient reliability in compliance judgment of existing drawing auditing technologies.

[0006] Based on this, embodiments of this application provide a drawing intelligent auditing method based on vector map spectrograms and active perception closed loop, including:

[0007] Obtain the engineering drawings and compliance documents to be audited;

[0008] The vector data of the engineering drawing file is parsed, and the vector data is converted into an attribute graph that represents the topological structure and semantics of the drawing.

[0009] Based on the attribute graph and the compliance specification text, audit instructions are generated using a multimodal large language model planner.

[0010] The audit instructions are executed on the attribute graph by the graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, and generate corresponding compliance verification results and diagnostic results.

[0011] Based on the compliance verification results and the diagnostic results, a compliance audit report containing traceable evidence is generated.

[0012] Furthermore, in some embodiments of this application, the step of parsing the vector data of the engineering drawing file and converting the vector data into an attribute graph for characterizing the topological structure and semantics of the drawing includes:

[0013] The engineering drawing file is parsed to extract the set of vector primitives used to constitute the engineering drawing;

[0014] Based on the set of vector primitives, candidate nodes representing electrical components are identified and extracted, and context information is used to disambiguate the types of candidate nodes whose identification confidence is lower than a preset threshold, thereby determining the final set of nodes.

[0015] Candidate connections are determined based on the geometric proximity between any two nodes in the node set.

[0016] Semantic verification is performed on each candidate connection, the corresponding connection semantic confidence is calculated, and candidate connections with connection semantic confidence higher than a preset semantic threshold are determined as valid electrical connection edges, and an edge set is constructed.

[0017] Assign corresponding attribute information to the nodes in the node set and / or the edges in the edge set to generate the attribute graph.

[0018] Furthermore, in some embodiments of this application, the step of performing semantic verification on each candidate connection and calculating the corresponding connection semantic confidence score includes:

[0019] The candidate connection types are semantically determined using a multimodal large language model, and the corresponding type confidence scores are obtained.

[0020] Obtain the geometric distance between the two nodes of the candidate connection, as well as the semantic relevance between the text annotations near the connection path and the candidate connection;

[0021] The connection semantic confidence is obtained by weighted calculation based on the type confidence, the geometric distance, and the semantic relevance.

[0022] Furthermore, in some embodiments of this application, the step of assigning corresponding attribute information to the nodes in the node set and / or the edges in the edge set, and generating the attribute graph, includes:

[0023] Extract text annotation primitives and their corresponding spatial coordinates from the vector primitive set;

[0024] The text annotation primitive is matched with the nodes or edges adjacent to the spatial coordinates, and the text content is assigned as attribute information to the matched nodes or edges.

[0025] The nodes and edges whose attributes have been assigned, along with their corresponding attribute information, are stored together as the attribute graph.

[0026] Furthermore, in some embodiments of this application, the step of generating audit instructions based on the attribute graph and the compliance specification text using a multimodal large language model planner includes:

[0027] The multimodal large language model planner performs global feature analysis on the attribute graph and dynamically generates an audit plan based on the compliance specifications.

[0028] According to the audit plan, structured verification query instructions are generated by the multimodal large language model planner.

[0029] Furthermore, in some embodiments of this application, the step of executing the audit instructions on the attribute graph using a graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, generating corresponding compliance verification results and diagnostic results, includes:

[0030] The verification query instruction is executed on the attribute graph by the graph signal processing verifier to obtain the compliance verification result;

[0031] The compliance verification results are logically evaluated using the multimodal large language model planner to obtain the evaluation result.

[0032] After determining that the judgment result is non-compliant, a diagnostic query instruction is generated and executed through the graph signal processing verifier to obtain diagnostic evidence for the non-compliant item;

[0033] After determining that the judgment result is compliant and that there are items to be audited in the audit plan, the next verification query instruction is generated to continue to perform compliance verification and diagnostic analysis on the attribute graph;

[0034] After determining that the judgment result is compliant and that there are no items to be audited in the audit plan, the final compliance judgment result is output.

[0035] Furthermore, in some embodiments of this application, the step of executing the diagnostic query instruction through the graph signal processing verifier to obtain diagnostic evidence for non-compliance items includes:

[0036] The graph signal processing verifier invokes a preset illegal evidence path operator;

[0037] The violation evidence path operator calculates and returns the shortest electrical path connecting two or more violation nodes in the attribute graph, which serves as the violation evidence path.

[0038] Furthermore, in some embodiments of this application, the step of executing the diagnostic query instruction through the graph signal processing verifier to obtain diagnostic evidence for non-compliance items includes:

[0039] The signal processing verifier calls a preset upstream protection chain integrity operator.

[0040] By using the upstream protection chain integrity operator, starting from the critical device node, the electrical connections are traversed upstream in the attribute graph to verify the configuration integrity of the protection chain and obtain the protection chain verification result.

[0041] Furthermore, in some embodiments of this application, generating a compliance audit report containing traceable evidence based on the compliance verification results and the diagnostic results includes:

[0042] Aggregate all the compliance verification results and their corresponding diagnostic evidence, construct the mapping relationship between them and the relevant nodes, edges and subgraphs in the attribute graph, and form a structured audit data set;

[0043] Based on the structured audit data set, the report content is arranged according to the preset report template, and for each non-compliance item, the type of violation, the violated regulatory clauses, and the topological evidence chain provided by the diagnostic evidence are clearly recorded;

[0044] The compiled report content is serialized into a compliance audit report document in a preset file format.

[0045] Accordingly, embodiments of this application provide a drawing intelligent auditing device based on vector map spectrograms and active perception closed loop, comprising:

[0046] The document acquisition module is used to acquire the engineering drawing documents and compliance specification texts to be audited;

[0047] The vector conversion module is used to parse the vector data of the engineering drawing file and convert the vector data into an attribute diagram that represents the topological structure and semantics of the drawing.

[0048] The instruction generation module is used to generate audit instructions based on the attribute graph and the compliance specification text, using a multimodal large language model planner.

[0049] The instruction execution module is used to execute the audit instructions on the attribute graph through the graph signal processing verifier, so as to perform iterative compliance verification and diagnostic analysis on the attribute graph and generate corresponding compliance verification results and diagnostic results;

[0050] The audit report module is used to generate a compliance audit report containing traceable evidence based on the compliance verification results and the diagnostic results.

[0051] This application provides a method and apparatus for intelligent auditing of drawings based on vector graphics and active perception closed loop. First, it acquires the drawing file to be audited and the compliance specification text, clarifying the audit object and judgment criteria to ensure the audit does not deviate from actual engineering requirements. Then, it parses the drawing vector data and converts it into an attribute graph representing the topological structure and semantics, fully preserving the connection relationships and logical associations between devices, laying a precise data foundation for accurate compliance judgment and avoiding audit bias caused by the loss of key topological information. Next, it generates audit instructions that conform to the specifications through a multimodal large language model planner, and then an iterative compliance verification and diagnostic analysis is performed by a graph signal processing verifier. The iterative mechanism can cover key aspects of the drawings, thereby reducing omissions and improving the accuracy of audit results. Finally, it generates a report containing traceable evidence based on the verification and diagnostic results, ensuring that every audit conclusion is supported by evidence. As can be seen, the intelligent auditing solution for drawings based on vector spectrograms and active perception closed loop provided in this application constructs its topology by directly parsing the vector data of the drawings and performs traceable automated compliance verification. While realizing automated auditing of engineering drawings, it improves the accuracy of compliance judgment and the credibility of audit results, and ensures the traceability of audit conclusions, thus meeting the core requirements of engineering drawing auditing. Attached Figure Description

[0052] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0053] Figure 1 This is an application environment diagram of the intelligent drawing auditing method based on vector map and active perception closed loop provided in the embodiments of this application;

[0054] Figure 2 This is a flowchart illustrating the intelligent auditing method for drawings based on vector map and active perception closed loop provided in this application embodiment;

[0055] Figure 3 This is a schematic diagram of the structure of the intelligent drawing auditing system based on vector map and active perception closed loop provided in the embodiments of this application;

[0056] Figure 4 This is a schematic diagram of the vector-to-map (V2G) conversion process provided in an embodiment of this application;

[0057] Figure 5 This is a flowchart illustrating the operation of the five-state machine of the proactive sensing audit closed loop provided in this application embodiment;

[0058] Figure 6 This is a flowchart illustrating the auditing process for multi-point grounding errors provided in an embodiment of this application;

[0059] Figure 7 This is a schematic diagram of the structure of the intelligent drawing auditing device based on vector map and active perception closed loop provided in the embodiments of this application;

[0060] Figure 8 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0061] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of systems and methods consistent with those detailed in the appended claims or with some aspects of this application.

[0062] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover descriptions such as non-exclusive inclusion, so that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0063] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0064] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0065] To address the aforementioned technical problems and overcome the shortcomings of existing technologies, this application provides a method and apparatus for intelligent auditing of engineering drawings based on vector map spectrograms and active perception closed loop, which can improve the accuracy and reliability of audit results while achieving automated auditing of engineering drawings.

[0066] Figure 1 This is an application environment diagram of a drawing intelligent auditing method based on vector map and active perception closed loop in one embodiment. (Refer to...) Figure 1 The intelligent auditing method for drawings based on vector graphics and proactive perception closed loop should be based on an intelligent auditing system for drawings based on vector graphics and proactive perception closed loop. This intelligent auditing system for drawings based on vector graphics and proactive perception closed loop includes terminal A and server B. Terminal A and server B are connected via a network. Terminal A can be a desktop terminal or a mobile terminal, and the mobile terminal can be at least one of a mobile phone, tablet, or laptop. Server B can be implemented as a standalone server or a server cluster consisting of multiple servers. Server B is configured to execute the aforementioned intelligent auditing method for drawings based on vector graphics and proactive perception closed loop, including: acquiring the engineering drawing files and compliance specification text to be audited; parsing the vector data of the engineering drawing files and converting the vector data into an attribute graph to represent the topological structure and semantics of the drawings; generating audit instructions based on the attribute graph and compliance specification text using a multimodal large language model planner; executing the audit instructions on the attribute graph using a graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, generating corresponding compliance verification results and diagnostic results; and generating a compliance audit report containing traceable evidence based on the compliance verification results and diagnostic results.

[0067] Please see Figure 2 , Figure 2 This is a flowchart illustrating an embodiment of the intelligent auditing method for drawings based on vector map spectra and active perception closed loop provided in this application. This embodiment primarily uses the application of this intelligent auditing method for drawings based on vector map spectra and active perception closed loop to a computer device as an example. Specifically, the intelligent auditing method for drawings based on vector map spectra and active perception closed loop provided in this application may include the following steps:

[0068] S10. Obtain the engineering drawings and compliance documents to be audited;

[0069] Specifically, for step S10, the first step is to obtain the audit object and judgment criteria. The engineering drawing files to be audited are typically CAD design files from the power and electrical engineering fields, commonly in formats such as DXF and DWG. These files contain core information about the equipment (such as transformers and circuit breakers), wiring, and annotations. The compliance specification texts are standard documents used to determine whether the drawings meet safety and quality requirements. They are presented in natural language, such as industry-specific technical specifications or project-specific requirements regarding electrical circuit grounding requirements and equipment connection logic. For example, if auditing the electrical schematic diagram of a 110kV substation, the obtained files may include the substation's DWG format schematic diagram, and the compliance specification texts may include specific clauses from the "Design Code for 35kV and Below Substations" regarding the prohibition of multiple grounding points on the secondary side of current transformers.

[0070] S20. Parse the vector data of the engineering drawing file and convert the vector data into an attribute graph to represent the topological structure and semantics of the drawing;

[0071] Specifically, in step S20, the raw data of the drawing is transformed into a structured form that can be used for logical analysis. Vector data is the raw data in the engineering drawing file that has not undergone pixelation, containing precise information such as the geometric shape of equipment, its location coordinates, and the connection endpoints of lines. The attribute graph, on the other hand, is a structured data set integrating nodes, edges, and attributes. Nodes correspond to equipment in the drawing (such as grounding devices and loads), edges correspond to the connection relationships between equipment (such as electrical circuits), and attributes correspond to semantic information such as equipment models and circuit functions, thus fully reflecting the topological connection logic and core semantics of the drawing. For example, after parsing the vector data of an electrical schematic diagram, the resulting attribute graph will contain nodes representing current transformers, nodes representing loads, and secondary side lines connecting the two, while also recording information such as the equipment number corresponding to the node and the purpose of the line corresponding to the edge.

[0072] S30. Based on attribute graphs and compliance specification texts, generate audit instructions through a multimodal large language model planner;

[0073] Specifically, in step S30, abstract specification requirements are transformed into executable audit tasks. The multimodal large language model planner can simultaneously understand the structured topology of the attribute diagram (such as equipment type and circuit composition) and the natural language requirements of the compliance specifications, thereby generating structured audit instructions. These instructions specify the drawing area to be verified (such as a specific electrical sub-circuit) and the specific verification task (such as checking the number of grounding points in the circuit). For example, if the compliance specification text requires that each electrical secondary circuit have only one grounding point, the multimodal large language model planner will combine the topology of the current transformer secondary circuit in the attribute diagram to generate an audit instruction to check whether the number of grounding nodes in the current transformer secondary circuit sub-diagram in the attribute diagram is 1.

[0074] S40. Execute audit instructions on the property graph using a graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the property graph, and generate corresponding compliance verification results and diagnostic results;

[0075] Specifically, for step S40, the graph signal processing verifier performs precise topology calculations and logic checks on the attribute graph according to the audit instructions, and outputs compliance verification results, such as "the number of grounding nodes is 2, which does not comply with the specifications" or "the number of grounding nodes is 1, which complies with the specifications." The iterative process includes: if the verification result is non-compliant, the core of the problem will be further analyzed, such as the location association of the non-compliant grounding; if the verification result is compliant, the next audit instruction will be executed until all the content to be verified is covered. For example, for the instruction to check the number of grounding nodes in the secondary circuit of the current transformer, the graph signal processing verifier will count the number of grounding nodes in the subgraph. If the result is 2, the verification result is non-compliant, and the connection relationship between the two grounding nodes will be further analyzed (diagnostic result); if the result is 1, the verification result is compliant, and an instruction to check whether there is an open circuit in the circuit will be generated and executed.

[0076] S50. Based on the compliance verification results and diagnostic results, generate a compliance audit report containing traceable evidence;

[0077] Specifically, for step S50, based on the compliance verification results and diagnostic results, all audit results are integrated and a verifiable document is formed. The report will systematically summarize all verification results (such as compliance determinations for each circuit) and diagnostic results (such as problem analysis of non-compliance items), and clearly record the basis for each conclusion (i.e., traceable evidence) to ensure that the audit process is traceable and the conclusions are verifiable. For example, for the case of non-compliant grounding of the secondary circuit of the current transformer, the report will record "Verification result: non-compliant; Diagnostic result: there are 2 grounding nodes in the secondary circuit; Traceable evidence: the number of the grounding node in the attribute diagram, the topology calculation process during verification", while summarizing the audit results of other circuits to form a complete document.

[0078] As can be seen, this embodiment can automatically complete the compliance audit of engineering drawings, greatly improve audit efficiency, ensure the reliability of audit results, and the audit report contains traceable evidence, meeting the core needs of the engineering field for drawing audit.

[0079] In a specific embodiment, this method is applied to a drawing intelligent auditing system based on vector spectrograms and an active perception closed loop. This embodiment proposes a vector-first processing paradigm, which constructs a high-fidelity spectrogram representation by directly parsing the vector data of CAD files, and builds an intelligent auditing closed loop that includes an original audit calculation unit and a clear state transition mechanism, thereby endowing the system with deep reasoning and diagnostic capabilities.

[0080] First, a vector-to-graph (V2G) conversion step based on multidimensional features and semantic verification transforms the input CAD vector file into an attribute graph G=(V, E, X). In this step, to address the ambiguity in recognizing non-standard symbols, a contextual disambiguation mechanism is introduced during node extraction. For symbols with low recognition confidence, the system combines the electrical context information of its neighboring nodes and uses MLLM (Multi-modal Large Language Model) for secondary evaluation to eliminate ambiguity. More importantly, during the edge inference stage, to accurately distinguish between real electrical connections and visual line intersections, this invention innovatively proposes a Connection Semantic Confidence (CSC) calculation method. This method quantifies the effectiveness of each potential connection using a multidimensional weighted formula that integrates the semantic judgment confidence of the connection type from LLM, the geometric proximity between connection endpoints, and the relevance score of nearby text annotations. The system only creates a valid electrical connection edge in the graph if the CSC score is higher than a preset threshold (e.g., 0.85), thus fundamentally ensuring the accuracy of the graph topology.

[0081] After constructing a high-fidelity attribute graph, this embodiment performs compliance checks through a proactive, closed-loop audit mechanism based on a five-state machine. This audit process is no longer a simple linear task execution, but is driven by a self-operating, clearly defined five-state machine (S0-Analysis, S1-Query, S2-Verification, S3-Decision, S4-Diagnosis). In the S0-Analysis state, the system first analyzes the global features of the entire graph and dynamically adjusts the audit priority of the specifications. In the S1-Query state, the MLLM planner generates structured query instructions based on the rule with the highest current priority. In the S2-Verification state, the GSP verifier performs deterministic mathematical calculations on the graph. In the S3-Decision state, the MLLM planner determines the next action based on the verification results; if non-compliance is found, it enters another key innovative step of this embodiment (S4-Diagnosis state).

[0082] In the S4 diagnostic state, the system invokes the unique graph operation operators developed in this embodiment to perform in-depth root cause analysis, rather than simply recording errors. These unique operators include, but are not limited to, the "Defect Evidence Path Operator (DEPO)" and the "Upstream Protection Chain Integrity Operator (UPCIO)." For example, when the GSP verifier reports a "multi-point grounding" anomaly, the DEPO operator is automatically triggered. Its function is to calculate and return the shortest electrical path connecting the two defective grounding points in the property graph; this path serves as an undeniable "chain of evidence" of the defect. The UPCIO operator, on the other hand, is used to traverse the graph upstream from the critical device node to verify the completeness and correctness of its protection chain configuration. The execution results of these diagnostic operators are fed back to the decision state to support deeper judgment or generate more detailed reports.

[0083] Ultimately, the system aggregates all verification and diagnostic results to generate a traceable intelligent report. Each conclusion in the report is accompanied by deterministic calculations from the GSP validator or proprietary auditing operators, such as the violation path output by the DEPO operator, ensuring the high reliability and traceability of the audit results.

[0084] Furthermore, in some embodiments, step S20, "parse the vector data of the engineering drawing file and convert the vector data into an attribute graph for characterizing the topological structure and semantics of the drawing," may specifically include:

[0085] The engineering drawing file is parsed to extract the set of vector primitives used to constitute the engineering drawing;

[0086] Specifically, obtaining the original basic data of engineering drawings provides a prerequisite for subsequent structured processing. Engineering drawing files are usually in formats such as DXF and DWG, commonly used in the power and electrical fields. These files store vector data that has not undergone pixelation, thus preserving the accurate information of the drawing completely. Vector primitives are the basic units that make up the drawing, including line segments (LINE) representing conductors and borders, arcs (ARC) representing the outline of curved equipment, text (TEXT) indicating equipment models or parameters, and block references (INSERT) encapsulating standardized electrical components (such as current transformers and grounding symbols). For example, when parsing the electrical schematic diagram (DWG format) of a 220kV substation, LINE primitives representing the high-voltage side conductors of the main transformer, INSERT primitives representing current transformers, TEXT primitives indicating "CT-123" and "220kV", and ARC primitives representing equipment mounting holes are extracted. These primitives together constitute a set of vector primitives.

[0087] Based on the vector primitive set, candidate nodes representing electrical components are identified and extracted. Contextual information is used to disambiguate the types of candidate nodes whose identification confidence is lower than a preset threshold, and the final node set is determined.

[0088] Specifically, the core audit objects, namely electrical component nodes, are selected from the original primitives, and identification ambiguities are resolved. First, standardized block references (INSERT primitives) in the vector primitive set are directly identified as candidate nodes representing electrical components (such as grounding devices, circuit breakers, etc.). For hand-drawn or non-standardized symbols, preliminary identification is performed through geometric pattern matching. If the confidence level of the identification result is lower than a preset threshold (e.g., 0.7), a secondary confirmation is made based on the electrical context reflected by the symbol's adjacent primitives (e.g., the connected bus voltage level, adjacent equipment type) to clarify its true type, ultimately forming an unambiguous node set. For example, a symbol with an ambiguous geometric shape is identified in the vector primitive set and initially matched as "fuse" or "disconnector" (confidence level 0.65). By analyzing its context, this symbol connects to a 110kV bus at one end and to the high-voltage side terminal of the transformer at the other end. Combining this with electrical circuit logic, it is confirmed as a "110kV disconnector" and included in the final node set.

[0089] Candidate connections are determined based on the geometric proximity between any two nodes in the node set.

[0090] Specifically, the initial screening identifies potentially connected node pairs, laying the foundation for accurate electrical connection determination later. Geometric proximity refers to the straight-line distance between the endpoints of the corresponding electrical components of two nodes. By setting a reasonable geometric tolerance (e.g., 2-5 pixels), if the distance between the endpoints of two nodes is less than this tolerance, a potential connection is identified, forming a candidate connection; if the distance exceeds the tolerance, it is considered that there is no connection, eliminating false associations. For example, the node set includes the "110kV disconnect switch" node and the "main transformer high-voltage side" node. The actual distance between the endpoints of the corresponding components in the drawing is 3 pixels (less than the preset tolerance of 5 pixels), so these two nodes are identified as a candidate connection. However, the distance between the endpoints of the disconnect switch node and the distant low-voltage load node is 50 pixels, exceeding the tolerance, and therefore does not constitute a candidate connection.

[0091] Semantic verification is performed on each candidate connection, the corresponding connection semantic confidence is calculated, and candidate connections with connection semantic confidence higher than a preset semantic threshold are determined as valid electrical connection edges, and an edge set is constructed.

[0092] Specifically, to distinguish between genuine electrical connections and false intersections, a multimodal large language model is first used to semantically determine the type of candidate connections (such as main electrical lines or control loops) to obtain type confidence. Simultaneously, the geometric distance between the nodes at both ends of the candidate connection, the semantic relevance of the text labels near the connection path to the connection (e.g., the matching degree between the label "main loop" and the connection function), and weighted calculations are used to obtain the connection semantic confidence (CSC). Only when the CSC score is higher than a preset semantic threshold (e.g., 0.85) is the candidate connection confirmed as a valid electrical connection edge, and finally, an edge set is constructed. For example, for the candidate connection "disconnector-main transformer", the multimodal large language model determines it as "110kV main electrical line" (type confidence 0.92), the distance between the endpoints of the two nodes is 2 pixels (high geometric matching degree), and the connection path is marked "main transformer high voltage incoming line" (semantic relevance 0.95). After weighted calculation, the CSC score is 0.91 (higher than the threshold of 0.85), so it is determined as a valid electrical connection edge. However, the intersection of the disconnector node and the nearby dimension label line, although the geometric distance meets the standard, has a semantic relevance of 0.1 and a CSC score of 0.3, and is judged as an invalid connection, excluded from the edge set.

[0093] Assign corresponding attribute information to the nodes in the node set and / or the edges in the edge set to generate an attribute graph;

[0094] Specifically, the semantic information of nodes and edges is enriched to form a complete structured attribute graph. Text annotations (TEXT primitives) and the attribute information of the blocks themselves are extracted from the vector primitive set, including equipment model, terminal ID, voltage level, polarity, and line function. This information is matched and associated with spatially adjacent nodes or edges. Finally, the sets of nodes and edges with attribute information are integrated to generate a complete attribute graph. For example, the text annotations "CT-123" and "turning ratio 200 / 5A" are extracted from the vector primitives and assigned to the corresponding current transformer node; the text annotation "110kV main circuit" is extracted and assigned to the electrical connection edge "disconnecting switch-main transformer". In the final generated attribute graph, each node and edge has clear attribute information, fully reflecting the topology and semantics of the drawing.

[0095] This embodiment transforms the vector data of engineering drawings into accurate, unambiguous, and semantically rich attribute graphs, fully preserving the topological connections and core information of electrical components, and providing a reliable structured data foundation for subsequent compliance audits.

[0096] Furthermore, in some embodiments, the step "perform semantic verification on each candidate connection and calculate the corresponding connection semantic confidence" may specifically include:

[0097] The candidate connection types are semantically determined using a multimodal large language model, and the corresponding type confidence scores are obtained.

[0098] Specifically, by leveraging the semantic understanding capabilities of a multimodal large language model, the functional attributes of candidate connections can be clearly defined. The multimodal large language model can combine professional knowledge from the electrical engineering field to analyze information such as the type of nodes associated with candidate connections (e.g., high-voltage equipment, low-voltage components) and the circuit scenario in which they are located, determining the specific type of the connection (e.g., main electrical line, control circuit line, signal transmission line, etc.). Simultaneously, it outputs the reliability of this determination, i.e., the type confidence score, which typically ranges from 0 to 1, with values ​​closer to 1 indicating a more reliable judgment.

[0099] Obtain the geometric distance between the two nodes of the candidate connection, as well as the semantic relevance between the text annotations near the connection path and the candidate connection;

[0100] Specifically, key auxiliary data for calculating semantic confidence of connections is collected. Geometric distance refers to the actual straight-line distance between the endpoints of the two nodes corresponding to the candidate connection in the drawing, which directly reflects the spatial proximity between the nodes; text labels near the connection path refer to the text information (such as voltage level, line name, function description, etc.) close to the candidate connection in the drawing; semantic relevance measures the degree of matching between these text labels and the candidate connection type and function (the value ranges from 0 to 1, and the higher the matching degree, the higher the score).

[0101] Based on type confidence, geometric distance, and semantic relevance, the connection semantic confidence is obtained through weighted calculation.

[0102] Specifically, the effectiveness of candidate connections is quantified by comprehensively analyzing multi-dimensional data. First, preset weights are assigned to type confidence, matching degree corresponding to geometric distance (calculated from geometric distance and preset tolerance, with smaller distances indicating higher matching degrees), and semantic relevance (the sum of weights is 1, which can be adjusted according to engineering scenarios). Then, the connection semantic confidence (CSC) is calculated by weighted summation, and finally, the likelihood of a candidate connection being a real electrical connection is quantified.

[0103] This embodiment accurately calculates the semantic confidence of connections by integrating multi-dimensional information, effectively distinguishing between real electrical connections and false intersecting lines, and providing a reliable basis for screening valid electrical connection edges.

[0104] Furthermore, in some embodiments, the step "assigning corresponding attribute information to the nodes in the node set and / or the edges in the edge set, and generating an attribute graph" may specifically include:

[0105] Extract text annotation primitives and their corresponding spatial coordinates from a set of vector primitives;

[0106] Specifically, the textual information used for supplementary explanations in the drawings and its real-time location data are collected to provide a basis for attribute assignment. The vector primitive set contains text annotation primitives specifically used for annotation. These primitives record key semantic information such as equipment model, parameter specifications, voltage level, and circuit function. Spatial coordinates are the specific location parameters of the text annotation primitives in the drawings (such as X and Y axis coordinates), accurately reflecting the spatial correspondence between the text and the equipment and circuits in the drawings.

[0107] Match text annotation primitives with nodes or edges adjacent to spatial coordinates, and assign the text content as attribute information to the matched nodes or edges.

[0108] Specifically, the association between text information and core elements (nodes, edges) in the drawing is established to enrich their semantic attributes. By using spatial distance determination rules, the nodes (such as electrical components) or edges (such as electrical lines) that are closest to the spatial coordinates of the text annotation primitives are selected. After determining the correspondence between the two, the content of the text annotation primitives is directly used as attribute information and bound to the corresponding nodes or edges.

[0109] The nodes and edges that have completed attribute assignment, along with their corresponding attribute information, are stored together as an attribute graph.

[0110] Specifically, all structured information is integrated to form a complete and usable attribute graph. The sets of nodes and edges with bound attributes are systematically integrated to ensure that each node and edge is associated with its corresponding attribute information. Finally, the graph is stored in a standardized structured format to form a complete attribute graph containing topological structure and semantic attributes, providing comprehensive data support for subsequent audit analysis.

[0111] This embodiment accurately assigns semantic attributes to the nodes and edges of the attribute graph, enabling the attribute graph to possess both topological structure and rich semantic information, thus providing high-quality data support for subsequent efficient and accurate compliance audits.

[0112] Furthermore, in some embodiments, step S30, "generating audit instructions based on the attribute graph and compliance specification text using a multimodal large language model planner," may specifically include:

[0113] A multimodal large language model planner is used to perform global feature analysis on the attribute graph and dynamically generate an audit plan based on compliance specifications.

[0114] According to the audit plan, structured verification query instructions are generated using a multimodal large language model planner.

[0115] Specifically, for step S30, an efficient audit execution plan is developed by combining the drawing structure and specification requirements. The multimodal large language model planner comprehensively analyzes the global characteristics of the attribute graph, including the type distribution of electrical components (such as the quantity and layout of high-voltage and low-voltage components), loop structure (such as the composition of main loops and control loops), and connection relationships of key equipment; at the same time, it deeply interprets the core requirements of compliance specifications (such as safety priorities, mandatory clauses, and optional clauses), and dynamically determines the audit priority, sequence, and coverage based on the matching degree between the attribute graph characteristics and specification requirements, forming a targeted audit plan. The abstract tasks in the audit plan are transformed into specific instructions that can be executed directly. The structured verification query instructions must clarify two core contents: first, the target scope to be verified, that is, the specific subgraph in the attribute graph, such as a certain loop or a set of certain types of equipment; second, the specific verification task, such as checking the number of nodes or judging whether the connection logic conforms to the specification, ensuring that the instructions are clear, unambiguous, and can be directly executed by subsequent verification modules.

[0116] This embodiment can generate audit plans and structured instructions that fit the overall features of the drawings and compliance specifications, ensuring that the audit process is orderly and accurate, and providing clear guidance for efficient compliance verification in the future.

[0117] Furthermore, in some embodiments, step S40, "executing audit instructions on the attribute graph through a graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, generating corresponding compliance verification results and diagnostic results," may specifically include:

[0118] The compliance verification result is obtained by executing the verification query command on the property graph through the graph signal processing verifier.

[0119] Specifically, the structured instructions are transformed into precise verification results, relying on the computational power of the graph signal processing verifier. The graph signal processing verifier can read the topological structure and semantic information in the attribute graph, perform deterministic logical verification and data calculation according to the requirements of the verification query instructions, and directly output a clear judgment of "compliant" or "non-compliant", along with key verification data, such as the number of nodes involved and the connection status.

[0120] The compliance verification results are logically evaluated using a multimodal large language model planner to obtain the final judgment.

[0121] Specifically, making clear audit decisions based on verification data is the core link between verification and subsequent operations. The multimodal large language model planner will combine the requirements of compliance regulations to perform logical analysis on the compliance verification results and output only three clear judgment results: "non-compliant", "compliant and pending audit", and "compliant and no pending audit", providing clear guidance for subsequent processes.

[0122] After determining that the judgment result is non-compliant, a diagnostic query instruction is generated and executed through the graph signal processing verifier to obtain diagnostic evidence for the non-compliant item.

[0123] Specifically, when the judgment result is non-compliant, the multimodal large language model planner will generate targeted diagnostic query instructions around the type of violation (such as excessive grounding quantity or connection logic error) to clarify the core issues that need to be traced, such as the connection relationship and scope of impact of the violating nodes; after the graph signal processing verifier executes the instruction, the output diagnostic evidence must be able to clearly reflect the essential characteristics of the violation, such as node association information and logical conflict points.

[0124] After determining that the judgment result is compliant and that there are items to be audited in the audit plan, the next verification query instruction is generated to continue to perform compliance verification and diagnostic analysis on the attribute graph;

[0125] Specifically, when the current verification item is compliant and there are still unexecuted audit tasks in the audit plan, the multimodal large language model planner will generate the next structured verification query instruction for the unaudited item according to the preset audit priority, and start a new round of "verification-judgment" process until all items to be audited are completed.

[0126] After determining that the judgment result is compliant and that there are no items to be audited in the audit plan, the final compliance judgment result is output;

[0127] Specifically, when all items in the audit plan have been verified to be compliant and there are no new items to be audited, the multimodal large language model planner will integrate the verification data from the entire process and output a unified final compliance judgment result, clarifying whether the overall drawings meet the compliance requirements.

[0128] This embodiment ensures comprehensive audit coverage and accurate judgment through an iterative verification and diagnostic process, while obtaining evidence to trace the source of violations, thereby improving the reliability and completeness of the compliance audit of engineering drawings.

[0129] Furthermore, in some embodiments, the step "execute diagnostic query instructions through a graph signal processing verifier to obtain diagnostic evidence for non-compliance items" may specifically include:

[0130] The graph signal processing verifier invokes a preset illegal evidence path operator;

[0131] The violation evidence path operator calculates and returns the shortest electrical path connecting two or more violation nodes in the property graph, which serves as the violation evidence path.

[0132] Specifically, a tool specifically designed to trace the relationships between non-compliant nodes is activated to provide technical support for obtaining evidence of violations. Upon receiving a diagnostic query command, the graph signal processing verifier precisely invokes the violation evidence path operator from its preset functional components. This operator is a tool specifically designed for electrical circuit topology features, possessing the core capabilities to locate nodes and search paths in the attribute graph. It is used solely to address the specific need of finding electrical connection paths between non-compliant nodes. For example, when the graph signal processing verifier receives a diagnostic query command to "query the associated path between two grounding nodes in the secondary circuit of a 110kV main transformer," it directly invokes the preset violation evidence path operator to initiate the path search process. Through precise calculation, the core connection logic between non-compliant nodes is clarified, forming verifiable evidence of violations. The violation evidence path operator, based on the clearly defined node topology relationships in the attribute graph (such as equipment connection edges and circuit affiliation), uses path search logic adapted to the characteristics of the electrical circuit to filter out the shortest electrical path connecting all non-compliant nodes. This path must strictly adhere to electrical connection rules, containing only real and valid electrical lines and excluding false connections. This path is ultimately returned as the violation evidence path.

[0133] This embodiment generates clear evidence of violations by quickly locating the shortest electrical path between non-compliant nodes, providing strong support for audit results and enhancing the credibility and traceability of audit conclusions.

[0134] Furthermore, in some embodiments, the step "execute diagnostic query instructions through a graph signal processing verifier to obtain diagnostic evidence for non-compliance items" may specifically include:

[0135] The graph signal processing verifier invokes the preset upstream protection chain integrity operator;

[0136] By using the upstream protection chain integrity operator, starting from the critical equipment node, the electrical connections are traversed upstream in the attribute graph to verify the configuration integrity of the protection chain and obtain the protection chain verification result.

[0137] Specifically, a tool dedicated to verifying protection chain configurations is activated to provide technical support for protection chain integrity checks. After receiving a diagnostic query command, the signal processing verifier precisely calls the upstream protection chain integrity operator from preset functional components. This operator is designed for the characteristic that critical equipment in electrical systems relies on upstream protection devices for safety. It possesses the core capability of tracing electrical connections upstream from a specified node and verifying the configuration of protection equipment, solely for addressing the specific need to verify the integrity of the protection chain for critical equipment. Through targeted traversal and verification, it clarifies whether the upstream protection configuration of critical equipment meets safety requirements. The upstream protection chain integrity operator starts with a critical equipment node (such as a main transformer, high-voltage circuit breaker, or other core equipment) and, based on the electrical topology connections recorded in the attribute graph, traverses related nodes layer by layer in the opposite direction of current transmission (i.e., upstream). It checks whether preset protection devices such as circuit breakers, fuses, and surge arresters are included along the way, and whether the models and connection methods of these protection devices match the safety requirements of the critical equipment. Finally, it outputs a clear protection chain verification result such as "protection chain complete," "protection chain missing XX device," or "protection device configuration mismatch."

[0138] This embodiment can accurately verify the configuration integrity of the upstream protection chain of critical equipment, provide clear protection chain verification results, and provide a reliable basis for judging protection-related compliance during audits.

[0139] Furthermore, in some embodiments, step S50, "generating a compliance audit report containing traceable evidence based on the compliance verification results and diagnostic results," may specifically include:

[0140] Aggregate all compliance verification results and their corresponding diagnostic evidence, construct the mapping relationship between them and the relevant nodes, edges and subgraphs in the attribute graph, and form a structured audit data set;

[0141] Specifically, the entire audit process data is integrated and correlated to lay a structured foundation for report generation. First, the compliance verification results of all audit items are summarized, such as "compliant," "non-compliant," and related statistical data, as well as corresponding diagnostic evidence (such as violation paths and protection chain verification results). Then, through unique identifiers (such as node IDs and subgraph names), the correspondence between these results and related nodes, edges, and subgraphs in the attribute graph is established to ensure that each audit conclusion can be traced back to its specific location in the graph, ultimately forming a clearly categorized and well-connected structured audit data set.

[0142] Based on the structured audit data set, the report content is arranged according to the preset report template, and for each non-compliance item, the type of violation, the violated regulatory clauses, and the topological evidence chain provided by the diagnostic evidence are clearly recorded;

[0143] Specifically, structured data is transformed into clear and easy-to-understand report content, highlighting key audit points. Pre-set report templates include fixed modules such as audit overview, compliance list, non-compliance details, and rectification recommendations. During compilation, only brief results are recorded for compliant items, while core information is detailed for non-compliant items: violation type (e.g., multiple grounding points, missing protection chains), corresponding regulatory clauses (e.g., Article X of the "Design Code for 35kV and Below Substations"), and topological evidence chain (e.g., connection path of the violation node, location of missing protection equipment), ensuring complete and logically coherent information.

[0144] The completed report content is serialized into a compliance audit report document in a preset file format;

[0145] Specifically, the compiled report content is transformed into a usable document format. The serialization process standardizes the report content according to preset file formats (such as PDF, Word, Excel, and other common office formats), ensuring that the document format is standardized, editable, and printable, while retaining all structured information and relationships, making it convenient for users to archive, review, or subsequently modify.

[0146] This embodiment generates a structured and complete compliance audit report, clearly identifying the core information and traceable evidence of non-compliance items, making it convenient for users to review, rectify, and archive.

[0147] To facilitate understanding of the intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop provided in this embodiment, the following will be explained in conjunction with specific application scenarios.

[0148] like Figure 3 As shown, Figure 3This schematic diagram illustrates the overall architecture of the intelligent auditing system provided in this embodiment, showcasing the complete data flow and core functional modules from CAD file input to compliance report output. The system aims to perform automated and highly reliable compliance audits of CAD engineering drawings. The system's workflow begins with receiving externally input CAD files 110 (e.g., DXF or DWG format) and compliance specifications 120 in natural language text form. The vector map conversion module 200 receives the CAD file 110 and performs direct vector data parsing to construct a high-fidelity attribute map G=(V, E, X) that accurately reflects the topological structure of the drawing. This attribute map is then stored in the attribute map database 300 for subsequent querying and analysis. The proactive sensing auditing module 400 is the core intelligent decision-making unit of the system; it receives map data from the attribute map database 300 and the externally input compliance specifications 120. This module internally contains two cooperating sub-modules: an MLLM planner 410 acting as a planner and a GSP verifier 420 acting as a verifier. The MLLM planner 410 is responsible for understanding compliance specification 120 and is powered by an internal five-state machine (not in...). Figure 1 Driven by the property graph, the system generates and issues structured audit instructions to the GSP verifier 420. The GSP verifier 420 then executes these instructions on the property graph, performing deterministic topology and logic checks, and feeding back the check results to the MLLM planner 410. When anomalies are detected during the audit process, the system can also call upon a proprietary audit calculation sub-library (not shown) for in-depth diagnosis. After the proactive awareness audit module 400 completes all audit tasks, the report generation module 500 summarizes all check and diagnostic results, ultimately generating a structured and traceable compliance audit report 600 as the system's final output.

[0149] like Figure 4 As shown, Figure 4 This is a detailed flowchart of the vector-to-attribute (V2G) conversion process. The core task of the vector-to-attribute conversion module 200 is to convert the input CAD vector file 210 into a high-fidelity, semantically rich attribute map 260 through a series of unique processing steps. The specific process is as follows:

[0150] Step S210: Vector Primitive Analysis. The system receives the CAD vector file 210 as input and uses professional libraries such as ezdxf to parse the file into a set 220 of vector primitives. These primitives include lines, arcs, text, and insert blocks that serve as containers for standardized symbols. This step completely preserves the most original and accurate vector information of the drawing, which is the foundation for all subsequent structured analyses.

[0151] Step S220: Node Extraction and Context Disambiguation. This step aims to identify nodes representing electrical equipment or components from the vector primitive set 220. The system directly identifies standardized blocks (INSERT primitives) as equipment nodes. However, to address the ambiguity caused by non-standard hand-drawn or non-standard symbols due to non-standard drawing, this step introduces a crucial contextual disambiguation mechanism. Specifically, the system first performs a preliminary classification of symbols identified through geometric pattern matching and outputs an initial confidence score. For identification results below a preset threshold (e.g., 0.7), the system initiates a disambiguation subroutine to extract the adjacent node information of the ambiguous symbol, such as whether it is connected to "220kV busbar" or "low-voltage load" as its electrical context, and sends this context information along with the geometric features of the symbol itself to the MLLM for secondary analysis. Based on its internal electrical logic knowledge base, the MLLM performs a final correction or confirmation of the type of the ambiguous symbol, thus completing node extraction 230.

[0152] Step S230: Edge reasoning and connection semantic confidence (CSC) calculation. This step is crucial for constructing the graph topology. To accurately distinguish between real electrical connections and visual line intersections, this embodiment employs an original two-stage algorithm of "geometric heuristic + connection relationship semantic verification" for edge reasoning 240.

[0153] Phase 1: Geometric Heuristic Detection. The system first scans the endpoints of any two nodes based on the ε-neighborhood principle. If their distance (distance(node_i, node_j)) is less than the preset geometric tolerance ε, it is preliminarily determined that there is a candidate connection.

[0154] Phase Two: Semantic Verification of Connection Relationships. Subsequently, for each candidate connection, the system calculates a unique "Connection Semantic Confidence (CSC)" score to quantify its likelihood of being a genuine electrical connection. The CSC is defined by a multi-dimensional weighted formula:

[0155]

[0156] in, It represents the confidence level of the MLLM in determining the type of connection (such as "main electrical circuit", "control circuit", etc.). It is the actual geometric distance between the connection endpoints; This is the semantic relevance score between the text labels (such as voltage level "110kV") near the connection path and the connection itself; it is a preset weight. Ultimately, the system only confirms candidate connections with a CSC score higher than a preset threshold (e.g., 0.85) as valid electrical connection edges. Figure 4 As shown in the enlarged box, LLM will provide clear semantic prompts, such as "The upstream and downstream of this connection are both 110kV equipment, so this connection is determined to be a high-voltage electrical line", thereby filtering out false connections such as "dimension marking lines".

[0157] Step S240: Attribute Assignment. After the nodes and edges are determined, the system parses the attributes of the TEXT primitives near each node and the tile itself, extracts key parameters such as terminal ID, equipment model, polarity, and voltage level, and associates them as attributes with the corresponding nodes or edges, completing attribute assignment 250.

[0158] Through the above steps, a complete, accurate, and information-rich attribute graph G=(V, E, X) 260 is finally output.

[0159] like Figure 5 As shown, Figure 5 This is a schematic diagram of the five-state machine workflow for the proactive sensing audit closed loop in this embodiment. The proactive sensing audit module 400 is not a simple linear task execution process, but is driven by a unique, autonomous five-state machine mechanism created in this embodiment. The core of this mechanism is the MLLM planner 301, which acts as the control center of the state machine. It autonomously performs logical transitions between the four internal states of analysis S0, query S1, decision S3, and diagnosis S4, and calls the external GSP verifier 302 as its deterministic computation engine.

[0160] S0 - Analysis State 305: The system first enters this state when an audit task begins. The MLLM planner 301 receives the externally input compliance specification Φ300 and performs a global feature pre-analysis on the entire attribute graph loaded from the attribute graph database 300. Based on the analysis results, the MLLM planner 301 dynamically adjusts the audit priority of specification Φ, prioritizing rules that are most relevant to the current drawing features and have the highest potential risk. After completing the analysis and rule sorting, the state automatically transitions to S1.

[0161] S1 - Query Generation State 310: In this state, the MLLM planner 301 selects the rule with the highest current priority, translates it, and generates a structured verification query instruction at=(Rt,ft) 315. This instruction specifies the subgraph region Rt to be verified for compliance and the verification function ft. Subsequently, the MLLM planner 301 sends this instruction 315 to the GSP verifier 302 and waits for its calculation result, while the state remains in S1.

[0162] The execution process of GSP verifier 302: GSP verifier 302 is a stateless execution engine. It receives instructions from MLLM planner 301 (whether it is verification instruction 315 or subsequent diagnostic instruction 345), performs deterministic graph algorithm verification 320, and returns the calculation result (verification result ot or diagnostic result ot') to MLLM planner 301.

[0163] S3 - Decision State 330: After the MLLM planner 301 receives the verification result ot 325 from the GSP verifier 302, the system state transitions from S1 to S3. In this state, the MLLM planner 301 analyzes and makes a decision based on the result ot:

[0164] If the result is determined to be "compliant", and there are still rules pending audit, the status returns to S1, and the next rule is processed.

[0165] If the result is determined to be "non-compliant", the system will determine that there is a potential violation and store the violation and related information (such as the node ID involved) in a temporary log, and then the status will be transferred to S4-diagnostic status.

[0166] If all rules have been audited, the system will enter a terminated state and output the final compliance judgment result 350 to the report generation module 500.

[0167] S4 - Diagnostic State 340: This is the key innovative aspect that distinguishes this invention from existing technologies. When the system enters this state due to non-compliance, the MLLM planner 301 performs in-depth root cause analysis based on the violation information recorded in state S3. It proactively generates one or more follow-up diagnostic query instructions at' 345 and invokes the invention's unique auditing operator (such as the "Violation Evidence Path Operator DEPO"). The diagnostic query instruction 345 is also sent to the GSP validator 302 for execution. The planner waits in state S4 until it receives the returned diagnostic result ot' from the GSP validator. Upon receiving ot' (e.g., the specific violation evidence path), the planner associates and aggregates it with the violation facts recorded in state S3 to form a complete violation record with traceable evidence. After completing the diagnosis and recording, the state returns to state S1 to continue auditing the next rule.

[0168] Through the aforementioned state machine mechanism, this embodiment upgrades the auditing process into a logically clear and highly intelligent autonomous reasoning process of "discovering problems (S1→S3) → in-depth diagnosis and evidence collection (S3→S4→S3) → continuing to the next task (S3→S1)".

[0169] like Figure 6 As shown, Figure 6 This is an application example diagram of auditing a specific multi-point grounding error in this embodiment. Taking a typical "CT secondary side multi-point grounding" violation scenario as an example, it demonstrates from end to end how this embodiment can achieve accurate diagnosis and traceable reporting of deep topology errors through its original active sensing closed loop and diagnostic operators.

[0170] Figure 6 The image 400A shows a CAD drawing fragment containing an error. In this fragment, two grounding symbols are incorrectly connected on the secondary circuit of a current transformer (CT). Traditional pixel-based MLLMs, even if capable of identifying all individual components in the drawing (one CT, one load, two grounding symbols), often fail to detect this violation due to a lack of understanding of their electrical topology.

[0171] Figure 6 Example 400B shows the attribute graph 400B generated by the V2G module after converting drawing fragment 400A in this embodiment. From this attribute graph, it is clear that node 401 representing the current transformer, node 402 representing the load, and nodes 403 and 404, both of type "Ground," are grouped into the same connected subgraph Rt (subgraph name "CT_Secondary") through a series of electrical connection edges. This graph structure clearly and unambiguously exposes the topological fact of "multi-point grounding." During the audit process, when the process enters the S2-verification state, the GSP verifier executes the grounding uniqueness check function g(Rt), which deterministically calculates that the number of grounding nodes in this subgraph is 2. This result is returned to the S3-decision state, the system determines "non-compliant," and immediately triggers entry into the S4-diagnostic state.

[0172] Figure 6 The 400C example illustrates the audit report fragment 400C generated after the system performs in-depth diagnostics in S4-diagnostic mode. This part is the core of the creativity of this embodiment:

[0173] Triggering the diagnostic operator: After entering the S4 state, the MLLM planner matches and calls the "Violation Evidence Path Operator (DEPO)" which is unique in this embodiment based on the failure signal "Number of ground nodes > 1".

[0174] Perform diagnostic evidence collection: The DEPO operator takes the IDs of two non-compliant nodes (403 and 404) as input. Its core function is to calculate and return the shortest electrical path connecting these two nodes in the attribute graph 400B using a variant of the graph search algorithm such as Dijkstra or A*. In this embodiment, the returned path is [node 403] ← [node 402] → [node 404].

[0175] Generate a traceable report: After receiving this path returned by the DEPO operator, the S4 state integrates it as a "chain of evidence" into the final report. For example... Figure 6 As shown in 400C, the report clearly states the conclusion of "non-compliance". The core "verification basis" section is no longer simply "the quantity is 2", but clearly states "the DEPO operator returns the path of evidence of violation: [node 403] ← [node 402] → [node 404]".

[0176] This example demonstrates that this embodiment not only detects errors but also provides irrefutable topological evidence to prove them through its unique diagnostic operator. This conclusion is not based on fuzzy guesses about the model but stems from deterministic graph algorithms and the unique diagnostic operator of this embodiment, thus possessing extremely high credibility, interpretability, and traceability.

[0177] Compared to existing technologies, the intelligent drawing auditing method based on vector graphics and active perception closed loop provided in this embodiment firstly shifts the auditing basis from the pixel domain to the structured graph domain through V2G conversion, fundamentally overcoming the "structural blind spot." Secondly, the auditing process is driven by deterministic graph algorithms, original audit computation operators (DEPO, UPCIO), and specific mathematical metrics (CSC), resulting in an order-of-magnitude improvement in reliability and creativity compared to the probabilistic reasoning of existing technologies, effectively overcoming the "obviousness" defect. Thirdly, by outputting a chain of evidence of violations through operators such as DEPO, the interpretability and traceability of audit results are enhanced, making the auditing process completely transparent. Finally, the five-state machine mechanism of this embodiment achieves deep integration and intelligent scheduling of the planning capabilities of MLLM and the precise analysis capabilities of GSP, enabling the system to possess deep intelligence in dynamically planning based on drawing characteristics and iteratively diagnosing anomalies, which is closer to the thinking mode of human experts.

[0178] To facilitate better implementation of the intelligent drawing auditing method based on vector map and active perception closed loop of this application, this invention also provides an intelligent drawing auditing device based on the above-described intelligent drawing auditing method based on vector map and active perception closed loop. The meanings of the terms used are the same as in the above-described intelligent drawing auditing method based on vector map and active perception closed loop, and specific implementation details can be found in the description of the method embodiments.

[0179] Please see Figure 7 , Figure 7 The diagram below illustrates the structure of the intelligent drawing auditing device based on vector map spectra and active perception closed loop provided in this application embodiment. Specifically, the intelligent drawing auditing device based on vector map spectra and active perception closed loop may include:

[0180] The document acquisition module 601 is used to acquire the engineering drawing documents and compliance specification texts to be audited;

[0181] Vector conversion module 602 is used to parse the vector data of engineering drawing files and convert the vector data into attribute diagrams that represent the topological structure and semantics of the drawings;

[0182] The instruction generation module 603 is used to generate audit instructions based on attribute diagrams and compliance specification texts through a multimodal large language model planner.

[0183] The instruction execution module 604 is used to execute audit instructions on the attribute graph through the graph signal processing verifier to perform iterative compliance verification and diagnostic analysis on the attribute graph, and generate corresponding compliance verification results and diagnostic results.

[0184] Audit Report Module 605 is used to generate a compliance audit report containing traceable evidence based on compliance verification and diagnostic results.

[0185] Specific limitations regarding the intelligent drawing auditing device based on vector graphics and active perception closed-loop can be found in the limitations of the intelligent drawing auditing method based on vector graphics and active perception closed-loop described above, and will not be repeated here. Each module in the aforementioned intelligent drawing auditing device based on vector graphics and active perception closed-loop can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0186] The intelligent drawing auditing device based on vector map and active perception closed loop provided in this embodiment constructs its topology by directly parsing the vector data of the drawings and performs traceable automated compliance verification. While realizing automated auditing of engineering drawings, it improves the accuracy of drawing compliance judgment and the credibility of audit results, and ensures the traceability of audit conclusions, thus meeting the core requirements of engineering drawing auditing.

[0187] Furthermore, embodiments of this application also provide an electronic device, such as... Figure 8 As shown, it illustrates a structural schematic diagram of the electronic device involved in the embodiments of this application, specifically:

[0188] The electronic device may include components such as a processor 701 with one or more processing cores, a memory 702 with one or more computer-readable storage media, a power supply 703, and an input unit 704. Those skilled in the art will understand that... Figure 8 The electronic device structure shown does not constitute a limitation on the electronic device and may include more or fewer components than shown, or combine certain components, or have different component arrangements. Wherein:

[0189] The processor 701 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 702, and by calling data stored in the memory 702, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. Optionally, the processor 701 may include one or more processing cores; preferably, the processor 701 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 701.

[0190] The memory 702 can be used to store software programs and modules. The processor 701 executes various functional applications and a drawing intelligent auditing method based on vector graphics and active perception closed loop by running the software programs and modules stored in the memory 702. The memory 702 mainly includes a program storage area and a data storage area. The program storage area can store the operating system, application programs required for at least one function (such as sound playback function, image playback function, etc.), etc.; the data storage area can store data created according to the use of the electronic device, etc. In addition, the memory 702 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 702 may also include a memory controller to provide the processor 701 with access to the memory 702.

[0191] The electronic device also includes a power supply 703 that supplies power to the various components. Preferably, the power supply 703 can be logically connected to the processor 701 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system. The power supply 703 may also include one or more DC or AC power supplies, recharging systems, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components.

[0192] The electronic device may also include an input unit 704, which can be used to receive input digital or character information and generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function control.

[0193] Although not shown, the electronic device may also include a display unit, etc., which will not be described in detail here. Specifically, in this embodiment, the processor 701 in the electronic device loads the executable files corresponding to the processes of one or more application programs into the memory 702 according to the following instructions, and the processor 701 runs the application programs stored in the memory 702 to realize various functions, as follows:

[0194] The process involves: acquiring the engineering drawing files and compliance specification texts to be audited; parsing the vector data of the engineering drawing files and converting it into attribute graphs to characterize the topological structure and semantics of the drawings; generating audit instructions based on the attribute graphs and compliance specification texts using a multimodal large language model planner; executing the audit instructions on the attribute graphs using a graph signal processing validator to perform iterative compliance verification and diagnostic analysis on the attribute graphs, generating corresponding compliance verification and diagnostic results; and generating a compliance audit report containing traceable evidence based on the compliance verification and diagnostic results.

[0195] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0196] This application embodiment constructs the topology of drawings by directly parsing the vector data of the drawings and performs traceable automated compliance verification. While realizing automated auditing of engineering drawings, it improves the accuracy of drawing compliance judgment and the credibility of audit results, and ensures the traceability of audit conclusions, thus meeting the core requirements of engineering drawing auditing.

[0197] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be performed by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor.

[0198] To this end, embodiments of this application provide a storage medium storing multiple instructions that can be loaded by a processor to execute steps in any of the intelligent drawing auditing methods based on vector map spectrograms and active perception closed loop provided in embodiments of this application. For example, the instructions can execute the following steps:

[0199] The process involves: acquiring the engineering drawing files and compliance specification texts to be audited; parsing the vector data of the engineering drawing files and converting it into attribute graphs to characterize the topological structure and semantics of the drawings; generating audit instructions based on the attribute graphs and compliance specification texts using a multimodal large language model planner; executing the audit instructions on the attribute graphs using a graph signal processing validator to perform iterative compliance verification and diagnostic analysis on the attribute graphs, generating corresponding compliance verification and diagnostic results; and generating a compliance audit report containing traceable evidence based on the compliance verification and diagnostic results.

[0200] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0201] The storage medium may include: read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0202] Since the instructions stored in the storage medium can execute the steps in any of the intelligent drawing auditing methods based on vector graphics and active perception closed loop provided in the embodiments of this application, the beneficial effects that any of the intelligent drawing auditing methods based on vector graphics and active perception closed loop provided in the embodiments of this application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0203] The above provides a detailed description of the intelligent auditing method and apparatus for drawings based on vector map and active perception closed loop provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for intelligent auditing of drawings based on vector map spectrograms and active perception closed loop, characterized in that, include: Obtain the engineering drawings and compliance documents to be audited; The vector data of the engineering drawing file is parsed, and the vector data is converted into an attribute graph that represents the topological structure and semantics of the drawing. Based on the attribute graph and the compliance specification text, audit instructions are generated using a multimodal large language model planner. The audit instructions are executed on the attribute graph using a graph signal processing validator to perform iterative compliance verification and diagnostic analysis on the attribute graph, generating corresponding compliance verification results and diagnostic results. This includes: executing a verification query instruction on the attribute graph using the graph signal processing validator to obtain a compliance verification result; performing logical judgment on the compliance verification result using the multimodal large language model planner to obtain a judgment result; after determining that the judgment result is non-compliant, generating a diagnostic query instruction and executing the diagnostic query instruction using the graph signal processing validator to obtain diagnostic evidence for the non-compliant item; after determining that the judgment result is compliant and that the audit plan has items to be audited, generating the next verification query instruction to continue the process. The attribute graph is used for compliance verification and diagnostic analysis. After determining that the judgment result is compliant and that there are no items to be audited in the audit plan, the final compliance judgment result is output. The step of executing the diagnostic query instruction through the graph signal processing verifier to obtain diagnostic evidence for non-compliant items includes: calling a preset violation evidence path operator through the graph signal processing verifier; calculating and returning the shortest electrical path connecting two or more non-compliant nodes in the attribute graph through the violation evidence path operator, as the violation evidence path; the diagnostic analysis includes calling a preset diagnostic operator to perform deep root cause analysis on the non-compliant items, and the diagnostic operator includes at least a violation evidence path operator for tracing the electrical connection path between non-compliant nodes. Based on the compliance verification results and the diagnostic results, a compliance audit report containing traceable evidence is generated.

2. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 1, characterized in that, The process of parsing the vector data of the engineering drawing file and converting the vector data into an attribute graph to characterize the topological structure and semantics of the drawing includes: The engineering drawing file is parsed to extract the set of vector primitives used to constitute the engineering drawing; Based on the set of vector primitives, candidate nodes representing electrical components are identified and extracted, and context information is used to disambiguate the types of candidate nodes whose identification confidence is lower than a preset threshold, thereby determining the final set of nodes. Candidate connections are determined based on the geometric proximity between any two nodes in the node set. Semantic verification is performed on each candidate connection, the corresponding connection semantic confidence is calculated, and candidate connections with connection semantic confidence higher than a preset semantic threshold are determined as valid electrical connection edges, and an edge set is constructed. Assign corresponding attribute information to the nodes in the node set and / or the edges in the edge set to generate the attribute graph.

3. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 2, characterized in that, The step of performing semantic verification on each candidate connection and calculating the corresponding connection semantic confidence score includes: The candidate connection types are semantically determined using a multimodal large language model, and the corresponding type confidence scores are obtained. Obtain the geometric distance between the two nodes of the candidate connection, as well as the semantic relevance between the text annotations near the connection path and the candidate connection; The connection semantic confidence is obtained by weighted calculation based on the type confidence, the geometric distance, and the semantic relevance.

4. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 2, characterized in that, Assigning corresponding attribute information to the nodes in the node set and / or the edges in the edge set, and generating the attribute graph, includes: Extract text annotation primitives and their corresponding spatial coordinates from the vector primitive set; The text annotation primitive is matched with the nodes or edges adjacent to the spatial coordinates, and the text content is assigned as attribute information to the matched nodes or edges. The nodes and edges whose attributes have been assigned, along with their corresponding attribute information, are stored together as the attribute graph.

5. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 1, characterized in that, The process of generating audit instructions based on the attribute graph and the compliance specification text using a multimodal large language model planner includes: The multimodal large language model planner performs global feature analysis on the attribute graph and dynamically generates an audit plan based on the compliance specifications. According to the audit plan, structured verification query instructions are generated by the multimodal large language model planner.

6. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 1, characterized in that, The step of executing the diagnostic query instruction through the graph signal processing verifier to obtain diagnostic evidence for non-compliance items includes: The signal processing verifier calls a preset upstream protection chain integrity operator. By using the upstream protection chain integrity operator, starting from the critical device node, the electrical connections are traversed upstream in the attribute graph to verify the configuration integrity of the protection chain and obtain the protection chain verification result.

7. The intelligent auditing method for drawings based on vector map spectrograms and active perception closed loop as described in claim 1, characterized in that, The process of generating a compliance audit report containing traceable evidence based on the compliance verification results and the diagnostic results includes: Aggregate all the compliance verification results and their corresponding diagnostic evidence, construct the mapping relationship between them and the relevant nodes, edges and subgraphs in the attribute graph, and form a structured audit data set; Based on the structured audit data set, the report content is arranged according to the preset report template, and for each non-compliance item, the type of violation, the violated regulatory clauses, and the topological evidence chain provided by the diagnostic evidence are clearly recorded; The compiled report content is serialized into a compliance audit report document in a preset file format.

8. A drawing intelligent auditing device based on vector map spectrograms and active perception closed loop, characterized in that, include: The document acquisition module is used to acquire the engineering drawing documents and compliance specification texts to be audited; The vector conversion module is used to parse the vector data of the engineering drawing file and convert the vector data into an attribute diagram that represents the topological structure and semantics of the drawing. The instruction generation module is used to generate audit instructions based on the attribute graph and the compliance specification text, using a multimodal large language model planner. The instruction execution module is used to execute the audit instructions on the attribute graph through a graph signal processing validator to perform iterative compliance verification and diagnostic analysis on the attribute graph, generating corresponding compliance verification results and diagnostic results. This includes: executing a verification query instruction on the attribute graph through the graph signal processing validator to obtain a compliance verification result; performing logical judgment on the compliance verification result through the multimodal large language model planner to obtain a judgment result; after determining that the judgment result is non-compliant, generating a diagnostic query instruction and executing the diagnostic query instruction through the graph signal processing validator to obtain diagnostic evidence for the non-compliant item; and after determining that the judgment result is compliant and that there are items to be audited in the audit plan, generating the next verification query instruction. The compliance verification and diagnostic analysis of the attribute graph are continued. After determining that the judgment result is compliant and that there are no items to be audited in the audit plan, the final compliance judgment result is output. The step of executing the diagnostic query instruction through the graph signal processing verifier to obtain diagnostic evidence for non-compliant items includes: calling a preset violation evidence path operator through the graph signal processing verifier; calculating and returning the shortest electrical path connecting two or more non-compliant nodes in the attribute graph through the violation evidence path operator, as the violation evidence path; the diagnostic analysis includes calling a preset diagnostic operator to perform deep root cause analysis on the non-compliant items, and the diagnostic operator includes at least a violation evidence path operator for tracing the electrical connection path between non-compliant nodes. The audit report module is used to generate a compliance audit report containing traceable evidence based on the compliance verification results and the diagnostic results.

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