Delay excitation generation device and method, test platform, electronic equipment and medium

Abstract

The invention relates to a delayed excitation generation device and method, a test platform, electronic equipment and a computer readable storage medium, and belongs to the field of testing. The delay excitation generating device comprises a first application interface and a percentage delay generator. The first application interface is used for acquiring a first incentive description file configured by a user, and the first incentive description file comprises percentage delay parameters including percentage variables, observation windows and maximum delay; wherein the percentage variable represents a percentage delay parameter, and the percentage delay parameter comprises the ratio of the number of effective handshake clocks to the total number of clocks; the observation window represents the delay excitation number which can be generated by calling the percentage delay parameter for a single time; the maximum delay represents the maximum number of clocks of the continuous invalid handshake. The percentage delay generator is used for calling percentage delay parameters through the first application interface and generating corresponding delay excitation according to the percentage delay parameters.

Description

Technical Field

[0001] This application belongs to the field of testing, and specifically relates to a delayed excitation generation device, method, test platform, electronic device, and computer-readable storage medium. Background Technology

[0002] As chip size continues to increase, their internal control logic becomes increasingly complex, leading to more stringent verification requirements for functional correctness (such as deadlock prevention) and performance metrics (such as various bandwidth requirements). In protocol verification for various functional units within a chip, the proportion and importance of flow control and handshake have significantly increased. For example, in massively parallel high-performance computing systems (such as large model training clusters), both flow control between computing units and large-scale, high-bandwidth, low-latency interconnect networks rely heavily on various commonly used interface protocols. And one of the most critical and error-prone aspects of these protocols is precisely the flow control and handshake portion.

[0003] For these common protocols, several companies have developed corresponding UVM VIPs (Universal Verification Methodology Verification IPs) for verification. However, a comprehensive analysis of existing VIPs and mainstream verification methods reveals that these VIPs typically only provide the most basic random variables (such as ready_delay and valid_delay), requiring users to write sequences for packet-by-packet randomization. In a chip, almost every module using this type of VIP must repeat this process, and the randomization of actual delay behavior depends on the module owner's understanding, making it difficult to achieve systematic and consistent coverage. Summary of the Invention

[0004] Therefore, the purpose of this application is to provide a delayed excitation generation apparatus, method, test platform, electronic device, and computer-readable storage medium to improve the problems of low efficiency and poor flexibility of existing delayed excitation generation methods using VIP.

[0005] The embodiments of this application are implemented as follows: In a first aspect, embodiments of this application provide a delay stimulus generation device, comprising: a first application interface and a percentage delay generator; the first application interface is used to obtain a first stimulus description file configured by a user, the first stimulus description file including: a percentage delay parameter, the percentage delay parameter including a percentage variable, an observation window, and a maximum delay; wherein, the percentage variable represents the ratio of the number of clocks with valid handshakes to the total number of clocks; the observation window represents the number of delay stimuli that can be generated by a single call to the percentage delay parameter; the maximum delay represents the maximum number of clocks with consecutive invalid handshakes; the percentage delay generator is used to call the percentage delay parameter through the first application interface and generate corresponding delay stimuli according to the percentage delay parameter.

[0006] In the above embodiments, the percentage delay parameter in the user-configured first stimulus description file is obtained through the first application interface, enabling the percentage delay generator to generate corresponding delay stimuli based on the percentage delay parameter. This application uses a percentage variable (rate) similar to the duty cycle, combined with the observation window setting (windows) and the maximum allowed delay value to adjust the fitted and generated delay stimuli. By adjusting at least one of the percentage variable, observation window, and maximum delay, different delay stimuli can be generated to cover various test scenarios, thereby solving the problems of existing stimulus generation methods (such as high requirements for testers, difficulty in systematically covering various scenarios, and low efficiency).

[0007] In one possible implementation of the first aspect embodiment, the percentage delay generator is specifically used for: taking values ​​from 1 to n sequentially to obtain the total delay for the i-th time, where n is an integer greater than 1, and the total delay for the (n+1)-th time is equal to the default value; when i=1, the total delay for the i-th time is determined based on the percentage variable and the observation window in the percentage delay parameter; when i is greater than 1, the total delay for the i-th time is determined based on the total delay for the (i-1)-th time and the delay value of the delay stimulus generated for the (i-1)-th time; when the total delay for the i-th time is greater than the default value, a delay stimulus that satisfies the total delay for the i-th time and the maximum delay constraint is randomly generated; when the number of delay stimuli in the temporary queue is less than the number of stimuli corresponding to the observation window, the delay stimulus generated for the i-th time is pushed into the temporary queue; when the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, the delay value of the delay stimulus in the temporary queue is changed according to the delay stimulus generated for the i-th time.

[0008] In the above embodiments, through the above loop, multiple delay stimuli that satisfy the total delay and maximum delay constraints can be continuously generated. When the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, the delay value of the delay stimuli in the temporary queue is changed according to the delay stimuli generated in the i-th time. This ensures that the total number of delay stimuli in the temporary queue remains unchanged, so that the final number of delay stimuli and the total delay meet the requirements.

[0009] In one possible implementation of the first aspect embodiment, the percentage delay generator, when obtaining the total delay for the first time, is specifically used to: obtain the difference between 100% and the percentage variable; obtain the product of the difference and the window width of the observation window; obtain the ratio of the product to the percentage variable to obtain the total delay for the first time.

[0010] In the above embodiments, the principle of obtaining the total delay for the first time can be expressed by the following formula: Total delay for the first time = ((100 - ratio) × window width) / ratio. The total delay for the first time can be obtained quickly. Different ratios and window widths can be set to obtain different total delays to meet the needs of various testing environments.

[0011] In one possible implementation of the first aspect embodiment, the percentage delay generator is further configured to: generate a delay stimulus with a default delay value when i=1 and the total delay of the i-th time is equal to the default value; or, save the delay stimulus in the temporary queue when i is greater than 1 and the total delay of the i-th time is equal to the default value.

[0012] In the above embodiment, if the total delay in the first iteration is equal to the default value, a delay stimulus with the default delay value is directly generated to ensure the accuracy and feasibility of the solution. When i is greater than 1 and the total delay in the i-th iteration is equal to the default value, it indicates that the delay stimulus in the temporary queue is the required delay stimulus, and it is saved for subsequent testing.

[0013] In one possible implementation of the first aspect embodiment, the delay stimulus generation device further includes: a second application interface and a maximum / minimum delay generator; the second application interface is used to obtain a second stimulus description file configured by the user; the second stimulus description file includes: a maximum / minimum delay parameter, the maximum / minimum delay parameter including the observation window, the maximum delay, and the minimum delay; wherein, the minimum delay represents the minimum number of clock cycles for consecutive invalid handshakes; the maximum / minimum delay generator is used to call the maximum / minimum delay parameter through the second application interface and generate a corresponding delay stimulus according to the maximum / minimum delay parameter.

[0014] In the above embodiment, the maximum and minimum delay parameters in the second stimulus description file configured by the user are obtained through the second application interface, so that the maximum and minimum delay generator can generate corresponding delay stimuli according to the maximum and minimum delay parameters. By setting the maximum and minimum delay generator to randomly generate the number of delays corresponding to the observation window when generating delay stimuli, and the delay interval between delay stimuli needs to meet the delay stimuli of the maximum and minimum delay, it has better flexibility and can cover more test scenarios.

[0015] In one possible implementation of the first aspect embodiment, the delay stimulus generation device further includes: a third application interface for obtaining a third stimulus description file configured by a user; the third stimulus description file includes: a target delay parameter directly specified by the user, the target delay parameter including at least one delay value; and a user direct value generator for calling the target delay parameter through the third application interface and generating a corresponding delay stimulus based on the target delay parameter.

[0016] In the above embodiments, the target delay parameter directly specified by the user is obtained through a third application interface, and the user direct value generator is used to generate a delay stimulus that reproduces the delay value specified by the user based on the target delay parameter, so as to reproduce some characteristic scenarios and solve the problem that existing testing methods cannot cover special scenarios.

[0017] In one possible implementation of the first aspect embodiment, the delayed excitation generating device further includes: a command line parameter parser, used to listen to command line parameter passing instructions, parse the listened command line parameter passing instructions, and send the parsed parameters to the generator corresponding to the application interface through the corresponding application interface.

[0018] In the above embodiments, the required delay-related parameters can be input in real time via command line parameters to meet real-time testing needs. For example, if a user wants to temporarily join a test during the testing process, they can directly input the relevant parameters via command line parameters to generate the required delay stimulus.

[0019] Secondly, embodiments of this application also provide a test platform, including: a delay excitation generating device as provided in the first aspect embodiment and / or any possible implementation in conjunction with the first aspect embodiment, the test platform being used to connect to the design under test and to perform flow control testing on the design under test based on the delay excitation generated by the delay excitation generating device.

[0020] Thirdly, embodiments of this application also provide a method for generating delayed stimuli, comprising: obtaining a first stimuli description file configured by a user, the first stimuli description file including: a percentage delay parameter, the percentage delay parameter including a percentage variable, an observation window, and a maximum delay; wherein, the percentage variable represents the ratio of the number of clocks with valid handshakes to the total number of clocks; the observation window represents the number of delayed stimuli that can be generated in a single call to the percentage delay parameter; the maximum delay represents the maximum number of clocks with consecutive invalid handshakes; and generating corresponding delayed stimuli according to the percentage delay parameter.

[0021] In one possible implementation of the third aspect embodiment, generating a corresponding delay stimulus based on the percentage delay parameter includes: i sequentially taking values ​​from 1 to n, obtaining the total delay for the i-th time, where n is an integer greater than 1, and the total delay for the (n+1)-th time is equal to a default value; the total delay for the first time is determined based on the percentage variable and the observation window in the percentage delay parameter; when i is greater than 1, the total delay for the i-th time is determined based on the total delay for the (i-1)-th time and the delay value of the delay stimulus generated for the (i-1)-th time; when the total delay for the i-th time is greater than the default value, randomly generating a delay stimulus that satisfies the total delay for the i-th time and the maximum delay constraint; when the number of delay stimuli in the temporary queue is less than the number of stimuli corresponding to the observation window, pushing the delay stimulus generated for the i-th time into the temporary queue; when the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, changing the delay value of the delay stimulus in the temporary queue based on the delay stimulus generated for the i-th time.

[0022] In one possible implementation of the third aspect embodiment, the method further includes: generating a delay stimulus with a default delay value when i=1 and the total delay of the i-th iteration is equal to the default value; or, saving the delay stimulus in the temporary queue when i is greater than 1 and the total delay of the i-th iteration is equal to the default value.

[0023] In a possible implementation of the third aspect embodiment, the method further includes: obtaining a second stimulus description file configured by the user; the second stimulus description file includes: a maximum and minimum delay parameter, the maximum and minimum delay parameter including the observation window, the maximum delay, and the minimum delay; wherein, the minimum delay represents the minimum number of clock cycles for consecutive invalid handshakes; and generating a corresponding delay stimulus based on the maximum and minimum delay parameter.

[0024] In one possible implementation of the third aspect embodiment, the method further includes: obtaining a third incentive description file configured by the user; the third incentive description file includes: a target delay parameter directly specified by the user, the target delay parameter including at least one delay value; and generating a corresponding delay incentive based on the target delay parameter.

[0025] Fourthly, embodiments of this application also provide an electronic device, including: a memory and a processor, the processor being connected to the memory; the memory being used to store a program; the processor being used to invoke the program stored in the memory to perform a method provided as described in the third aspect embodiments and / or in combination with any possible implementation of the third aspect embodiments.

[0026] Fifthly, embodiments of this application also provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the method provided by any possible implementation of the embodiments of the third aspect and / or in combination with the embodiments of the third aspect.

[0027] Other features and advantages of this application will be set forth in the following description. The objectives and other advantages of this application can be realized and obtained through the structures specifically pointed out in the written description and the accompanying drawings. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. The above and other objects, features, and advantages of this application will become clearer through the accompanying drawings.

[0029] Figure 1 A schematic diagram of a delayed excitation generating device provided in an embodiment of this application is shown.

[0030] Figure 2 This illustration shows a schematic diagram of the definition of relevant parameters in a percentage delay parameter provided in an embodiment of this application.

[0031] Figure 3 This illustration shows a delay distribution under different percentage delay parameters provided by an embodiment of this application.

[0032] Figure 4 A schematic diagram of a percentage delay generator provided in an embodiment of this application is shown.

[0033] Figure 5 A schematic diagram of another delayed excitation generating device provided in an embodiment of this application is shown.

[0034] Figure 6 A schematic diagram of a delayed excitation generation device provided in an embodiment of this application is shown.

[0035] Figure 7A flowchart illustrating a delayed excitation generation method provided in an embodiment of this application is shown.

[0036] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown. Detailed Implementation

[0037] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. The following embodiments are provided as examples to more clearly illustrate the technical solutions of this application, and should not be used to limit the scope of protection of this application. Those skilled in the art will understand that, without conflict, the following embodiments and features can be combined with each other.

[0038] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, relational terms such as "first," "second," etc., in the description of this application are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus.

[0039] Furthermore, the term "and / or" in this application is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0040] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the technical term "connection" can be a direct connection or an indirect connection through an intermediate medium.

[0041] As chip complexity increases, flow control has evolved from simple handshake signals into critical core logic ensuring system correctness and performance. Traditional verification methods face challenges such as difficulty in triggering extreme scenarios and low efficiency. Therefore, there is an urgent need for more advanced, automated, and controllable verification solutions. The delay stimulus generation device proposed in this application was developed to address this challenge. Through abstraction, patterning, and configurability, it liberates flow control verification from inefficient manual labor, enabling engineers to easily generate, reproduce, and manage complex flow control delay scenarios, thereby more effectively discovering deep-seated hardware defects.

[0042] Before introducing this application, let's first introduce the background technology involved. In chip design, especially in systems involving communication between multiple modules or units, the data production rate and consumption rate are often mismatched. Flow control is a mechanism for coordinating the data flow rate between the sender and receiver, and its core purpose is to prevent data overflow and data underflow. Specifically, preventing data overflow occurs when the receiver's buffer is full, but the sender still forces data to be sent, resulting in data loss. Preventing data underflow occurs when the receiver needs data, but the sender fails to provide it in time, causing the receiver to "starve." Simply put, it's a "handshake" language that allows both communicating parties to say "stop" or "continue sending."

[0043] Common flow control protocols include: Valid / Ready handshake mechanisms and Credit-based protocols. Valid / Ready handshake mechanisms are common in on-chip buses (such as AXI (Advanced Dextensible Interface) and AMBA (Advanced Microcontroller Bus Architecture)), and their common signals are the Valid and Ready signals. Credit-based protocols are common in network-on-chip (NoC), PCIe (Peripheral Component Interconnect Express), and some high-speed serial communication protocols, and their common signals are the Send and Free signals.

[0044] The Valid signal is driven by the sender; a high signal indicates that the data on the data line in the current cycle is valid and available. The Ready signal is driven by the receiver; a high signal indicates that the receiver can receive data in the current cycle. Data transmission condition: Successful data transmission occurs within one clock cycle if and only if both the Valid and Ready signals are high simultaneously on the rising edge of the clock. This is often referred to as a "handshake."

[0045] The Send signal is driven by the sender; pulling it high indicates the transmission of a data unit. The Free signal (or Credit) is an abstract concept and is not usually a direct handshake signal; it's more like an internal counter. Credit: A "token" or "ticket" representing the size of the receiver's free buffer. The sender consumes one credit for each data unit sent; the receiver returns one credit to the sender each time it frees a buffer.

[0046] The "delay" and "behavior" of flow control are reflected in the timing of these signals going high and low. For example, sender delay: when to go high for the Valid or Send signal, and how long to keep it high.

[0047] After briefly introducing the background technologies involved in flow control, the following section will combine... Figure 1 The delay excitation generation apparatus provided in this application will be described. The delay excitation generation apparatus includes: a first application interface (API) and a percentage delay generator. The percentage delay generator is connected to the first application interface.

[0048] The first application interface is used to obtain the user-configured first stimulus description file (such as a Verilog file). Testers can control the delayed stimulus generation device to generate the required delayed stimulus by configuring the first stimulus description file.

[0049] The first stimulus description file includes: percentage delay parameters, which contain percentage variables (e.g., denoted by rate, also known as ratio), observation windows (e.g., denoted by windows), and maximum delay (e.g., denoted by max_delay, or simply max). It is understood that the number of percentage delay parameters in Set_percent_delay(rate, max, windows) can include at least one, for example, Set_percent_delay(rate0, max0, windows0), Set_percent_delay(rate1, max1, windows1). The example shows two percentage delay parameters.

[0050] The percentage variable (rate) represents the ratio of the number of clocks with valid handshakes (or simply the number of valid clocks) to the total number of clocks (or simply the total number of clocks) within a certain period (the time corresponding to the total number of clocks), i.e., rate = number of valid clocks / total number of clocks. The observation window (windows) represents the number of delay stimuli that can be generated by a single call to the percentage delay parameter, which is equal to the number of clocks with valid handshakes within a certain period. The maximum delay (max) represents the maximum number of consecutive invalid handshakes.

[0051] To better understand, let's combine the following... Figure 2 The definition of the percentage delay parameter is explained. Figure 2 A small white square in the clock indicates that a valid handshake has been performed within the current clock cycle, meaning a small white square can represent a valid clock cycle. A small gray square indicates that a valid handshake has not been performed within the current clock cycle, meaning a small gray square can represent an invalid clock cycle. Figure 2 The large white square in the image is composed of multiple smaller white squares; similarly, Figure 2 The large gray square in the image is composed of multiple gray squares. The observation window represents a period of time (e.g., ...). Figure 2 The number of valid handshake clocks within the entire square.

[0052] The percentage latency generator is used to call percentage latency parameters through the first application interface and generate corresponding latency stimuli based on these parameters. When generating latency stimuli, `windows` latency stimuli can be generated according to a given ratio and maximum latency. For example, as the host's sending channel, if `rate=100` and `windows=88` (i.e., the observation window width is 88), it means that 88 valid requests will be sent at full speed, resulting in 88 zero-latency values. In the verification environment, the latency value used before each subsequent request is sent is 0, meaning the latency between two requests is 0.

[0053] When the first stimulus description file contains multiple percentage delay parameters, the percentage delay generator can call each percentage delay parameter sequentially, one at a time. When the first stimulus description file contains only one percentage delay parameter, the percentage delay generator can repeatedly call that parameter, thereby continuously generating the corresponding delay stimulus. In other words, the percentage delay generator has a memory function and can repeatedly call the most recently called percentage delay parameter.

[0054] This application uses a percentage variable (rate) similar to the duty cycle, combined with the observation window setting (windows) and the maximum allowed delay value to adjust the delayed stimulus generated by the fitting. By adjusting at least one of the percentage variable, observation window, and maximum delay, different delayed stimuli can be generated to cover various test scenarios.

[0055] Figure 3 Examples illustrate the delay distribution generated by the percentage delay generator under different parameters. Based on Figure 2 As shown in the definition, rate = windows / total number of clocks. For Figure 3 The delay distribution with max=1, rate=50, and windows=1: Since max=1, the maximum number of consecutive gray squares is 1. Since windows=1 and rate=50, the total number of clocks is 2. That is, the clock of every 2 squares is the total clock. The percentage delay generator will repeatedly call this parameter (max=1, rate=50, windows=1) to generate this delay distribution.

[0056] for Figure 3 The delay distribution with max=3, rate=25, and windows=1 is as follows: Since max=3, the maximum number of consecutive gray squares is 3. Since windows=1 and rate=25, the total number of clocks is 4. That is, the clock of every 4 squares is the total clock. The percentage delay generator will repeatedly call this parameter (max=3, rate=25, windows=1) to generate this delay distribution.

[0057] for Figure 3 The delay distribution with max=3, rate=50, and windows=100: Since max=3, the maximum number of consecutive gray squares is 3. Since windows=100 and rate=25, the total number of clocks is 200. That is, the clock at which every 200 squares is located is the total clock. The percentage delay generator will repeatedly call this parameter (max=3, rate=500, windows=100) to generate this delay distribution (not all shown). The above delay generation method, which uses the concept of rate combined with the window width of the observation window as a control variable, can easily fit the following scenario: a) Performance analysis scenario, such as some host terminals can send Valid signals at a specific rate, for example, inserting 3 bubble bursts after each Valid signal.

[0058] b) The slave device can apply back pressure to the delay at a specific ratio. For example, if the slave device only has 50% of the bandwidth, it can apply back pressure to the Free signal in Creditflow or the Ready signal in the handshake signal.

[0059] c) Slave-side speed variation control. For example, the purpose of speed variation control is to test the empty and full status of the host's built-in FIFO (First In First Out) queues at various levels. This can be achieved by calling percentage delay parameters with different given rate values.

[0060] In one possible implementation, all delay values ​​can be generated or loaded and stored in a queue before the simulation begins for use by subsequent flow control logic, rather than being generated on-the-spot. In this implementation, the percentage delay generator can generate corresponding delay stimuli based on percentage delay parameters before the simulation begins and store them in the queue. All delays required for the simulation process can be generated or loaded at the beginning of the simulation, allowing the user VIPdriver to retrieve them one by one. In another implementation, the delay stimulus generation device further includes a delay value queue for storing the final delay stimuli.

[0061] In one possible implementation, the percentage delay generator is specifically used for: taking values ​​from 1 to n sequentially to obtain the total delay for the i-th time, where n is an integer greater than 1, and the total delay for the (n+1)-th time is equal to the default value; when the total delay for the i-th time is greater than the default value (which can be 0, i.e., 0 delay), randomly generating delay stimuli that satisfy the total delay and maximum delay constraints for the i-th time; when the number of delay stimuli in the temporary queue is less than the number of stimuli corresponding to the observation window, pushing the delay stimuli generated for the i-th time into the temporary queue; when the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, changing the delay value of the delay stimuli in the temporary queue according to the delay stimuli generated for the i-th time.

[0062] In this context, when i=1, the total delay for the i-th time is determined based on the percentage variable and the observation window in the percentage delay parameter. In one possible implementation, the percentage delay generator, when obtaining the total delay for the first time, specifically performs the following steps: obtaining the difference between 100% and the percentage variable (i.e., the ratio); obtaining the product of the difference and the window width of the observation window; and obtaining the ratio of the product to the percentage variable to obtain the total delay for the first time. For ease of understanding, this can be expressed by the following formula: Total delay for the first time = ((100 - ratio) × window width) / ratio.

[0063] When i is greater than 1, the total delay of the i-th iteration is determined based on the total delay of the (i-1)-th iteration and the delay value of the delayed stimulus generated in the (i-1)-th iteration. That is, the total delay of the i-th iteration = the total delay of the (i-1)-th iteration - the delay value of the delayed stimulus generated in the (i-1)-th iteration.

[0064] In some possible implementations, the percentage delay generator is also used to: generate a delay stimulus with a default delay value when i=1 and the total delay of the i-th iteration is equal to the default value; or, save the delay stimulus in a temporary queue when i is greater than 1 and the total delay of the i-th iteration is equal to the default value.

[0065] The process described above is explained in detail below. First, the total delay for the first time is obtained (determined based on the percentage variable in the percentage delay parameter and the observation window). When the total delay for the first time is greater than 0, a delay stimulus 1 that satisfies the total delay and maximum delay constraints of the first time is randomly generated. Initially, the number of delay stimuli in the temporary queue is zero (i.e., 0), therefore the number of delay stimuli in the temporary queue must be less than the number of stimuli corresponding to the observation window (assumed to be k). At this time, the delay stimulus generated in the first time is pushed into the temporary queue. Then, the total delay for the second time is obtained (equal to the total delay of the first time minus the delay value of delay stimulus 1). When the total delay for the second time is greater than 0, a delay stimulus 2 that satisfies the total delay and maximum delay constraints of the second time is randomly generated and placed in the temporary queue. When the number of delayed stimuli is less than the number of stimuli corresponding to the observation window, the delayed stimuli generated in the second time are pushed into the temporary queue. Then, the total delay of the third time is obtained (equal to the total delay of the second time minus the delay value of delayed stimuli 2)... and so on. Suppose that when the delayed stimuli k are randomly generated in the kth time, the number of delayed stimuli in the temporary queue is k-1, which is less than the number of stimuli k corresponding to the observation window. Therefore, the delayed stimuli generated in the kth time are pushed into the temporary queue. Then, the total delay of the (k+1)th time is obtained. When the delayed stimuli k+1 are randomly generated in the (k+1)th time, the number of delayed stimuli k in the temporary queue is not less than the number of stimuli corresponding to the observation window. Then, the delay value of the delayed stimuli in the temporary queue is changed according to the delayed stimuli k+1 generated in the (k+1)th time. At this point, the temporary queue contains k delayed stimuli. When changing the delay value of a delayed stimuli in the temporary queue, it can be done by adding the delay value of delayed stimuli k+1 to the original k delayed stimuli. For example, it can be randomly added to at least one of the k delayed stimuli. The delay value of delayed stimuli k+1 can be added to a single delayed stimuli or to multiple delayed stimuli. Alternatively, the values ​​of the delayed stimuli in the temporary queue can be changed sequentially. For example, the value of the delayed stimuli generated by k+1 can be added to delayed stimuli 1, the value of the delayed stimuli generated by k+2 can be added to delayed stimuli 2, the value of the delayed stimuli generated by k+3 can be added to delayed stimuli 3, and so on, until the latest total delay equals the default value, at which point the delayed stimuli in the temporary queue are saved. It is understood that the delay value of the added delayed stimuli must be less than or equal to the maximum delay.

[0066] In one possible implementation, the above process can be as follows: Figure 4 As shown below, in conjunction with Figure 4To elaborate on the above process, assuming rate=50 and windows=1, the first total delay (initial total delay) = 1. A delay stimulus is randomly generated, and it is checked whether the delay stimulus in the temporary queue is less than 1 (windows=1). If yes, it is pushed into the temporary queue. If no, the contents of the temporary queue are modified sequentially. Then, it is checked whether the new total delay is equal to 0. If no, the above process is repeated, and a delay stimulus is randomly generated until the new total delay is equal to 0. Finally, the entire temporary queue is pushed into the final queue (as shown in the delay value queue below).

[0067] In one possible implementation, the random delay algorithm is as follows: Randomization (temp_delay) with { temp_delay <= max_delay; temp_delay <= total_delay; temp_delay dist {0:=30,[1:5]: / 30,[6:50]: / 20,[51:max_delay]: / 20; }; } total_delay = total_delay -temp_delay.

[0068] In other words, the generated delay stimulus (temp_delay) must satisfy the constraints that are less than or equal to max_delay and total_delay. When generating random delays, the probability of generating a delay stimulus with a delay value of 0 is 30%, the overall probability of generating delay stimuli with delay values ​​from 1 to 5 is 30%, the overall probability of generating delay stimuli with delay values ​​from 6 to 50 is 20%, and the overall probability of generating delay stimuli with delay values ​​from 51 to max_delay is 20%. For example, assuming rate=50 and windows=1, the initial total delay is 1, and the generated random delay value can only be 0 or 1. Similarly, assuming rate=25 and windows=1, the initial total delay is 3, and the generated random delay value can only be 0, 1, 2, or 3. Furthermore, assuming rate=25 and windows=10, the initial total delay is 30, and the generated random delay value can only be 0, 1, 2, ..., 2, 29, or 30. When randomly generating delays, they must be generated randomly according to the above probabilities.

[0069] In one possible implementation, such as Figure 5As shown, the delay stimulus generation device further includes: a second application interface and a maximum / minimum delay generator. The delay stimulus generation device also includes: a third application interface and a user direct value generator. It is understood that... Figure 5 The diagram also illustrates a scenario where the delay stimulus generation device includes: a first application interface, a second application interface, a third application interface, a percentage delay generator, a maximum and minimum delay generator, and a user direct value generator. In some implementations, the delay stimulus generation device may not include... Figure 5 The second application interface, the maximum and minimum latency generator, or excluding Figure 5 The third application interface in the system is the user direct value generator.

[0070] The second application interface (API) is used to obtain the second stimulus description file configured by the user. The second stimulus description file includes: maximum and minimum delay parameters. The maximum and minimum delay parameters include the observation window (e.g., windows), maximum delay (e.g., max), and minimum delay (e.g., min_delay, or simply min). The minimum delay represents the minimum number of clock cycles required for consecutive invalid handshakes.

[0071] For example, `Set_min_max_delay(min, max, windows)` represents the maximum and minimum delay parameters, such as `Set_min_max_delay(min0, max0, windows0)`. It is understood that the number of percentage delay parameters in `Set_min_max_delay(min, max, windows)` can include at least one, for example, `Set_min_max_delay(min0, max0, windows0)`, `Set_min_max_delay(min1, max1, windows1)`. The example shows two maximum and minimum delay parameters.

[0072] The maximum and minimum delay generator is used to call the maximum and minimum delay parameters through the second application interface and generate corresponding delayed stimuli based on the maximum and minimum delay parameters. When generating the corresponding delayed stimuli, the maximum and minimum delay generator needs to satisfy the constraints of the maximum and minimum delay parameters. When generating delayed stimuli, it randomly generates the number of delays corresponding to the observation window, and the delay interval between delayed stimuli needs to satisfy the constraints of the maximum and minimum delays.

[0073] When the second stimulus description file contains multiple maximum and minimum delay parameters, the maximum-minimum delay generator can call each parameter sequentially, one at a time. When the second stimulus description file contains only one maximum-minimum delay parameter, the maximum-minimum delay generator can repeatedly call that parameter, thereby continuously generating the corresponding delay stimuli. In other words, the maximum-minimum delay generator has a memory function and can repeatedly call the most recently called maximum-minimum delay parameter.

[0074] The third application interface is used to obtain the user-configured third stimulus description file. This third stimulus description file includes: a target delay parameter directly specified by the user, which includes at least one delay value, such as a delay value of 1. For example, it can be represented by `Set_direct_delay(delay_q[$])`, where the delay value of `delay_q[$]` is specified by the user. These delay values ​​can be obtained by debugging the chip beforehand and exported, so that these specific delay values ​​can be directly configured into the verification environment to reproduce certain scenarios.

[0075] The user-defined direct value generator is used to call target delay parameters through a third application interface and generate corresponding delay stimuli based on the target delay parameters. In this implementation, the user-specified delay can be directly reproduced. For example, if the user specifies 100 delays, 100 delay stimuli with the specified delay values ​​will be generated sequentially.

[0076] In some possible implementations, the first stimulus file, the second stimulus file, and the third stimulus file described above can be independent files or the same file. Using the same file to configure different delay-related parameters can simplify the configuration process. The delay-related parameters in this application can be a general term for various delay parameters; the percentage delay parameter, maximum and minimum delay parameter, target delay parameter, etc., mentioned above can all be referred to as delay-related parameters.

[0077] In one possible implementation, the principle of the above-described delayed excitation generating device is as follows: Figure 6 As shown. Users can... Figure 6 The list shown contains the latency-related parameters required for the test. Different APIs will call different parameters in the list to different generators. The generators will generate the corresponding latency based on the parameters called by the API and store them in the latency value queue for subsequent calls. Figure 6 The percentage delay generator and maximum / minimum delay generator can repeatedly call the latest delay-related parameters. All delay values ​​can be generated or loaded and stored in a queue before the simulation begins for use by subsequent flow control logic, rather than being generated on-the-spot.

[0078] In some implementations, the delay value queue can be a FIFO queue, and the delays in the queue will be called sequentially in a first-in-first-out order. In some possible implementations, the delay value queue can be a random queue, and the delay stimuli in the queue can be called as needed.

[0079] It is understandable that, besides using a configuration stimulus description file to obtain delay-related parameters, other methods can also be used to configure these parameters. For example, in some possible implementations, the delay stimulus generation device further includes a command-line parameter parser, used to listen for and parse command-line parameter commands, and send the parsed parameters to the generator corresponding to the application interface through the corresponding application interface. In this implementation, the user can input the required delay-related parameters via command-line parameters. Different application interfaces will call command-line parameters in different formats. It is understood that, compared with the aforementioned stimulus description file, the difference in this implementation lies in the method of inputting delay-related parameters.

[0080] In one possible implementation, the aforementioned delayed excitation generating device can cooperate with a test platform (also referred to as a test device) to complete flow control testing. In another possible implementation, the delayed excitation generating device can be part of the test platform.

[0081] This application also provides a test platform (also called a test device), which includes at least the aforementioned delay excitation generating device. The test platform is used to connect to the design under test (DUT) and perform flow control testing on the DUT based on the delay excitation generated by the delay excitation generating device. The test platform can be a related test platform in existing flow control testing, the difference being that the delay excitation generating device for generating the delay excitation adopts the aforementioned delay excitation generating device.

[0082] In some possible implementations, the test platform can be software-based, consisting of code written in a Hardware Description Language (HDL) or Hardware Verification Language (HVL). This code can run in a software simulator, and its operation can be as follows: the test platform code simulates a "virtual" external environment, generates stimuli—specific signal waveforms or data transmissions—and applies them to the device under test (DUT), monitors the DUT's output response, and automatically determines whether the test passes or fails based on the expected results. Alternatively, the test platform can run on hardware. To achieve faster verification speeds, it is often deployed on specialized hardware platforms, such as FPGA hardware.

[0083] This application also provides a delayed excitation generation method, which is described below in conjunction with... Figure 7 The principle behind it will be explained.

[0084] S1: Obtain the first stimulus description file configured by the user. The first stimulus description file includes: percentage delay parameters.

[0085] The percentage delay parameter includes a percentage variable, an observation window, and a maximum delay.

[0086] S2: Generate the corresponding delay excitation based on the percentage delay parameter.

[0087] In one possible implementation, the process of generating the corresponding delay stimulus based on the percentage delay parameter may include: i taking values ​​from 1 to n sequentially, obtaining the total delay for the i-th time, where n is an integer greater than 1, and the total delay for the (n+1)-th time is equal to the default value; the total delay for the first time is determined based on the percentage variable and the observation window in the percentage delay parameter; when i is greater than 1, the total delay for the i-th time is determined based on the total delay for the (i-1)-th time and the delay value of the delay stimulus generated for the (i-1)-th time; when the total delay for the i-th time is greater than the default value, a delay stimulus that satisfies the total delay and maximum delay constraints for the i-th time is randomly generated; when the number of delay stimuli in the temporary queue is less than the number of stimuli corresponding to the observation window, the delay stimulus generated for the i-th time is pushed into the temporary queue; when the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, the delay value of the delay stimulus in the temporary queue is changed according to the delay stimulus generated for the i-th time.

[0088] The above method also includes: generating a delay stimulus with a default delay value when i=1 and the total delay of the i-th iteration is equal to the default value; or, saving the delay stimulus in the temporary queue when i is greater than 1 and the total delay of the i-th iteration is equal to the default value.

[0089] In one possible implementation, the method further includes: obtaining a second stimulus description file configured by the user; the second stimulus description file includes: a maximum and minimum delay parameter, the maximum and minimum delay parameter including an observation window, a maximum delay, and a minimum delay; wherein, the minimum delay represents the minimum number of clock cycles for consecutive invalid handshakes; and generating a corresponding delay stimulus based on the maximum and minimum delay parameter.

[0090] In one possible implementation, the method further includes: obtaining a third stimulus description file configured by the user; the third stimulus description file includes: a target delay parameter directly specified by the user, the target delay parameter including at least one delay value; and generating a corresponding delay stimulus based on the target delay parameter.

[0091] The delayed excitation generation method provided in this application embodiment has the same implementation principle and technical effect as the aforementioned delayed excitation generation device embodiment. For the sake of brevity, any parts not mentioned in the method embodiment can be referred to the corresponding content in the aforementioned delayed excitation generation device embodiment.

[0092] like Figure 8 As shown, Figure 8 This diagram illustrates a structural block diagram of an electronic device 200 provided in an embodiment of this application. The electronic device 200 includes: a transceiver 210, a memory 220, a communication bus 230, and a processor 240. The transceiver 210, the memory 220, and the processor 240 are electrically connected directly or indirectly to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses 230 or signal lines. The transceiver 210 is used to send and receive data. The memory 220 is used to store computer programs, wherein the computer programs include at least one software functional module that can be stored in the memory 220 in the form of software or firmware or embedded in the operating system (OS) of the electronic device 200. The processor 240 is used to execute the executable modules stored in the memory 220, such as executing the software functional modules or computer programs included in the aforementioned delay excitation generation device. For example, the processor 240 is used to execute the aforementioned delay excitation generation method.

[0093] The memory 220 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0094] Processor 240 may be an integrated circuit chip with signal processing capabilities. The aforementioned processor can be a general-purpose processor, including a Central Processing Unit (CPU), Network Processor (NP), Graphics Processing Unit (GPU), Accelerated Processing Unit (ACCU), Multimedia Application Processor (MAP), microprocessor, etc.; it can also be a Digital Signal Processor (DSP), Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. Alternatively, processor 240 can also be any conventional processor.

[0095] The aforementioned electronic devices 200 include, but are not limited to, computers, servers, etc.

[0096] This application also provides a non-volatile computer-readable storage medium (hereinafter referred to as the storage medium) storing a computer program, which is executed by a computer such as the electronic device 200 described above to perform the delay excitation generation method described above.

[0097] This application also provides a computer program product, which includes a computer program. When the computer program is executed by a computer, it performs the delayed stimulus generation method described above.

[0098] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0099] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0100] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0101] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a computer-readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, laptop, server, or electronic device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned computer-readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0102] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A delay excitation generating device, characterized by comprising: The method comprises the following steps: a first application interface is configured to obtain a first incentive description file configured by a user, the first incentive description file comprising a percentage delay parameter, the percentage delay parameter comprising a percentage variable, an observation window, and a maximum delay; wherein the percentage variable represents a ratio of a number of valid handshakes to a total number of clocks; the observation window represents a number of delay incentives generated by a single call of the percentage delay parameter; and the maximum delay represents a maximum number of clocks of continuous invalid handshakes; a percentage delay generator is configured to call the percentage delay parameter through the first application interface and generate corresponding delay incentives according to the percentage delay parameter.

2. The delay excitement generation apparatus according to claim 1, wherein The percentage delay generator is specifically configured to: i. sequentially take 1 to n to obtain a total delay of the ith time, n being an integer greater than 1, and a total delay of the n+1th time being equal to a default value; when i = 1, the total delay of the ith time is determined according to the percentage variable and the observation window in the percentage delay parameter; when i is greater than 1, the total delay of the ith time is determined according to a total delay of the i-1th time and a delay value of a delay incentive generated in the i-1th time; when the total delay of the ith time is greater than the default value, a delay incentive satisfying the total delay of the ith time and the maximum delay constraint is randomly generated; when a number of delay incentives in a temporary queue is less than an incentive number corresponding to the observation window, the delay incentive generated in the ith time is pushed into the temporary queue; when the number of delay incentives in the temporary queue is not less than the incentive number corresponding to the observation window, a delay value of a delay incentive in the temporary queue is changed according to the delay incentive generated in the ith time.

3. The delay excitement generation apparatus according to claim 2, wherein When obtaining the total delay of the first time, the percentage delay generator is specifically configured to: obtain a difference between 100% and the percentage variable; obtain a product of the difference and a window width of the observation window; obtain a ratio of the product to the percentage variable to obtain the total delay of the first time.

4. The delay excitement generation apparatus according to claim 2, wherein The percentage delay generator is further configured to: when i = 1 and the total delay of the ith time is equal to the default value, generate a delay incentive with a delay value being the default value; or when i is greater than 1 and the total delay of the ith time is equal to the default value, save the delay incentive in the temporary queue.

5. The delay excitement generation apparatus according to claim 1, wherein The delay incentive generation device further comprises: a second application interface configured to obtain a second incentive description file configured by a user; the second incentive description file comprising a maximum minimum delay parameter, the maximum minimum delay parameter comprising the observation window, the maximum delay, and a minimum delay; wherein the minimum delay represents a minimum number of clocks of continuous invalid handshakes; a maximum minimum delay generator configured to call the maximum minimum delay parameter through the second application interface and generate corresponding delay incentives according to the maximum minimum delay parameter.

6. The delay excitement generation apparatus according to claim 1 or 5, wherein The delay incentive generation device further comprises: a third application interface configured to obtain a third incentive description file configured by a user; the third incentive description file comprising a target delay parameter directly specified by the user, the target delay parameter comprising at least one delay value; a user direct value generator configured to call the target delay parameter through the third application interface and generate corresponding delay incentives according to the target delay parameter.

7. The delay excitement generation apparatus according to claim 1 or 5, wherein The delay stimulus generation device further comprises: The command line parameter parser is configured to monitor the command line parameter instruction, and parse the monitored command line parameter instruction, and send the parsed parameters to the generator corresponding to the application interface through the corresponding application interface.

8. A test platform characterized by, The method comprises: The delay stimulus generation device of any one of claims 1-7, wherein the test platform is configured to be connected to a design under test, and perform flow control testing on the design under test based on the delay stimulus generated by the delay stimulus generation device.

9. A delay excitation generation method characterized by, The method comprises: Obtain a first stimulus description file configured by a user, wherein the first stimulus description file comprises a percentage delay parameter, and the percentage delay parameter comprises a percentage variable, an observation window, and a maximum delay; the percentage variable represents a ratio of a number of valid handshakes to a total number of clocks; the observation window represents a number of delay stimuli generated by a single call of the percentage delay parameter; and the maximum delay represents a maximum number of consecutive invalid handshakes. Generate corresponding delay stimuli according to the percentage delay parameter.

10. The delay excitation generation method according to claim 9, wherein The method of generating corresponding delay stimuli according to the percentage delay parameter comprises: i is sequentially taken as 1 to n, a total delay of the ith time is obtained, n is an integer greater than 1, a total delay of the (n+1)th time is equal to a default value; a total delay of the first time is determined according to the percentage variable and the observation window in the percentage delay parameter; when i is greater than 1, a total delay of the ith time is determined according to a total delay of the (i-1)th time and a delay value of a delay stimulus generated in the (i-1)th time; When the total delay of the ith time is greater than the default value, a delay stimulus satisfying the total delay of the ith time and the maximum delay constraint is randomly generated; When a number of delay stimuli in the temporary queue is less than a number of stimuli corresponding to the observation window, the delay stimulus generated in the ith time is pushed into the temporary queue; When the number of delay stimuli in the temporary queue is not less than the number of stimuli corresponding to the observation window, a delay value of a delay stimulus in the temporary queue is changed according to the delay stimulus generated in the ith time.

11. The delay excitation generation method according to claim 10, wherein The method further comprises: When i is 1 and the total delay of the ith time is equal to the default value, a delay stimulus with a delay value equal to the default value is generated; or When i is greater than 1 and the total delay of the ith time is equal to the default value, the delay stimuli in the temporary queue are saved.

12. The delay excitation generation method of claim 10, wherein, The method further comprises: Obtain a second stimulus description file configured by a user; the second stimulus description file comprises a maximum-minimum delay parameter, and the maximum-minimum delay parameter comprises the observation window, the maximum delay, and a minimum delay; the minimum delay represents a minimum number of consecutive invalid handshakes. Generate corresponding delay stimuli according to the maximum-minimum delay parameter.

13. The delay excitation generation method of claim 10, wherein, The method further comprises: Obtain a third stimulus description file configured by a user; the third stimulus description file comprises a target delay parameter directly specified by the user, and the target delay parameter comprises at least one delay value; Generate corresponding delay stimuli according to the target delay parameter.

14. An electronic device, comprising: The method comprises: A memory and a processor, wherein the processor is connected to the memory; The memory is configured to store a program. The processor is configured to invoke a program stored in the memory to execute the method of any one of claims 9-13.

15. A computer-readable storage medium, characterized in that, A computer program product, comprising a computer readable medium having stored thereon the computer program, the computer program, when run by a processor, performing the method of any one of claims 9-13.

Images