Multi-core PLC redundant data synchronization method based on soft interrupt

Abstract

The invention discloses a multi-core PLC redundant data synchronization method based on soft interrupt, which relates to the field of data synchronization, and comprises the following steps: grading redundant data needing to be synchronized by a control task, outputting a data priority result, and obtaining a new variable value of a programmable logic controller needing to be copied based on the data priority result to generate a buffer area; sending the new variable value of the programmable logic controller in the buffer area to a slave central processing unit, and copying the new variable value of the programmable logic controller to a historical variable value of the programmable logic controller by using the slave central processing unit to complete data synchronization processing; and obtaining a verification process of the slave central processing unit and the master central processing unit, evaluating a synchronization achievement degree of the data synchronization processing process based on the verification process, and adjusting the data synchronization processing process according to the synchronization achievement degree. According to the method, data synchronization is carried out based on an interruption mode, waiting is not needed, no synchronization event is generated when the iec task is not executed for one cycle, and invalid synchronization is avoided.

Description

Technical Field

[0001] This invention relates to the field of data synchronization, and more specifically, to a method for synchronizing redundant data in a multi-core PLC based on soft interrupts. Background Technology

[0002] A programmable logic controller (PLC) is a digital electronic system designed specifically for industrial applications. It uses a programmable memory to store instructions for performing logical operations, sequential control, timing, counting, and arithmetic operations. It controls various types of mechanical equipment or production processes through digital or analog inputs and outputs.

[0003] Redundant data synchronization is a crucial aspect of PLC reliability. PLCs are complex embedded systems operating in multi-tasking environments. When multiple tasks run concurrently on a multi-core CPU, each task has its own execution cycle. PLC redundancy is designed to prevent single points of failure. Typically, two CPUs are used, one master and one slave, connected by a dedicated redundant network. The CPUs utilize this network to synchronize data from their operations to the slave CPU in real time. Figure 4 As shown.

[0004] Existing data synchronization technologies often employ a polling approach, where a periodic task is set up in the main CPU to send data to the slave CPU at set intervals. Upon receiving the data, the slave CPU overwrites its local data. This polling approach, which periodically synchronizes all data, has three main drawbacks:

[0005] (1) Inaccurate timing: When the data of the main CPU changes, it is not immediately synchronized to the slave CPU, but waits for a round of synchronization by the redundant task. In this way, it takes up to one redundant task cycle for the data to be synchronized to the slave CPU. If the main CPU fails during this period, the data will fail to synchronize. The data lags by an average of half a redundant cycle. In addition, multiple tasks run in the PLC, and the cycles of these tasks are different, so the frequency requirements for data synchronization are also different. A uniform synchronization frequency cannot meet the needs of each task: if the synchronization frequency is too high, it will increase the burden on the CPU and network; if the synchronization frequency is too low, it will cause tasks with high real-time requirements to not receive timely data synchronization. In the polling method, the IEC task does not have the initiative for synchronization, but it is controlled by the redundant task, such as Figure 5 As shown.

[0006] (2) Inaccurate data: Each synchronization pushes out global variables and all PROGRAM variables without distinction, regardless of whether the data to be synchronized may change. This method leads to ineffective synchronization and wastes CPU performance, such as... Figure 6 As shown.

[0007] (3) Programmers cannot independently synchronize data on demand in the code: data can only be passively pushed by the runtime at fixed times, and users cannot independently control it when programming.

[0008] No effective solutions have yet been proposed to address the problems in the relevant technologies. Summary of the Invention

[0009] To address the problems in related technologies, this invention proposes a multi-core PLC redundant data synchronization method based on soft interrupts, in order to overcome the aforementioned technical problems existing in the existing related technologies.

[0010] Therefore, the specific technical solution adopted by the present invention is as follows:

[0011] In a first aspect, the present invention provides a method for synchronizing redundant data in a multi-core PLC based on soft interrupts, the method comprising:

[0012] Redundant data that needs to be synchronized for control tasks is classified, data priority results are output, and a buffer is generated based on the data priority results to obtain the new values ​​of the programmable logic controller variables that need to be copied.

[0013] The new values ​​of the programmable logic controller (PLC) variables in the buffer are sent to the slave central processing unit (CPU), and the slave CPU copies the new values ​​of the PLC variables to the historical PLC variable values ​​to complete the data synchronization process.

[0014] The system acquires the verification process between the central processing unit (CPU) and the main CPU, evaluates the synchronization achievement of the data synchronization process based on the verification process, and adjusts the data synchronization process according to the synchronization achievement.

[0015] Preferably, the process of classifying redundant data that needs to be synchronized for control tasks, outputting data priority results, and obtaining a buffer for generating new values ​​of programmable logic controller variables to be copied based on the data priority results includes:

[0016] The main central processing unit runs the control task, and after the control task completes any cycle, a data synchronization interrupt is generated. Based on the control logic program, an interface is provided to the programming user to determine whether the control task needs to perform redundant data synchronization processing.

[0017] If the control task does not require redundant data synchronization, there is no need to interrupt the interface provided by the control logic program to the programming user. If the control task requires redundant data synchronization, the interface provided by the control logic program to the programming user is interrupted, and the redundant task is invoked.

[0018] When the control task requires redundant data synchronization, the redundant task determines the data domain packets to be synchronized based on the task type of the control task, and judges the priority status of the data domain packets based on the variable priority.

[0019] New values ​​for programmable logic controller (PLC) variables are generated based on the priority status of the data domain packet, and these new values ​​are copied to a temporary space to create a dynamic buffer.

[0020] Preferably, generating new values ​​for programmable logic controller (PLC) variables based on the priority status of the data domain packet, and copying these new values ​​to a temporary space to generate a dynamic buffer, includes:

[0021] Based on the data field packets to be synchronized and their corresponding priority states as the new values ​​of the programmable logic controller (PLC) variables, a temporary space is allocated in the main CPU memory using redundant tasks, and the hash value of the new PLC variable value is calculated.

[0022] The new values ​​of the programmable logic controller variables and their corresponding hash values ​​are copied from the variable storage area to the temporary space, and a new node is inserted into the corresponding priority state queue, where the new node points to the temporary space, thus generating a dynamic buffer.

[0023] Preferably, when using redundant tasks to determine the data domain packets to be synchronized based on the task type of the control task, a comparison of old and new values ​​is adopted. The changes in values ​​before and after the execution cycle of the control task are compared, and the variables to be synchronized are grouped into a list based on the changes in values, which serve as the data domain packets to be synchronized.

[0024] Preferably, determining the priority status of a data domain packet based on variable priority involves using a programmable logic controller to classify the data domain packets and generating different dynamic buffers according to the data classification results.

[0025] Preferably, the process of sending the new values ​​of the programmable logic controller (PLC) variables in the buffer to the slave central processing unit (CPU) and using the slave CPU to copy the new values ​​of the PLC variables to the historical PLC variable values, thereby completing the data synchronization process, includes:

[0026] The main central processing unit sends the new values ​​of the programmable logic controller variables in the dynamic buffer and their corresponding hash values ​​to the slave central processing unit via the network according to the data priority result.

[0027] After receiving the hash value of the new value of the programmable logic controller variable from the central processing unit, verify whether it is consistent with the new value of the programmable logic controller variable;

[0028] If there is a discrepancy, it indicates that there was a loss or an abnormality during the transmission process, and the new value transmission process of the programmable logic controller variable needs to be re-executed.

[0029] If they match, it means that there was no loss or abnormality during the transmission process. In this case, the new value of the programmable logic controller (PLC) variable is directly copied from the central processing unit to the historical PLC variable value, overwriting the historical PLC variable value, thus completing the data synchronization process.

[0030] Preferably, the process of obtaining the verification process between the central processing unit and the main central processing unit, evaluating the synchronization achievement of the data synchronization processing process based on the verification process, and adjusting the data synchronization processing process according to the synchronization achievement includes:

[0031] Utilizes sending confirmation information from the central processing unit to the main central processing unit;

[0032] If the main central processing unit receives an acknowledgment message, indicating that the data synchronization process has met the requirements, it will release the temporary space and delete the new node from the corresponding priority status queue to destroy the dynamic buffer.

[0033] If the main CPU does not receive an acknowledgment message within a timeout period, it indicates that the data synchronization process has not met the requirements. The data will then be resynchronized until the main CPU receives an acknowledgment message. If the main CPU fails to receive an acknowledgment message more than twice, the data synchronization process will be stopped, and the number of times the acknowledgment message was not received will be recorded in memory.

[0034] Secondly, the present invention also provides a multi-core PLC redundant data synchronization system based on soft interrupts, the system comprising:

[0035] The buffer generation module is used to classify redundant data that need to be synchronized for control tasks, output data priority results, and generate a buffer by obtaining the new values ​​of programmable logic controller variables that need to be copied based on the data priority results.

[0036] The data synchronization processing module is used to send the new values ​​of the programmable logic controller (PLC) variables in the buffer to the slave central processing unit (CPU), and use the slave CPU to copy the new values ​​of the PLC variables to the historical PLC variable values, thus completing the data synchronization processing.

[0037] The data synchronization adjustment module is used to acquire the verification process between the central processing unit and the main central processing unit, evaluate the synchronization achievement of the data synchronization process based on the verification process, and adjust the data synchronization process according to the synchronization achievement.

[0038] Thirdly, the present invention also proposes an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the above-described method.

[0039] Fourthly, the present invention also provides a computer-readable storage medium on which a computer program is stored, the computer program implementing the above-described method when executed by a processor.

[0040] The beneficial effects of this invention are as follows:

[0041] 1. This invention does not use polling (setting a fixed time interval, and then performing synchronization) to trigger the process. Instead, it is event-driven, subdivided into tasks, and generates an interrupt when the IEC program of each task finishes execution, based on the periodic granularity of each task. For data with different priorities, preemptive synchronization is performed. During synchronization, the priority of data is distinguished, and data with higher priority is synchronized first. At the same time, the API provided by the IDE allows programmers to actively perform data synchronization. When each task performs data synchronization, only the data within the data field of that task is synchronized. This precise push method avoids the performance loss caused by full synchronization.

[0042] 2. This invention uses an interrupt-based method for data synchronization. After the IEC task completes one cycle, a synchronization event is generated, and data synchronization is performed immediately without waiting. No synchronization event is generated if the IEC task has not completed one cycle, thus avoiding invalid synchronization. At the same time, the synchronization event is accompanied by data field parameters. Data outside the data field is not synchronized, thus avoiding excessive CPU performance loss. Furthermore, the IDE provides an interface, allowing programmers to synchronize data as needed in their code.

[0043] 3. This invention overcomes the drawbacks of fixed-period synchronization in polling mode by using an interrupt method to achieve precise synchronization, making all types of data equal. When the data volume is large and CPU resources are scarce, it achieves the goal of limited synchronization of important data. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a flowchart of a multi-core PLC redundant data synchronization method based on soft interrupt according to an embodiment of the present invention;

[0046] Figure 2 This is a schematic diagram of a multi-core PLC redundant data synchronization system based on soft interrupt according to an embodiment of the present invention;

[0047] Figure 3 This is a schematic diagram of the hardware operating environment involved in the embodiments of the present invention;

[0048] Figure 4 This is a schematic diagram of a master-slave CPU redundancy network in the existing technology;

[0049] Figure 5 This is a schematic diagram illustrating the synchronization timing of polling in existing technologies;

[0050] Figure 6 This is a schematic diagram of the data field in the polling method of existing technology;

[0051] Figure 7 This is a data flow diagram of a multi-core PLC redundant data synchronization method based on soft interrupt according to an embodiment of the present invention;

[0052] Figure 8 This is a schematic diagram illustrating the synchronization timing of tasks under interrupt mode in a multi-core PLC redundant data synchronization method based on soft interrupt according to an embodiment of the present invention.

[0053] Figure 9 This is a schematic diagram illustrating the synchronization timing of the data domain under interrupt mode in a multi-core PLC redundant data synchronization method based on soft interrupt according to an embodiment of the present invention.

[0054] Figure 10 This is a schematic diagram of the operation flow of the IEC task in the interrupt mode in a multi-core PLC redundant data synchronization method based on soft interrupt according to an embodiment of the present invention.

[0055] Figure 11 This is a schematic diagram of the preemptive data synchronization process in a multi-core PLC redundant data synchronization method based on soft interrupts according to an embodiment of the present invention. Detailed Implementation

[0056] To further illustrate the various embodiments, the present invention provides accompanying drawings, which are part of the disclosure of the present invention. These drawings are mainly used to illustrate the embodiments and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. With reference to these drawings, those skilled in the art should be able to understand other possible implementation methods and the advantages of the present invention.

[0057] According to an embodiment of the present invention, a method for synchronizing redundant data in a multi-core PLC based on soft interrupts is provided.

[0058] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments, such as... Figure 1 As shown, according to an embodiment of the present invention, a multi-core PLC redundant data synchronization method based on soft interrupts includes:

[0059] Step S1: Classify the redundant data that the control task needs to synchronize, output the data priority result, and obtain the new value generation buffer of the programmable logic controller variable that needs to be copied based on the data priority result.

[0060] In one embodiment, classifying redundant data that needs to be synchronized by the control task, outputting data priority results, and obtaining new values ​​of programmable logic controller (PLC) variables to be copied based on the data priority results to generate a buffer includes: running the control task using the main central processing unit (CPU), and generating a data synchronization interrupt after any cycle of the control task execution; providing an interface to the programming user based on the control logic program to determine whether the control task needs to perform redundant data synchronization processing; if the control task does not need to perform redundant data synchronization processing, there is no need to interrupt the interface provided by the control logic program to the programming user; if the control task needs to perform redundant data synchronization processing, the interface provided by the control logic program to the programming user is interrupted, and a redundant task is invoked; when the control task needs to perform redundant data synchronization processing, the redundant task determines the data domain packets to be synchronized according to the task type of the control task, and determines the priority status of the data domain packets based on variable priorities; generating new values ​​of PLC variables based on the priority status of the data domain packets, and copying the new values ​​of PLC variables to a temporary space to generate a dynamic buffer.

[0061] The process of generating new values ​​for programmable logic controller (PLC) variables based on the priority status of data domain packets and copying these new values ​​to a temporary space to create a dynamic buffer includes: using the data domain packets to be synchronized and their corresponding priority status as the new values ​​for PLC variables; allocating temporary space in the main CPU memory using redundant tasks and calculating the hash value of the new PLC variable values; copying the new PLC variable values ​​and their corresponding hash values ​​from the variable storage area to the temporary space; and inserting a new node into the corresponding priority status queue, where the new node points to the temporary space, thus creating a dynamic buffer.

[0062] Specifically, when using redundant tasks to determine the data domain packets that need to be synchronized based on the task type of the control task, a comparison of old and new values ​​is used. The changes in values ​​before and after the execution cycle of the control task are compared, and the variables that need to be synchronized are grouped into a list based on the changes in values, which serves as the data domain packets that need to be synchronized.

[0063] Specifically, determining the priority status of a data domain packet based on variable priority involves using a programmable logic controller to classify the data domain packets and generating different dynamic buffers according to the data classification results.

[0064] Step S2: Send the new values ​​of the programmable logic controller (PLC) variables in the buffer to the slave central processing unit (CPU), and use the slave CPU to copy the new values ​​of the PLC variables to the historical PLC variable values ​​to complete the data synchronization process.

[0065] In one embodiment, sending the new value of the programmable logic controller (PLC) variable in the buffer to the slave central processing unit (CPU) and using the slave CPU to copy the new value of the PLC variable to the historical PLC variable value to complete the data synchronization process includes: the master CPU sending the new value of the PLC variable in the dynamic buffer and its corresponding hash value to the slave CPU via the network according to the data priority result; after receiving the hash value of the new PLC variable, the slave CPU checks whether it is consistent with the new value of the PLC variable; if they are inconsistent, it indicates that there was a loss or anomaly during the transmission process, and the PLC variable new value transmission process needs to be re-executed; if they are consistent, it indicates that there was no loss or anomaly during the transmission process, and the slave CPU directly copies the new value of the PLC variable to the historical PLC variable value, overwriting the historical PLC variable value, thus completing the data synchronization process.

[0066] Step S3: Obtain the verification process between the central processing unit and the main central processing unit, evaluate the synchronization achievement of the data synchronization process based on the verification process, and adjust the data synchronization process according to the synchronization achievement.

[0067] In one embodiment, obtaining the verification process between the slave central processing unit (CPU) and the master CPU, evaluating the synchronization achievement of the data synchronization process based on the verification process, and adjusting the data synchronization process according to the synchronization achievement includes: sending an acknowledgment message from the slave CPU to the master CPU; if the master CPU receives the acknowledgment message, indicating that the data synchronization process has met the requirements, then releasing the temporary space and deleting the new node from the corresponding priority status queue to destroy the dynamic buffer; if the master CPU does not receive the acknowledgment message within a timeout period, indicating that the data synchronization process has not met the requirements, then resynchronizing the data until the master CPU receives the acknowledgment message; if the master CPU fails to receive the acknowledgment message more than twice, then stopping the data synchronization process and recording the number of times it has not received the acknowledgment message in memory.

[0068] It needs to be explained that the traditional synchronization method involves setting up a redundant task where the main CPU pushes all data to the slave CPUs at fixed intervals. This method is a typical polling approach. Since different tasks have different requirements for data synchronization timing, synchronization occurs intermittently, sometimes when necessary and sometimes not. Furthermore, pushing all data out with each synchronization consumes CPU performance. Programmers cannot manually synchronize data on demand within their code. Additionally, data priorities dictate synchronization, requiring round-by-round synchronization. Urgent and important data cannot interrupt the synchronization of lower-priority data. Based on these shortcomings, this embodiment proposes an interrupt-based data synchronization process, as detailed below:

[0069] like Figure 7 The data flow diagram shown requires explanation. Data synchronization refers to copying the PLC's variable values ​​from the main CPU to the slave CPU. The process is as follows:

[0070] Step 1: Utilize the main CPU to run the IEC task (control task);

[0071] Step 2: The IEC task generates an interrupt;

[0072] Step 3: The main CPU classifies the data (i.e., data field packets) of the IEC task and copies the new values ​​of the variables (i.e., the new values ​​of the programmable logic controller variables) that need to be copied to the slave CPU after the IEC task runs to the buffer.

[0073] Step 4: The main CPU sends the contents of the buffer to the slave CPU via the network according to the data priority, prioritizing the data with higher priority (i.e., the new values ​​of the programmable logic controller variables).

[0074] Step 5: Copy the contents of the buffer from the CPU to the variable (i.e., the historical programmable logic controller variable value).

[0075] Step 6: The CPU returns confirmation information to the main CPU;

[0076] Step 7: If the main CPU receives confirmation, it clears the buffer and synchronization is successful; otherwise, proceed to step 8.

[0077] Step 8: If the main CPU does not receive confirmation information within the timeout period, return to step 4 to resynchronize the data. If the process fails after two repetitions, stop the current synchronization and record the number of failures in memory for further statistical monitoring and troubleshooting.

[0078] like Figures 8 to 10 As shown, step two, during the IEC task interrupt generation process, introduces an interrupt to achieve precise synchronization of redundant data, and performs preemptive data synchronization according to data priority. Precision has three aspects:

[0079] (1) Precise timing: Realizes IEC task periodic data synchronization. After the IEC task completes one cycle, a data synchronization interrupt is generated immediately. The redundant task senses the interrupt and performs data synchronization. At the same time, the IDE (control logic program) provides an interface to the programming user to generate redundant data synchronization interrupts anytime and anywhere. When the IEC program statement thinks that data needs to be synchronized, it calls the interface to generate an interrupt. After the redundant task senses the interrupt, it immediately performs data synchronization.

[0080] (2) Precise content: The redundant task does not synchronize all data each time. Instead, it determines which data fields to synchronize based on the different IEC tasks. For a task T, if it calls the three PROGRAMs PRG1, PRGm, and PRGn in a complete cycle, its data fields include: {global variables, PRG1 variables, PRGm variables, and PRGn variables}. When task T initiates a data synchronization interruption, the redundant task only needs to synchronize the data in that data field, while other data does not need to be synchronized.

[0081] (3) Provide interface: In addition to providing data synchronization for each cycle in the traditional way, the redundant module also provides an interrupt interface for real-time data synchronization of IEC tasks. The interface is provided in the form of a function library in accordance with the IEC61131-3 standard. The function descriptions are as follows:

[0082] Function input parameter: program or global variable group name, the input parameter type is string; function output parameter: synchronization result, the output parameter type is integer, 0 indicates success, other values ​​indicate failure.

[0083] If a task needs to synchronize multiple program or global variable groups, it can be called multiple times. After the IEC task completes one cycle of computation, the runtime scheduler invokes the redundant data synchronization interface to generate an interrupt, and the interrupt response program immediately performs data synchronization.

[0084] In step three, the main CPU classifies the data of the IEC task by setting the data domain parameters for synchronization. This parameter is a list that lists the variable paths to be updated. The IEC task only needs to synchronize the data domains that need to be updated. The method of comparing the old and new values ​​is used to compare the changes in values ​​before and after the periodic operation, and the variables that need to be updated are concentrated on the list. The data domains are divided at the granularity of global variable groups and PROGRAM, which can avoid a large number of invalid synchronizations during full synchronization.

[0085] like Figure 11 As shown, redundant tasks simultaneously perform preemptive data synchronization according to data priority. Preemptive data synchronization means that the PLC classifies data into levels and sets up different data buffers according to each level. Priority ranges from 0 to 31, with 31 being the highest priority and 0 being the lowest. The process for preemptive data synchronization of redundant tasks is as follows:

[0086] The process involves hibernation, sensing a data synchronization interruption, synchronizing data starting from the highest priority buffer (buffer 31) in descending order of priority, sensing another data synchronization interruption, and, to ensure atomicity (data submitted during the same interruption must be synchronized all at once without interruption), synchronizing the currently synchronizing data, ending the current synchronization round, ceasing to synchronize lower priority data, and starting the next synchronization round again from the highest priority buffer (buffer 31) in descending order of priority.

[0087] The specific data classification method is as follows:

[0088] (1) The priority of global variables is 31;

[0089] (2) When a PRG (Programmable Logic Group) variable is submitted together with a global variable, the priority of the PRG variable is upgraded to 31; otherwise, it is the priority of the task to which it is attached.

[0090] (3) Data synchronized through the user API has the priority of the task it belongs to.

[0091] The steps for dynamically generating a data buffer are as follows:

[0092] (1) The interrupted data fields to be synchronized and their corresponding priorities are submitted;

[0093] (2) Redundant tasks allocate temporary space in memory and copy data from variable storage area to temporary space. Before copying, the MD5 value (hash value) of the data needs to be calculated and stored in the temporary space. After receiving the data from the CPU, the MD5 value is checked to see if it matches the data, in order to prevent data loss or abnormal situations during copying and transmission.

[0094] (3) Insert a new node into the corresponding priority data queue, and the node points to the temporary space.

[0095] After data synchronization is complete, temporary space needs to be released, nodes removed from the corresponding priority queue, and buffers destroyed.

[0096] It needs to be explained that in the process of verifying whether the MD5 hash is consistent with the data, the data field to be synchronized is secretly shared using the encoding matrix of the RDIC to obtain a secret share. The hash value of the data field to be synchronized is used as a stub to prevent repudiation. At the same time, the secret share is collaboratively calculated using the monotonically expanding matrix of the encoding matrix to obtain the vote count. The vote count is combined with the hash value to determine whether there are any copying errors or tampering of the secret share during the copying process.

[0097] Specifically, based on the data domain to be synchronized, the total number of participants and threshold parameters are determined according to the number of participants in the synchronization process. Then, a Vandermonde generator matrix is ​​constructed by randomly selecting several random numbers from the data domain to be synchronized based on the total number of participants and the threshold parameters. Using the Vandermonde generator matrix as a basis, several secret shares γ involved in the data domain to be synchronized are calculated through matrix multiplication. A verification matrix H is then constructed using the Vandermonde generator matrix. Simultaneously, the Vandermonde generator matrix is ​​extended using a monotonically expanding method to obtain an extended matrix M, and the inverse matrix M of the extended matrix is ​​then solved. -1 Each participating party will collaboratively aggregate their respective secret shares, construct a comparison vector η based on the aggregated results, and calculate V=γ·M using the formula. -1 The vote count result V is calculated from η.

[0098] The vote counting results are combined with the hash value to determine whether there were any errors or tampering in the copying of secret shares during the copying process. If secret shares were tampered with or copied incorrectly during the copying process, a preliminary judgment is made by calculating whether H·η is equal to the zero vector: if H·η≠0, it indicates that there was an error or tampering in the copying of shares. Selecting some columns of H to form matrices R and E, and solving X=R -1 ·(-(E·ξ)), where ξ represents the vector of unchallenged shares. By comparing whether the sum of X and the challenged shares is consistent, errors can be further located. At the same time, the hash value h(V) of the vote counting result V is calculated and compared with the original hash stub h(S) of the data field to be synchronized: if the copying process is error-free and untampered, V should be consistent with the true aggregation result of S, and h(V) should also match h(S). If the two do not match, it indicates that there is an error or tampering in the copying process of the secret shares. The dual judgment mechanism not only reuses the error detection capability of RS code and the collaborative calculation capability of monotonically expanding matrix, but also ensures the accurate identification of problems in the copying process by combining hash stub and vote counting result hash.

[0099] like Figure 2 As shown, according to another embodiment of the present invention, a multi-core PLC redundant data synchronization system based on soft interrupts is also provided, the system comprising:

[0100] The buffer generation module 1 is used to classify the redundant data that the control task needs to synchronize, output the data priority result, and obtain the new values ​​of the programmable logic controller variables to be copied based on the data priority result to generate a buffer.

[0101] The data synchronization processing module 2 is used to send the new values ​​of the programmable logic controller variables in the buffer to the slave central processing unit, and use the slave central processing unit to copy the new values ​​of the programmable logic controller variables to the historical values ​​of the programmable logic controller variables, thereby completing the data synchronization processing.

[0102] The data synchronization adjustment module 3 is used to acquire the verification process between the central processing unit and the main central processing unit, evaluate the synchronization achievement of the data synchronization process based on the verification process, and adjust the data synchronization process according to the synchronization achievement.

[0103] In addition, this application also provides an electronic device. For example... Figure 3 The diagram illustrates the hardware operating environment of an electronic device, which may include: a processor (e.g., CPU), memory, a user interface, a network interface, and a communication bus. The communication bus is used to enable communication between components. The user interface may include a display screen and an input unit such as a keyboard; optionally, the user interface may also include a standard wired interface or a wireless interface. The network interface may optionally include a standard wired interface or a wireless interface. The memory may be high-speed RAM or stable non-volatile memory, such as disk storage. Alternatively, the memory may be a storage device independent of the aforementioned processor.

[0104] Those skilled in the art will understand that Figure 3 The electronic devices shown do not constitute a limitation on electronic devices and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0105] like Figure 3 As shown, a memory, as a type of computer storage medium, may include an operating system, a network communication module, a user interface module, and device management programs. The operating system is a program that manages and controls the hardware and software resources of electronic devices, supporting the operation of electronic devices and other software or programs. Figure 3 In the electronic device shown, the user interface is mainly used to connect to the terminal and communicate with the terminal, such as receiving user signaling data sent by the terminal; the network interface is mainly used to communicate with the backend server; the processor can be used to call the program stored in the memory and execute the steps of the method or system described above.

[0106] Furthermore, embodiments of this application also propose a computer-readable storage medium storing a device management program, which, when executed by a processor, implements the steps of the method or system described above.

[0107] The specific implementation of the computer-readable storage medium in this application is basically the same as the embodiments of the methods or systems described above, and will not be repeated here. Furthermore, to achieve the above objectives, this application also provides a computer program product, comprising: a computer program, which, when executed by a processor, implements the steps of the methods or systems described above.

[0108] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for synchronizing redundant data in a multi-core PLC based on soft interrupts, characterized in that, The method includes: Redundant data that needs to be synchronized for control tasks is classified, data priority results are output, and a buffer is generated based on the data priority results to obtain the new values ​​of the programmable logic controller variables that need to be copied. The new values ​​of the programmable logic controller (PLC) variables in the buffer are sent to the slave central processing unit (CPU), and the slave CPU copies the new values ​​of the PLC variables to the historical PLC variable values ​​to complete the data synchronization process. The system acquires the verification process between the central processing unit (CPU) and the main CPU, evaluates the synchronization achievement of the data synchronization process based on the verification process, and adjusts the data synchronization process according to the synchronization achievement.

2. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 1, characterized in that, The process of classifying redundant data that needs to be synchronized for control tasks, outputting data priority results, and obtaining a buffer for generating new values ​​of programmable logic controller variables to be copied based on the data priority results includes: The main central processing unit runs the control task, and after the control task completes any cycle, a data synchronization interrupt is generated. Based on the control logic program, an interface is provided to the programming user to determine whether the control task needs to perform redundant data synchronization processing. If the control task does not require redundant data synchronization, there is no need to interrupt the interface provided by the control logic program to the programming user. If the control task requires redundant data synchronization, the interface provided by the control logic program to the programming user is interrupted, and the redundant task is invoked. When the control task requires redundant data synchronization, the redundant task determines the data domain packets to be synchronized based on the task type of the control task, and judges the priority status of the data domain packets based on the variable priority. New values ​​for programmable logic controller (PLC) variables are generated based on the priority status of the data domain packet, and these new values ​​are copied to a temporary space to create a dynamic buffer.

3. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 2, characterized in that, The step of generating new values ​​for programmable logic controller (PLC) variables based on the priority status of data domain packets and copying these new values ​​to a temporary space to generate a dynamic buffer includes: Based on the data field packets to be synchronized and their corresponding priority states as the new values ​​of the programmable logic controller (PLC) variables, a temporary space is allocated in the main CPU memory using redundant tasks, and the hash value of the new PLC variable value is calculated. The new values ​​of the programmable logic controller variables and their corresponding hash values ​​are copied from the variable storage area to the temporary space, and a new node is inserted into the corresponding priority state queue, where the new node points to the temporary space, thus generating a dynamic buffer.

4. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 3, characterized in that, When using redundant tasks to determine the data domain packets to be synchronized based on the task type of the control task, a comparison of old and new values ​​is used. The changes in values ​​before and after the execution cycle of the control task are compared, and the variables that need to be synchronized are grouped into a list based on the changes in values, which serve as the data domain packets to be synchronized.

5. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 3, characterized in that, The method of determining the priority status of data domain packets based on variable priority is to use a programmable logic controller to classify the data domain packets and generate different dynamic buffers according to the data classification results.

6. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 1, characterized in that, The step of sending the new values ​​of the programmable logic controller (PLC) variables in the buffer to the slave central processing unit (CPU) and then using the CPU to copy the new values ​​of the PLC variables to the historical PLC variable values ​​to complete the data synchronization process includes: The main central processing unit sends the new values ​​of the programmable logic controller variables in the dynamic buffer and their corresponding hash values ​​to the slave central processing unit via the network according to the data priority result. After receiving the hash value of the new value of the programmable logic controller variable from the central processing unit, verify whether it is consistent with the new value of the programmable logic controller variable; If there is a discrepancy, it indicates that there was a loss or an abnormality during the transmission process, and the new value transmission process of the programmable logic controller variable needs to be re-executed. If they match, it means that there was no loss or abnormality during the transmission process. In this case, the new value of the programmable logic controller (PLC) variable is directly copied from the central processing unit to the historical PLC variable value, overwriting the historical PLC variable value, thus completing the data synchronization process.

7. The method for synchronizing redundant data in a multi-core PLC based on soft interrupts according to claim 1, characterized in that, The process of obtaining the verification process between the central processing unit and the main central processing unit, evaluating the synchronization achievement of the data synchronization processing process based on the verification process, and adjusting the data synchronization processing process according to the synchronization achievement includes: Utilizes sending confirmation information from the central processing unit to the main central processing unit; If the main central processing unit receives an acknowledgment message, indicating that the data synchronization process has met the requirements, it will release the temporary space and delete the new node from the corresponding priority status queue to destroy the dynamic buffer. If the main CPU does not receive an acknowledgment message within a timeout period, it indicates that the data synchronization process has not met the requirements. The data will then be resynchronized until the main CPU receives an acknowledgment message. If the main CPU fails to receive an acknowledgment message more than twice, the data synchronization process will be stopped, and the number of times the acknowledgment message was not received will be recorded in memory.

8. A multi-core PLC redundant data synchronization system based on soft interrupts, used to implement the multi-core PLC redundant data synchronization method based on soft interrupts as described in any one of claims 1-7, characterized in that, The system includes: The buffer generation module is used to classify redundant data that need to be synchronized for control tasks, output data priority results, and generate a buffer by obtaining the new values ​​of programmable logic controller variables that need to be copied based on the data priority results. The data synchronization processing module is used to send the new values ​​of the programmable logic controller (PLC) variables in the buffer to the slave central processing unit (CPU), and use the slave CPU to copy the new values ​​of the PLC variables to the historical PLC variable values, thus completing the data synchronization processing. The data synchronization adjustment module is used to acquire the verification process between the central processing unit and the main central processing unit, evaluate the synchronization achievement of the data synchronization process based on the verification process, and adjust the data synchronization process according to the synchronization achievement.

9. An electronic device, characterized in that, The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When executed by the processor, the computer program implements the steps of the multi-core PLC redundant data synchronization method based on soft interrupts as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the multi-core PLC redundant data synchronization method based on soft interrupts as described in any one of claims 1 to 7.

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