Method and apparatus for defect detection of wafers

Abstract

This disclosure discloses a method and apparatus for defect detection in wafers. The method includes: identifying a plurality of first dies conforming to design rules in the wafer to be inspected; selecting a plurality of defect-free second dies from the plurality of first dies; determining a standard gray value for each standard cell in a standard die based on the gray value of each cell in the plurality of second dies; and comparing each die in the wafer to be inspected with the standard die one by one based on the standard gray value of each standard cell in the standard die to determine whether the wafer to be inspected has gradient defects, and, if gradient defects are present, determining the gradient direction and gradient trend of the gradient defects, thereby achieving defect detection of the wafer to be inspected. Using the scheme disclosed herein, gradient defects in wafers can be detected, ensuring the quality and efficiency of wafer production.

Description

Technical Field

[0001] This disclosure generally relates to the field of semiconductor technology. More specifically, this disclosure relates to a method and apparatus for defect detection of wafers. Background Technology

[0002] In the semiconductor manufacturing field, wafers are the core substrate for chip production. The defects on their surface and inside directly determine the performance and reliability of the final semiconductor device. Therefore, wafer defect detection is an indispensable quality control link in the semiconductor production process.

[0003] Currently, mainstream wafer defect inspection equipment typically uses a specific light source to scan the wafer. It receives the light signals reflected or scattered from the wafer surface and characterizes these signals as grayscale values ​​to reflect the wafer's structural features. Since the die is the basic repeating unit that makes up the wafer, existing inspection methods generally identify defects by comparing the grayscale values ​​of two adjacent dies. However, in actual production, wafers often exhibit defects that gradually change from the center to the edge. Because the grayscale value difference between adjacent dies is small, existing inspection methods based on comparing adjacent dies cannot accurately capture these gradual defects, ultimately leading to unnecessary losses in the wafer production process and causing defective products to be shipped, affecting the stability and product quality of subsequent production stages.

[0004] In view of this, there is an urgent need to provide a solution for defect detection of wafers in order to effectively detect the gradual defects of wafers and ensure the quality and efficiency of wafer production. Summary of the Invention

[0005] In order to at least address one or more of the technical problems mentioned above, this application proposes a scheme for detecting defects in several aspects.

[0006] In a first aspect, this disclosure provides a method for defect detection of a wafer, comprising: identifying a plurality of first dies conforming to design rules in the wafer to be inspected; selecting a plurality of defect-free second dies from the plurality of first dies; determining a standard gray value for each standard cell in a standard die based on the gray value of each cell in the plurality of second dies; comparing each die in the wafer to be inspected with the standard die based on the standard gray value of each standard cell in the standard die to determine whether the wafer to be inspected has a gradient defect, and, if a gradient defect exists, determining the gradient direction and gradient trend of the gradient defect, thereby achieving defect detection of the wafer to be inspected.

[0007] In some embodiments, finding a plurality of first grains that conform to design rules in a wafer to be inspected includes: finding a plurality of first grains that conform to design rules in a wafer to be inspected based on overlay error, feature size and film thickness.

[0008] In some embodiments, identifying multiple first grains conforming to design rules in a wafer under test based on overlay error, feature size, and film thickness includes: uniformly selecting multiple measurement points on the wafer under test, and measuring the overlay error, feature size, and film thickness at each measurement point to obtain measurement results for each measurement point, the measurement results including overlay error measurement values, feature size measurement values, and film thickness measurement values, wherein the multiple measurement points cover the center, middle region, and edge region of the wafer under test; comparing the measurement results of each measurement point with the overlay error requirements, feature size compliance ranges, and film thickness compliance ranges in the design rules to determine whether each measurement point conforms to the design rules; and identifying each grain containing each measurement point that conforms to the design rules as a first grain.

[0009] In other embodiments, selecting a plurality of defect-free second grains from the plurality of first grains includes: for each of the plurality of first grains, comparing each first grain with its neighboring grains to determine whether each region of each first grain has defects; if no defects exist in any region of the first grain, determining the first grain as a defect-free second grain; if defects exist in any region of the first grain, determining the defect-free regions in each region as candidate regions of the first grain; and constructing a defect-free second grain based on the candidate regions of the plurality of first grains.

[0010] In some other embodiments, determining the standard gray value of each standard unit in the standard grain based on the gray value of each unit in the plurality of second grains includes: for each standard unit, obtaining multiple gray values ​​of multiple units in the plurality of second grains that are at the same position as the standard unit; selecting each gray value that satisfies a preset condition from the multiple gray values; determining the average value of each gray value that satisfies the preset condition, and determining the average value as the standard gray value of the standard unit.

[0011] In some other embodiments, the preset condition is that the gray value is within a preset range near the mean, wherein the mean is the average of the gray values ​​of multiple units in the multiple second grains that are at the same position as the standard unit, and the preset range is plus or minus one standard deviation or plus or minus two standard deviations, and the standard deviation is the standard deviation of the gray values ​​of multiple units in the multiple second grains that are at the same position as the standard unit.

[0012] In some embodiments, comparing the grayscale value of each die in the wafer to be tested with the standard grayscale value of the standard die to determine whether the wafer to be tested has a gradient defect includes: comparing the grayscale value of each unit in each die with the standard grayscale value of the corresponding standard unit in the standard die to determine the grayscale value deviation of each unit in each die; determining whether any unit in each die has a grayscale value deviation greater than a preset deviation; if at least one unit has a grayscale value deviation greater than the preset deviation, determining that the wafer has a gradient defect; if no unit has a grayscale value deviation greater than the preset deviation, determining that the wafer does not have a gradient defect.

[0013] In some embodiments, determining the gradient direction and gradient trend of the gradient defect includes: identifying units with grayscale deviation values ​​greater than the preset deviation as target units, and identifying the grain containing the target unit as the target grain; identifying grains located within a preset range around the target grain as reference grains; and analyzing the variation law of grayscale deviation values ​​along different directions based on the grayscale deviation values ​​of corresponding units in each reference grain to determine the gradient direction and gradient trend of the gradient defect, wherein the corresponding unit is a unit in the reference grain that is at the same position as the target unit.

[0014] In some other embodiments, the gradient defect refers to a defect in which the positional difference from the center to the edge of the wafer to be inspected gradually changes with position. The gradient direction is either a gradual change along the wafer rotation direction or a gradual change along the wafer radial direction. The gradient trend is any one of gradually increasing, gradually decreasing, first increasing and then decreasing, and first decreasing and then increasing.

[0015] In a second aspect, this disclosure provides an apparatus for defect detection of a wafer, comprising: a search module configured to search for a plurality of first dies conforming to design rules in the wafer to be inspected; a screening module configured to screen a plurality of defect-free second dies from the plurality of first dies; a determination module configured to determine a standard gray value of each standard cell in a standard die based on the gray value of each cell in the plurality of second dies; and a comparison module configured to compare each die in the wafer to be inspected with the standard die one by one based on the standard gray value of each standard cell in the standard die, to determine whether the wafer to be inspected has a gradient defect, and, if a gradient defect exists, to determine the gradient direction and gradient trend of the gradient defect, thereby achieving defect detection of the wafer to be inspected.

[0016] The wafer defect detection scheme described above first identifies multiple first dies that conform to design rules when determining standard dies. Then, it filters out defect-free first dies. Finally, it determines the standard grayscale value of each standard cell in the standard die based on the grayscale value of each cell in multiple second dies. This eliminates interference from significant differences in the basic characteristics of dies (such as position and thickness), resulting in more ideal standard dies and improving defect detection accuracy. Subsequently, by comparing each die in the wafer under test with the standard die, it can detect defects where the differences between adjacent dies are small, but the positional difference gradually changes from the wafer center to the edge, ensuring the quality and efficiency of wafer production. Simultaneously, by determining the direction and trend of this gradual change, engineers can collect a large amount of defect-related data and analyze the root causes of defects. Based on the analysis results, optimizing the production process can reduce defect generation and further improve production efficiency and wafer yield. Attached Figure Description

[0017] The above and other objects, features, and advantages of exemplary embodiments of this application will become readily understood by reading the following detailed description with reference to the accompanying drawings. In the drawings, several embodiments of this application are illustrated by way of example and not limitation, and the same or corresponding reference numerals denote the same or corresponding parts, wherein:

[0018] Figure 1 An exemplary flowchart of a method for defect detection of a wafer, according to an embodiment of this disclosure, is shown;

[0019] Figure 2 An exemplary schematic diagram of the gradual defect in this disclosure embodiment is shown;

[0020] Figure 3 An exemplary flowchart of a method for screening out a plurality of defect-free second grains from a plurality of first grains according to an embodiment of the present disclosure is shown;

[0021] Figure 4 An exemplary schematic diagram of obtaining a defect-free second grain by splicing is shown in this embodiment of the present disclosure;

[0022] Figure 5 An exemplary flowchart of a method for determining whether a wafer to be inspected has a gradient defect, according to an embodiment of this disclosure, is shown.

[0023] Figure 6 An exemplary structural block diagram of an apparatus for defect detection of a wafer is shown according to an embodiment of this disclosure;

[0024] Figure 7 An exemplary structural block diagram of an electronic device according to an embodiment of this disclosure is shown. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0026] It should be understood that the terms "comprising" and "including" used in the specification and claims of this application indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0027] It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application. As used in this specification and claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this specification and claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.

[0028] As used in this specification and claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [described condition or event] is detected," or "in response to detection of [described condition or event]."

[0029] The specific embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0030] To facilitate understanding, before describing the specific implementation methods of this disclosure in detail, the technical names of the designs in this disclosure will be explained first.

[0031] A wafer is the fundamental material for manufacturing semiconductor chips. It is typically a thin, circular sheet made from high-purity silicon through a series of complex processes, with common diameters of 200mm and 300mm. It is the starting point for semiconductor manufacturing, and its quality and performance directly affect the performance and reliability of subsequent chips.

[0032] A die is a single chip unit formed on a wafer after processing; it is also called a bare die or bare chip. It is an intermediate product in the chip manufacturing process and has not yet undergone subsequent processing such as packaging. Hundreds or thousands of dies can be cut from a single wafer, and the size and shape of the dies depend on the chip design and manufacturing process. A die is the smallest unit with independent function on a wafer; each die contains a complete circuit structure and has specific functions, such as logic operations and storage. The quality and performance of dies are one of the important indicators for measuring the quality of wafer manufacturing.

[0033] A chip is a packaged semiconductor device encapsulated in a protective casing and connected to external circuits via pins or solder joints. Chips are ultimately semiconductor devices that can be directly used in electronic devices, such as computer processors, memory modules, and mobile phone chips.

[0034] The specific embodiments disclosed herein will now be described in detail with reference to the accompanying drawings.

[0035] Figure 1 An exemplary flowchart of a method 100 for defect detection of a wafer, according to an embodiment of this disclosure, is shown. It will be understood that method 100 can be performed by any suitable device with data processing capabilities, such as, but not limited to, terminal devices, processors, and servers.

[0036] like Figure 1 As shown, in step S101, method 100 can identify multiple grains (which can be referred to as first grains for distinction) that conform to the design rules in the wafer to be inspected. In step S102, method 100 can select multiple defect-free grains (which can be referred to as second grains for distinction) from the multiple first grains. Next, in step S103, method 100 can determine the standard grayscale value of each standard cell in the standard grain based on the grayscale value of each cell in the multiple second grains. Finally, in step S104, method 100 can compare each grain in the wafer to be inspected with the standard grain one by one to determine whether there are gradient defects in the wafer to be inspected, and if there are gradient defects, determine the gradient direction and gradient trend of the gradient defects, so as to achieve defect detection of the wafer to be inspected.

[0037] In step S101, method 100 can identify multiple first grains conforming to design rules in the wafer to be inspected based on overlay error, feature size, and film thickness. Specifically, multiple measurement points can be uniformly selected on the wafer, covering the center, middle, and edge regions of the wafer to ensure a comprehensive characterization of the overall wafer state. Next, overlay error, feature size, and film thickness can be measured at each measurement point to obtain measurement results, including overlay error, feature size, and film thickness measurements. Then, the measurement results at each measurement point can be compared with the overlay error requirements, feature size compliance ranges, and film thickness compliance ranges in the design rules to determine whether each measurement point conforms to the design rules. Finally, each grain containing measurement points conforming to the design rules is identified as a first grain. Specifically, if all measurement points on a grain conform to the design rules, the grain is considered to conform to the design rules, and thus identified as a first grain. If all measurement points on the wafer conform to the design rules, then all the grains on the wafer can be considered to conform to the design rules, that is, all the grains on the wafer are the first grains.

[0038] To facilitate understanding, the measurement of wafer overlay error, feature size, and film thickness will be described in detail below.

[0039] In semiconductor manufacturing, a wafer pattern layer refers to a specific layer of patterns formed on the wafer surface through a series of process steps. These layers include, but are not limited to, photoresist layers, metal layers, and oxide layers. On a wafer, each pattern layer is built upon the previous one, and wafer overlay error refers to the alignment accuracy between the current pattern layer and the previous pattern layer.

[0040] In practice, to ensure the accuracy and reliability of overlay error measurement results, multiple measurements must be performed at each measurement point on the wafer. Since measurement results are affected by various factors, such as the accuracy of the measuring equipment, environmental conditions, and the operator's skill, the results of each measurement may differ. To perform effective statistical analysis of the multiple measurement results for each measurement point, the average value *m* and standard deviation *δ* of the multiple measurement results for each point need to be calculated. The average value *m* represents the central tendency of the multiple measurement results, i.e., the average overlay error; the standard deviation *δ* represents the dispersion of the multiple measurement results, i.e., the degree of deviation between the measurement result and the average value.

[0041] In photolithography, the focus is typically on the worst-case overlay error, i.e., the measurement result that deviates furthest from the average among multiple measurements. Therefore, |m| + 3δ can be used to represent the overlay error measurement value at each measurement point, where |m| represents the absolute value of the average, and 3δ represents three times the standard deviation. Next, the overlay error measurement value can be compared with the overlay error requirements in the design rules. If the overlay error measurement value meets the overlay error requirements in the design rules, then the overlay error measurement value at the measurement point is determined to conform to the design rules; if the overlay error measurement value does not meet the overlay error requirements in the design rules, then the overlay error measurement value at the measurement point is determined to not conform to the design rules. It is understandable that different technology nodes have different overlay error requirements; for example, the overlay error requirement for the 20nm node is less than 8.0nm, and the overlay error requirement for the 14nm node is less than 4.2nm.

[0042] Furthermore, if the overlay error of all measurement points on a die conforms to the design rules, then the overlay error of that die is considered to conform to the design rules. If the overlay error of all measurement points on a wafer conforms to the design rules, then the overlay error of all dies on that wafer is considered to conform to the design rules.

[0043] Furthermore, each of the aforementioned measurement points refers to a specific location or area on the wafer used to measure overlay errors. These are typically pre-designed overlay marks or features used to assess the alignment accuracy between different layers. These marks are distributed on the wafer at a certain density and pattern, covering critical areas such as the center, middle, and edge regions. A single wafer usually has dozens to hundreds of overlay marks to ensure that alignment accuracy at different locations can be monitored. Common overlay marks include: Bar-in-Bar, consisting of two sets of parallel bar patterns, with one set inside the other, where the overlay error is calculated based on the relative offset of the inner and outer bars; Box-in-Box, consisting of two concentric square patterns, where alignment accuracy is determined based on the center deviation of the square patterns; and Box-in-Bar, consisting of a square pattern and a bar pattern, with the bar pattern inside the square pattern, suitable for inter-layer alignment inspection in some special processes.

[0044] The aforementioned critical dimension (CD) refers to the physical dimensional features on a chip, also known as the key dimension, used to describe the smallest size of a semiconductor device on a wafer, usually expressed in nanometers (nm). In CMOS processes, the critical dimension is typically represented by the width of the "gate," which is the channel length of a MOS device. The smaller the critical dimension, the higher the chip's integration density, the better its performance, and the lower its power consumption. In practice, high-precision measurement equipment, such as optical microscopes or electron beam inspection systems, can be used to measure the critical dimension. To ensure the representativeness and uniformity of the measurement results, the measurement points must cover the center, middle, and edge areas of the wafer to avoid local deviations affecting the overall judgment.

[0045] The measurement results can then be compared with the design rules to determine if they are within the allowable error range. For example, if the design rule requires a feature size of 100 nm with an allowable error of ±10 nm, then measurement points with feature size measurements between 90 nm and 110 nm conform to the design rule, meaning the compliant feature size range is [90 nm, 110 nm]. Furthermore, if the feature size measurements at all points on a die are within the allowable error range of the design rule, then the feature size of that die is considered to conform to the design rule. If the feature size measurements at all points on a wafer are between 90 nm and 110 nm and conform to the design rule, then the feature sizes of all dies on that wafer are considered to conform to the design rule.

[0046] In semiconductor manufacturing, film thickness measurement requires illuminating the wafer with a light source of a specific wavelength for different wafer materials. Different materials exhibit varying absorption and reflection characteristics for different wavelengths of light. By receiving the reflected spectral signals and combining them with optical principles, the film thickness of a specific component on the wafer can be determined. During film thickness measurement, the measurement points must be reasonably distributed according to the wafer size. For example, for a 150mm wafer, five points are typically used (one at the center and four around the perimeter) in a matrix distribution; for a 200mm wafer, nine points are typically used (one at the center, four on the inner ring, and four on the outer ring) in a concentric circle distribution; and for a 300mm wafer, thirteen points are typically used (one at the center, four on the inner ring, four in the middle ring, and four on the outer ring) in a multi-ring concentric circle distribution, ensuring that the film thickness in each region can be accurately characterized.

[0047] Next, the measurement results are compared with the design rules to determine whether the results are within the allowable error range. For example, if the design rules require a film thickness of 100 nm with an allowable error of ±1 nm, then measurement points with film thickness measurements between 99 nm and 101 nm conform to the design rules, meaning the compliant film thickness range is [99 nm, 101 nm]. Furthermore, if the film thickness measurements at all points on a die are within the allowable error range of the design rules, then the film thickness of that die is considered to conform to the design rules. If the film thickness measurements at all points on a wafer are between 99 nm and 101 nm and conform to the design rules, then the film thickness of all dies on that wafer can be considered to conform to the design rules.

[0048] In step S102, method 100 can use a defect inspection machine to scan and photograph, in order to screen out multiple defect-free second grains from multiple first grains. Here, the scanning takes the bright-field method as an example. The bright-field scanning method is a method that, under the perspective of a microlens, creates and illuminates the wafer surface with a light source of a specific wavelength based on the material characteristics of the wafer surface, and receives the reflected light for signal analysis. Since different structures on the wafer surface have different reflectivities, they will generate reflected light signals of different intensities. The reflected light signals are processed and quantized using grayscale values ​​to characterize the structural features of the wafer surface. For ease of understanding, this will be discussed later in conjunction with... Figure 3 A method 300 for selecting multiple defect-free second grains from multiple first grains is described in detail.

[0049] In step S103, method 100 determines the standard grayscale value of each standard unit in the standard grain based on the grayscale value of each unit in the plurality of second grains. Specifically, the standard grayscale value of the standard unit is determined by the grayscale values ​​of multiple units in the plurality of second grains that are at the same position as the standard unit. More specifically, for any standard unit in the standard grain, multiple grayscale values ​​of multiple units in the plurality of second grains that are at the same position as the standard unit can be obtained first. Then, grayscale values ​​that satisfy preset conditions can be selected from the obtained multiple grayscale values. Finally, the average value of the grayscale values ​​that satisfy the preset conditions can be determined, and the average value is determined as the standard grayscale value of the standard unit.

[0050] In practical scenarios, when using the aforementioned defect detection machine for scanning and photography, the grain can be divided into thousands or more units of equal area (i.e., scanning units) based on its area. This is related to the detection capability of the defect detection machine. Each unit is represented by a grayscale value after scanning. Therefore, the number of grayscale values ​​corresponds to the number of units in the second grain, and the number of standard units in the standard grain is the same as the number of units in the second grain.

[0051] Considering that a significant difference in grayscale value between a cell in a second grain and a cell in the same position in another second grain would directly affect the accuracy of the standard grayscale value of the standard cell in the standard grain, when determining the standard grayscale value of the standard cell in the standard grain from multiple grayscale values ​​of multiple cells in multiple second grains, we can first select grayscale values ​​that meet preset conditions from the multiple grayscale values. Then, we determine the average value of the grayscale values ​​that meet the preset conditions and use this average value as the standard grayscale value of the standard cell in the standard grain. Based on this, outlier values ​​can be excluded from the statistics, thus eliminating the impact of outlier values ​​on the accuracy of the standard grayscale value.

[0052] In actual operation, the aforementioned preset condition is that the gray value is within a preset range near the mean value. The mean value μ is the average of multiple gray values ​​of multiple units in multiple second grains that are in the same position as the standard unit. The preset range is plus or minus one standard deviation (μ ± σ) or plus or minus two standard deviations (μ ± 2σ), where the standard deviation σ is the standard deviation of multiple gray values ​​of multiple units in multiple second grains that are in the same position as the standard unit.

[0053] In step S104, method 100 compares each grain in the wafer to be inspected with a standard grain to determine whether the wafer to be inspected has a gradient defect, and if a gradient defect exists, determines the gradient direction and trend of the gradient defect, thereby achieving defect detection of the wafer to be inspected. A gradient defect refers to a defect where the difference in position from the center to the edge of the wafer gradually changes with position. The gradient trend of this difference can include, but is not limited to, gradually increasing, gradually decreasing, first increasing and then decreasing, and first decreasing and then increasing. For ease of understanding, this will be discussed later in conjunction with... Figure 5 The method for determining whether a wafer under test has gradient defects is described in detail 500.

[0054] You can refer to this first. Figure 2 Understanding gradual defects. For example... Figure 2 As shown, the left side displays a wafer and its three dies, namely die 1, die 2, and die 3, while the right side shows the scanned images of each die. By comparing the scanned images of each die, it can be found that the structures of each die are basically the same, except that the distance between the two upper and lower rectangular regions located in the middle position is different. Specifically, in die 1, the distance between the two upper and lower rectangular regions located in the middle position is the normal distance, which is the normal state; in die 2, the distance between the two upper and lower rectangular regions located in the middle position is narrower than the normal distance, which is the narrowed state; in die 3, the distance between the two upper and lower rectangular regions located in the middle position is close to 0, which is the connected state.

[0055] When performing defect inspection on a wafer, if the difference between two adjacent dies is calculated to detect defects, it will be found that the distance difference between dies 2 and 3 is small, which is reflected in the grayscale value as a small difference. Therefore, dies 2 and 3 will not be considered defective, and the defects cannot be detected. However, if dies 2 and 3 are compared with dies 1 in a normal state, it will be found that the distance difference between them and dies 1 is large, which is reflected in the grayscale value as a large difference. In this case, dies 2 and 3 will be considered defective, and the defects can be detected.

[0056] As an example, suppose the grayscale values ​​of the same cell in each grain from the center to the edge are numbers 1-10. A comparison reveals that the difference between 1 and 2, and between 9 and 10, is 1, but the difference between 1 and 10 is 9. This means that while the differences between adjacent cells are small, the difference between the center and the edge gradually increases. In this case, it will be difficult to detect defects by calculating the difference between two adjacent grains. However, if a standard grain is found and the grain to be tested is compared with the standard grain, the results will be significantly different. Assuming the standard grayscale value of the same cell in the standard grain is 3, and the maximum allowable deviation is 2, then grains with grayscale values ​​from 6 to 10 will be considered defective, thus detecting gradient defects. This can improve wafer quality, reduce wafer production losses, and prevent the outflow of defective products.

[0057] The above combination Figure 1 A method for defect detection in wafers is described. This method first identifies multiple first dies that conform to design rules when determining standard dies. Then, it filters out defect-free first dies from these first dies. Finally, it determines the standard grayscale value of each standard cell in the standard die based on the grayscale value of each cell in multiple second dies. This eliminates interference from significant differences in the basic characteristics of the dies (such as position and thickness) that could affect the determined standard dies, resulting in more ideal standard dies and improving the accuracy of defect detection. Subsequently, by comparing each die in the wafer under test with the standard dies one by one, defects can be detected where the differences between adjacent dies are small but gradually change from the wafer center to the edge. This improves wafer quality, reduces wafer production losses, and prevents the outflow of defective products.

[0058] Figure 3 An exemplary flowchart of a method 300 for selecting a plurality of defect-free second grains from a plurality of first grains, according to an embodiment of this disclosure, is shown. It will be understood that the following is combined with... Figure 3 The description is a specific implementation of the aforementioned step S102. Therefore, in conjunction with the preceding text... Figure 1 The described characteristics can be similarly applied here.

[0059] like Figure 3 As shown, in step S301, method 300 compares each of the plurality of first grains with its neighboring grains to determine whether defects exist in each region of each first grain. In step S302, if no defects exist in any region of the first grain, method 300 determines the first grain as a defect-free second grain. Next, in step S303, if defects exist in any region of the first grain, method 300 determines the defect-free regions in each region as candidate regions of the first grain. Further, in step S304, method 300 constructs a defect-free second grain based on the candidate regions of the plurality of first grains.

[0060] Specifically, when using the aforementioned defect inspection equipment for scanning and imaging, the wafer to be inspected can first be placed on the equipment to ensure accurate positioning for subsequent scanning and imaging. Next, the relevant parameters of the inspection equipment, such as scanning resolution, inspection sensitivity, and light source intensity, can be set according to the type of wafer, process node, and inspection requirements. Then, a light source of a specific wavelength can be created and irradiated onto the surface of the wafer under inspection from a microlens perspective. The light source directly illuminates the wafer, and the reflected or transmitted light directly enters the camera or sensor.

[0061] Next, the light signals reflected from the surface of the wafer under test can be collected. Due to differences in the wafer's structure, different regions will generate reflected light signals of varying intensities. The collected reflected light signals can then be processed and quantized using grayscale values ​​to obtain a wafer surface image characterizing the structural features of the wafer surface. Different grayscale values ​​correspond to different reflected light intensities, thus reflecting the structural differences on the wafer surface. Finally, the image of each first grain can be compared with the images of its adjacent grains. If the subtraction result is not zero, it indicates that the first grain has a defect. Conversely, if the subtraction result is zero, the first grain on the surface has no defects, and in this case, the first grain can be identified as a defect-free second grain.

[0062] In practice, if it is difficult to find a defect-free second grain, the first grain can be divided into multiple regions for searching. From these multiple regions of the first grain, multiple defect-free regions that can form a complete grain (i.e., the second grain) can be identified. Then, by piecing together these multiple defect-free regions, a defect-free second grain can be obtained. (See reference here.) Figure 4 Understanding how defect-free second grains are obtained through splicing. For example... Figure 4As shown in Figure a, by scanning and imaging the four grains within the black rectangle, four structural images identical to those in Figure b can be obtained. In the four structural images, the dark rectangular areas represent defect-free regions, and the light rectangular areas represent defective regions. By comparing the four structural images, it can be found that each of the four grains has one defect-free rectangular area. These are the defect-free regions. By piecing them together, a complete defect-free second grain can be formed (e.g., ...). Figure 4 (as shown in c in the diagram).

[0063] Figure 5 An exemplary flowchart of a method 500 for determining whether a wafer to be inspected has a gradient defect, according to an embodiment of this disclosure, is shown. It will be understood that the following is combined with... Figure 5 The description is a specific implementation of the aforementioned step S104. Therefore, in conjunction with the preceding text... Figure 1 The described characteristics can be similarly applied here.

[0064] like Figure 5 As shown, in step S501, method 500 compares the gray value of each unit in each die with the standard gray value of the corresponding standard unit in the standard die to determine the gray value deviation of each unit in each die. In step S502, method 500 determines whether any unit in each die has a gray value deviation greater than a preset deviation, and selects to execute step S503 or step S504 accordingly. In step S503, method 500 can determine that the wafer has a gradient defect if at least one unit has a gray value deviation greater than the preset deviation. Conversely, in step S504, method 500 can determine that the wafer does not have a gradient defect if no unit has a gray value deviation greater than the preset deviation. It is understood that those skilled in the art can choose the specific value of the preset deviation according to actual needs, and this disclosure does not specifically limit it.

[0065] To further improve the accuracy of defect detection, for cells whose grayscale value deviation is greater than a preset deviation, the cell's location information can be output, including its coordinates on the wafer, the die number, and the cell's position within the die. Based on this location information, a scanning electron microscope (SEM) is used to scan and image the cell to verify the accuracy of the defect detection results.

[0066] In one embodiment of this disclosure, when a wafer exhibits a gradient defect, method 500 may further perform the following operations to determine the gradient direction and trend of the gradient defect: first, units with grayscale deviation values ​​greater than a preset deviation are identified as target units, and the grain containing the target unit is identified as the target grain; then, grains located within a preset range around the target grain are identified as reference grains; finally, based on the grayscale deviation values ​​of corresponding units in each reference grain, the variation law of the grayscale deviation values ​​along different directions is analyzed to determine the gradient direction and trend of the gradient defect, where the corresponding unit is the unit in the reference grain that is at the same position as the target unit. The variation law can be determined by fitting a two-dimensional distribution curve of the grayscale deviation values. Further, when the absolute value of the curve slope is greater than or equal to 0.05, a clear gradient direction is determined. Simultaneously, based on the change in the sign of the first derivative of the curve, the gradient trend can be determined; for example, if the derivative is positive, it gradually increases; if the derivative changes from positive to negative, it first increases and then decreases. It is understood that those skilled in the art can select specific values ​​for the preset range according to actual needs, such as a distance of 3-5 dies for a 300mm wafer and a distance of 2-3 dies for a 200mm wafer. This disclosure does not make any specific limitations in this regard.

[0067] Here, the gradient direction can include, but is not limited to, gradients along the wafer rotation direction and gradients along the wafer radial direction. The gradient trend can be used to describe the change in grayscale deviation value of each grain (reference grain and target grain) along the determined gradient direction, such as, but not limited to, gradually increasing, gradually decreasing, first increasing and then decreasing, and first decreasing and then increasing. By determining the gradient direction and gradient trend, engineers can collect a large amount of defect-related data and analyze the root causes of defects. For example, if the gradient direction is along the wafer rotation direction, it can be determined that the root cause of defects is uneven rotation speed in the deposition process; if the gradient direction is along the wafer radial direction, it can be determined that the root cause of defects is uneven airflow distribution in the etching process. Optimizing the production process based on the analysis results and reducing defect generation can effectively improve production efficiency and wafer yield. The above provides an exemplary description of the method 100 for defect detection of wafers according to the embodiments of this disclosure. The following will be combined with Figure 6 An exemplary description is provided of an apparatus 600 for defect detection of wafers according to embodiments of this disclosure. For example... Figure 6 As shown, the device 600 includes a search module 601, a filter module 602, a determination module 603, and a comparison module 604. Among them,

[0068] The search module 601 is configured to find multiple first dies that conform to design rules in the wafer to be inspected;

[0069] The screening module 602 is configured to screen out a plurality of defect-free second grains from a plurality of first grains;

[0070] The module 603 is configured to determine the standard gray value of each standard cell in the standard grain based on the gray value of each cell in the plurality of second grains.

[0071] The comparison module 604 is configured to compare each grain in the wafer to be tested with the standard grain based on the standard gray value of each standard unit in the standard grain, to determine whether there is a gradient defect in the wafer to be tested, and, if there is a gradient defect, to determine the gradient direction and gradient trend of the gradient defect, so as to realize the defect detection of the wafer to be tested.

[0072] In one embodiment, the search module 601 searches for multiple first grains that conform to the design rules in the wafer to be inspected based on overlay error, feature size, and film thickness.

[0073] In another embodiment, the lookup module 601 specifically performs the following operations to locate multiple first dies that conform to the design rules in the wafer to be inspected: Multiple measurement points are uniformly selected on the wafer to be inspected, and overlay error, feature size, and film thickness are measured at each measurement point to obtain measurement results for each measurement point. These measurement results include overlay error measurement values, feature size measurement values, and film thickness measurement values. The multiple measurement points cover the center, middle region, and edge region of the wafer to be inspected. The measurement results of each measurement point are compared with the overlay error requirements, feature size compliance ranges, and film thickness compliance ranges in the design rules to determine whether each measurement point conforms to the design rules. Each die containing a measurement point that conforms to the design rules is determined as a first die.

[0074] In another embodiment, the screening module 602 is configured to perform the following operations to screen out a plurality of defect-free second grains from a plurality of first grains: for each of the plurality of first grains, comparing each first grain with its neighboring grains to determine whether there are defects in each region of each first grain; if there are no defects in any region of the first grain, determining the first grain as a defect-free second grain; if there are defects in any region of the first grain, determining the defect-free regions in each region as candidate regions of the first grain; and constructing a defect-free second grain based on the candidate regions of the plurality of first grains.

[0075] In another embodiment, the determining module 603 is configured to perform the following operations to determine a standard gray value for each standard cell in a standard cell based on the gray value of each cell in a plurality of second cells: for each standard cell, obtaining a plurality of gray values ​​of a plurality of cells in the plurality of second cells that are at the same position as the standard cell; selecting gray values ​​that satisfy preset conditions from the plurality of gray values; determining the average value of the gray values ​​that satisfy the preset conditions, and determining the average value as the standard gray value of the standard cell.

[0076] In another embodiment, the preset condition is that the gray value is within a preset range near the mean value, wherein the mean value is the average of the gray values ​​of multiple units in the multiple second grains that are at the same position as the standard unit, and the preset range is plus or minus one standard deviation or plus or minus two standard deviations, and the standard deviation is the standard deviation of the gray values ​​of multiple units in the multiple second grains that are at the same position as the standard unit.

[0077] In another embodiment, the comparison module 604 is configured to perform the following operations to determine whether the wafer to be tested has a gradient defect: comparing the gray value of each cell in each die with the standard gray value of the corresponding standard cell in a standard die to determine the gray value deviation of each cell in each die; determining whether any cell in each die has a gray value deviation greater than a preset deviation; if at least one cell has a gray value deviation greater than the preset deviation, determining that the wafer has a gradient defect; if no cell has a gray value deviation greater than the preset deviation, determining that the wafer does not have a gradient defect.

[0078] In another embodiment, the comparison module 604 is configured to further perform the following operations to determine the gradient direction and gradient trend of the gradient defect: identifying units with grayscale deviation values ​​greater than a preset deviation as target units, and identifying the grain containing the target unit as the target grain; identifying grains located within a preset range around the target grain as reference grains; and analyzing the variation law of grayscale deviation values ​​along different directions based on the grayscale deviation values ​​of corresponding units in each reference grain to determine the gradient trend of the gradient defect, wherein the corresponding unit is a unit in the reference grain that is at the same position as the target unit.

[0079] In another embodiment, a gradient defect refers to a defect in which the positional difference from the center to the edge of the wafer to be inspected gradually changes with position. The gradient direction is either a gradual change along the wafer rotation direction or a gradual change along the wafer radial direction. The gradient trend is either a gradual increase, a gradual decrease, an increase followed by a decrease, or a decrease followed by an increase.

[0080] Those skilled in the art will understand that the operations performed by each module and unit of the device 600 correspond one-to-one with the steps of the method for dynamically managing the receiving unit on the terminal in the foregoing embodiments, and will not be repeated here.

[0081] Next, combine Figure 7 An exemplary description of an electronic device 700 provided in an embodiment of this application is given below. For example... Figure 7 As shown, the electronic device 700 in this application embodiment may include a processor 701, a memory 702, and a communication bus 703.

[0082] In specific embodiments, the processor 701 described above can be at least one of the following: Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), CPU, controller, microcontroller, and microprocessor. It is understood that for different devices, the electronic device used to implement the above processor function can also be other types, and this embodiment does not specifically limit it.

[0083] In this embodiment, the communication bus 703 is used to establish communication between the processor 701 and the memory 702; the memory 702 stores program instructions for defect detection of the wafer; when the processor 701 executes the program instructions stored in the memory 702, it implements the present application. Figures 1 to 5 The method described is for defect detection of wafers.

[0084] The above combination Figure 7 This document describes an electronic device for defect detection of a wafer that can be used to execute the present application. It should be understood that the device structure or architecture described herein is merely exemplary, and the implementation methods and entities of this application are not limited thereto, but can be modified without departing from the spirit of this application. It is understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, while their similarities or corresponding parts can be referred to mutually. For the sake of brevity, this disclosure will not elaborate on each one.

[0085] Based on the foregoing description in conjunction with the accompanying drawings, those skilled in the art will understand that the embodiments of this application can also be implemented by software programs. Therefore, this application also provides a computer-readable storage medium. This computer-readable storage medium stores program instructions for defect detection of a wafer, which can be used to implement the embodiments of this application. Figures 1 to 5 The method described is for defect detection of wafers.

[0086] It should be noted that although the operations of the method of this application are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. On the contrary, the steps depicted in the flowchart can be performed in a different order. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0087] While numerous embodiments of this application have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Many modifications, alterations, and alternatives will arise for those skilled in the art without departing from the spirit and intent of this application. It should be understood that various alternatives to the embodiments of this application described herein may be employed in the practice of this application. The appended claims are intended to define the scope of protection of this application and therefore cover equivalents or alternatives within the scope of these claims.

Claims

1. A method for defect detection of a wafer, characterized by, The method comprises the following steps: finding a plurality of first dies in a wafer to be detected that meet design rules; selecting a plurality of second dies without defects from the plurality of first dies; determining standard grayscale values of each standard unit in a standard die based on grayscale values of each unit in the plurality of second dies; comparing each die in the wafer to be detected with the standard die based on the standard grayscale values of each standard unit in the standard die, determining whether there is a gradual defect in the wafer to be detected, and in the case of a gradual defect, determining the gradual direction and gradual trend of the gradual defect, so as to realize defect detection of the wafer to be detected; wherein finding a plurality of first dies in a wafer to be detected that meet design rules comprises: uniformly selecting a plurality of measurement points on the wafer to be detected, and respectively measuring overlay error, feature size and film thickness of the plurality of measurement points to obtain measurement results of the measurement points, the measurement results comprising overlay error measurement values, feature size measurement values and film thickness measurement values; comparing the measurement results of the measurement points with overlay error requirements, feature size compliance ranges and film thickness compliance ranges in the design rules respectively to determine whether the measurement points meet the design rules; determining each die where the measurement points meeting the design rules as a first die.

2. The method of claim 1, wherein, Finding a plurality of first dies in a wafer to be detected that meet design rules comprises: finding a plurality of first dies in a wafer to be detected that meet design rules based on overlay error, feature size and film thickness.

3. The method of claim 2, wherein, The plurality of measurement points cover the center, middle region and edge region of the wafer to be detected.

4. The method of claim 1, wherein, Selecting a plurality of second dies without defects from the plurality of first dies comprises: for each first die in the plurality of first dies, comparing each first die with its adjacent dies to determine whether each region of each first die has a defect; in the case that each region of a first die does not have a defect, determining the first die as a second die without defects; in the case that a region of each region of a first die has a defect, determining a region without defects in each region as a candidate region of the first die; constructing a second die without defects based on the candidate regions of the plurality of first dies.

5. The method of claim 1, wherein, Determining standard grayscale values of each standard unit in a standard die based on grayscale values of each unit in the plurality of second dies comprises: for each standard unit, obtaining a plurality of grayscale values of a plurality of units in the plurality of second dies with the same position as the standard unit; selecting each grayscale value meeting a preset condition from the plurality of grayscale values; determining an average value of each grayscale value meeting the preset condition, and determining the average value as the standard grayscale value of the standard unit.

6. The method of claim 5, wherein, The preset condition is that the grayscale value is within a preset range near the average value, wherein the average value is the average of the plurality of grayscale values of the plurality of units in the plurality of second dies with the same position as the standard unit, the preset range is one standard deviation or two standard deviations, and the standard deviation is the standard deviation of the plurality of grayscale values of the plurality of units in the plurality of second dies with the same position as the standard unit.

7. The method of claim 1, wherein, The method comprises the following steps: comparing the gray value of each unit in each die with the standard gray value of the corresponding standard unit in the standard die to determine the gray value deviation of each unit in each die; determining whether the gray value deviation of any unit in each die is greater than a preset deviation; determining that the wafer has a gradual defect if the gray value deviation of at least one unit is greater than the preset deviation; determining that the wafer does not have a gradual defect if the gray value deviation of any unit is not greater than the preset deviation.

8. The method of claim 7, wherein, The method comprises the following steps: determining a target unit as a unit with a gray value deviation greater than the preset deviation, and determining a target die as a die in which the target unit is located; determining a reference die as a die located within a preset range around the target die; analyzing the variation of the gray value deviation in different directions based on the gray value deviation of the corresponding unit in each reference die to determine the gradual direction and gradual trend of the gradual defect, wherein the corresponding unit is a unit in the reference die that has the same position as the target unit.

9. The method according to any one of claims 1 to 8, characterized in that, The gradual defect refers to a defect whose position difference from the center to the edge of the wafer gradually changes with position, the gradual direction is any one of the gradual change in the wafer rotation direction and the gradual change in the wafer radial direction, and the gradual trend is any one of gradually increasing, gradually decreasing, first increasing and then decreasing, and first decreasing and then increasing.

10. An apparatus for defect detection of wafers, characterized in that, The method comprises the following steps: a searching module configured to search for a plurality of first dies that meet the design rules in a wafer to be detected; a screening module configured to screen a plurality of second dies without defects from the plurality of first dies; a determining module configured to determine the standard gray value of each standard unit in a standard die based on the gray value of each unit in the plurality of second dies; a comparison module configured to compare each die in the wafer to be detected with the standard die based on the standard gray value of each standard unit in the standard die to determine whether the wafer to be detected has a gradual defect, and to determine the gradual direction and gradual trend of the gradual defect if the wafer to be detected has a gradual defect, so as to realize the defect detection of the wafer to be detected; The searching module performs the following operations to search for a plurality of first dies that meet the design rules in a wafer to be detected: uniformly selecting a plurality of measurement points on the wafer to be detected, and measuring the overlay error, feature size and film thickness of the plurality of measurement points respectively to obtain the measurement results of the measurement points, which include the overlay error measurement value, feature size measurement value and film thickness measurement value; comparing the measurement results of the measurement points with the overlay error requirement, feature size compliance range and film thickness compliance range in the design rules respectively to determine whether the measurement points meet the design rules; determining each die in which each measurement point meeting the design rules is located as a first die.

Images