Reliability screening method for semiconductor devices

Abstract

The application provides a reliability screening method of a semiconductor device, comprising the following steps: providing a semiconductor device; reducing the output voltage of an LDO on the basis of the standard voltage output by the LDO and reducing the frequency of a clock on the basis of the standard clock frequency, performing erasing operation, writing operation and reading operation on the semiconductor device with weak erasing in sequence, and screening out the semiconductor device that does not meet the specifications; increasing the output voltage of the low-dropout linear regulator on the basis of the standard voltage output by the low-dropout linear regulator and reducing the frequency of the clock on the basis of the standard clock frequency, performing erasing operation, writing operation and reading operation on the semiconductor device with weak writing in sequence, and screening out the semiconductor device that does not meet the specifications; and performing multiple baking on the semiconductor devices that meet the specifications screened out in steps S2 and S3, and testing the reliability parameters of the semiconductor devices. The application effectively screens out the semiconductor device that does not meet the specifications in the semiconductor device with weak erasing or weak writing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a reliability screening method for semiconductor devices. Background Technology

[0002] During chip testing and production, chips undergo erase, write, and read tests to filter out chips that fail various operations. For example, finished chips with questionable reliability due to issues such as weak write capability need to be screened out and subjected to reliability assessments.

[0003] In the existing technology, the method for reliability assessment and screening of chips that may have problems such as weak erase or weak write is to evaluate these chips by adjusting the trim bit of the chip's trim parameters, thereby changing the write value by adjusting the programming voltage by changing the trim bit.

[0004] However, for chips with fixed adjustment parameters, such as semiconductor devices already packaged after the wafer stage, it is impossible to adjust parameters such as high-voltage modules or TBP using existing technologies. Therefore, when conducting reliability assessments on finished chips with fixed adjustment parameters, it is not possible to effectively screen out non-compliant semiconductor devices from those with weak erase or weak write capabilities, nor can it screen out semiconductor devices with substandard reliability. Summary of the Invention

[0005] The purpose of this invention is to provide a reliability screening method for semiconductor devices, which can effectively screen out non-compliant semiconductor devices among those with weak erase or weak write capabilities, and can also screen out semiconductor devices with substandard reliability.

[0006] To achieve the above objectives, the present invention provides a reliability screening method for semiconductor devices, comprising:

[0007] S1: Provide semiconductor devices to be screened, including semiconductor devices with weak erase and weak write capabilities that were screened out during the wafer stage;

[0008] S2: Based on the standard voltage output of the low dropout linear regulator, reduce the output voltage of the low dropout linear regulator. Based on the standard clock frequency, reduce the clock frequency. Perform erase, write and read operations on the weakly erased semiconductor devices in sequence to screen out semiconductor devices that do not meet the specifications.

[0009] S3: Based on the standard voltage output of the low dropout linear regulator, increase the output voltage of the low dropout linear regulator, reduce the clock frequency based on the standard clock frequency, and perform erase, write and read operations sequentially on the weak write semiconductor devices to screen out semiconductor devices that do not meet the specifications.

[0010] S4: After baking the semiconductor devices that meet the specifications selected in steps S2 and S3 multiple times, test the reliability parameters of the semiconductor devices.

[0011] Optionally, in the reliability screening method for the semiconductor device, the adjustment parameters of the semiconductor device are fixed.

[0012] Optionally, in the reliability screening method for the semiconductor device, the erase or write voltage is adjusted by regulating the voltage of the low-dropout linear regulator.

[0013] Optionally, in the reliability screening method for the semiconductor device, the erase or write time is adjusted by adjusting the frequency of LCK.

[0014] Optionally, in the aforementioned semiconductor device reliability screening method, the standard voltage and standard clock frequency output by the low dropout linear regulator are the voltage and frequency used during normal operation when the semiconductor device is a qualified product.

[0015] Optionally, in the reliability screening method for the semiconductor device, the standard output voltage of the low dropout linear regulator is 1.3V to 1.6V.

[0016] Optionally, in the aforementioned semiconductor device reliability screening method, the voltage is reduced by 0.1V to 0.2V based on the standard voltage output of the low-dropout linear regulator.

[0017] Optionally, in the aforementioned semiconductor device reliability screening method, the voltage output of the low-dropout linear regulator is increased by 0.1V to 0.2V.

[0018] Optionally, in the aforementioned semiconductor device reliability screening method, the method for screening out non-conforming semiconductor devices includes:

[0019] Filter out semiconductor devices whose read values ​​and write values ​​are different.

[0020] Optionally, in the aforementioned semiconductor device reliability screening method, the method for testing the reliability parameters of the semiconductor device includes:

[0021] Perform write and read operations on the semiconductor device;

[0022] If the value read is different from the value written, the reliability is not up to standard.

[0023] The semiconductor device reliability screening method provided by this invention includes: providing semiconductor devices to be screened, including semiconductor devices with weak erase and weak write operations in Flash memory selected during the wafer stage; reducing the output voltage of the low-dropout linear regulator (LDL-LED) based on the standard output voltage, reducing the clock frequency based on the standard clock frequency, and sequentially performing erase, write, and read operations on the weakly erased semiconductor devices to screen out non-compliant semiconductor devices; increasing the output voltage of the LDL-LED based on the standard output voltage, reducing the clock frequency based on the standard clock frequency, and sequentially performing erase, write, and read operations on the weakly write semiconductor devices to screen out non-compliant semiconductor devices; and testing the reliability parameters of the compliant semiconductor devices screened in steps S2 and S3 after multiple baking cycles. Although this invention fixes the adjustment parameter range, it can also determine the reliability of weakly erased or weakly written semiconductor devices by using the output voltage and clock frequency of the low dropout linear regulator. This effectively filters out non-compliant semiconductor devices among the weakly erased or weakly written semiconductor devices, as well as semiconductor devices with substandard reliability. Attached Figure Description

[0024] Figure 1 This is a flowchart of a semiconductor device reliability screening method according to an embodiment of the present invention. Detailed Implementation

[0025] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0026] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.

[0027] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.

[0028] In the wafer fabrication stage, weak erase and weak write semiconductor devices are selected. Before reaching the finished product stage, the erase and write capabilities of the flash memory can be tested by adjusting the parameter settings, primarily changing the write voltage. In the finished product stage, the parameter settings cannot be changed, so the functionality can be altered by varying the low-dropout linear regulator (LDO) and clock frequency. A typical chip includes flash memory, parameter settings, a high-voltage module, a low-dropout linear regulator (LDO) module, and a clock.

[0029] Please refer to Figure 1 This invention provides a reliability screening method for semiconductor devices, comprising:

[0030] S1: Provide semiconductor devices to be screened, including semiconductor devices with weak erase and weak write capabilities that were screened out during the wafer stage;

[0031] S2: Based on the standard voltage output of the low dropout linear regulator, reduce the output voltage of the low dropout linear regulator. Based on the standard clock frequency, reduce the clock frequency. Perform erase, write and read operations on the weakly erased semiconductor devices in sequence to screen out semiconductor devices that do not meet the specifications.

[0032] S3: Based on the standard voltage output of the low dropout linear regulator, increase the output voltage of the low dropout linear regulator, reduce the clock frequency based on the standard clock frequency, and perform erase, write and read operations sequentially on the weak write semiconductor devices to screen out semiconductor devices that do not meet the specifications.

[0033] S4: After baking the semiconductor devices that meet the specifications selected in steps S2 and S3 multiple times, test the reliability parameters of the semiconductor devices.

[0034] In this embodiment of the invention, the adjustment parameters of the semiconductor device are fixed. The erase or write voltage is adjusted by regulating the voltage of the low dropout linear regulator (LDO), including adjusting the time (TBP) for writing one byte. The erase or write time (TSE) is adjusted by regulating the clock frequency (CLK), including the time (TSE) for erasing one sector.

[0035] In this embodiment of the invention, the standard voltage and standard clock frequency output by the low-dropout linear regulator (LDO) are the voltage and frequency used during normal operation when the semiconductor device is of good quality. The standard output voltage of the LDO is 1.3V to 1.6V, for example, 1.5V. At this time, the time to write a byte (TBP) is adjusted to 1.8ms, and the time to erase a sector (TSE) is 6.5μs. Based on the standard output voltage of the LDO, the voltage is reduced by 0.1V to 0.2V, for example, to 1.35V. At this time, the time to write a byte (TBP) is adjusted to 1.62ms, and the time to erase a sector (TSE) is 5μs. Based on the standard output voltage of the LDO, the voltage is increased by 0.1V to 0.2V, for example, to 1.65V. At this time, the time to write a byte (TBP) is adjusted to 7.1ms, and the time to erase a sector (TSE) is 3μs.

[0036] In this embodiment of the invention, the method for screening out non-compliant semiconductor devices includes: screening out semiconductor devices whose read values ​​and write values ​​are different. For example, the written value is 00 and the read value is 11, or the written value is 11 and the read value is 00. Both of these cases indicate that the read value and the written value are different, so these semiconductor devices do not meet the specifications. If the written value and the read value are the same, for example, the written value is 00 and the read value is 00, or the written value is 11 and the read value is 11, then this type of semiconductor device meets the specifications.

[0037] In this embodiment of the invention, the method for testing the reliability parameters of a semiconductor device includes: performing write and read operations on a semiconductor device that meets specifications for both reading and writing; if the read value and the write value are different, the reliability fails to meet the standard. For example, if the written value is 00 and the read value is 11, or if the written value is 11 and the read value is 00, the reliability fails to meet the standard. If the written value and the read value are the same, for example, if the written value is 00 and the read value is 00, or if the written value is 11 and the read value is 11, the reliability meets the standard.

[0038] In summary, the semiconductor device reliability screening method provided in this embodiment of the invention includes: providing semiconductor devices to be screened, including semiconductor devices with weak erase and weak write operations in Flash memory selected during the wafer stage; reducing the output voltage of the low-dropout linear regulator (LDL-LED) based on the standard output voltage, reducing the clock frequency based on the standard clock frequency, and sequentially performing erase, write, and read operations on the weakly erased semiconductor devices to screen out non-compliant semiconductor devices; increasing the output voltage of the LDL-LED based on the standard output voltage, reducing the clock frequency based on the standard clock frequency, and sequentially performing erase, write, and read operations on the weakly write semiconductor devices to screen out non-compliant semiconductor devices; and testing the reliability parameters of the compliant semiconductor devices screened in steps S2 and S3 after multiple baking cycles. Although this invention fixes the adjustment parameter range, it can also determine the reliability of weakly erased or weakly written semiconductor devices by using the output voltage and clock frequency of the low dropout linear regulator. This effectively filters out non-compliant semiconductor devices among the weakly erased or weakly written semiconductor devices, as well as semiconductor devices with substandard reliability.

[0039] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the scope of protection of the present invention.

Claims

1. A reliability screening method for semiconductor devices, characterized in that, include: S1: Provide semiconductor devices to be screened, including semiconductor devices with weak erase and weak write capabilities that were screened out during the wafer stage; S2: Based on the standard voltage output of the low dropout linear regulator, reduce the output voltage of the low dropout linear regulator. Based on the standard clock frequency, reduce the clock frequency. Perform erase, write and read operations on the weakly erased semiconductor devices in sequence to screen out semiconductor devices that do not meet the specifications. S3: Based on the standard voltage output of the low dropout linear regulator, increase the output voltage of the low dropout linear regulator, reduce the clock frequency based on the standard clock frequency, and perform erase, write and read operations sequentially on the weak write semiconductor devices to screen out semiconductor devices that do not meet the specifications. S4: After baking the semiconductor devices that meet the specifications selected in steps S2 and S3 multiple times, test the reliability parameters of the semiconductor devices.

2. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The adjustment parameters of the semiconductor device are fixed.

3. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The erase or write voltage is adjusted by regulating the voltage of the low-dropout linear regulator.

4. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The erase or write time can be adjusted by regulating the frequency of LCK.

5. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The standard voltage and standard clock frequency output by the low dropout linear regulator are the voltage and frequency used during normal operation when the semiconductor device is a qualified product.

6. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The standard output voltage of a low dropout linear regulator is 1.3V to 1.6V.

7. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, The voltage is reduced by 0.1V to 0.2V from the standard output voltage of the low dropout linear regulator.

8. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, Increase the voltage by 0.1V to 0.2V based on the standard output voltage of the low dropout linear regulator.

9. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, Methods for screening out non-compliant semiconductor devices include: Filter out semiconductor devices whose read values ​​and write values ​​are different.

10. The reliability screening method for semiconductor devices as described in claim 1, characterized in that, Methods for testing the reliability parameters of semiconductor devices include: Perform write and read operations on the semiconductor device; If the value read is different from the value written, the reliability is not up to standard.

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