Event-driven sparse attention optimization method and system based on brain-like computing chip
By using an event-driven sparse attention optimization method based on neuromorphic computing chips, the problems of high computational complexity and low resource utilization of traditional self-attention mechanisms in intelligent question answering systems are solved, achieving efficient sparse attention computation and improving the accuracy and efficiency of query results.
Patent Information
- Application Number
- CN202511790136.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-01
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2045-12-01
AI Technical Summary
Traditional self-attention mechanisms have high computational complexity and low resource utilization in intelligent question answering systems, especially when dealing with long texts and multi-turn dialogues, where there is redundant overhead. Existing methods are insufficient in terms of dynamic adaptability and long dependency modeling capabilities.
An event-driven sparse attention optimization method based on neuromorphic computing chips generates event sequences and importance evaluation matrices through semantic analysis, dynamically adjusts sparsity by combining input complexity and chip load, generates a sparse attention mask, and utilizes neuromorphic computing chips to perform parallel computations and fuse the results.
It improves the accuracy and efficiency of query results, achieves synergistic optimization of accuracy, efficiency and energy consumption, and enhances the high-precision semantic matching and contextual understanding depth of multi-turn dialogues and document content.
Smart Images

Figure CN121349702B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, and in particular to an event-driven sparse attention optimization method and system based on a neuromorphic computing chip. Background Technology
[0002] In intelligent question-answering systems, traditional self-attention mechanisms face challenges of high computational complexity and low resource utilization when processing long texts and multi-turn dialogues. Furthermore, dense matrix operations still require full computation even when the input exhibits sparse features, resulting in significant redundant overhead. While existing linear attention, hierarchical structures, and graph neural network sparse methods have shown improvements, they still fall short in terms of dynamic adaptability, long dependency modeling capabilities, and computational efficiency.
[0003] To address these issues, an event-driven sparse attention optimization method and system based on neuromorphic computing chips has emerged. This application performs semantic analysis and event extraction on the input query and related documents, constructs an event sequence, calculates an importance evaluation matrix, dynamically adjusts sparsity based on input complexity and chip load, generates a sparse attention mask, and performs parallel computation on the neuromorphic computing chip, fusing the results for output, thereby improving the accuracy and efficiency of query results. Summary of the Invention
[0004] To address the aforementioned technical issues, this application provides an event-driven sparse attention optimization method and system based on a neuromorphic computing chip.
[0005] A first aspect of this application provides an event-driven sparse attention optimization method based on a neuromorphic computing chip, comprising:
[0006] Semantic analysis and feature extraction are performed on the input data to generate an input event sequence. The type of input data includes initial query information or current round query information in a multi-round query.
[0007] Semantic analysis and feature extraction are performed on the text information to generate a text event sequence. The text information includes the content of the multi-round query and the document content related to the query information in the document library.
[0008] Calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix;
[0009] Based on the complexity of the input data and the load of the computing nodes of the neuromorphic computing chip, the sparsity parameters are calculated and the sparsity parameters are enhanced to obtain the target sparsity parameters.
[0010] Based on the target sparsity parameters and the event importance evaluation matrix, a target sparse attention mask matrix is generated;
[0011] The sparse attention computation task based on the target sparse attention mask matrix is assigned to the computing nodes of the neuromorphic computing chip for execution, and the output results of the computing nodes are obtained.
[0012] The output results of the computing nodes are fused to generate the target output result.
[0013] A second aspect of this application provides an event-driven sparse attention optimization system based on a neuromorphic computing chip, comprising:
[0014] The data processing execution module is used to perform semantic analysis and feature extraction on the input data and generate an input event sequence. The types of the input data include initial query information or current round query information in a multi-round query.
[0015] Semantic analysis and feature extraction are performed on the text information to generate a text event sequence. The text information includes the content of the multi-round query and the document content related to the query information in the document library.
[0016] An importance matrix generation module is used to calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix;
[0017] The sparsity parameter adjustment module is used to calculate the sparsity parameter based on the complexity of the input data and the load of the computing node of the neuromorphic computing chip, and to enhance the sparsity parameter to obtain the target sparsity parameter.
[0018] A mask matrix construction module is used to generate a target sparse attention mask matrix based on the target sparsity parameters and the event importance evaluation matrix;
[0019] The node result calculation module is used to assign the sparse attention calculation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, and to obtain the output results of the computing nodes.
[0020] The query result generation module merges the output results of the computing nodes to generate the target output result.
[0021] A third aspect of this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the steps of the above-described event-driven sparse attention optimization method based on a neuromorphic computing chip.
[0022] In a fourth aspect of this application, a computer-readable storage medium is provided, the computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described event-driven sparse attention optimization system based on a neuromorphic computing chip.
[0023] The beneficial effects of the event-driven sparse attention optimization method and system based on a neuromorphic computing chip provided in this application are as follows: Firstly, this application achieves high-precision semantic matching of multi-turn dialogues and document content through event sequences generated by semantic analysis and feature extraction, along with importance assessment, thereby improving the accuracy of query responses and the depth of contextual understanding. Secondly, based on the adaptive sparsity enhancement mechanism of the neuromorphic computing chip's computing node load, it dynamically optimizes the allocation of attention computing resources, reducing computational and storage overhead while ensuring the ability to capture key information. Furthermore, by allocating sparse attention computing tasks to the neuromorphic computing chip, its high parallelism and low power consumption characteristics are fully utilized, further improving the overall energy efficiency ratio and response speed. This application achieves synergistic optimization of accuracy, efficiency, and energy consumption, improving the accuracy and efficiency of query results. Attached Figure Description
[0024] Figure 1 A flowchart illustrating an event-driven sparse attention optimization method based on a neuromorphic computing chip provided in an embodiment of this application;
[0025] Figure 2 A structural block diagram of an event-driven sparse attention optimization system based on a neuromorphic computing chip provided in an embodiment of this application;
[0026] Figure 3 This is a schematic block diagram of an electronic device provided in an embodiment of this application. Detailed Implementation
[0027] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0028] To make the purpose, technical solution, and advantages of this application clearer, the following will be described in conjunction with the appendix. Figure 1-3 The following is an explanation using specific examples.
[0029] Please refer to Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of an event-driven sparse attention optimization method based on a neuromorphic computing chip provided in this application. The method includes:
[0030] S101: Perform semantic analysis and feature extraction on the input data to generate an input event sequence. The types of input data include initial query information or current round query information in multiple rounds of queries.
[0031] Semantic analysis and feature extraction are performed on text information to generate a text event sequence. The text information includes the content of multiple rounds of queries and the content of documents related to the query information in the document library.
[0032] In this embodiment, firstly, a deep semantic analysis method based on a Transformer encoder is used to perform deep semantic encoding on the input query and document text, extracting feature vectors that include semantic, syntactic, and contextual information. Furthermore, the document content is segmented according to a hierarchical structure, including chapters and paragraphs, and a semantic vector representation is generated for each segment, forming a structured text event sequence. For the first query, keywords, entities, and intent tags are extracted from the query information; for the current round of multiple queries, correlation analysis is performed based on the historical dialogue context to generate an event sequence with temporal and topical coherence.
[0033] S102: Calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix;
[0034] In this embodiment, a method combining cosine similarity and semantic distance weighting is used to calculate the basic relevance score between each element in the input event sequence and each element in the text event sequence. Subsequently, adjustments are made based on the query type. For the first query, weighting is applied based on the structural importance weights of each element in the document structure graph; for the current round of a multi-round query, a time decay factor is used to adjust the basic relevance score to obtain semantic relevance. An event importance evaluation matrix is then generated based on the semantic relevance.
[0035] In this embodiment, the importance assessment function is used to calculate and ultimately generate the event importance assessment matrix; wherein, the importance assessment function is:
[0036] E(i,j,t)=α·S(qi,kj)+β·C(i,j)+γ·T(t)
[0037] Among them, the function E(i,j,t) quantifies the attentional connection importance of any two input positions i and j at time t. S(qi,kj) represents the semantic similarity between the query vector qi and the key vector kj. C(qi,kj) represents the contextual association strength between positions qi and kj. T(t) represents the time decay factor. α, β, and γ are learnable weight parameters. C(i,j) represents the correlation between qi and kj in the historical dialogue process, which is the distance between tokens in various historical dialogues for related questions and answers. If qi appears in a dialogue but kj does not, a large distance constant is used. This is a learning of historical dialogue experience. qi represents the embedding obtained by transforming all tokens of the query question (containing the i-th token), kj represents the kj-th segment of the embedding obtained by segmenting all tokens in all document material parts (containing the j-th token), and T(t) is a constant or a function that changes with time in multiple rounds of dialogue.
[0038] S103: Based on the complexity of the input data and the load of the computing nodes of the neuromorphic computing chip, calculate the sparsity parameters and enhance the sparsity parameters to obtain the target sparsity parameters.
[0039] In this embodiment, the complexity of the input data is calculated comprehensively from three dimensions: semantic hierarchy depth, syntactic structure complexity, and information content. Simultaneously, the load status of each computing node in the neuromorphic chip is acquired in real time. The sparsity parameter is jointly determined by the complexity and load status. Furthermore, different reinforcement step sizes are adopted according to the current dialogue round: in the early stage of the dialogue (i.e., when the current dialogue round number is less than threshold 1), a larger step size is used for rapid adjustment; in the middle stage of the dialogue (i.e., when the current dialogue round number is greater than or equal to threshold 1 and less than or equal to threshold 2), a medium step size is used for robust adjustment; in the later stage of the dialogue (i.e., when the current dialogue round number is greater than threshold 2), fine-tuning is performed based on complexity, ultimately obtaining the reinforced target sparsity parameter.
[0040] S104: Generate a target sparse attention mask matrix based on the target sparsity parameters and the event importance evaluation matrix;
[0041] In this embodiment, the retention ratio of attention connections to be retained is determined based on the target sparsity parameter. The element values in the event importance evaluation matrix are sorted from high to low or from low to high. An event importance judgment threshold is calculated based on the retention ratio, and connections with importance scores greater than the event importance judgment threshold are selected to form a set of valid connections. Subsequently, a mask matrix with the same dimension as the attention matrix is constructed, marking the positions corresponding to valid connections as 1 and the remaining positions as 0, thereby generating a target sparse attention mask matrix used to control the calculation range, where 1 represents a valid connection and 0 represents an invalid connection.
[0042] S105: Assign the sparse attention computation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, and obtain the output results of the computing nodes;
[0043] In this embodiment, after determining the effective attention connections to be computed and their corresponding computational workloads based on the target sparse attention mask matrix, the real-time load status and computing power of each computing node are obtained. An event-driven scheduling strategy is adopted; for example, 80% of the computing resources are allocated to high-priority events. Simultaneously, a dual-threshold filtering mechanism is used to select the target node set. If there are insufficient available nodes, a time-slicing multiplexing mechanism is used to allow a single node to process multiple tasks in a time-sharing manner, ensuring efficient and balanced allocation and execution of computational tasks. After each node completes its computation, it outputs its respective attention computation result.
[0044] S106: Merge the output results of the computing nodes to generate the target output result.
[0045] In this embodiment, a weighted average fusion mechanism is employed. The outputs of multiple nodes are weighted and fused based on the importance scores of the events processed by each computing node and the confidence levels of their calculation results. For multi-turn dialogue scenarios, contextual information from different turns also needs to be weighted and integrated based on a time decay factor. Finally, a structured output result is generated, including answer content, confidence scores, and relevant document references. The dialogue state tracker is updated based on the calculation results of the current turn, generating answers to user questions and predicting subsequent user questions to prepare for the next round of dialogue.
[0046] As can be seen from the above, this application achieves high-precision semantic matching of multi-turn dialogues and document content, significantly improving the accuracy of query responses and enhancing the depth of understanding of contextual semantics, thereby effectively improving the overall query accuracy. Simultaneously, based on the adaptive sparsity control mechanism of the input data complexity and the computing node load of the neuromorphic computing chip, the allocation of attention computing resources can be dynamically optimized, improving query processing efficiency. This application ultimately achieves a three-way synergistic optimization of accuracy, efficiency, and energy consumption, resulting in significant improvements in both accuracy and response speed of query results.
[0047] In one embodiment of this application, calculating the semantic relevance between an input event sequence and a text event sequence to generate an event importance evaluation matrix includes:
[0048] Calculate the basic correlation score between each element in the input event sequence and each element in the text event sequence;
[0049] Based on the type of input data, the corresponding calculation strategy is used to correct the basic relevance score and obtain the semantic relevance.
[0050] Construct an event importance assessment matrix based on semantic relevance.
[0051] In this embodiment, the basic relevance score between each pair of elements in the input event sequence and the text event sequence is calculated using cosine similarity or dot product methods. Differential adjustments are made based on the input data type. Specifically, for the first query, based on the user query and document content, the system calculates the basic relevance score between each word in the query and each text paragraph in the document, using a combination of cosine similarity and semantic distance to generate an importance matrix.
[0052] R[i,j]=cosine(query_token_i,doc_segment_j)×semantic_distance_weight.
[0053] E[i,j]=αR[i,j]+βC[i,j]+γ
[0054] Where R[i,j] is the semantic relevance matrix between the i-th word in the query and the j-th paragraph in the document.
[0055] `query_token_i` refers to the i-th keyword in the preprocessed user query, `doc_segment_j` refers to the j-th paragraph in the document after eventification, `cosine(query_token_i, doc_segment_j)` is the cosine similarity between their semantic vectors, and `semantic_distance_weight` is the coefficient for correcting the cosine similarity; `E[i,j]` is the importance evaluation matrix for query word-document paragraph event pairs. For the current round of multi-round queries, a context manager is created independently for each user session, the dialogue state tracker is initialized, and basic event importance weight parameters are set, including a time decay factor λ=0.95, a topic relevance weight μ=0.8, and a user intent continuity weight ν=0.7. The time decay factor and topic coherence coefficient are then used for correction.
[0056] The exponential decay model is as follows:
[0057] γ·T(t) = γ·λ^i × topic_relevance[ti,t] × intent_continuity[ti,t]. Here, i represents the i-th round the token comes from; t represents the current round, and t-1 represents the previous round; Topic_relevance represents the semantic relevance between the previous and current rounds, and intent_continuity represents topic coherence. These two functions are either trained neural networks or traditional functions, taking the text from round ti and the text from the current round t as input, and outputting a score used to evaluate these two metrics based on the text information; λ^i represents the exponential decay of the contribution of information from more distant historical rounds to the current round. The training method for the neural network is not limited here. For example, the TF-IDF algorithm can be used to compare word frequency repetition rates to obtain Topicrelevance, and intent_continuity can be determined by whether keywords (e.g., product names, personal names) are consistent. Finally, all semantic relevance scores are organized into an m×n-dimensional importance evaluation matrix according to the original sequence position, where m and n are the lengths of the input sequence and the text sequence, respectively.
[0058] In summary, this embodiment improves the accuracy and scenario adaptability of semantic relevance by selecting and correcting strategies based on query type, laying a reliable foundation for generating high-precision sparse attention masks and making attention allocation more in line with actual semantic importance.
[0059] In one embodiment of this application, the type of input data includes: current round query information including initial query information or multiple round queries;
[0060] The computational strategies include context-dependent computational strategies and time decay computational strategies;
[0061] Based on the type of input data, the corresponding calculation strategy is selected to correct the basic relevance score, resulting in semantic relevance, including:
[0062] When the input data is the information from the first query, a contextual association calculation strategy is used to correct the basic relevance score to obtain the semantic relevance.
[0063] When the input data is the query information of the current round of a multi-round query, a time decay calculation strategy is used to correct the basic relevance score to obtain the semantic relevance.
[0064] The context-related computation strategy includes:
[0065] Based on a pre-defined document hierarchy structure diagram, the structural importance weight of each element in the text event sequence is determined.
[0066] The semantic relevance is obtained by multiplying the basic relevance score by the structural importance weight of the corresponding text event element;
[0067] Time decay calculation strategies include:
[0068] The dialog round offset is calculated based on the sequence number of the current round of query information in a multi-round query.
[0069] The time decay factor is calculated using an exponential decay model based on the dialogue turn offset.
[0070] The topic coherence of the input data is evaluated to obtain the topic coherence result, and the contextual relevance is calculated based on the topic coherence result.
[0071] The semantic relevance is obtained by substituting the basic relevance score, time decay factor, and contextual relevance into the event importance evaluation function for comprehensive calculation.
[0072] In this embodiment, when the input data is the initial query information, a contextual association calculation strategy is adopted. The specific process includes: based on the hierarchical structure diagram of the document library, clarifying the position and hierarchical relationship of each element in the text event sequence within the overall structure, such as core topic elements, branch argument elements, supporting argument elements, etc., and assigning corresponding structural importance weights according to their level and influence on the overall semantics, where elements with higher levels and greater influence have higher weight values. Next, the basic relevance score is multiplied by the corresponding weight to obtain the semantic relevance. When the input is the current round query information from a multi-round query, a time decay calculation strategy is adopted. The specific process includes: calculating the dialogue round offset based on the current round query number, i.e., the difference between the current round and the first round, and using an exponential decay model to calculate the time decay factor, making the score of earlier events decay more significantly. Simultaneously, the topic coherence of the input data is evaluated, i.e., the relevance between the current query and historical events is calculated through semantic similarity to obtain the topic coherence result, which is then used to deduce the contextual association degree. Finally, a comprehensive calculation is performed using the event importance assessment function: substituting the basic relevance score, time decay factor, and contextual relevance into the function, semantic relevance = basic score × time decay factor × contextual relevance, thus obtaining semantic relevance.
[0073] In this embodiment, the document structure weight is used to prioritize core content for the first query, thereby improving the accuracy and authority of the first round of answers. For multiple queries, the weight of historical information is dynamically adjusted by integrating time decay factors and topic coherence, effectively capturing the latest intents and ongoing topics, enhancing the coherence of the dialogue and the depth of contextual understanding, and avoiding attention being distracted by redundant information.
[0074] In one embodiment of this application, based on the complexity of the input data and the load of the neuromorphic computing chip's computing nodes, sparsity parameters are calculated, and the sparsity parameters are enhanced to obtain target sparsity parameters, including:
[0075] The complexity of the input data is calculated based on the semantic depth, syntactic structure complexity, and information content of the input data.
[0076] Obtain the load status of the computing nodes of the neuromorphic computing chip;
[0077] Based on the complexity and load status, the sparsity parameters are calculated, and the target sparsity parameters are obtained through sparsity adjustment strategies.
[0078] In this embodiment, the complexity of the input data is obtained by weighted summation based on the semantic depth, syntactic structure complexity, and information content of the input data. The formula is as follows:
[0079] Q_complexity = log(number of words) + semantic level depth + syntactic structure complexity.
[0080] The semantic depth can be quantified by extracting the number of layers or abstraction levels of the text using a natural language processing model; the syntactic complexity can be measured by the depth, branching factor, or number of nodes of the parse tree; and the information content, specifically the vocabulary size, is obtained by counting the total number of words included in the segmentation results after the query data has been segmented.
[0081] This embodiment collects data in real time through the chip's hardware monitoring interface, including metrics such as the current computing node's memory usage, processor utilization, task queue length, and energy consumption level. This data is aggregated into a load index, and the load status is determined based on the load index.
[0082] Secondly, based on the calculated complexity and load conditions, the sparsity parameter is calculated, specifically:
[0083] sparsity_ratio=f(query_complexity,doc_length,system_load)
[0084] Where query_complexity is the complexity of the input data, doc_length is the relevant documents in the preset document library, and system_load is the load of the computing node of the neuromorphic computing chip.
[0085] This embodiment uses a sparsity adjustment strategy based on different adjustment step sizes to obtain the target sparsity parameters when the current dialogue turn number is in different dialogue stages.
[0086] In summary, this embodiment adaptively adjusts sparsity based on data complexity to avoid resource waste or shortage, while preventing node overload based on real-time load status, thereby ensuring the stability and computational efficiency of the neuromorphic chip under high parallel operation and achieving synergistic optimization of performance and energy efficiency.
[0087] In one embodiment of this application, the sparsity adjustment strategy includes:
[0088] A dialogue round threshold is set based on the current dialogue round number. The dialogue round threshold includes a first threshold and a second threshold, wherein the first threshold is less than the second threshold.
[0089] When the current dialogue round number is less than the first threshold, it is determined to be the initial stage of the dialogue. The first step is to adjust the sparsity parameter to obtain the target sparsity parameter.
[0090] When the current dialogue round number is greater than the first threshold and less than the second threshold, it is determined to be in the middle stage of the dialogue. The sparsity parameter is adjusted by the second step size, and the target sparsity parameter is used.
[0091] When the current dialogue turn number is greater than the second threshold, it is determined to be in the later stage of the dialogue, and adjustments are made according to the complexity of the input data.
[0092] In this embodiment, based on the most recent 10 rounds of dialogue records maintained by the dialogue context management module, a first threshold and a second threshold are set for the current dialogue round. For example, the first threshold is set to 3 and the second threshold to 7, with the first threshold being less than the second threshold. By comparing the current dialogue round number with these two thresholds, the stage in which the current dialogue round number is located is determined. The stage includes three phases: the initial stage, the middle stage, and the later stage. When the round number is less than the first threshold, it is determined to be the initial stage of the dialogue; when the round number is greater than the first threshold but less than the second threshold, it is determined to be the middle stage; and when the round number is greater than or equal to the second threshold, it is determined to be the later stage. This determines the stage range for subsequent sparsity parameter adjustments.
[0093] In the initial stage of the dialogue, since there is less dialogue information at this time and it is necessary to capture basic connections more comprehensively, a first step size is adopted, such as adjusting the step size by 0.05 each time, to adjust the sparsity parameter to a lower range of 0.2-0.3. When entering the middle stage of the dialogue, as dialogue information increases and core connections can be focused, a second step size is adopted to adjust the sparsity parameter, such as adjusting the step size by 0.1 each time, to gradually increase the sparsity parameter to a range of 0.4-0.6, so as to ensure that the sparsity is adapted to the dialogue requirements through reasonable step sizes at different stages.
[0094] As the dialogue progresses into its later stages, the system leverages dynamically updated contextual information via a sliding window mechanism to extract key features of the current user's question. Based on user sentiment analysis results from the event importance assessment module, the system comprehensively judges the question's complexity. For example, questions involving multiple rounds of contextual association and complex semantic logic are classified as high complexity, while questions requiring only simple information feedback are classified as low complexity. If the question complexity is high, the sparsity parameter is appropriately reduced (e.g., adjusted to 0.3-0.5) to ensure computational accuracy; if the question complexity is low, the sparsity parameter is maintained or increased (e.g., adjusted to 0.5-0.7) to improve computational efficiency, thus achieving dynamic sparsity optimization based on question complexity.
[0095] In the above embodiment, a large step size is used for rapid convergence in the initial stage of the dialogue to prioritize response speed; in the middle stage of the dialogue, a robust adjustment is made to balance accuracy and efficiency; and in the later stage of the dialogue, personalized adjustments are made according to the complexity of the questions to deal with complex questions and answers, thereby improving the intelligence of the interaction process and the efficiency of resource utilization.
[0096] In one embodiment of this application, a target sparse attention mask matrix is generated based on the target sparsity parameter and the event importance evaluation matrix;
[0097] The values of each element in the event importance assessment matrix are compared with the event importance judgment threshold. The element values in the event importance assessment matrix that are greater than the event importance judgment threshold are selected as the valid connection set.
[0098] The positions in the effective connection set are marked as effective attention positions in the mask matrix, and the remaining positions are marked as invalid attention positions, thus obtaining the marking result;
[0099] Based on the labeling results, a target sparse attention mask matrix is generated;
[0100] The target sparse attention mask matrix is used to mask the calculation of invalid attention positions during the computation of neuromorphic computing chips, and only perform sparse attention calculation on the valid attention positions.
[0101] In this embodiment, the target retention ratio is obtained based on the target sparsity parameter; the event importance determination threshold is determined based on the ranking of the element values in the event importance evaluation matrix and the target retention ratio. Based on the event importance determination threshold, each element value in the event importance evaluation matrix is compared with the event importance determination threshold, and all element values greater than the event importance determination threshold are selected as the valid join set. For example, assuming the event importance evaluation matrix is a 5x5 matrix and the threshold is set to 0.6, then all elements in the matrix greater than 0.6 will be selected, and their coordinates will be recorded as the valid join set.
[0102] In this embodiment, based on the position information in the set of valid connections, an all-zero mask matrix of the same size as the event importance evaluation matrix is initialized, and the corresponding positions of the valid connections in the set are marked as 1, while the remaining positions are kept as 0, thus obtaining the marking result.
[0103] In this embodiment, a corresponding target sparse attention mask matrix is generated based on the labeling results, where 1 represents a valid position and 0 represents an invalid position. During execution by the neuromorphic computing chip, this mask matrix is loaded into the attention computation unit, and sparse computation is performed only on positions where the mask is 1. For example, operations on all positions with a mask of 0 are skipped, reducing computational load and energy consumption, and improving processing efficiency. Finally, the mask matrix can be stored in a hardware-readable format for real-time control of the computation process.
[0104] In summary, this embodiment accurately selects key attention connections, directly shields invalid computation locations at the hardware level, significantly reduces the number of computational operations in the neuromorphic chip, lowers computational latency and power consumption, significantly improves the execution efficiency of attention, and ensures the efficient capture of core semantic information.
[0105] In one embodiment of this application, each element value in the event importance assessment matrix is compared with a preset event importance judgment threshold, and the element values in the event importance assessment matrix that are greater than the event importance judgment threshold are selected as the valid connection set, including:
[0106] Determine the target retention ratio based on the target sparsity parameter;
[0107] The elements in the event importance assessment matrix are sorted to obtain the ranking results;
[0108] Calculate the number of elements to be retained based on the target retention ratio and the total number of elements in the event importance assessment matrix;
[0109] Based on the sorting results and the number of elements retained, determine the threshold for determining the importance of the event;
[0110] Compare all element values in the matrix with the event importance threshold, and select connections whose element values are greater than or equal to the event importance threshold to form a valid set of connections.
[0111] In this embodiment, the target retention ratio is determined based on the target sparsity parameter. Specifically, if the target sparsity parameter is presented in decimal form, the target retention ratio can be obtained by subtracting the sparsity parameter from 1. For example, if the target sparsity parameter is 0.8, the target retention ratio is 1-0.8=0.2, or 20%. If the parameter is presented in percentage form, it needs to be converted to a decimal first, and then calculated using the same formula to finally obtain a retention ratio index that can be directly used for subsequent element screening. The essence of this process is to transform the sparsity requirement of eliminating redundancy into a proportional standard for retaining key elements, ensuring that the sparsity target and the retention range are accurately correlated.
[0112] For example, if the target retention ratio is 0.2, all element values in the event importance assessment matrix are sorted to obtain an ordered sequence from largest to smallest or smallest to largest. For instance, a 4x4 matrix with 16 elements has the values [0.3, 0.8, 0.1, 0.6, 0.9, 0.4, 0.2, 0.7, 0.5, 0.0, 0.3, 0.8, 0.2, 0.6, 0.1, 0.9]. Sorting these values in descending order yields the sequence: [0.9, 0.9, 0.8, 0.8, 0.7, 0.6, 0.6, 0.5, 0.4, 0.3, 0.3, 0.2, 0.2, 0.1, 0.1, 0.0]. Finally, based on the target retention ratio of 0.2 and the total number of matrix elements (16), the number of elements to be retained is calculated: Number of elements retained = Total number of elements × Target retention ratio = 16 × 0.2 = 3.2. Since the quantity must be an integer, rounding or rounding up is used. Therefore, the 3 or 4 most important elements need to be retained.
[0113] Based on the sorting result and the number of elements retained, a threshold for determining event importance is determined. Since the sorting sequence is descending, the value of the 3rd element is 0.8 (sorting sequence: 0th element 0.9, 1st element 0.9, 2nd element 0.8). Therefore, the threshold is set to 0.8, meaning all elements with a value greater than or equal to 0.8 will be retained.
[0114] Finally, each element in the matrix is compared with the threshold of 0.8, and connections with values greater than or equal to 0.8 are selected to form a set of valid connections.
[0115] In summary, this embodiment achieves precise control over the degree of sparsity. By adaptively setting thresholds through sorting and quantity calculation, it ensures that the number of retained connections strictly conforms to the global sparsity budget, thereby precisely matching the computational load with the chip's processing capabilities and improving the flexibility and reliability of the sparsity strategy.
[0116] In one embodiment of this application, a sparse attention computation task based on a target sparse attention mask matrix is assigned to a computing node of a neuromorphic computing chip to perform the computation task, and the output result of the computing node is obtained, including:
[0117] The computational task of determining effective attention connections based on the target sparse attention mask matrix;
[0118] Obtain the load status and computing power of each computing node in the neuromorphic computing chip;
[0119] Based on the event-driven scheduling strategy, computing tasks are assigned to computing nodes that correspond to the load status.
[0120] In this embodiment, effective attention connections are selected based on the generated target sparse attention mask matrix to form a list of computational tasks to be executed, which are then categorized according to event priority. Next, the node monitoring module of the neuromorphic chip collects indicators such as the current load rate, available memory bandwidth, and computing power of each computing node. During the parallel computing execution phase, the question-answering system employs an innovative event-driven computation scheduling algorithm, which dynamically allocates computing resources based on the priority of different types of events. High-priority events are key information directly answering user questions, medium-priority events are relevant information providing contextual support, and low-priority events are background information, allocated 80%, 15%, and 5% of computing resources respectively to obtain the output results of the computing nodes. Each node has a dedicated processing function for dialogue content within a specific time window. The computational results of each node are fused through a time-weighted mechanism to obtain the target output result.
[0121] In summary, this embodiment achieves load balancing of computing resources for neuromorphic chips. By dynamically allocating tasks to selected nodes, it breaks through computing bottlenecks, fully taps the chip's parallel potential, shortens task processing latency, and improves the overall throughput and computing efficiency of the question-answering system.
[0122] In one embodiment of this application, before assigning the sparse attention computation task based on the target sparse attention mask matrix to the computing node of the neuromorphic computing chip for computation task execution, the method further includes:
[0123] The maximum number of nodes that can participate in the computation is set. The maximum number of nodes is determined by a combination of factors, including the total number of effective connections in the target sparse attention mask matrix, the processing power of a single computing node, and system power consumption constraints.
[0124] During task allocation, ensure that the actual number of computing nodes participating in the computation is less than or equal to the maximum number of nodes.
[0125] When the number of callable computing nodes exceeds the maximum number of nodes, a dual threshold filtering mechanism is used to select nodes;
[0126] When the number of callable computing nodes is less than or equal to the maximum number of nodes, a time-sharing multiplexing mechanism is used to process some nodes, allowing some nodes to execute multiple computing tasks in a time-sharing manner.
[0127] The dual threshold screening mechanism includes:
[0128] Preset computing power thresholds and load thresholds, and prioritize nodes whose computing power is greater than the computing power threshold and whose load is less than the load threshold.
[0129] If the quantity requirement is met, select from the remaining nodes nodes whose computing power is greater than the computing power threshold but whose load is greater than the load threshold, or whose computing power is less than the computing power threshold but whose load is less than the load threshold.
[0130] In this embodiment, the actual number of computing nodes participating in the computation refers to the total number of neuromorphic computing chip computing nodes ultimately allocated to execute the sparse attention computation task based on the target sparse attention mask matrix. The maximum number of nodes is an upper limit on the number of nodes that can participate in the computation, determined comprehensively based on the total number of effective connections in the target sparse attention mask matrix, the processing power of a single computing node, and system power consumption constraints. The number of computing nodes that can be called upon refers to the total number of neuromorphic computing chip computing nodes in the system that are currently available for call upon and have the potential to participate in the computation.
[0131] This embodiment calculates the maximum number of nodes that can participate in the computation. The minimum number of nodes is calculated using the formula Y=C / (P×T), where C is the total number of valid connections in the statistical target sparse attention mask matrix, P is the processing power per unit time of a single computing node, and T is the maximum allowed computation time of the system. Next, the maximum allowed number of nodes is calculated using the formula X=W / w, where w is the average power consumption of a single node, W is the total power consumption threshold of the system, and the smaller value between Y and X is taken as the maximum number of nodes that can participate in the computation.
[0132] A dual threshold screening mechanism is employed for node selection. Specifically, the computing power threshold is set based on the upper limit of the hardware performance of a single node in the neuromorphic chip, taking 80%-90% of the peak capacity to ensure that the selected nodes have efficient processing capabilities. The load threshold is set based on the upper limit of the node's stable operation load, taking 60%-70% of the stable upper limit to prevent computational latency caused by excessive load. Based on the above preset computing power and load thresholds, nodes that simultaneously meet the conditions of computing power greater than the computing power threshold and load less than the load threshold are preferentially selected from all callable nodes to form the target node set.
[0133] The number of the target node set is counted. If the number does not reach the maximum number of nodes calculated, the remaining unselected nodes are further supplemented and filtered. Specifically, nodes with computing power greater than the computing power threshold but with load within a stable load range are selected, or nodes with computing power close to the threshold and meeting basic processing requirements but with load less than the load threshold are selected. This process continues until the total number of selected nodes reaches the maximum number of nodes.
[0134] During the task allocation phase, if the total number of callable nodes is greater than the maximum number of nodes, only the selected nodes will be retained for computation, and the remaining nodes will not be included in the current task scheduling. If the total number of callable nodes is less than or equal to the maximum number of nodes, the time-sharing reuse mechanism will be activated to break down all valid connection computation tasks into multiple independent task blocks, allowing existing nodes to process different task blocks in time sequence, ensuring that all valid connection computation tasks are completed within the specified time.
[0135] In summary, this embodiment achieves efficient task scheduling under strict power consumption constraints. Dual threshold priority is used to select high-performance idle nodes, ensuring computational efficiency; the time-sharing mechanism overcomes physical resource limitations through time-sharing multiplexing, enhancing resource utilization and system robustness, and ensuring reliable task completion in resource-constrained scenarios.
[0136] Corresponding to the event-driven sparse attention optimization method based on neuromorphic computing chips in the above embodiment, Figure 2 This is a block diagram of an event-driven sparse attention optimization system based on a neuromorphic computing chip, provided as an embodiment of this application. For ease of explanation, only the parts relevant to the embodiment of this application are shown. References Figure 2 The event-driven sparse attention optimization system 20 based on a neuromorphic computing chip includes: a data processing execution module 21, an importance matrix generation module 22, a sparsity parameter adjustment module 23, a mask matrix construction module 24, a node result calculation module 25, and a query result generation module 26.
[0137] The data processing execution module 21 is used to perform semantic analysis and feature extraction on the input data to generate an input event sequence. The types of input data include initial query information or current round query information in multiple rounds. It also performs semantic analysis and feature extraction on the text information to generate a text event sequence. The text information includes the content of multiple rounds of queries and document content related to the query information in the document library.
[0138] Importance matrix generation module 22 is used to calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix;
[0139] The sparsity parameter adjustment module 23 is used to calculate the sparsity parameter based on the complexity of the input data and the load of the computing node of the neuromorphic computing chip, and to enhance the sparsity parameter to obtain the target sparsity parameter.
[0140] The mask matrix construction module 24 is used to generate a target sparse attention mask matrix based on the target sparsity parameters and the event importance evaluation matrix;
[0141] The node result calculation module 25 is used to assign the sparse attention calculation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, and to obtain the output results of the computing nodes.
[0142] The query result generation module 26 is used to fuse the output results of the computing nodes to generate the target output result.
[0143] See Figure 3 , Figure 3 This is a schematic block diagram of an electronic device provided according to an embodiment of this application. Figure 3 The electronic device 300 in this embodiment may include one or more processors 301, one or more input devices 302, one or more output devices 303, and one or more memories 304. The processors 301, input devices 302, output devices 303, and memories 304 communicate with each other via a communication bus 305. The memories 304 store computer programs, including program instructions. The processors 301 execute the program instructions stored in the memories 304. Specifically, the processors 301 are configured to invoke the program instructions to perform the functions of the modules in the aforementioned device embodiments, for example... Figure 2 The functions of the data processing execution module 21, importance matrix generation module 22, sparsity parameter adjustment module 23, mask matrix construction module 24, node result calculation module 25, and query result generation module 26 are shown.
[0144] It should be understood that, in the embodiments of this application, the processor 301 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0145] Input device 302 may include a touchpad, a fingerprint sensor (for collecting the user's fingerprint information and fingerprint orientation information), a microphone, etc., and output device 303 may include a display (LCD, etc.), a speaker, etc.
[0146] The memory 304 may include read-only memory and random access memory, and provides instructions and data to the processor 301. A portion of the memory 304 may also include non-volatile random access memory. For example, the memory 304 may also store device type information.
[0147] In specific implementations, the processor 301, input device 302, and output device 303 described in the embodiments of this application can execute the implementation methods described in any embodiment of the event-driven sparse attention optimization method based on neuromorphic computing chips provided in the embodiments of this application, or they can execute the implementation methods of the electronic devices described in the embodiments of this application, which will not be repeated here.
[0148] In another embodiment of this application, a computer-readable storage medium is provided. This computer-readable storage medium stores a computer program, which includes program instructions. When executed by a processor, the program instructions implement all or part of the processes in the methods described above. Alternatively, the computer program can instruct related hardware to implement these processes. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include any entity or device capable of carrying computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.
[0149] The computer-readable storage medium can be an internal storage unit of the electronic device in any of the foregoing embodiments, such as a hard disk or memory of the electronic device. The computer-readable storage medium can also be an external storage device of the electronic device, such as a plug-in hard disk, SmartMediaCard (SMC), Secure Digital (SD) card, FlashCard, etc., equipped on the electronic device. Furthermore, the computer-readable storage medium can include both internal and external storage units of the electronic device. The computer-readable storage medium is used to store computer programs and other programs and data required by the electronic device. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.
[0150] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.
[0151] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the electronic devices and units described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0152] In the several embodiments provided in this application, it should be understood that the disclosed electronic devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces or units, or it may be an electrical, mechanical, or other form of connection.
[0153] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of this application, depending on actual needs.
[0154] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0155] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. An event-driven sparse attention optimization method based on a neuromorphic computing chip, characterized in that, include: Semantic analysis and feature extraction are performed on the input data to generate an input event sequence. The type of input data includes initial query information or current round query information in a multi-round query. Semantic analysis and feature extraction are performed on the text information to generate a text event sequence. The text information includes the content of the multi-round query and the document content related to the query information in the document library. Calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix; Based on the complexity of the input data and the load of the computing nodes of the neuromorphic computing chip, the sparsity parameters are calculated and the sparsity parameters are enhanced to obtain the target sparsity parameters. Based on the target sparsity parameters and the event importance evaluation matrix, a target sparse attention mask matrix is generated; The sparse attention computation task based on the target sparse attention mask matrix is assigned to the computing nodes of the neuromorphic computing chip for execution, and the output results of the computing nodes are obtained. The output results of the computing nodes are fused to generate the target output result.
2. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 1, characterized in that, The step of calculating the semantic relevance between the input event sequence and the text event sequence, and generating an event importance evaluation matrix, includes: Calculate the basic correlation score between each element in the input event sequence and each element in the text event sequence; Based on the type of input data, the corresponding calculation strategy is used to correct the basic correlation score to obtain the semantic relevance. The event importance assessment matrix is generated based on the semantic relevance.
3. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 2, characterized in that, The calculation strategy includes a context-related calculation strategy and a time decay calculation strategy; The step of selecting a corresponding calculation strategy based on the type of input data to correct the basic relevance score and obtain semantic relevance includes: When the input data is the initial query information, the context association calculation strategy is used to correct the basic relevance score to obtain the semantic relevance. When the input data is the query information of the current round of the multi-round query, the time decay calculation strategy is used to correct the basic relevance score to obtain the semantic relevance. The context association calculation strategy includes: Based on a preset document hierarchy structure diagram, the structural importance weight of each element in the text event sequence is determined; The semantic relevance is obtained by multiplying the basic relevance score by the structural importance weight of the corresponding text event element; The time decay calculation strategy includes: The dialog round offset is calculated based on the sequence number of the current round query information in the multi-round query. Based on the dialogue turn offset, the time decay factor is calculated using an exponential decay model. The topic coherence of the input data is evaluated to obtain a topic coherence result, and the contextual relevance is calculated based on the topic coherence result. The semantic relevance is obtained by substituting the basic relevance score, the time decay factor, and the contextual relevance into the event importance evaluation function for comprehensive calculation.
4. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 1, characterized in that, The process of calculating sparsity parameters based on the complexity of the input data and the load of the neuromorphic computing chip's computing nodes, and then enhancing these sparsity parameters to obtain target sparsity parameters, includes: The complexity of the input data is calculated based on its semantic depth, syntactic complexity, and information content. Obtain the load status of the computing node of the neuromorphic computing chip; Based on the complexity and the load state, the sparsity parameter is calculated, and the target sparsity parameter is obtained through a sparsity adjustment strategy.
5. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 4, characterized in that, The sparsity adjustment strategy includes: A dialogue round threshold is set based on the current dialogue round number. The dialogue round threshold includes a first threshold and a second threshold, wherein the first threshold is less than the second threshold. When the current dialogue round number is less than the first threshold, it is determined to be the initial stage of the dialogue. The first step is to adjust the sparsity parameter to obtain the target sparsity parameter. When the current dialogue turn number is greater than the first threshold and less than the second threshold, it is determined to be in the middle stage of the dialogue. The sparsity parameter is adjusted by the second step size to obtain the target sparsity parameter. When the current dialogue turn number is greater than the second threshold, it is determined to be in the later stage of the dialogue. The input data is then adjusted according to its complexity to obtain the target sparsity parameter.
6. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 5, characterized in that, The target sparse attention mask matrix is generated based on the target sparsity parameter and the event importance evaluation matrix. Each element value in the event importance evaluation matrix is compared with a preset event importance judgment threshold, and the element values in the event importance evaluation matrix that are greater than the event importance judgment threshold are selected as the valid connection set; The positions in the effective connection set are marked as effective attention positions in the mask matrix, and the remaining positions are marked as invalid attention positions, to obtain the marking result; Based on the labeling results, a target sparse attention mask matrix is generated; The target sparse attention mask matrix is used to shield the calculation of invalid attention positions during the computation of the neuromorphic computing chip, and only perform sparse attention calculation on the valid attention positions.
7. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 6, characterized in that, The step of comparing each element value in the event importance assessment matrix with a preset event importance judgment threshold, and selecting element values in the event importance assessment matrix that are greater than the event importance judgment threshold as the valid connection set, includes: The target retention ratio is determined based on the target sparsity parameter; The element values in the event importance evaluation matrix are sorted to obtain the sorting result; The number of elements to be retained is calculated based on the target retention ratio and the total number of elements in the event importance assessment matrix. Based on the sorting results and the number of elements retained, the event importance determination threshold is determined; The values of all elements in the matrix are compared with the event importance threshold, and the connections whose element values are greater than or equal to the event importance threshold are selected to form the set of valid connections.
8. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 6, characterized in that, The step of assigning the sparse attention computation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, and obtaining the output results of the computing nodes, includes: The computational task of determining effective attention connections is based on the target sparse attention mask matrix; Obtain the load status and computing power of each computing node in the neuromorphic computing chip; Based on the event-driven scheduling strategy, the computing tasks are assigned to computing nodes corresponding to the load status.
9. The event-driven sparse attention optimization method based on a neuromorphic computing chip according to claim 1, characterized in that, Before assigning the sparse attention computation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, the method further includes: The maximum number of nodes that can participate in the computation is set, which is determined comprehensively based on the total number of effective connections in the target sparse attention mask matrix, the processing power of a single computing node, and system power consumption constraints. During the task allocation process, ensure that the actual number of computing nodes participating in the computation is less than or equal to the maximum number of nodes. When the number of callable computing nodes exceeds the maximum number of nodes, a dual threshold filtering mechanism is used to select nodes; When the number of callable computing nodes is less than or equal to the maximum number of nodes, a time-sharing multiplexing mechanism is used to process some nodes, so that the some nodes can execute multiple computing tasks in a time-sharing manner. The dual threshold screening mechanism includes: Preset computing power threshold and load threshold, and prioritize computing nodes whose computing power is greater than the computing power threshold and whose load is less than the load threshold; If the quantity requirement is met, select from the remaining nodes nodes where the computing power of the computing node is greater than the computing power threshold but the load of the computing node is greater than the load threshold, or where the computing power of the computing node is less than the computing power threshold but the load of the computing node is less than the load threshold.
10. An event-driven sparse attention optimization system based on a neuromorphic computing chip, characterized in that, include: The data processing execution module is used to perform semantic analysis and feature extraction on the input data and generate an input event sequence. The types of the input data include initial query information or current round query information in a multi-round query. Semantic analysis and feature extraction are performed on the text information to generate a text event sequence. The text information includes the content of the multi-round query and the document content related to the query information in the document library. An importance matrix generation module is used to calculate the semantic relevance between the input event sequence and the text event sequence, and generate an event importance evaluation matrix; The sparsity parameter adjustment module is used to calculate the sparsity parameter based on the complexity of the input data and the load of the computing node of the neuromorphic computing chip, and to enhance the sparsity parameter to obtain the target sparsity parameter. A mask matrix construction module is used to generate a target sparse attention mask matrix based on the target sparsity parameters and the event importance evaluation matrix; The node result calculation module is used to assign the sparse attention calculation task based on the target sparse attention mask matrix to the computing nodes of the neuromorphic computing chip for execution, and to obtain the output results of the computing nodes. The query result generation module merges the output results of the computing nodes to generate the target output result.
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