Active desaturation protection and capacitive load starting circuit of solid state power controller

Abstract

The invention discloses an active desaturation protection and capacitive load starting circuit of a solid-state power controller. The active desaturation protection and capacitive load starting circuit comprises a driving chip, a double-diode, a low-voltage NMOS tube, a power semiconductor switching device, a control unit, a current-limiting resistor and a TVS tube. An equivalent output capacitor of the low-voltage NMOS tube is used as a short-circuit protection charging capacitor, and the grid voltage is regulated and controlled through the control unit, so that active shielding in the starting stage of the capacitive load is realized to avoid misjudgment; a parasitic capacitor is isolated by means of double diodes, and a driving chip constant current source is matched, so that the total time for the voltage of a Desat detection port to reach a trigger threshold value after short circuit is remarkably shortened, and the short circuit protection speed is greatly improved. The circuit solves the contradiction between capacitive load starting misjudgment and slow short-circuit protection in a traditional scheme, remarkably improves the reliability of an SSPC system, and is suitable for the fields of power distribution, aerospace and the like.

Description

Technical Field

[0001] This invention relates to the field of solid-state power controller protection technology, and more particularly to active desaturation protection and capacitive load start-up circuits for solid-state power controllers. Background Technology

[0002] With the continuous development of power distribution systems for more-electric aircraft, solid-state power controllers (SSPCs), as power distribution and allocation devices composed of semiconductor devices, have become the core component and final control execution unit of the power distribution section of more-electric systems. SSPCs not only have the switching function of power allocation, but also can disconnect faulty equipment for protection. They can receive and process control signals, and transmit and receive load information and operating status in real time. When load equipment fails, SSPCs can quickly determine the fault type and take corresponding protective measures. For example, in the event of overload, they can disconnect the load according to the inverse-time protection mechanism to prevent equipment overheating and damage; in the event of a short-circuit fault, they can respond quickly within microseconds, disconnect the load, and feed back the fault information to the front-end computer to ensure the safe operation of the system.

[0003] SSPC has significant advantages such as no electric arc, no contact, no noise, fast response speed, low electromagnetic interference, small size, high integration and easy remote connection with the system. Therefore, it has a wide range of applications in DC power distribution systems, aerospace, electric vehicles, marine equipment and other occasions that require efficient power distribution, and can effectively improve system reliability and operating efficiency.

[0004] Currently, SSPCs primarily employ the traditional DESAT protection scheme to enhance short-circuit protection capabilities. This scheme achieves rapid response to fault currents by real-time monitoring of the desaturation voltage of the blanking capacitor: when a short-circuit fault causes an abnormal rise in the blanking capacitor voltage and exceeds the DESAT threshold, protection action is triggered. Technicians adjust the size of the blanking capacitor to balance the capacitive load startup requirements with timely short-circuit protection triggering, thereby improving the overcurrent protection capability of the SSPC system. This ensures timely fault isolation after a short circuit to prevent equipment damage or safety hazards, ultimately enhancing system reliability and stability. Based on this traditional scheme, SSPCs, with their high efficiency, high reliability, rapid response, and flexible control capabilities, have been applied in aerospace, electric vehicles, industrial equipment, and renewable energy fields, providing efficient power distribution and protection functions for high-power scenarios.

[0005] However, existing traditional Desat protection schemes have significant drawbacks, namely, the difficulty in balancing the shielding requirements during capacitive load startup with the timeliness of short-circuit protection. If the selected blanking capacitor is too large, while it can effectively shield the large current spikes during capacitive load startup, it will cause the Desat pin voltage to take too long to reach the protection threshold when a short-circuit fault occurs, resulting in a short-circuit protection delay. If the selected blanking capacitor is too small, while it can shorten the capacitor charging time during a short-circuit fault and reduce protection delay, it cannot completely shield the large current spikes during capacitive load startup, easily leading to false short-circuit protection triggering. This reliance on passively adjusting the blanking capacitor size makes it impossible to effectively resolve the contradiction between capacitive load startup shielding and short-circuit protection timeliness, thus restricting the application of SSPC in high-reliability scenarios. Summary of the Invention

[0006] The purpose of this invention is to address the shortcomings of the prior art. This invention proposes an active desaturation protection and capacitive load start-up circuit for solid-state power controllers, aiming to resolve the contradiction between misjudgment of capacitive load start-up and slow short-circuit protection response in traditional solid-state power controller protection circuits, and to achieve synergistic optimization of active shielding adjustment and fast short-circuit protection.

[0007] The technical solution to achieve the purpose of this invention is: An active desaturation protection and capacitive load startup circuit for a solid-state power controller is applied to a driver chip with Desat protection. The traditional shielding capacitor is replaced with a low-voltage NMOS transistor, utilizing the equivalent output capacitance of the NMOS transistor as the charging capacitor in case of a short circuit. The constructed active Desat detection topology includes: The driver chip has a Desat protection function and a built-in constant current source; A power semiconductor switching device, wherein the drain and source terminals are connected in parallel to the load circuit, and the gate is controlled by the driving chip; The first diode and the second diode are connected in series, and their cathodes are connected to the drain of the power semiconductor switching device. Their anodes are connected to the Desat pin of the driver chip through the first current-limiting resistor, which is used to detect the desaturation voltage of the power semiconductor switching device. A low-voltage NMOS transistor, whose drain is connected to the series node of the first and second diodes, whose source is grounded, and whose gate is connected to the control unit, is used to actively shield the Desat pin during the capacitive load startup phase; The equivalent output capacitance Coss of the low-voltage NMOS transistor constitutes the charging capacitor during short-circuit protection, replacing the traditional external blanking capacitor. The TVS diode is connected in parallel between the Desat pin and ground via a second current-limiting resistor to clamp the Desat pin voltage and prevent overvoltage. The control unit is used to actively adjust the shielding duration by controlling the high-level duration of the gate voltage V_GS of the low-voltage NMOS transistor during the capacitive load startup phase, and to release the shielding when a short-circuit fault occurs, so as to achieve a microsecond-level short-circuit protection response.

[0008] Furthermore, the power semiconductor switching device is a silicon carbide MOSFET, which adopts a multi-MOSFET parallel structure.

[0009] Furthermore, after a short-circuit fault occurs, while the low-voltage NMOS transistor is in the off state, the constant current source inside the driver chip charges the equivalent output capacitor Coss of the NMOS transistor.

[0010] Furthermore, the control unit is an MCU, i.e., a microcontroller, which controls the gate voltage of the low-voltage NMOS transistor through digital signals.

[0011] Furthermore, the driver chip is equipped with an FLT pin. When the short circuit protection action is triggered, the FLT pin outputs a fault status signal to the control unit, and the control unit reports the fault information to the host computer.

[0012] Furthermore, after the fault is cleared, the control unit resets the driver chip via software commands or a manual reset signal.

[0013] Furthermore, the active shielding during the capacitive load startup phase is achieved through the following steps: After receiving the start signal, the soft-start circuit first pre-charges the capacitive load; After the precharge lasts for 3 time constants, the controller outputs a high level to the gate of the low-voltage NMOS to turn it on and enable Desat shielding; Simultaneously, the main circuit drive signal is activated, the high-current start-up phase of the capacitive load ends, the controller outputs a low level to the gate of the low-voltage NMOS to turn it off, the Desat shield is turned off, and normal detection resumes.

[0014] Furthermore, all the protection resistors are high-precision, low-temperature drift resistors, and the driver chip, low-voltage NMOS, dual diodes, and TVS diodes are all integrated on the driver board of the SSPC module using surface mount technology.

[0015] Compared with the prior art, the present invention, employing the above technical solution, has the following beneficial effects: (1) The active desaturation protection and capacitive load start-up circuit of the solid-state power controller proposed in this invention solves the core contradiction in the traditional Desat protection scheme that it is difficult to balance the timeliness of capacitive load start-up shielding and short-circuit protection. This invention replaces the traditional shielding capacitor with a low-voltage NMOS. On the one hand, by actively controlling the gate voltage of the NMOS, the MCU can autonomously set and dynamically adjust the shielding duration of the capacitive load start-up stage according to different load conditions, thus completely avoiding misjudgment caused by large current spikes. On the other hand, by using the small equivalent output capacitor of the NMOS, the capacitor charging time during short-circuit faults is greatly shortened, realizing independent control of shielding and protection, and breaking the inherent constraints between the two.

[0016] (2) This invention significantly improves the short-circuit protection response speed of SSPC, effectively protecting power devices and downstream equipment. By combining the NMOS equivalent output capacitor with the built-in constant current source of the driver chip, the total trigger time of short-circuit protection can be significantly shortened, which can quickly cut off the fault path, greatly reduce the impact of short-circuit current on power transistors, avoid overcurrent damage to power devices, and at the same time reduce the impact of faults on downstream power distribution systems, thereby improving the overall system safety redundancy.

[0017] (3) This invention has excellent load adaptability and control flexibility, and can meet the application needs of multiple scenarios. This invention achieves programmable adjustment of the shielding time by software controlling the VGS high level time of NMOS, which can adapt to the startup characteristics of different capacitive loads. It can adapt to the load requirements of different fields such as DC power distribution systems, aerospace, electric vehicles, and industrial automation without changing the hardware, reducing the customization cost of SSPC in different scenarios and improving the versatility and practicality of the technical solution.

[0018] (4) This invention reduces parasitic capacitance interference by connecting two diodes in series and clamps the Desat pin overvoltage of the TVS tube. With the help of the driver chip, the blanking time, filtering window and adaptive protection threshold can be configured to optimize the gate turn-off rate to suppress parasitic inductor voltage spikes, ensuring stable operation of the system under complex conditions such as overcurrent and shoot-through, and meeting the high reliability requirements of aerospace and other fields. At the same time, it eliminates the blanking capacitor of the traditional solution and directly uses the equivalent output capacitor of the low voltage NMOS to realize the charging function, reducing external components, simplifying the driver board design, and improving the system integration. This reduces hardware and assembly costs and reduces the risk of component failure, which is in line with the miniaturization development trend of SSPC. Attached Figure Description

[0019] Figure 1 The active Desat structure diagram is shown for the active desaturation protection and capacitive load startup circuit of the solid-state power controller proposed in this invention. Figure 2 This is a diagram showing the overall structure of the SSPC system used in this invention. Figure 3This is the equivalent circuit diagram of the critical triggering of a short-circuit fault in an embodiment of the present invention; Figure 4 This is the equivalent circuit diagram of the Desat pin after a short-circuit fault is triggered in an embodiment of the present invention; Figure 5 This is a schematic diagram of key signals during capacitive load startup in an embodiment of the present invention; Figure 6 This is a schematic diagram of key signals during short-circuit protection in an embodiment of the present invention; Figure 7 This is a short-circuit protection waveform diagram under 270V / 50A operating conditions in an embodiment of the present invention; Figure 8 This is a short-circuit protection waveform diagram under 400V / 50A operating conditions in an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] The active desaturation protection and capacitive load startup circuit of the solid-state power controller is applied to a driver chip with Desat protection function. The traditional shielding capacitor is replaced by a low-voltage NMOS transistor, utilizing the equivalent output capacitance of the NMOS transistor as the charging capacitor in case of a short circuit. The constructed active Desat detection topology includes: the control unit is an MCU (microcontroller), which controls the gate voltage of the low-voltage NMOS transistor via digital signals; specifically, as shown... Figure 1 As shown, it includes: The driver chip has a Desat protection function and a built-in constant current source; A power semiconductor switching device, wherein the drain and source terminals are connected in parallel to the load circuit, and the gate is controlled by the driving chip; the power semiconductor switching device is a silicon carbide MOSFET, and adopts a multi-transistor parallel structure; The first diode and the second diode are connected in series, and their cathodes are connected to the drain of the power semiconductor switching device. Their anodes are connected to the Desat pin of the driver chip through the first current-limiting resistor, which is used to detect the desaturation voltage of the power semiconductor switching device. A low-voltage NMOS transistor, whose drain is connected to the series node of the first and second diodes, whose source is grounded, and whose gate is connected to the control unit, is used to actively shield the Desat pin during the capacitive load startup phase; The equivalent output capacitance Coss of the low-voltage NMOS transistor constitutes the charging capacitor during short-circuit protection, replacing the traditional external blanking capacitor. The TVS diode is connected in parallel between the Desat pin and ground via a second current-limiting resistor to clamp the voltage of the Desat pin and prevent overvoltage from occurring on the Desat pin. The control unit is used to actively adjust the shielding duration by controlling the high-level duration of the gate voltage V_GS of the low-voltage NMOS transistor during the capacitive load startup phase, and to release the shielding when a short-circuit fault occurs, so as to achieve a microsecond-level short-circuit protection response.

[0022] In the active Desaturation structure proposed in this invention, a rapid response to short-circuit faults is achieved by real-time monitoring of the desaturation voltage of the power device. A detection circuit consisting of a high-voltage diode and a current-limiting resistor utilizes the equivalent output capacitance of the MOSFET and the constant current source within the driver chip to charge the blanking capacitor. When a short-circuit fault causes a voltage drop between the drain (D) and source (S), the response is rapid. V ds When the voltage rises abnormally, the capacitor voltage exceeds the DESAT threshold, triggering the protection action and initiating a two-stage shutdown or soft shutdown mechanism to suppress shutdown overvoltage.

[0023] All the protection resistors are high-precision, low-temperature drift resistors, and the driver chip, low-voltage NMOS, dual diodes and TVS diodes are all integrated on the driver board of the SSPC module using surface mount technology.

[0024] The driver chip has an FLT pin. When the short-circuit protection is triggered, the FLT pin outputs a fault status signal to the control unit, which then reports the fault information to the host computer. After the fault is cleared, the control unit resets the driver chip via software commands or a manual reset signal.

[0025] The active shielding during the capacitive load startup phase is achieved through the following steps: After receiving the start signal, the soft-start circuit first pre-charges the capacitive load; After the pre-charge lasts for 3 time constants, the controller outputs a high level to the gate of the low-voltage NMOS to turn it on and enable Desat shielding; Simultaneously, the main circuit drive signal is activated, the high-current start-up phase of the capacitive load ends, the controller outputs a low level to the gate of the low-voltage NMOS to turn it off, the Desat shield is turned off, and normal detection resumes.

[0026] The overall structure of the SSPC system used in this invention is as follows: Figure 2As shown, it integrates five major functional modules: main power transmission, drive regulation, multi-parameter detection, active protection, and fault interaction, to achieve synergy between precise power allocation and high-reliability protection. The specific structure and signal flow are as follows: The main power transmission circuit is the energy channel of the system. The input side is a DC bus (suitable for 270V / 400V and other operating conditions). The DC bus voltage is directly connected to the drain (D) of the silicon carbide (SiC) MOSFET power module (using a four-transistor parallel structure, with an equivalent internal resistance of 2.25mΩ, model WM2A009065K). The source (S) of the SiC MOSFET is connected in series with the load circuit to form the main power path from the bus to the load, meeting the 50A rated current transmission requirement. At the same time, the multi-transistor parallel design reduces conduction losses and is suitable for high-power scenarios.

[0027] The drive control module amplifies the control signals. It is based on a driver chip (model 1ED3491MC12MXUMA1, with a built-in 0.5mA constant current source). Its control input is connected to the digital signal output of the MCU to receive the turn-on / turn-off commands sent by the MCU. The gate drive output of the driver chip is directly connected to the gate (G) of the SiCMOSFET. By adjusting the gate voltage, the precise switching control of the power device is achieved. At the same time, the FLT (fault output) pin of the driver chip communicates bidirectionally with the signal input of the MCU to provide real-time feedback on the protection action status and provide trigger signals for fault handling.

[0028] The multi-parameter detection module comprises three key detection branches: first, a DC bus voltage detection unit, which uses a voltage sensor connected in parallel across the bus to convert the bus voltage signal into an analog quantity recognizable by the MCU for overvoltage protection determination; second, a load current detection unit, which uses a current sensor connected in series between the SiCMOSFET source and the load to collect real-time load current, used to monitor normal operating current and provide data support for overcurrent protection; and third, a power transistor temperature detection unit, which uses an NTC thermistor closely attached to the SiCMOSFET case to collect the junction temperature of the device, preventing damage to the power device due to overheating. The outputs of all three detection units are connected to the MCU's ADC (analog-to-digital converter) port to achieve real-time status monitoring.

[0029] The active protection and auxiliary circuit module covers Desat active protection, overvoltage clamping, and soft-start functions: The Desat protection circuit consists of a first diode and a second diode connected in series. The cathodes of the two diodes are connected to the drain of the SiC MOSFET, and the anodes are connected to the Desat pin of the driver chip via a first current-limiting resistor (high-precision, low-temperature drift type). The drain of the low-voltage NMOS transistor is connected to the node of the two diodes in series, the source is grounded, and the gate is controlled by the MCU PWM signal to achieve active Desat shielding during the capacitive load startup phase. The TVS diode is connected in parallel between the Desat pin and ground via a second current-limiting resistor to clamp the Desat pin voltage and prevent damage to the driver chip. In addition, one end of the soft-start circuit is connected to the DC bus, and the other end is connected to the load circuit. The control terminal is connected to the MCU. When the capacitive load starts, it pre-charges the load (for 3 time constants) to reduce the startup current spike and, together with the NMOS shielding, achieves error-free startup.

[0030] In the fault interaction and reset module, the MCU connects to the host computer via a CAN or UART communication interface. When faults such as short circuit, overvoltage, overcurrent, and overtemperature trigger protection actions, the MCU receives the fault signal from the FLT pin of the driver chip, encodes the fault type, and reports it to the host computer in real time. After the fault is cleared, the MCU can receive a software reset command from the host computer or receive a manual reset signal through the hardware interface, and then send a reset signal to the driver chip to clear the fault state and restore the system to normal operation.

[0031] The entire system integrates the driver chip, low-voltage NMOS transistor, dual diodes, TVS transistor, and high-precision resistors onto the driver board of the SSPC module using surface mount technology. This simplifies the structure, reduces the size, and improves anti-interference capabilities, making it suitable for scenarios with high reliability and integration requirements, such as aerospace and DC power distribution. At the same time, the software programmability of the MCU allows for flexible adjustment of shielding duration and protection thresholds to meet the adaptation needs of different capacitive loads.

[0032] The driver chip used in this embodiment is model 1ED3491MC12MXUMA1, with an internal constant current source of 0.5mA; the SiC power device used is model WM2A009065K, with an internal resistance of 9mΩ, using a four-transistor parallel configuration, resulting in an equivalent internal resistance of 2.25mΩ; the diode is model RFN1LAM7S, with a forward voltage drop of 0.7V. Figure 3 The diagram shown is the equivalent circuit diagram when a short-circuit fault is critically triggered.

[0033]

[0034] in, R 1, R 2 is the series resistor for the Desat pin; I currentThe current value of the constant current source on the Desat pin; R dson The on-resistance value of the main circuit MOSFET; I b This represents the current flowing through the main circuit MOSFET when a short-circuit fault occurs. V f The forward voltage drop of the series high-voltage diode connected to the Desat pin; V Desat This refers to the voltage value of the Desat pin.

[0035] When the short-circuit protection is critically triggered, V Desat The voltage is 9.525V; the Desat trigger protection threshold voltage is 9.8V. The voltage difference between the distance triggering short-circuit protection and the voltage is:

[0036] Where, Δ U c This is the voltage difference between the Desat pin when a short-circuit fault occurs under rated operating conditions and the voltage when the Desat pin protection function is triggered.

[0037] When a short-circuit fault occurs, diodes D1 and D2 are reverse-biased and cut off. The equivalent circuit is as follows: Figure 4 As shown.

[0038] Coss is the equivalent output capacitance of the NMOS, model number: NCE6005AR, with an equivalent output capacitance of 120pF.

[0039]

[0040] in, I current The current value of the constant current source on the Desat pin; C This is the equivalent output capacitance value of the NMOS. u c Δ is the voltage value of the NMOS equivalent output capacitor; U c This is the voltage difference between the Desat pin when a short-circuit fault occurs and the voltage when the Desat pin protection function is triggered, under rated operating conditions; Δ t This refers to the time from the occurrence of a short-circuit fault to the triggering of the protection action under rated operating conditions.

[0041] According to the above formula, the charging time is 66ns. Combining this with the inherent blanking time of the driver chip (625ns), the total short-circuit protection trigger time is 691ns.

[0042] like Figure 5 , Figure 6 The diagram shows the overall control block diagram and key control signal schematics of the SSPC system. The block diagram requires the acquisition of the input DC bus voltage, load current, and power transistor temperature, which are then sent to the MCU for status detection and overvoltage, overcurrent, and overtemperature protection. Short-circuit protection is achieved by connecting the two ends of the main power drive circuit Vds to the Desat pin of the driver chip. As shown in the waveform diagram, when a short-circuit fault occurs, the voltage on the Desat pin rises rapidly to the protection threshold, triggering the protection action. This can achieve a microsecond-level response time requirement.

[0043] In traditional methods, to avoid short-circuit protection malfunctions caused by capacitive load startup, a capacitor is typically added to the Desat port to passively shield the high-current period during capacitive load startup. However, this method indirectly increases the short-circuit protection time, making it difficult to achieve both simultaneously using traditional methods. In this project, an active Desat shielding scheme was adopted, converting passive shielding into active shielding. Its advantages include the ability to freely adjust the shielding time via software, eliminating the need for an additional Desat capacitor (the output capacitor of the low-voltage shielding MOS is sufficient), and allowing the shielding time to be updated in real-time by the MCU based on load conditions. As shown in the key signal diagram, when a startup signal is received, the soft-start circuit activates to pre-charge the load. After three time constants, the Desat shielding signal is activated first, followed by the main circuit drive signal, until the high-current period of the capacitive load ends, at which point the Desat shielding signal is deactivated.

[0044] When a fault occurs, the fault information is transmitted to the MCU through the FLT pin of the main circuit driver chip and reported to the host computer in real time. Once the fault is resolved, a software or manual reset can be achieved through the fault reset signal.

[0045] like Figure 7 As shown, after a short circuit fault occurs under 270V / 50A conditions, the fault current in the main circuit rises rapidly. When the fault current reaches 250A, the DESAT pin starts to activate. The entire short circuit response time is only 1.5us, which is much smaller than the 100us short circuit protection time of other domestic products. This effectively avoids the occurrence of overcurrent damage to the power transistor. The maximum short circuit current in the main circuit is 298A.

[0046] like Figure 8 The waveform shown is the short-circuit protection waveform under 400V / 50A conditions. The overall protection time is 1.62us, which is much smaller than the 100us short-circuit protection time of mainstream products on the market. It reliably protects the power transistor, and the maximum short-circuit current of the main circuit is 365A.

[0047] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An active desaturation protection and capacitive load start-up circuit for a solid state power controller, characterized by, The application is applied to a drive chip with a Desat protection function, replaces a traditional shielding capacitor with a low-voltage NMOS, and uses an equivalent output capacitor of the NMOS as a charging capacitor when a short circuit occurs; The constructed active Desat detection topology comprises: A drive chip with a Desat protection function and a built-in constant current source; A power semiconductor switching device is connected in parallel to a load circuit at the drain and source thereof, and the gate thereof is controlled by the drive chip; A first diode and a second diode are connected in series, and the cathode thereof is connected to the drain of the power semiconductor switching device, and the anode thereof is connected to the Desat pin of the drive chip through a first current-limiting resistor, and is used for detecting the desaturation voltage of the power semiconductor switching device; A low-voltage NMOS is connected to the node in series of the first diode and the second diode at the drain thereof, is grounded at the source thereof, and is connected to a control unit at the gate thereof, and is used for actively shielding the Desat pin in a capacitive load starting stage; The equivalent output capacitor Coss of the low-voltage NMOS constitutes a charging capacitor when a short circuit protection occurs, and replaces a traditional external blanking capacitor; A TVS tube is connected in parallel to the Desat pin and the ground through a second current-limiting resistor, and is used for clamping the voltage of the Desat pin and preventing overvoltage; A control unit is used for actively adjusting the shielding duration by controlling the high-level duration of the gate voltage V_GS of the low-voltage NMOS in the capacitive load starting stage, and removing the shielding when a short circuit fault occurs, so as to realize a microsecond-level short circuit protection response.

2. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The power semiconductor switching device is a silicon carbide MOSFET, and a multi-tube parallel structure is adopted.

3. The active desaturation protection and capacitive load start-up circuit for a solid state power controller of claim 1, wherein, After a short circuit fault occurs, the internal constant current source of the drive chip charges the equivalent output capacitor Coss of the low-voltage NMOS.

4. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The control unit is an MCU, i.e., a microcontroller, and the MCU controls the gate voltage of the low-voltage NMOS through a digital signal.

5. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The drive chip is provided with an FLT pin, which outputs a fault state signal to the control unit after a short circuit protection action is triggered, and the control unit reports the fault information to an upper computer.

6. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The control unit resets the drive chip through a software instruction or a manual reset signal after the fault is removed.

7. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The active shielding in the capacitive load starting stage is realized through the following steps: After receiving a starting signal, a soft starting circuit precharges the capacitive load; After the precharging lasts for three time constants, the controller outputs a high level to the gate of the low-voltage NMOS to turn on the low-voltage NMOS, and Desat shielding is started; At the same time, a main circuit driving signal is started, and after the capacitive load is started with a large current, the controller outputs a low level to the gate of the low-voltage NMOS to turn off the low-voltage NMOS, Desat shielding is closed, and normal detection is restored.

8. The active desaturation protection and capacitive load start-up circuit of a solid state power controller of claim 1, wherein, The protection resistors are all high-precision low-temperature-drift resistors, and the drive chip, the low-voltage NMOS, the double diode and the TVS tube are integrated on a drive board of an SSPC module in a surface mounting process.

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