Display device

Abstract

A display apparatus is provided. The display device includes: a substrate; the pixel driving circuit is arranged on the substrate; the plurality of insulating layers are arranged on the pixel driving circuit; the partition wall is arranged on the plurality of insulating layers; the plurality of micro LEDs are arranged on the partition wall, and are electrically connected to the pixel driving circuit; a diffusion layer disposed on the plurality of insulating layers and disposed to surround the bank and the plurality of micro LEDs, and including a recess disposed along a boundary of the bank; and a reflecting plate disposed on the recessed portion. Therefore, the luminous efficiency can be improved, the processing difficulty is reduced, and processing optimization can be realized.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0094402, filed on July 17, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to a display apparatus. BACKGROUND

[0004] Display apparatuses are being applied to various electronic devices, such as TVs, mobile phones, laptop computers, and tablet computers.

[0005] As a display apparatus, there are an organic light emitting display (OLED) apparatus, which is a self-emitting device, and a liquid crystal display (LCD) apparatus, which requires a separate light source.

[0006] Recently, a display apparatus including a light emitting diode (LED) is attracting attention as a next-generation display apparatus. The light emitting diode is formed of an inorganic material rather than an organic material, such that the light emitting speed is faster, the light emitting efficiency is excellent, and an image having higher brightness can be displayed, as compared with a liquid crystal display apparatus or an organic light emitting display apparatus. SUMMARY

[0007] An object to be achieved by the present disclosure is to provide a display apparatus having improved light extraction efficiency.

[0008] An object to be achieved by the present disclosure is to provide a display apparatus which implements process optimization to improve light extraction efficiency while mitigating process difficulty.

[0009] The objects of the present disclosure are not limited to the above-mentioned objects, and other objects not mentioned above will be clearly understood by persons skilled in the art from the following description.

[0010] An object of the present application is to provide a display apparatus having improved light extraction efficiency while maintaining pixel integration.

[0011] An object to be achieved by the present disclosure is to provide a display apparatus driven at low power by implementing high brightness and high resolution.

[0012] The objects of the present disclosure are not limited to the above-mentioned objects, and other objects not mentioned above will be clearly understood by persons skilled in the art from the following description.

[0013] According to an aspect of the disclosure, a display apparatus includes a substrate, a pixel driving circuit disposed on the substrate, a plurality of insulating layers disposed on the pixel driving circuit, a plurality of banks disposed on the plurality of insulating layers, a plurality of micro-LEDs disposed on the plurality of banks and electrically connected to the pixel driving circuit, a diffusion layer disposed on the plurality of insulating layers and disposed to surround the plurality of banks and the plurality of micro-LEDs and including a recess disposed along a boundary of the banks, and a reflection plate disposed on the recess. Accordingly, light emitting efficiency can be improved while reducing processing difficulty, and thus, processing optimization can be achieved.

[0014] According to another aspect of the disclosure, a display apparatus includes a substrate including an active area including a plurality of sub-pixels and a non-active area surrounding the active area, a pixel driving circuit disposed on the substrate, a plurality of insulating layers disposed on the pixel driving circuit, a plurality of banks disposed on the plurality of insulating layers, a plurality of micro-LEDs disposed on the plurality of banks and disposed in each of the plurality of sub-pixels, a diffusion layer disposed on the plurality of insulating layers and the banks and disposed to surround the plurality of micro-LEDs, and a plurality of reflection plates disposed on the diffusion layer, wherein the diffusion layer includes a plurality of recesses disposed to correspond to an outer contour of each of the plurality of banks on a plane, and the plurality of reflection plates are respectively disposed in the plurality of recesses.

[0015] Further details of example embodiments are included in the DETAILED DESCRIPTION and the accompanying drawings.

[0016] According to the disclosure, the reflection plate is disposed to surround the plurality of micro-LEDs to improve light emitting efficiency.

[0017] According to the disclosure, the plurality of micro-LEDs share the reflection plate, such that unnecessary space required to place the reflection plate is minimized to improve pixel integration.

[0018] According to the disclosure, a sidewall diffusion layer including micro-particles is omitted or disposed only with a minimum area to reduce processing difficulty due to the micro-particles.

[0019] According to the disclosure, light emitting efficiency is improved while reducing processing difficulty, and thus, processing optimization is improved.

[0020] According to the disclosure, high brightness is achieved by improving light extraction efficiency to improve a lifespan of the display apparatus, such that the display apparatus can be driven at low power in terms of reducing generated energy consumption.

[0021] Effects according to the disclosure are not limited to the above exemplified contents, and include more various effects in the present specification. BRIEF DESCRIPTION OF DRAWINGS

[0022] The above and other aspects, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0023] Figure 1 is an exploded perspective view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0024] Figure 2 is a plan view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0025] Figure 3 is an enlarged view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0026] Figure 4 is a view showing a circuit structure according to an exemplary embodiment of the present disclosure;

[0027] Figure 5 is a plan view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0028] Figure 6 is a plan view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0029] Figure 7 is a plan view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0030] Figure 8 is a plan view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0031] Figure 9A and Figure 9B is a sectional view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0032] Figure 10 is a sectional view of a display apparatus according to an exemplary embodiment of the present disclosure;

[0033] Figure 11 is a sectional view of a display apparatus taken along the line XI-XI' of Figure 3

[0034] Figure 12 is a plan view of a display apparatus according to another exemplary embodiment of the present disclosure;

[0035] Figure 13 is a sectional view of a display apparatus according to another exemplary embodiment of the present disclosure;

[0036] Figure 14 is a plan view of a display apparatus according to still another exemplary embodiment of the present disclosure;

[0037] Figure 15A and​Figure 15B is a cross-sectional view of a display apparatus according to yet another exemplary embodiment of the disclosure;

[0038] Figures 16A to 16D is a process diagram of a manufacturing method of a display apparatus according to yet another exemplary embodiment of the disclosure;

[0039] Figures 17A to 17D is a process diagram of a manufacturing method of a display apparatus according to yet another exemplary embodiment of the disclosure.

[0040] Figures 18 to 21 is a view showing an apparatus to which a display apparatus according to an exemplary embodiment of the disclosure is applied. DETAILED DESCRIPTION

[0041] Advantages and characteristics of the disclosure and a method of achieving the advantages and characteristics will be clarified by referring to exemplary embodiments described in detail below with reference to the accompanying drawings. However, the disclosure is not limited to the exemplary embodiments disclosed herein and will be implemented in various forms. The exemplary embodiments are provided only as examples so that those skilled in the art can fully understand the disclosure disclosed and the scope of the disclosure.

[0042] The shapes, sizes, ratios, angles, numbers, etc. shown in the accompanying drawings for describing exemplary embodiments of the disclosure are merely examples and the disclosure is not limited thereto. Throughout the specification, the same reference numerals generally designate the same elements. Also, in the following description of the disclosure, detailed explanations of known related technologies can be omitted to avoid unnecessarily obscuring the subject matter of the disclosure. The terms such as "include", "have", and "consist of" used herein are generally intended to allow addition of other components. Unless explicitly stated otherwise, any reference to a singular can include a plural.

[0043] Components are interpreted to include ordinary error ranges even if not explicitly stated.

[0044] When terms such as "upper", "above", "lower", and "next" are used to describe a positional relationship between two parts, one or more parts can be positioned between the two parts, unless the terms are used with the term "immediately" or "directly".

[0045] When explaining a temporal relationship, terms such as "after", "later", "subsequently", "before", etc. can include non-continuous cases unless terms such as "immediately" or "directly" are used.

[0046] Terms such as "first," "second," etc. are used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another component. Accordingly, a first component mentioned herein can be a second component within the technical scope of the disclosure.

[0047] In describing the components of the disclosure, terms such as first, second, A, B, (a), or (b) can be used. These terms are only intended to distinguish one component from other components, and the nature, order, sequence, or number of the corresponding components are not limited by these terms.

[0048] When a component is described as being "connected," "coupled," "joined," or "attached" to another component, it should be understood that the component can be directly connected, coupled, joined, or attached to the other component, but unless explicitly stated otherwise, it can also be indirectly connected, coupled, joined, or attached to the other component through another component interposed therebetween.

[0049] When a component or layer is described as being "in contact with" or "overlapping" another component or layer, the component or layer can be directly in contact with or overlapping the other component or layer, but unless explicitly stated otherwise, it should be understood that it can also be indirectly in contact with or overlapping the other component through another component interposed therebetween.

[0050] The term "at least one" should be understood to include all combinations of one or more relevant components. For example, "at least one of the first, second, and third components" means not only the first, second, or third component, but further includes all combinations of two or more components from the first, second, and third components.

[0051] The terms "first direction," "second direction," "third direction," "X-axis direction," "Y-axis direction," and "Z-axis direction" should not be interpreted only as a geometric relationship perpendicular to each other, but can indicate a wider directionality within a range in which the configuration of the disclosure can function.

[0052] Features of various embodiments in the disclosure can be partially or wholly combined or associated with each other, various technical interlocks and operations are possible, and each embodiment can be implemented independently of each other or can be implemented together in an associated relationship.

[0053] Hereinafter, a display apparatus according to exemplary embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0054] Figure 1 is a perspective view showing a display apparatus according to exemplary embodiments of the disclosure. Figure 2 is a plan view of a display apparatus according to exemplary embodiments of the disclosure. Figure 3 is an enlarged view of a display apparatus according to exemplary embodiments of the disclosure.

[0055] Referring to Figures 1 to 3 The display device 1000 according to an example embodiment of the disclosure can include a display panel 100, a polarization layer 293, an adhesive layer 295, a cover member 120, a support substrate 170, a flexible circuit board FCB, and a printed circuit board 160.

[0056] For example, the display panel 100 of the display device 1000 can include a substrate 110. The substrate 110 can be a component that supports other components of the display device 1000. The substrate 110 can be formed of an insulating material. For example, the substrate 110 can be formed of glass or resin. Also, the substrate 110 can be formed of a material having flexibility. For example, the substrate 110 can be formed of an organic insulating material that is a plastic material having flexibility, such as polyimide (PI). However, example embodiments of the disclosure are not limited thereto.

[0057] The display panel 100 can implement information, a video, and / or an image provided to a user. For example, the display panel 100 can include an active area AA and a non-active area NA. For example, the substrate 110 can include the active area AA and the non-active area NA surrounding the active area AA. However, the active area AA and the non-active area NA are not limited to the substrate 110, but can be referred to with respect to the entire display device 1000.

[0058] The active area AA can be an area in which an image is displayed. The active area AA can include a plurality of pixels PX. Each of the plurality of pixels PX can be configured by a plurality of sub-pixels. A plurality of micro-LEDs can be disposed in each of the plurality of sub-pixels.

[0059] The non-active area NA can be an area in which an image is not displayed. In the non-active area NA, various wirings and circuits for driving the plurality of pixels PX of the active area AA can be disposed. For example, in the non-active area NA, various wirings and driving circuits can be mounted, and a pad unit PAD connected with an integrated circuit and a printed circuit can be disposed, but example embodiments of the disclosure are not limited thereto.

[0060] For example, the driving circuit can be a data driving circuit and / or a gate driving circuit, but example embodiments of the disclosure are not limited thereto. A wiring for providing a control signal for controlling the driving circuit can be disposed. For example, the control signal can include various timing signals including a clock signal, an input data enable signal, and a synchronization signal, but example embodiments of the disclosure are not limited thereto. The control signal can be received through the pad unit PAD. For example, in the non-active area NA, a link line LL can be disposed to transmit a signal. For example, a driving component (e.g., the flexible circuit board FCB and the printed circuit board 160) can be connected to the pad unit PAD.

[0061] According to the disclosure, the non-active area NA can include a first non-active area NA1, a bending area BA, and a second non-active area NA2. For example, the first non-active area NA1 can be an area surrounding at least a portion of the active area AA. The bending area BA can be an area extending from at least one side of the plurality of sides of the first non-active area NA1, and can be a bendable area. The second non-active area NA2 can be an area extending from the bending area BA, and the pad unit PAD can be disposed therein. For example, the bending area BA can be in a bent state, and other areas of the substrate 110 except for the bending area BA can be in a flat state. In this case, as the bending area BA is bent, the second non-active area NA2 can be located on the rear surface of the active area AA. However, the exemplary embodiments of the disclosure are not limited thereto.

[0062] The active area AA of the substrate 110 or the display apparatus 1000 can be configured with various shapes depending on the design of the display apparatus 1000. For example, the active area AA can be configured with a rectangular shape formed with four rounded corners, but the exemplary embodiments of the disclosure are not limited thereto. As another example, the active area AA can be configured with a rectangular shape formed with four right-angled corners or a circular shape, but the exemplary embodiments of the disclosure are not limited thereto.

[0063] According to the disclosure, a width of the second non-active area NA2 in which the plurality of pad electrodes PE are disposed can be greater than a width of the bending area BA in which only the plurality of link lines LL are disposed. Further, a width of the active area AA in which the plurality of sub-pixels are disposed can be greater than a width of the bending area BA in which only the plurality of link lines LL are disposed. Although the width of the bending area BA is shown to be smaller than the width of another area of the substrate 110 in the drawings, the shape of the substrate 110 including the bending area BA is illustrative, and the exemplary embodiments of the disclosure are not limited thereto.

[0064] A plurality of pixel driving circuits PD can be disposed on the substrate 110. Please refer to Figure 3A plurality of pixel driving circuits PD can be disposed in the active area AA. The plurality of pixel driving circuits PD can be circuits for driving the micro-LEDs of the plurality of sub-pixels. Each of the plurality of pixel driving circuits PD includes a plurality of transistors including a driving transistor and a storage capacitor and supplies a control signal, power, and a driving current to the micro-LEDs of the plurality of sub-pixels to control the emission operation of the plurality of micro-LEDs. For example, the pixel driving circuit PD can include a power line and a signal line for controlling the emission on / off and / or emission time of the micro-LEDs. For example, the plurality of pixel driving circuits PD can be driving drivers manufactured using a metal oxide silicon field effect transistor (MOSFET) manufacturing process on a semiconductor substrate, but exemplary embodiments of the present disclosure are not limited thereto. The driving drivers can include the plurality of pixel driving circuits PD and drive the plurality of sub-pixels.

[0065] Referring to FIG. 1 together Figure 1 The flexible circuit board FCB and the printed circuit board 160 can be disposed under the display panel 100. The flexible circuit board FCB and the printed circuit board 160 can be disposed at least at one edge of the display panel 100, but exemplary embodiments of the present disclosure are not limited thereto. One side of the flexible circuit board FCB can be attached to the display panel 100, and the other side can be attached to the printed circuit board 160, but exemplary embodiments of the present disclosure are not limited thereto. The flexible circuit board FCB can be a flexible film, but exemplary embodiments of the present disclosure are not limited thereto.

[0066] The pad unit PAD including a plurality of pad electrodes PE can be disposed in the second non-active area NA2. In the pad unit PAD, driving components including one or more flexible circuit boards (or flexible films) FCB and a printed circuit board 160 can be attached or bonded. The plurality of pad electrodes PE of the pad unit PAD can be electrically connected to the one or more flexible circuit boards (or flexible films) FCB and transmit various signals (or power) from the printed circuit board 160 and the flexible circuit board (or flexible film) FCB to the plurality of pixel driving circuits PD of the active area AA.

[0067] A flexible circuit board (or flexible film) FCB can be a film on which various components are disposed on a base film having ductility. For example, a driving IC (e.g., a gate driver IC or a data driver IC) can be disposed in the flexible circuit board (or flexible film) FCB, but exemplary embodiments of the present disclosure are not limited thereto. The driving IC can be a component that processes data and driving signals to display an image. The driving IC can be disposed according to a mounting method by a chip on glass (COG), a chip on film (COF), or a tape carrier package (TCP) technology, but exemplary embodiments of the present disclosure are not limited thereto. The flexible circuit board (or flexible film) FCB can be attached or bonded to the plurality of pad electrodes PE by a conductive adhesive layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0068] The printed circuit board 160 can be a component electrically connected to one or more flexible circuit boards (or flexible films) FCB and providing signals to the driving IC. The printed circuit board 160 is disposed on one side of the flexible circuit board (or flexible film) FCB to be electrically connected to the flexible circuit board (or flexible film) FCB. On the printed circuit board 160, various components for providing various signals to the driving IC can be disposed. For example, on the printed circuit board 160, various components such as a timing controller, a power supply, a memory, or a processor can be disposed. For example, the printed circuit board 160 can include a power management integrated circuit (PMIC), but exemplary embodiments of the present disclosure are not limited thereto.

[0069] The printed circuit board 160 can include at least one hole 180, but exemplary embodiments of the present disclosure are not limited thereto. An internal component that senses ambient light or temperature to be supplied to the plurality of sensors can be disposed in an area corresponding to the at least one hole 180. For example, the internal component can include an ambient light sensor (ALS) or a temperature sensor, but exemplary embodiments of the present disclosure are not limited thereto. For example, the hole 180 can be a transmission hole, but exemplary embodiments of the present disclosure are not limited thereto.

[0070] Referring to Figure 1 A polarization layer 293 can be disposed on the display panel 100. The polarization layer 293 can suppress or reduce an influence on the micro-LEDs caused by light generated from an external light source and entering the display panel 100.

[0071] The cover member 120 can be disposed on the polarizing layer 293. The cover member 120 can be a member for protecting the display panel 100. An adhesive layer 295 can be disposed between the polarizing layer 293 and the cover member 120. The cover member 120 can be attached to the display panel 100 using the adhesive layer 295. The adhesive layer 295 can include an optical clear adhesive (OCA), an optical clear resin (OCR), or a pressure sensitive adhesive (PSA), but exemplary embodiments of the present disclosure are not limited thereto.

[0072] The support substrate 170 can be disposed between the display panel 100 and the printed circuit board 160. The support substrate 170 can strengthen the rigidity of the display panel 100. The support substrate 170 can be a back plate, but exemplary embodiments of the present disclosure are not limited thereto.

[0073] Referring to Figures 1 to 3 The plurality of link lines LL can be disposed in the non-active area NA. The plurality of link lines LL can be wiring lines that transmit various signals from the one or more flexible circuit boards (or flexible films) FCB and the printed circuit board 160 to the active area AA. The plurality of link lines LL extend from the plurality of pad electrodes PE of the second non-active area NA2 toward the bending area BA and the first non-active area NA1 to be electrically connected to the plurality of drive lines VL of the active area AA. The plurality of pixel driving circuits PD can be provided with signals from the one or more flexible circuit boards (or flexible films) FCB and the printed circuit board 160 through the drive lines VL of the active area AA to be driven and the link lines LL of the non-active area NA.

[0074] For example, the plurality of drive lines VL can be wiring lines for transmitting signals output from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 to the plurality of pixel driving circuits PD together with the plurality of link lines LL. The plurality of drive lines VL are disposed in the active area AA to be electrically connected to each of the plurality of pixel driving circuits PD. The plurality of drive lines VL extend from the active area AA toward the non-active area NA to be electrically connected to the plurality of link lines LL. Accordingly, the signals output from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 can be transmitted to each of the plurality of pixel driving circuits PD through the plurality of link lines LL and the plurality of drive lines VL.

[0075] As the bending area BA is bent, parts of the plurality of link lines LL can be bent together. Stress is concentrated in the bent parts of the link lines LL, which can cause cracks on the link lines LL. Accordingly, the plurality of link lines LL can be configured of a conductive material having excellent ductility to reduce cracks caused when the bending area BA is bent. For example, the plurality of link lines LL can be configured of a conductive material having excellent ductility, such as gold (Au), silver (Ag), or aluminum (Al), but exemplary embodiments of the present disclosure are not limited thereto. Also, the plurality of link lines LL can be configured of one of various conductive materials for the active area AA. For example, the plurality of link lines LL can be configured of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy of silver (Ag) and magnesium (Mg), or an alloy thereof, but exemplary embodiments of the present disclosure are not limited thereto. The plurality of link lines LL can be configured of a multi-layer structure including various conductive materials. For example, the plurality of link lines LL can be configured with a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but exemplary embodiments of the present disclosure are not limited thereto.

[0076] The plurality of link lines LL can be configured in various shapes to reduce stress. At least a part of the plurality of link lines LL disposed on the bending area BA can extend in the same direction as the extension direction of the bending area BA, or extend in a direction different from the extension direction of the bending area BA, to reduce stress. For example, when the bending area BA extends in one direction from the first non-active area NA1 toward the second non-active area NA2, at least a part of the link lines LL disposed on the bending area BA can extend in a direction inclined with respect to the one direction. As another example, at least a part of the plurality of link lines LL can be configured in various shapes of patterns. For example, at least a part of the plurality of link lines LL disposed on the bending area BA can have a shape in which a conductive pattern having at least one of a diamond shape, a lozenge shape, a trapezoidal wave shape, a triangular wave shape, a sawtooth wave shape, a sinusoidal wave shape, a circle, an omega (Ω) shape can be repeatedly disposed. However, exemplary embodiments of the present disclosure are not limited thereto. Accordingly, to minimize stress concentrated on the plurality of link lines LL and cracks caused thereby, the shape of the plurality of link lines LL can be various shapes including the above-described shapes, but exemplary embodiments of the present disclosure are not limited thereto.

[0077] Figure 4 FIG. 1 is a view illustrating a circuit structure according to an exemplary embodiment of the present disclosure.

[0078] The pixel driving circuit PD can include a micro-driver μDriver. The micro-LED ED is electrically connected to the micro-driver μDriver of the pixel driving circuit PD to be driven. Although in Figure 4A micro LED ED is shown connected to a micro driver μDriver in FIG. 1, but the present disclosure is not limited thereto. For example, eight micro LEDs ED can be connected to one micro driver μDriver. As another example, 16 micro LEDs ED can be connected to one micro driver μDriver, or 32 micro LEDs ED, or 64 micro LEDs ED can be simultaneously connected to one micro driver μDriver. The micro LED ED can be a micro LED (μLED).

[0079] A micro driver μDriver can include a drive transistor T DR and an emission transistor T EM , but exemplary embodiments of the present disclosure are not limited thereto.

[0080] For example, a high potential power voltage VDD can be applied to a first electrode of the drive transistor T DR , and a first electrode of the emission transistor T EM can be connected to a second electrode of the drive transistor T DR , and a scan signal SC can be applied to a gate electrode of the drive transistor T DR . The scan signal SC applied to the gate electrode of the drive transistor T DR is a direct current (DC) power, and a fixed reference voltage can be applied in each frame, but exemplary embodiments of the present disclosure are not limited thereto.

[0081] A second electrode of the drive transistor T DR can be connected to a first electrode of the emission transistor T EM , a first electrode of the micro LED ED can be connected to a second electrode of the emission transistor T EM , and an emission signal EM can be applied to a gate electrode of the emission transistor T EM . The emission signal EM applied to the gate electrode of the emission transistor T EM may be a pulse width modulation signal that changes in each frame, but exemplary embodiments of the present disclosure are not limited thereto.

[0082] A first electrode of the micro LED ED can be connected to a second electrode of the emission transistor T EM , and a second electrode of the micro LED ED can be grounded. For example, the first electrode of the micro LED ED can be an anode electrode, and the second electrode of the micro LED ED can be a cathode electrode, but exemplary embodiments of the present disclosure are not limited thereto.

[0083] A drive transistor T DR and an emission transistor T EMEach of the transistors T1 to T4 can be an n-type transistor or a p-type transistor.

[0084] The drive transistor T DR can be turned on by a scan signal SC applied to the micro driver μDriver from a timing controller T-CON (not shown), and the emission transistor T EM can be turned on by an emission signal EM applied to the micro driver μDriver from the timing controller T-CON. By doing so, a drive current is applied to the micro LED ED through the high potential power voltage VDD applied to the first electrode of the drive transistor T DR and the emission transistor T DR . EM The micro LED ED can emit light.

[0085] Figures 5 to 8 is a plan view of a display apparatus according to an exemplary embodiment of the disclosure. For example, Figure 5 is an enlarged plan view of an active area including a plurality of pixels. For example, Figure 6 is an enlarged plan view of an active area including one pixel. For example, Figure 7 is an enlarged plan view in which a plurality of reflection plates RF (e.g., reflection plates RF1-RF3) are added to Figure 6 . For example, Figure 8 is an enlarged plan view of an active area including a plurality of pixels. In Figure 5 and Figure 7 , only a plurality of signal lines TL (e.g., signal lines TL1-TL6), a plurality of communication lines NL, a plurality of first electrodes CE1, a plurality of banks BNK, a plurality of micro LEDs ED, and a plurality of reflection plates RF are illustrated, but exemplary embodiments of the disclosure are not limited thereto. Figure 8 is an enlarged plan view in which a plurality of second electrodes CE2 are additionally provided to Figure 5 .

[0086] Referring to Figure 5 and Figure 6 , a plurality of pixels PX composed of a plurality of sub-pixels can be disposed in the active area AA. Each of the plurality of sub-pixels includes a micro LED ED and can independently emit light. The plurality of sub-pixels can be disposed in a matrix by forming a plurality of rows and a plurality of columns, but exemplary embodiments of the disclosure are not limited thereto.

[0087] The plurality of sub-pixels can include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, any one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be a red sub-pixel, another can be a green sub-pixel, and the third sub-pixel can be a blue sub-pixel. The types of the plurality of sub-pixels are illustrative, but exemplary embodiments of the present disclosure are not limited thereto.

[0088] Each of the plurality of pixels PX can include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, one pixel PX can include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 can be configured by a 1-1 sub-pixel SP1a and a 1-2 sub-pixel SP1b. The pair of second sub-pixels SP2 can be configured by a 2-1 sub-pixel SP2a and a 2-2 sub-pixel SP2b. The pair of third sub-pixels SP3 can be configured by a 3-1 sub-pixel SP3a and a 3-2 sub-pixel SP3b. For example, one pixel PX can include the 1-1 sub-pixel SP1a and the 1-2 sub-pixel SP1b, the 2-1 sub-pixel SP2a and the 2-2 sub-pixel SP2b, and the 3-1 sub-pixel SP3a and the 3-2 sub-pixel SP3b, but exemplary embodiments of the present disclosure are not limited thereto.

[0089] The plurality of sub-pixels forming one pixel PX can be disposed in various ways. For example, in one pixel PX, a pair of first sub-pixels SP1 can be disposed on the same column, a pair of second sub-pixels SP2 can be disposed on the same column, and a pair of third sub-pixels SP3 can be disposed on the same column. The first sub-pixels SP1, the second sub-pixels SP2, and the third sub-pixels SP3 can be disposed on the same row. The number and placement of the plurality of sub-pixels configuring one pixel PX are illustrative, but exemplary embodiments of the present disclosure are not limited thereto.

[0090] The plurality of signal lines TL can be disposed in the area between the plurality of sub-pixels. The plurality of signal lines TL can extend between the plurality of sub-pixels in the column direction. The plurality of signal lines TL can be wiring lines that transmit an anode voltage from the pixel driving circuit PD to the plurality of sub-pixels. For example, the plurality of signal lines TL can be electrically connected to the plurality of pixel driving circuits PD and the first electrodes CE1 of the plurality of sub-pixels. The anode voltage output from the pixel driving circuit PD can be transmitted to the first electrodes CE1 of the plurality of sub-pixels through the plurality of signal lines TL. The plurality of first electrodes CE1 can be electrically connected to the plurality of micro-LEDs, respectively. For example, the first electrode CE1 can be an anode electrode 134 electrically connected to the micro-LED ED (see FIG. 1A). Figure 10The anode voltage from the signal line TL can be transmitted to the anode electrode 134 of the micro-LED ED through the first electrode CE1. Thus, the anode voltage from the signal line TL can be transmitted to the anode electrode 134 of the micro-LED ED through the first electrode CE1.

[0091] Thus, instead of forming a plurality of transistors and storage capacitors in each of the plurality of sub-pixels, the pixel driving circuit PD in which a plurality of pixel circuits are integrated is used to simplify the structure of the display device 1000. Further, the circuits provided in each of the plurality of sub-pixels are integrated in one pixel driving circuit PD, so that efficient low-power driving is possible.

[0092] The plurality of signal lines TL can include a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. The first signal line TL1 and the second signal line TL2 can be electrically connected to a pair of first sub-pixels SP1, respectively. The third signal line TL3 and the fourth signal line TL4 can be electrically connected to a pair of second sub-pixels SP2, respectively. The fifth signal line TL5 and the sixth signal line TL6 can be electrically connected to a pair of third sub-pixels SP3, respectively.

[0093] The first signal line TL1 can be disposed on one of the pair of first sub-pixels SP1, and the second signal line TL2 can be disposed on the other of the pair of first sub-pixels SP1. The first signal line TL1 can be electrically connected to one of the pair of first sub-pixels SP1, for example, the first electrode CE1 of the 1-1 sub-pixel SP1a. The second signal line TL2 can be electrically connected to the other of the pair of first sub-pixels SP1, for example, the first electrode CE1 of the 1-2 sub-pixel SP1b.

[0094] The third signal line TL3 can be disposed on one of the pair of second sub-pixels SP2, and the fourth signal line TL4 can be disposed on the other of the pair of second sub-pixels SP2. For example, the third signal line TL3 can be disposed adjacent to the second signal line TL2. The third signal line TL3 can be electrically connected to one of the pair of second sub-pixels SP2, for example, the first electrode CE1 of the 2-1 sub-pixel SP2a. The fourth signal line TL4 can be electrically connected to the other of the pair of second sub-pixels SP2, for example, the first electrode CE1 of the 2-2 sub-pixel SP2b.

[0095] The fifth signal line TL5 can be provided on one of the pair of third sub-pixels SP3, and the sixth signal line TL6 can be provided on the other of the pair of third sub-pixels SP3. For example, the fifth signal line TL5 can be provided adjacent to the fourth signal line TL4. The sixth signal line TL6 can be provided adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 can be electrically connected to one of the pair of third sub-pixels SP3, for example, to the first electrode CE1 of the 3-1 sub-pixel SP3a. The sixth signal line TL6 can be electrically connected to the other of the pair of third sub-pixels SP3, for example, to the first electrode CE1 of the 3-2 sub-pixel SP3b.

[0096] The plurality of signal lines TL can be formed of a conductive material. For example, the plurality of signal lines TL can be configured of a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO). However, exemplary embodiments of the present disclosure are not limited thereto. As another example, the plurality of signal lines TL can be formed of a multi-layer structure of a conductive material. For example, the plurality of signal lines TL can be formed of a multi-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of the present disclosure are not limited thereto.

[0097] The plurality of communication lines NL can be provided in the area between the plurality of pixels PX. The plurality of communication lines NL can be provided to extend in the row direction in the area between the plurality of pixels PX. The plurality of communication lines NL can be provided in the area between the plurality of second electrodes CE2 and can not overlap the plurality of second electrodes CE2. For example, the plurality of communication lines NL can be wiring for short distance communication such as near field communication (NFC). The plurality of communication lines NL can be used as an antenna. For example, the plurality of communication lines NL can be a plurality of connection lines, but exemplary embodiments of the present disclosure are not limited thereto.

[0098] According to the present disclosure, a bank BNK can be provided in each of the plurality of sub-pixels. The plurality of banks BNK can be a structure in which the plurality of micro-LEDs ED are located. The plurality of banks BNK can guide the positions of the plurality of micro-LEDs ED during a transfer process of transferring the plurality of micro-LEDs ED to the display apparatus 1000. The plurality of micro-LEDs ED can be transferred onto the plurality of banks BNK in the transfer process of the plurality of micro-LEDs ED. The plurality of banks BNK can be a bank pattern or structure, but exemplary embodiments of the present disclosure are not limited thereto.

[0099] The banks BNK of the first sub-pixel SP1, the banks BNK of the second sub-pixel SP2, and the banks BNK of the third sub-pixel SP3 can be disposed to be spaced apart from each other. The banks BNK of the first sub-pixel SP1, the banks BNK of the second sub-pixel SP2, and the banks BNK of the third sub-pixel SP3 can be configured to be separated from each other. Accordingly, the banks BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, to which different types of micro LEDs are transferred, can be easily identified.

[0100] The banks BNK of the first-1 sub-pixel SP1a and the banks BNK of the first-2 sub-pixel SP1b can be connected to each other or spaced apart or separated from each other. For example, considering a design such as a transfer process requirement in which the banks BNK of the first-1 sub-pixel SP1a and the banks BNK of the first-2 sub-pixel SP1b, to which the same type of micro LED is disposed, can be connected to each other or spaced apart or separated from each other. The banks BNK of the second-1 sub-pixel SP2a and the banks BNK of the second-2 sub-pixel SP2b can be connected to each other, spaced apart, or separated from each other. The banks BNK of the third-1 sub-pixel SP3a and the banks BNK of the third-2 sub-pixel SP3b can be connected to each other, spaced apart, or separated from each other. Accordingly, the banks BNK of the pair of first sub-pixels SP1, the banks BNK of the pair of second sub-pixels SP2, and the banks BNK of the third sub-pixel SP3 can be formed in various forms, but exemplary embodiments of the disclosure are not limited thereto.

[0101] For example, the plurality of banks BNK can be formed of an organic insulating material. The plurality of banks BNK can be configured of a single layer or a double layer of an organic insulating material. For example, the plurality of banks BNK can be configured of a photoresist, polyimide (PI), or an acrylic material, but exemplary embodiments of the disclosure are not limited thereto.

[0102] The first electrode CE1 can be provided in each of the plurality of sub-pixels. The first electrode CE1 can be provided on the bank BNK. The first electrode CE1 can be electrically connected to one of the plurality of signal lines TL. At least a portion of the first electrode CE1 extends outside the bank BNK to be electrically connected to the signal line TL most adjacent to the first electrode CE1. For example, a portion of the first electrode CE1 of the 1-1 sub-pixel SP1a extends to one area of the 1-1 sub-pixel SP1a to be electrically connected to the first signal line TL1. A portion of the first electrode CE1 of the 1-2 sub-pixel SP1b extends to another area of the 1-2 sub-pixel SP1b to be electrically connected to the second signal line TL2. A portion of the first electrode CE1 of the 2-1 sub-pixel SP2a extends to one area of the 2-1 sub-pixel SP2a to be electrically connected to the third signal line TL3. A portion of the first electrode CE1 of the 2-2 sub-pixel SP2b extends to another area of the 2-2 sub-pixel SP2b to be electrically connected to the fourth signal line TL4. A portion of the first electrode CE1 of the 3-1 sub-pixel SP3a extends to one area of the 3-1 sub-pixel SP3a to be electrically connected to the fifth signal line TL5. A portion of the first electrode CE1 of the 3-2 sub-pixel SP3b extends to another area of the 3-2 sub-pixel SP3b to be electrically connected to the sixth signal line TL6.

[0103] The first electrode CE1 can be electrically connected to the anode electrode 134 of the micro-LED ED and transmit an anode voltage from the pixel driving circuit PD to the micro-LED ED through the signal line TL. Depending on an image to be displayed, different voltages can be applied to the first electrodes CE1 of the plurality of sub-pixels. For example, different voltages can be applied to the first electrodes CE1 of the plurality of sub-pixels. Accordingly, the first electrode CE1 can be a pixel electrode, but exemplary embodiments of the disclosure are not limited thereto.

[0104] The first electrode CE1 can be configured of a conductive material. For example, the first electrode CE1 can be integrally configured with the plurality of signal lines TL. For example, the first electrode CE1 can be configured of the same conductive material as the plurality of signal lines TL, but exemplary embodiments of the disclosure are not limited thereto. For example, the first electrode CE1 can be configured of a conductive material, such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO). However, exemplary embodiments of the disclosure are not limited thereto. As another example, the first electrode CE1 can be configured of a multi-layer structure of a conductive material. For example, the plurality of first electrodes CE1 can be configured of a multi-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of the disclosure are not limited thereto.

[0105] The plurality of micro-LEDs ED can be respectively disposed in the plurality of sub-pixels. The plurality of micro-LEDs ED can be respectively disposed on the bank BNK and electrically connected to the pixel driving circuit PD. The plurality of micro-LEDs ED can be disposed on the bank BNK and the first electrode CE1. The plurality of micro-LEDs ED can be disposed on the first electrode CE1 and can be electrically connected to the first electrode CE1. Accordingly, the micro-LEDs ED apply an anode voltage from the pixel driving circuit PD through the signal line TL and the first electrode CE1 to emit light.

[0106] The plurality of micro-LEDs ED can include a first micro-LED 130, a second micro-LED 140, and a third micro-LED 150. The first micro-LED 130 can be disposed in a first sub-pixel SP1. The second micro-LED 140 can be disposed in a second sub-pixel SP2. The third micro-LED 150 can be disposed in a third sub-pixel SP3. For example, any one of the first micro-LED 130, the second micro-LED 140, and the third micro-LED 150 can be a red micro-LED, another can be a green micro-LED, and the third can be a blue micro-LED, but exemplary embodiments of the present disclosure are not limited thereto. Accordingly, red light, green light, and blue light emitted from the plurality of micro-LEDs ED are combined to realize light of various colors including white. The types of the plurality of micro-LEDs ED are illustrative, but exemplary embodiments of the present disclosure are not limited thereto.

[0107] The first micro-LED 130 can include a first-1 micro-LED 130a disposed in a first-1 sub-pixel SP1a and a first-2 micro-LED 130b disposed in a first-2 sub-pixel SP1b. The second micro-LED 140 can include a second-1 micro-LED 140a disposed in a second-1 sub-pixel SP2a and a second-2 micro-LED 140b disposed in a second-2 sub-pixel SP2b. The third micro-LED 150 can include a third-1 micro-LED 150a disposed in a third-1 sub-pixel SP3a and a third-2 micro-LED 150b disposed in a third-2 sub-pixel SP3b.

[0108] Referring to Figure 7 The plurality of reflective plates RF can be disposed to surround the plurality of micro-LEDs ED. The plurality of reflective plates RF can be disposed along the boundary or outer contour of the bank BNK. Accordingly, the plurality of reflective plates RF can extend in a first direction (e.g., a column direction) and be spaced apart from each other in a second direction (e.g., a row direction), the same as the bank BNK, but is not limited thereto.

[0109] A plurality of reflection plates RF are disposed adjacent to side surfaces of the plurality of micro-LEDs ED to reflect light emitted from the plurality of micro-LEDs ED to be guided to the side surfaces of the plurality of micro-LEDs ED, to be guided to the front surfaces of the plurality of micro-LEDs ED, thereby improving light extraction efficiency.

[0110] Specifically, the plurality of reflection plates RF can include first, second, and third reflection plates RF1, RF2, and RF3 spaced apart from each other in each of the first, second, and third sub-pixels SP1, SP2, and SP3.

[0111] For example, the first reflection plate RF1 can be disposed to surround the 1-1 and 1-2 micro-LEDs 130a and 130b disposed in the first sub-pixel SP1. That is, the 1-1 and 1-2 micro-LEDs 130a and 130b disposed in the first sub-pixel SP1 can share the first reflection plate RF1, but are not limited thereto.

[0112] The second reflection plate RF2 can be disposed to surround the 2-1 and 2-2 micro-LEDs 140a and 140b disposed in the second sub-pixel SP2. The 2-1 and 2-2 micro-LEDs 140a and 140b disposed in the second sub-pixel SP2 can share the second reflection plate RF2, but are not limited thereto.

[0113] The third reflection plate RF3 can be disposed to surround the 3-1 and 3-2 micro-LEDs 150a and 150b disposed in the third sub-pixel SP3. That is, the 3-1 and 3-2 micro-LEDs 150a and 150b disposed in the third sub-pixel SP3 can share the third reflection plate RF3, but are not limited thereto.

[0114] Reference will be made below to Figure 9A The specific contents of the plurality of reflection plates RF will be described in detail.

[0115] Reference will be made below to Figures 5 to 8 The second electrode CE2 can be disposed in each of the plurality of sub-pixels. The second electrode CE2 can be disposed on the micro-LEDs ED and the plurality of reflection plates RF. The second electrode CE2 can be electrically connected to the pixel driving circuit PD through the plurality of contact electrodes CCE.

[0116] For example, the second electrode CE2 is electrically connected to the cathode electrode 135 of the micro-LED ED (see FIG. 1A). Figure 10) to transmit a cathode voltage from the pixel driving circuit PD to the micro-LED ED. The same cathode voltage can be applied to the second electrodes CE2 of a plurality of sub-pixels. For example, the same voltage can be applied to the second electrodes CE2 of each of a plurality of sub-pixels and the cathode electrode 135 of the micro-LED ED. Thus, the second electrodes CE2 can be common electrodes, but exemplary embodiments of the present disclosure are not limited thereto.

[0117] At least some of the plurality of sub-pixels can share the second electrodes CE2. At least some of the second electrodes CE2 of the plurality of sub-pixels can be electrically connected to each other. When the same voltage is applied to the second electrodes CE2, the second electrodes CE2 of at least some of the sub-pixels can be shared and used. For example, the second electrodes CE2 of at least some of the pixels PX disposed on the same row among the plurality of pixels PX can be connected to each other. For example, one second electrode CE2 can be disposed in the plurality of pixels PX. One second electrode CE2 can be disposed in every n sub-pixels.

[0118] For example, some of the second electrodes CE2 of the plurality of sub-pixels can be spaced apart or separated from each other. For example, the second electrodes CE2 connected to the pixels PX in the nth row and the second electrodes CE2 connected to the pixels PX in the (n+1)th row can be spaced apart or separated from each other. For example, the plurality of second electrodes CE2 can be spaced apart from each other with the plurality of communication lines NL extending therebetween in the row direction. Thus, the number of the plurality of sub-pixels can be greater than the number of the plurality of second electrodes CE2. As another example, all of the second electrodes CE2 of the plurality of sub-pixels are connected to each other such that only one second electrode CE2 can be disposed on the substrate 110, but exemplary embodiments of the present disclosure are not limited thereto.

[0119] The plurality of second electrodes CE2 can be configured of a transparent conductive material, but exemplary embodiments of the present disclosure are not limited thereto. The plurality of second electrodes CE2 is configured of a transparent conductive material such that light emitted from the micro-LED ED can travel toward the top of the second electrode CE2. For example, the second electrode CE2 can be configured of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), but exemplary embodiments of the present disclosure are not limited thereto.

[0120] A plurality of contact electrodes CCE can be disposed on the substrate 110. For example, the plurality of contact electrodes CCE can be disposed to be spaced apart from the plurality of banks BNK and the plurality of signal lines TL. Each of the plurality of second electrodes CE2 can overlap at least one contact electrode CCE. For example, one second electrode CE2 can overlap the plurality of contact electrodes CCE.

[0121] For example, the plurality of contact electrodes CCE can be electrically connected to the plurality of second electrodes CE2. The plurality of contact electrodes CCE is disposed between the substrate 110 and the plurality of second electrodes CE2 to transmit a cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0122] For example, when the micro-LED ED is used as a micro-LED ED, a plurality of micro-LEDs can be formed on a wafer, and the micro-LEDs can be transferred to the substrate 110 of the display apparatus 1000 to manufacture the display apparatus 1000. However, various defects can occur during a process of transferring a plurality of micro-LEDs ED having a micro size from the wafer to the substrate 110. For example, in some sub-pixels, a non-transfer defect in which a micro-LED is not transferred can occur, and in another sub-pixel, a defect in which a micro-LED ED is transferred at a wrong position can occur due to an alignment error. In addition, even if the transfer process is normally performed, the transferred micro-LED ED can be defective. Therefore, considering defects during a transfer process of a plurality of micro-LEDs ED, a plurality of micro-LEDs of the same type can be transferred in one sub-pixel. An illumination test is performed on the plurality of micro-LEDs ED, and only one micro-LED ED that is finally determined to be normal can be used.

[0123] For example, the 1-1 micro-LED 130a and the 1-2 micro-LED 130b are transferred together to one pixel PX, and defects thereof can be tested. If both the 1-1 micro-LED 130a and the 1-2 micro-LED 130b are determined to be normal, only the 1-1 micro-LED 130a can be used, and the 1-2 micro-LED 130b can not be used. As another example, if only the 1-2 micro-LED 130b among the 1-1 micro-LED 130a and the 1-2 micro-LED 130b is determined to be normal, the 1-1 micro-LED 130a can not be used, and only the 1-2 micro-LED 130b can be used. Therefore, even if a plurality of micro-LEDs ED of the same type are transferred to one pixel PX, only one micro-LED ED can be finally used.

[0124] Therefore, any one of a pair of micro-LEDs ED can be a main (or primary) micro-LED ED, and the other micro-LED ED can be a redundant micro-LED ED. The redundant micro-LED ED can be an additional micro-LED ED that is transferred in preparation for a defect of the main micro-LED ED. The redundant micro-LED ED can be used instead when the main micro-LED ED is defective. Therefore, the main micro-LED ED and the redundant micro-LED ED are transferred together to one pixel PX so that degradation in display quality due to defects of the main micro-LED ED and the redundant micro-LED ED can be minimized.

[0125] For example, the 1-1 micro-LED 130a, the 2-1 micro-LED 140a, and the 3-1 micro-LED 150a transferred to one pixel PX can be used as a main micro-LED ED, and the 1-2 micro-LED 130b, the 2-2 micro-LED 140b, and the 3-2 micro-LED 150b can be used as a redundant micro-LED ED, but are not limited thereto.

[0126] Figures 9A to 11 is a cross-sectional view of a display apparatus according to an exemplary embodiment of the disclosure. For example, Figure 9A is a cross-sectional view of the active area AA taken along Figure 7 A-A' of the display apparatus 1000. For example, Figure 9B is a cross-sectional view of the active area AA taken along Figure 7 B-B' of the display apparatus 1000. For example, Figure 10 is an enlarged cross-sectional view of the first sub-pixel SP1. For example, Figure 11 is a cross-sectional view taken along Figure 3 XI-XI' of the display apparatus 1000. Referring to Figure 9A , Figure 9B and Figure 11 , the first buffer layer 111a and the second buffer layer 111b can be disposed in the remaining area of the substrate 110 except for the bending area BA.

[0127] The first buffer layer 111a and the second buffer layer 111b can be disposed in the active area AA, the first non-active area NA1, and the second non-active area NA2. The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be formed of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be configured by a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but exemplary embodiments of the disclosure are not limited thereto.

[0128] For example, the first buffer layer 111a and the second buffer layer 111b on the bending area BA can be partially removed. The top surface of the substrate 110 located in the bending area BA can be exposed from the first buffer layer 111a and the second buffer layer 111b. The first buffer layer 111a and the second buffer layer 111b formed of an inorganic insulating material are removed from the bending area BA to minimize cracks of the first buffer layer 111a and the second buffer layer 111b that can be generated during bending.

[0129] A plurality of alignment keys MK can be disposed between the first buffer layer 111a and the second buffer layer 111b. The plurality of alignment keys MK can be configured to identify a position of the pixel driving circuit PD during a manufacturing process of the display apparatus 1000. For example, the plurality of alignment keys MK can be configured to align a position of the pixel driving circuit PD transferred onto the adhesive layer 112. As another example, the plurality of alignment keys MK can be omitted.

[0130] The adhesive layer 112 can be disposed on the second buffer layer 111b. The adhesive layer 112 can be disposed in the active area AA, the first non-active area NA1, the bending area BA, and the second non-active area NA2. As another example, at least a portion of the adhesive layer 112 can be removed in the non-active area NA including the bending area BA. For example, the adhesive layer 112 can be formed of any one of an adhesive polymer, an epoxy resin, a UV curable resin, a polyimide-based, an acrylate-based, a polyurethane-based, and a polydimethylsiloxane (PDMS), but exemplary embodiments of the present disclosure are not limited thereto.

[0131] The pixel driving circuit PD can be disposed on the adhesive layer 112 in the active area AA. When the pixel driving circuit PD is implemented as a driving driver, the driving driver can be mounted on the adhesive layer 112 through a transfer process, but exemplary embodiments of the present disclosure are not limited thereto.

[0132] The first protective layer 113a and the second protective layer 113b can be disposed on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b can be disposed to surround a side surface of the pixel driving circuit PD, but exemplary embodiments of the present disclosure are not limited thereto. For example, the second protective layer 113b can be disposed to cover at least a portion of a top surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b disposed on the bending area BA can be omitted. For example, the first protective layer 113a can be completely disposed in the active area AA and the non-active area NA, and the second protective layer 113b can be partially disposed in the active area AA, the first non-active area NA1, and the second non-active area NA2. For example, a portion of the second protective layer 113b in the bending area BA can be removed. However, exemplary embodiments of the present disclosure are not limited thereto.

[0133] The first protective layer 113a and the second protective layer 113b can be configured of an organic insulating material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be configured of a photoresist, polyimide (PI), or a photoacryl material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be positioned above a coating layer or an insulating layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0134] According to the present disclosure, in the active area AA, a plurality of first connection lines 121 can be disposed on the second protective layer 113b. The plurality of first connection lines 121 can be a wiring electrically connecting the pixel driving circuit PD to other components. For example, the pixel driving circuit PD can be electrically connected to the plurality of signal lines TL and the plurality of contact electrodes CCE through the plurality of first connection lines 121. For example, the plurality of first connection lines 121 can include a 1-1 connection line 121a, a 1-2 connection line 121b, a 1-3 connection line 121c, and a 1-4 connection line 121b, but exemplary embodiments of the present disclosure are not limited thereto.

[0135] For example, the plurality of 1-1 connection lines 121a can be disposed on the second protective layer 113b. The plurality of 1-1 connection lines 121a can be electrically connected to the pixel driving circuit PD. The plurality of 1-1 connection lines 121a can transmit a voltage output from the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0136] For example, the third protective layer 114 can be disposed on the second protective layer 113b. The third protective layer 114 can be completely disposed in the active area AA and the non-active area NA. In the bending area BA, the third protective layer 114 can cover the side surface of the second protective layer 113b and the top surface of the first protective layer 113a. The third protective layer 114 can be configured of an organic insulating material. For example, the third protective layer 114 can be configured of a photoresist, polyimide (PI), or a photoacryl material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 can be configured of the same material, but exemplary embodiments of the present disclosure are not limited thereto.

[0137] A plurality of 1st-2 connection lines 121b can be disposed on the third protection layer 114. The plurality of 1st-2 connection lines 121b can be indirectly or directly connected to the pixel driving circuit PD. For example, a portion of the 1st-2 connection lines 121b can be directly connected to the pixel driving circuit PD through a contact hole of the third protection layer 114. Another portion of the 1st-2 connection lines 121b can be electrically connected to the 1st-1 connection lines 121a through a contact hole of the third protection layer 114. However, the exemplary embodiments of the present disclosure are not limited thereto. A voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 or the second electrode CE2 through a connection line other than the plurality of 1st-2 connection lines 121b.

[0138] A plurality of insulating layers can be disposed on the pixel driving circuit PD. A first insulating layer 115a can be disposed on the plurality of 1st-2 connection lines 121b. The first insulating layer 115a can be completely disposed in the active area AA and the non-active area NA, but the exemplary embodiments of the present disclosure are not limited thereto. The first insulating layer 115a can be composed of an organic insulating material, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 115a can be configured by a photoresist, a polyimide (PI), or a photoacrylic material, but the exemplary embodiments of the present disclosure are not limited thereto.

[0139] A plurality of 1st-3 connection lines 121c can be disposed on the first insulating layer 115a. The plurality of 1st-3 connection lines 121c can be electrically connected to the plurality of 1st-2 connection lines 121b. For example, the 1st-3 connection lines 121c can be electrically connected to the 1st-2 connection lines 121b through a contact hole of the first insulating layer 115a.

[0140] A second insulating layer 115b can be disposed on the plurality of 1st-3 connection lines 121c. The second insulating layer 115b can be disposed in a remaining area except for the bending area BA, but the exemplary embodiments of the present disclosure are not limited thereto. The second insulating layer 115b can be disposed in the active area AA, the first non-active area NA1, and the second non-active area NA2, but the exemplary embodiments of the present disclosure are not limited thereto. For example, a portion of the second insulating layer 115b disposed in the bending area BA can be removed. The second insulating layer 115b can be composed of an organic insulating material, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the second insulating layer 115b can be configured by a photoresist, a polyimide (PI), or a photoacrylic material, but the exemplary embodiments of the present disclosure are not limited thereto.

[0141] A plurality of 1st-4 connection lines 121d can be disposed on the second insulating layer 115b. The plurality of 1st-4 connection lines 121d can be electrically connected to the plurality of 1st-3 connection lines 121c. For example, the 1st-4 connection lines 121d can be electrically connected to the 1st-3 connection lines 121c through a contact hole of the second insulating layer 115b.

[0142] According to the disclosure, in the non-active area NA, a plurality of second connection lines 122 can be disposed on the second protective layer 113b. The plurality of second connection lines 122 can be a wiring that transmits a signal transmitted from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 (see Figure 1 ) to the pixel driving circuit PD of the active area AA. For example, the plurality of second connection lines 122 are electrically connected to the plurality of pad electrodes PE to be applied with a signal from the flexible circuit board (or flexible film) FCB and the printed circuit board.

[0143] For example, the plurality of second connection lines 122 extend from the pad unit PAD toward the active area AA to transmit a signal to the wiring of the active area AA. In this case, the plurality of second connection lines 122 can function as the link line LL. The plurality of second connection lines 122 can include a 2-1 connection line 122a, a 2-2 connection line 122b, a 2-3 connection line 122c, and a 2-4 connection line 122d.

[0144] The plurality of 2-1 connection lines 122a can be disposed on the second protective layer 113b. The plurality of 2-1 connection lines 122a can extend from the second non-active area NA2 to the bending area BA and the first non-active area NA1. The plurality of 2-1 connection lines 122a can transmit a signal transmitted from the flexible circuit board (or flexible film) FCB and the printed circuit board to the pixel driving circuit PD of the active area AA.

[0145] The plurality of 2-2 connection lines 122b can be disposed on the third protective layer 114. The plurality of 2-2 connection lines 122b can be disposed in the second non-active area NA2. The 2-2 connection line 122b can be electrically connected to the 2-1 connection line 122a through a contact hole of the third protective layer 114. Accordingly, a signal from the flexible circuit board (or flexible film) FCB and the printed circuit board can be transmitted to the 2-1 connection line 122a through the 2-2 connection line 122b.

[0146] The 2-3 connection line 122c can be disposed on the first insulating layer 115a. The 2-3 connection line 122c can be disposed in the second non-active area NA2. The 2-3 connection line 122c can be electrically connected to the 2-2 connection line 122b through a contact hole of the first insulating layer 115a. Accordingly, a signal from the flexible circuit board (or flexible film) FCB and the printed circuit board can be transmitted to the 2-1 connection line 122a through the 2-3 connection line 122c and the 2-2 connection line 122b.

[0147] The 2-4 connection line 122d can be disposed on the second insulating layer 115b. The 2-4 connection line 122d can be disposed in the second non-active area NA2. The 2-4 connection line 122d can be electrically connected to the 2-3 connection line 122c through a contact hole of the second insulating layer 115b. Accordingly, signals from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 can be transmitted to the 2-1 connection line 122a through the 2-4 connection line 122d, the 2-3 connection line 122c, and the 2-2 connection line 122b.

[0148] The plurality of first connection lines 121 and the plurality of second connection lines 122 can be formed of a conductive material having excellent ductility or any one of various conductive materials used for the active area AA. For example, the second connection line 122 disposed partially in the bending area BA can be configured of a conductive material having excellent ductility, such as gold (Au), silver (Ag), or aluminum (Al), but exemplary embodiments of the present disclosure are not limited thereto. As another example, the plurality of first connection lines 121 and the plurality of second connection lines 122 can be configured of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy of silver (Ag) and magnesium (Mg), or an alloy thereof, but exemplary embodiments of the present disclosure are not limited thereto.

[0149] The third insulating layer 115c can be disposed on the plurality of first connection lines 121 and the plurality of second connection lines 122. The third insulating layer 115c can be disposed in a remaining area except for the bending area BA, but exemplary embodiments of the present disclosure are not limited thereto. The third insulating layer 115c can be disposed in the active area AA, the first non-active area NA1, and the second non-active area NA2. A portion of the third insulating layer 115c disposed in the bending area BA can be removed. The third insulating layer 115c can be composed of an organic insulating material, but exemplary embodiments of the present disclosure are not limited thereto. For example, the third insulating layer 115c can be configured of a photoresist, polyimide (PI), or a photoacryl material, but exemplary embodiments of the present disclosure are not limited thereto.

[0150] The plurality of banks BNK can be disposed on the plurality of insulating layers. The plurality of banks BNK can be disposed on the third insulating layer 115c in the active area AA. The plurality of banks BNK can be disposed to overlap each of the plurality of sub-pixels. One or more micro-LEDs ED of the same type can be disposed above each of the plurality of banks BNK.

[0151] The plurality of signal lines TL can be disposed on the third insulating layer 115c in the active area AA. The plurality of signal lines TL can be disposed in an area between the plurality of banks BNK. For example, the plurality of signal lines TL can be disposed adjacent to any one of the plurality of banks BNK.

[0152] A plurality of contact electrodes CCE can be disposed on the third insulating layer 115c in the active area AA. The plurality of contact electrodes CCE can supply a cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0153] The first electrode CE1 can be disposed on the bank BNK. For example, the first electrode CE1 can be disposed to extend from the adjacent signal line TL toward the top of the bank BNK. The first electrode CE1 can be disposed on the top surface of the bank BNK and the side surface of the bank BNK. For example, the first electrode CE1 can be disposed to extend from the signal line TL on the top surface of the third insulating layer 115c to the side surface of the bank BNK and the top surface of the bank BNK.

[0154] Referring to Figure 10 The first electrode CE1 can be composed of a plurality of conductive layers. For example, the first electrode CE1 can include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but exemplary embodiments of the disclosure are not limited thereto.

[0155] The first conductive layer CE1a can be disposed on the bank BNK. The second conductive layer CE1b can be disposed on the first conductive layer CE1a. The third conductive layer CE1c can be disposed on the second conductive layer CE1b. The fourth conductive layer CE1d can be disposed on the third conductive layer CE1c. For example, the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be configured of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but exemplary embodiments of the disclosure are not limited thereto.

[0156] According to the disclosure, among the plurality of conductive layers configuring the first electrode CE1, some conductive layers having good reflection efficiency can be configured as an alignment key for aligning the micro-LED ED and / or the reflection plate. For example, the second conductive layer CE1b among the plurality of conductive layers of the first electrode CE1 can include a reflective material. For example, the second conductive layer CE1b can include aluminum (Al), but exemplary embodiments of the disclosure are not limited thereto. Accordingly, the second conductive layer CE1b can be configured as a reflection plate. In addition, the second conductive layer CE1b has high reflection efficiency that is easily recognized during a manufacturing process, so that the position of the micro-LED ED or the transfer position can be aligned based on the second conductive layer CE1b.

[0157] For example, to configure the second conductive layer CE1b as a reflection plate, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, a portion of the third conductive layer CE1c and the fourth conductive layer CE1d disposed on the bank BNK is removed or etched to expose the top surface of the second conductive layer CE1b. For example, a central portion and an edge portion (or a boundary portion) of the third conductive layer CE1c and the fourth conductive layer CE1d in which the solder pattern SDP is disposed are left, and the remaining portion other than these portions can be removed. For example, the edge portion (or the boundary portion) of each of the third conductive layer CE1c formed of titanium (Ti) and the fourth conductive layer CE1d formed of indium tin oxide (ITO) can not be etched. Accordingly, corrosion of another conductive layer of the first electrode CE1 caused by tetramethylammonium hydroxide (TMAH) solution used in a mask process for the first electrode CE1 can be suppressed.

[0158] According to the disclosure, the first conductive layer CE1a and the third conductive layer CE1c can include titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b can include aluminum (Al). The fourth conductive layer CE1d can include a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion with the solder pattern SDP and has corrosion resistance and acid resistance. However, exemplary embodiments of the disclosure are not limited thereto.

[0159] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d are sequentially deposited, and then a photolithography process and an etching process are performed to be patterned. However, exemplary embodiments of the disclosure are not limited thereto.

[0160] According to the disclosure, the signal line TL, the contact electrode CCE, and the pad electrode PE disposed on the same layer as the first electrode CE1 can be composed of a multi-layer conductive material, but exemplary embodiments of the disclosure are not limited thereto. For example, the signal line TL, the contact electrode CCE, and the pad electrode PE can be formed of a multi-layer indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but exemplary embodiments of the disclosure are not limited thereto.

[0161] According to the disclosure, a solder pattern SDP can be disposed on the first electrode CE1 in each of the plurality of sub-pixels. The solder pattern SDP can be disposed between the first electrode CE1 and the anode electrode 134 of the micro-LED ED and bond the micro-LED ED to the first electrode CE1. The first electrode CE1 and the micro-LED ED can be electrically connected by eutectic bonding using the solder pattern SDP, but exemplary embodiments of the disclosure are not limited thereto. For example, when the solder pattern SDP is configured by indium (In) and the anode electrode 134 of the micro-LED ED is configured by gold (Au), heat and pressure are applied to bond the solder pattern SDP and the anode electrode 134 during a transfer process of the micro-LED ED. The micro-LED ED can be bonded to the first electrode CE1 by eutectic bonding using the solder pattern SDP without a separate adhesive material. For example, the solder pattern SDP can be configured by indium (In), tin (Sn), or an alloy thereof, but exemplary embodiments of the disclosure are not limited thereto. For example, the solder pattern SDP can be a bonding pad or an adhesive pad, but exemplary embodiments of the disclosure are not limited thereto.

[0162] According to the disclosure, the passivation layer 116 can be disposed on the plurality of signal lines TL, the plurality of first electrodes CE1, the plurality of contact electrodes CCE, and the third insulating layer 115c. For example, the passivation layer 116 can be disposed in the active area AA, the first non-active area NA1, and the second non-active area NA2. A portion of the passivation layer 116 disposed in the bending area BA can be removed. A portion of the passivation layer 116 covering the plurality of pad electrodes PE in the second non-active area NA2 can be removed. The passivation layer 116 is disposed to cover the remaining area except for the bending area BA, the plurality of pad electrodes PE, and the solder pattern SDP to reduce penetration of moisture or impurities into the micro-LED ED. For example, the passivation layer 116 can be configured by a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but exemplary embodiments of the disclosure are not limited thereto. For example, the passivation layer 116 can be a protective layer or an insulating layer, but exemplary embodiments of the disclosure are not limited thereto. For example, the passivation layer 116 can include a hole exposing the solder pattern SDP.

[0163] In each of the plurality of sub-pixels, the micro-LED ED can be disposed on the solder pattern SDP. The first micro-LED 130 can be disposed in the first sub-pixel SP1. The second micro-LED 140 can be disposed in the second sub-pixel SP2. The third micro-LED 150 can be disposed in the third sub-pixel SP3.

[0164] The micro-LED EDs can be formed on a silicon wafer using metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or a sputtering method. However, exemplary embodiments of the present disclosure are not limited thereto.

[0165] Referring to Figure 10 Each of the micro-LED EDs can include, for example, an anode electrode 130, a first semiconductor layer 131 disposed on the anode electrode 130, an active layer 132 disposed on the first semiconductor layer 131, a second semiconductor layer 133 disposed on the active layer 132, a cathode electrode 135 having a vertical type structure disposed on the second semiconductor layer 133, and an encapsulation film 136, but exemplary embodiments of the present disclosure are not limited thereto. For example, the encapsulation film 136 can not be included in the first micro-LED 130.

[0166] The first semiconductor layer 131 can be disposed on the solder pattern SDP. The second semiconductor layer 133 can be disposed above the first semiconductor layer 131.

[0167] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be implemented by a compound semiconductor such as a III-V group or a II-VI group, and can be doped with an impurity (or a dopant). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be an n-type impurity-doped semiconductor layer, and the other can be a p-type impurity-doped semiconductor, but exemplary embodiments of the present disclosure are not limited thereto. For example, one or more of the first semiconductor layer 131 and the second semiconductor layer 133 can be a layer in which an n-type or a p-type impurity is doped on a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs). However, exemplary embodiments of the present disclosure are not limited thereto. For example, the n-type impurity can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but exemplary embodiments of the present disclosure are not limited thereto. For example, the p-type impurity can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but exemplary embodiments of the present disclosure are not limited thereto.

[0168] For example, each of the first semiconductor layer 131 and the second semiconductor layer 133 can be a nitride semiconductor including an n-type impurity or a nitride semiconductor including a p-type impurity, but exemplary embodiments of the present disclosure are not limited thereto. For example, the first semiconductor layer 131 can be a nitride semiconductor including a p-type impurity, and the second semiconductor layer 133 can be a nitride semiconductor including an n-type impurity, but exemplary embodiments of the present disclosure are not limited thereto.

[0169] The active layer 132 can be disposed between the first semiconductor layer 131 and the second semiconductor layer 133. Holes and electrons can be provided from the first semiconductor layer 131 and the second semiconductor layer 133 to the active layer 132 to emit light. For example, the active layer 132 can be configured by one of a single-well structure, a multi-well structure, a signal quantum well structure, a multi-quantum well (MQC) structure, a quantum dot structure, and a quantum wire structure, but exemplary embodiments of the present disclosure are not limited thereto. For example, the active layer 132 can be configured by indium gallium nitride (InGaN) or gallium nitride (GaN), but exemplary embodiments of the present disclosure are not limited thereto.

[0170] As another example, the active layer 132 can have a multi-quantum well (MQW) structure having a well layer and a barrier layer having a band gap higher than that of the well layer. For example, in the active layer 132, InGaN can be configured as the well layer, and an AlGaN layer can be configured as the barrier layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0171] The anode electrode 134 can be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode electrode 134 can electrically connect the first semiconductor layer 131 and the first electrode CE1. An anode voltage output from the pixel circuit PD can be applied to the first semiconductor layer 131 through the signal line TL, the first electrode CE1, and the anode electrode 134. For example, the anode electrode 134 can be configured by a conductive material that can form a eutectic junction with the solder pattern SDP, but exemplary embodiments of the present disclosure are not limited thereto. For example, the anode electrode 134 can be configured by gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or an alloy thereof, but exemplary embodiments of the present disclosure are not limited thereto.

[0172] The cathode electrode 135 can be disposed on the second semiconductor layer 133. For example, the cathode electrode 135 can electrically connect the second semiconductor layer 133 and the second electrode CE2. The cathode voltage output from the pixel driving circuit PD can be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode electrode 135. The cathode electrode 135 can be configured of a transparent conductive material to allow light emitted from the micro-LED ED to be directed to the top of the micro-LED ED, but exemplary embodiments of the present disclosure are not limited thereto. For example, the cathode electrode 135 can be configured of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but exemplary embodiments of the present disclosure are not limited thereto.

[0173] The encapsulation film 136 can be disposed in at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the encapsulation film 136 can surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0174] For example, the encapsulation film 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 can be disposed on the side surface of the first semiconductor layer 131, the side surface of the active layer 132, and the side surface of the second semiconductor layer 133.

[0175] For example, the encapsulation film 136 can be disposed on at least a portion of the anode electrode 134 and the cathode electrode 135, for example, on the edge portion (or boundary portion or one side) of the anode electrode 134 and the edge portion (or boundary portion or one side) of the cathode electrode 135. At least a portion of the anode electrode 134 is exposed from the encapsulation film 136 so that the anode electrode 134 and the solder pattern SDP can be connected. For example, at least a portion of the cathode electrode 135 is exposed from the encapsulation film 136 so that the cathode electrode 135 and the second electrode CE2 can be connected. For example, the encapsulation film 136 can be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but exemplary embodiments of the present disclosure are not limited thereto.

[0176] As another example, the encapsulation film 136 can have a structure in which a reflective material is dispersed in a resin layer, but exemplary embodiments of the present disclosure are not limited thereto. For example, the encapsulation film 136 can be manufactured with a reflector (reflection plate) having various structures, but exemplary embodiments of the present disclosure are not limited thereto. Light emitted from the active layer 132 is reflected upward by the encapsulation film 136, and thus light extraction efficiency can be improved. For example, the encapsulation film 136 can be a reflection layer, but exemplary embodiments of the present disclosure are not limited thereto.

[0177] According to the disclosure, the micro-LED ED is described to have a vertical type structure, but exemplary embodiments of the disclosure are not limited thereto. For example, the micro-LED ED can have a lateral structure or a flip chip structure.

[0178] The first micro-LED 130 has been described with reference to Figure 10 The first micro-LED 130 has been described with reference to

[0179] According to the disclosure, in the active area AA, the diffusion layer 117a can be disposed. For example, the diffusion layer 117a can be disposed to surround the bank BNK and the plurality of micro-LEDs. The diffusion layer 117a can be disposed on the plurality of insulating layers and the bank BNK, and can be disposed to surround the plurality of micro-LEDs. For example, the diffusion layer 117a can be disposed to cover the plurality of micro-LEDs ED and the bank BNK in the area of the plurality of sub-pixels. For example, the diffusion layer 117a can cover the bank BNK, a portion of the passivation layer 116, and between the plurality of micro-LEDs ED. The diffusion layer 117a can be disposed or cover between the plurality of micro-LEDs ED included in one pixel PX and between the plurality of banks BNK.

[0180] For example, the diffusion layer 117a can extend in the row direction and can be spaced apart in the column direction. For example, the diffusion layer 117a can be disposed to surround the side portions of the micro-LEDs ED and the bank BNK between the passivation layer 116 and the second electrode CE2, but exemplary embodiments of the disclosure are not limited thereto. For example, the diffusion layer 117a can be an optical layer, a diffusion window, or a window diffusion layer, but exemplary embodiments of the disclosure are not limited thereto.

[0181] For example, the diffusion layer 117a can be disposed in each of the plurality of pixels PX or in some pixels PX disposed together in the same row, but exemplary embodiments of the disclosure are not limited thereto. For example, the diffusion layer 117a can be disposed in each of the plurality of pixels PX, or the plurality of pixels PX can share one diffusion layer 117a. As another example, each of the plurality of sub-pixels can respectively include the diffusion layer 117a, but exemplary embodiments of the disclosure are not limited thereto.

[0182] For example, the diffusion layer 117a can be configured of an organic insulating material, but can not include micro-particles, and exemplary embodiments of the disclosure are not limited thereto.

[0183] Meanwhile, the diffusion layer 117a can include a recess G. The recess G can be disposed along a boundary or an outer contour of the bank BNK. A plurality of recesses G can be disposed to correspond to an outer contour of each of a plurality of banks BNK on the plane. Accordingly, the plurality of recesses G can be disposed to enclose two micro-LEDs ED disposed on the bank BNK together.

[0184] The reflective plate RF can be disposed on the recess G of the diffusion layer 117a. A plurality of reflective plates can be respectively disposed on a plurality of recesses G of the diffusion layer 117a. The plurality of reflective plates RF are disposed to enclose the side surface of the micro-LED ED to reflect light emitted from the LED ED to be guided to the side surface. That is, the plurality of reflective plates RF change the light path to allow light guided to the side surface to be guided to the front surface, thereby improving the light emission efficiency.

[0185] Accordingly, the plurality of reflective plates RF can be disposed in a light emission path of the micro-LED ED. For example, the reflective plate can be disposed on the side surface far from the side surface of the micro-LED ED among the two side surfaces of the recess G. For example, referring to FIG. 10, the second reflective plate RF2 can be disposed on the side surface far from the side surface of the second micro-LED 140 among the two side surfaces of the recess G disposed on the right side of the second micro-LED 140. Also, the second reflective plate RF2 can be disposed on the side surface far from the side surface of the second micro-LED 140 among the two side surfaces of the recess G disposed on the left side of the second micro-LED 140. Figure 9A In the recess G disposed on the right side of the second micro-LED 140, the second reflective plate RF2 can be disposed on the side surface on the right among the two side surfaces of the recess G. Also, in the recess G disposed on the left side, the second reflective plate RF2 can be disposed on the side surface on the left among the two side surfaces of the recess G. That is, the plurality of reflective plates RF can be disposed on the side surface spaced apart from the micro-LED ED among the two side surfaces of the plurality of recesses G, but are not limited thereto.

[0186] Meanwhile, the plurality of reflective plates RF can extend to the top surface of the diffusion layer 117a, but are not limited thereto. For example, referring to FIG. 10, Figure 9A In the recess G disposed on the right side of the second micro-LED 140, the second reflective plate RF2 can extend to the top surface of the diffusion layer 117a disposed on the right side of the recess G. In the recess G disposed on the left side, the second reflective plate RF2 can extend to the top surface of the diffusion layer 117a disposed on the left side of the recess G, but is not limited thereto.

[0187] The plurality of reflective plates RF can be formed of a conductive material having good reflectivity. For example, the plurality of reflective plates can be formed of aluminum (Al), but are not limited thereto.

[0188] Simultaneously, multiple reflectors RF are disposed on multiple recesses G along the boundary of the partition BNK, configured to simultaneously surround two micro-LEDs disposed on the same partition BNK. That is, the multiple micro-LEDs ED include two micro-LEDs ED disposed on the partition BNK and emitting the same color. The reflectors are configured to surround the two micro-LEDs ED. In other words, two micro-LEDs disposed on the same partition BNK and emitting the same color of light can share multiple reflectors RF.

[0189] For example, refer to together Figure 7 The first reflector RF1 can be configured to surround the first-1 microLED 130a and the first-2 microLED 130b, which are disposed on the same partition BNK and emit light of the same color. Therefore, the first-1 microLED 130a and the first-2 microLED 130b can share the first reflector RF1.

[0190] The second reflector RF2 is configured to surround the second-1 microLED 140a and the second-2 microLED 140b, which are disposed on the same partition BNK and emit light of the same color. Therefore, the second-1 microLED 140a and the second-2 microLED 140b can share the second reflector RF2.

[0191] The third reflector RF3 is configured to surround the third-1 micro-LED 150a and the third-2 micro-LED 150b, which are disposed on the same partition BNK and emit light of the same color. Therefore, the third-1 micro-LED 150a and the third-2 micro-LED 150b can share the third reflector RF3.

[0192] Reference Figure 9A and Figure 9B The second electrode CE2 may be disposed on the diffuse layer 117a and multiple reflectors RF. For example, the second electrode CE2 may be electrically connected to multiple contact electrodes CCE through contact holes in the diffuse layer 117a. For example, the second electrode CE2 may be disposed on multiple micro LEDs ED. Multiple second electrodes CE2 may be disposed on the diffuse layer and multiple micro LEDs ED, and respectively connected to multiple micro LEDs ED. For example, the second electrode CE2 may include a transparent conductive oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), but the exemplary embodiments of this disclosure are not limited thereto. For example, the second electrode CE2 may be configured to contact the cathode electrode 135.

[0193] The second electrode CE2 can extend continuously in the first direction of the substrate 110. Therefore, the second electrode can be connected to a plurality of pixels PX disposed in the first direction of the substrate 110. For example, the second electrode CE2 can be connected to a plurality of pixels PX.

[0194] According to the disclosure, the second electrode CE2 can continuously extend on the diffusion layer 117a, the plurality of reflection plates RF, and the micro-LEDs ED. Accordingly, the second electrode CE2 can be disposed along the shape of the plurality of recesses G on the diffusion layer 117a. Accordingly, the second electrode CE2 can be in contact with the plurality of reflection plates RF disposed on the plurality of recesses G, but is not limited thereto.

[0195] The upper diffusion layer 117b can be disposed on the second electrode CE2. The upper diffusion layer 117b can be disposed to overlap the plurality of micro-LEDs ED and the diffusion layer 117a. The upper diffusion layer 117b is disposed above the second electrode CE2 and the plurality of micro-LEDs ED, so that Mura that can be generated in some of the plurality of micro-LEDs ED can be improved. For example, when the plurality of micro-LEDs ED is transferred onto the substrate 110 of the display device 1000, an area in which the intervals between the plurality of micro-LEDs ED are not uniform can be caused due to process deviation. When the intervals between the plurality of micro-LEDs ED are not uniform, the light emitting area of each of the plurality of micro-LEDs ED can be disposed non-uniformly, so that Mura can be visible to a user. Accordingly, the upper diffusion layer 117b configured to uniformly diffuse light is configured above the plurality of micro-LEDs ED, so that light emitted from some of the micro-LEDs ED that is visible as Mura can be reduced. Accordingly, light emitted from the plurality of micro-LEDs ED is uniformly diffused by the upper diffusion layer 117b to be extracted to the outside of the display device 1000, so that the brightness uniformity of the display device 1000 can be improved.

[0196] The upper diffusion layer 117b can be composed of an organic insulating material in which micro-particles are dispersed, but exemplary embodiments of the disclosure are not limited thereto. For example, the upper diffusion layer 117b can be configured by silicone in which micro metal particles, such as titanium dioxide (TiO2) particles, are dispersed, but exemplary embodiments of the disclosure are not limited thereto. For example, the upper diffusion layer 117b can be an optical layer or a top optical layer, but exemplary embodiments of the disclosure are not limited thereto.

[0197] According to the disclosure, light from the plurality of micro-LEDs ED is scattered by the micro-particles dispersed in the upper diffusion layer 117b to be emitted to the outside of the display device 1000. The upper diffusion layer 117b uniformly mixes light emitted from the plurality of micro-LEDs ED to further improve the brightness uniformity of the display device 1000. The light extraction efficiency of the display device 1000 can be improved by light scattered from the plurality of micro-particles, so that the display device 1000 can be driven at low power.

[0198] In the effective area AA, a black matrix BM can be disposed on the second electrode CE2, the diffusion layer 117a, and the upper diffusion layer 117b. For example, the contact hole of the diffusion layer 117a can be filled with the black matrix BM. The black matrix BM is configured to cover the effective area AA to reduce color mixing of light of a plurality of sub-pixels and external light reflection. For example, the black matrix BM is disposed in the contact hole through which the second electrode CE2 and the contact electrode CCE are connected, so that light leakage between a plurality of adjacent sub-pixels can be suppressed.

[0199] For example, the black matrix BM can be configured of an opaque material, but exemplary embodiments of the disclosure are not limited thereto. For example, the black matrix BM can be configured of an organic insulating material to which black pigment or black dye is added, but exemplary embodiments of the disclosure are not limited thereto.

[0200] In the effective area AA, a cover layer 118 can be disposed on the black matrix BM. The cover layer 118 can protect the configuration below the cover layer 118. For example, the cover layer 118 can be composed of an organic insulating material, but exemplary embodiments of the disclosure are not limited thereto. For example, the cover layer 118 can be configured of a photoresist, polyimide (PI), or a photoacrylic material, but exemplary embodiments of the disclosure are not limited thereto. For example, the cover layer 118 can be an overcoat layer or an insulating layer, but exemplary embodiments of the disclosure are not limited thereto.

[0201] A polarizing layer 293 can be disposed on the cover layer 118 by a first adhesive layer 291. The cover member 120 can be disposed on the polarizing layer 293 by a second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 can include an optical clear adhesive (OCA), an optical clear resin (OCR), or a pressure sensitive adhesive (PSA), but exemplary embodiments of the disclosure are not limited thereto.

[0202] According to the disclosure, a plurality of pad electrodes PE can be disposed on the third insulating layer 115c in the second non-effective area NA2. For example, at least some of the plurality of pad electrodes PE can be exposed from the passivation layer 116. For example, the plurality of pad electrodes PE can be electrically connected to the 2-4 connection line 122d through a contact hole of the third insulating layer 115c.

[0203] An adhesive layer ACF can be disposed on the plurality of pad electrodes PE. The adhesive layer ACF can be an adhesive layer in which conductive balls are dispersed in an insulating material, but exemplary embodiments of the disclosure are not limited thereto. When heat or pressure is applied to the adhesive layer ACF, the conductive balls are electrically connected in a portion to which heat or pressure is applied to have conductive properties. The adhesive layer ACF is disposed between the plurality of pad electrodes PE and the flexible circuit board (or flexible film) FCB, so that the flexible circuit board (or flexible film) FCB can be attached or bonded to the plurality of pad electrodes PE. For example, the adhesive layer ACF can be an anisotropic conductive film (ACF), but embodiments of the disclosure are not limited thereto.

[0204] The flexible circuit board (or flexible film) FCB can be disposed on the adhesive layer ACF. The flexible circuit board (or flexible film) FCB can be electrically connected to the plurality of pad electrodes PE through the adhesive layer ACF. Accordingly, signals output from the flexible circuit board (or flexible film) FCB and the printed circuit board 160 can be transmitted to the pixel driving circuit PD of the active area AA through the plurality of pad electrodes PE, the 2-4 connection line 122d, the 2-3 connection line 122c, the 2-2 connection line 122b, and the 2-1 connection line 122a.

[0205] In order to improve the light emission efficiency of micro-LEDs in a display apparatus, various methods are used. For example, scattering particles are used to scatter light emitted from the micro-LEDs to improve light emission efficiency. Accordingly, micro-particles can be dispersed in a diffusion layer surrounding the micro-LEDs. At this time, the diffusion layer can be patterned to form contact holes for connecting the micro-LEDs and the pixel driving circuit. However, when the diffusion layer includes micro-particles, the micro-particles affect the process of coating or patterning the diffusion layer, such that more complex control is required during the process. Accordingly, the processing difficulty can be deepened. Therefore, there is a problem in that the diffusion layer including the micro-particles is not disposed in a larger area.

[0206] In the display apparatus 1000 according to the exemplary embodiments of the disclosure, the diffusion layer 117a disposed to surround the plurality of micro-LEDs ED can not include micro-particles. Instead, a plurality of recesses G disposed to surround the plurality of micro-LEDs ED can be formed on the diffusion layer 117a, and a plurality of reflection plates RF can be disposed in each of the plurality of recesses G.

[0207] Accordingly, by using the relatively easy process of the plurality of reflection plates RF, the processing difficulty due to the micro-particles can be alleviated and the light extraction efficiency can be improved. That is, in the display apparatus 1000 according to the exemplary embodiments of the disclosure, a processing-optimized display apparatus having high brightness can be implemented.

[0208] Meanwhile, in order to improve the light emitting efficiency of the micro-LEDs, a reflective plate using a material having excellent reflectivity can be provided in the light path of the micro-LEDs. That is, light directed to the side surface is reflected using the reflective plate to change the path of light directed to the front surface, thereby improving the light emitting efficiency. However, in this case as well, when the reflective plate is applied to each micro-LED to be provided to surround each micro-LED, there is a problem in that a plurality of reflective plates need to be provided in a narrow area. For example, when the micro-LEDs are provided on the banks, a space for placing the reflective plate between the banks needs to be secured, so that there is a disadvantage in that unnecessary space is increased.

[0209] This can be particularly problematic in high pixel per inch (PPI) display devices for implementing high resolution. That is, in a high resolution display device having a high PPI, the size of one pixel is small, so that the increase in the area occupied by the banks can greatly affect the aperture ratio.

[0210] Further, in the display device 1000 according to the exemplary embodiment of the disclosure, the plurality of recesses G are provided along the boundary of the banks BNK. Accordingly, the plurality of reflective plates RF provided on the plurality of recesses G can also be provided along the boundary of the banks BNK. That is, each of the plurality of reflective plates RF can be provided to surround the micro-LEDs ED provided on the same bank BNK. That is, two micro-LEDs provided on the same bank BNK and emitting the same color of light can share the plurality of reflective plates RF.

[0211] That is, in the display device 1000 according to the exemplary embodiment of the disclosure, the plurality of reflective plates RF are provided to surround at least two micro-LEDs ED along the boundary of the banks BNK. Accordingly, unnecessary space required to apply the reflective plate RF in each micro-LED ED between the banks BNK can be minimized. Accordingly, the increase in the area of the banks BNK is not necessary, so that the integration of the pixels is improved to implement high resolution.

[0212] Figure 12 is a plan view of a display device according to another exemplary embodiment of the disclosure. Figure 13 is a cross-sectional view of a display device according to another exemplary embodiment of the disclosure. Figure 12 and Figure 13 The display device of Figures 1 to 11 has substantially the same components as the display device of

[0213] Referring to Figure 12 and Figure 13The sidewall diffusion layer 217c can be disposed between a plurality of micro-LED EDs on the bank BNK. The sidewall diffusion layer 217c can be disposed between two micro-LED EDs on the bank. The sidewall diffusion layer 217c can be disposed only between two micro-LED EDs.

[0214] The sidewall diffusion layer 217c can include an organic insulating material in which micro-particles are dispersed, but exemplary embodiments of the present disclosure are not limited thereto. For example, the sidewall diffusion layer 217c can be configured of silicone in which micro-metal particles, such as titanium dioxide (TiO2) particles, are dispersed, but exemplary embodiments of the present disclosure are not limited thereto.

[0215] Light from the plurality of micro-LED EDs is scattered by the micro-particles dispersed in the sidewall diffusion layer 217c to be emitted to the outside of the display apparatus. Accordingly, the sidewall diffusion layer 217c can improve the extraction efficiency of light emitted from the plurality of micro-LED EDs.

[0216] Meanwhile, the sidewall diffusion layer 217c including the micro-particles can be disposed in a minimum area required to ensure ease of handling. For example, the sidewall diffusion layer 217c can be disposed only between a plurality of micro-LED EDs on the bank BNK. For example, the sidewall diffusion layer 217c can be spaced apart from each other between the 1-1 micro-LED 130a and the 1-2 micro-LED 130b, between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b, and between the 3-1 micro-LED 150a and the 3-2 micro-LED 150b on the bank BNK.

[0217] That is, the sidewall diffusion layer 217c can be disposed to be spaced apart from each other in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. Accordingly, the reflective plate RF can be disposed to surround the sidewall diffusion layer 217c.

[0218] For example, the first reflective plate RF1 can be disposed to surround the sidewall diffusion layer 217c disposed in the first sub-pixel SP1. The second reflective plate RF2 can be disposed to surround the sidewall diffusion layer 217c disposed in the second sub-pixel SP2. The third reflective plate RF3 can be disposed to surround the sidewall diffusion layer 217c disposed in the third sub-pixel SP3, but is not limited thereto.

[0219] In the display apparatus according to another exemplary embodiment of the disclosure, a plurality of recesses G can be formed to surround a plurality of micro-LEDs ED, and a plurality of reflection plates RF can be disposed in each of the plurality of recesses G. At this time, the plurality of recesses G are disposed along the boundaries of the banks BNK, so that the plurality of reflection plates RF disposed on the plurality of recesses G can also be disposed along the boundaries of the banks BNK. That is, each of the plurality of reflection plates RF can be disposed to surround the micro-LEDs ED disposed on the same bank BNK. That is, two micro-LEDs disposed on the same bank BNK and emitting the same color of light can share the plurality of reflection plates RF.

[0220] That is, in the display apparatus according to another exemplary embodiment of the disclosure, the plurality of reflection plates RF are disposed to surround at least two micro-LEDs ED along the boundaries of the banks BNK. Accordingly, unnecessary space required to apply the reflection plate RF in each of the micro-LEDs ED between the banks BNK can be minimized. Accordingly, an increase in the area of the banks BNK is not necessary, so that the integration of the pixels is improved to achieve high resolution.

[0221] In the display apparatus according to another exemplary embodiment of the disclosure, a sidewall diffusion layer 217c including micro-particles can be disposed between the plurality of micro-LEDs ED. For example, the sidewall diffusion layer 217c can be disposed to be spaced apart in each of the plurality of sub-pixels. For example, the sidewall diffusion layer 217c can be disposed to be spaced apart between the 1-1 micro-LED 130a and the 1-2 micro-LED 130b, between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b, and between the 3-1 micro-LED 150a and the 3-2 micro-LED 150b. That is, the sidewall diffusion layer 217c is disposed only in a minimum area required to alleviate a handling difficulty due to the micro-particles and improve light extraction efficiency. Accordingly, a handling optimization can be implemented and a display apparatus having high brightness can be implemented.

[0222] Figure 14 is a plan view of a display apparatus according to still another exemplary embodiment of the disclosure. Figure 15A and Figure 15B is a cross-sectional view of a display apparatus according to still another exemplary embodiment of the disclosure. Figures 16A to 16D is a process diagram for explaining a manufacturing method of a display apparatus according to still another exemplary embodiment of the disclosure. For example, Figure 15A is a cross-sectional view of an active area "AA" taken along Figure 14 A-A' of FIG. 17. For example, Figure 15B is a cross-sectional view of an active area "AA" taken along Figure 14 C-C' of FIG. 17. Except for the sidewall diffusion layer 317c, Figures 14 to 16DThe display device of FIG. 1 has substantially the same components as the display device of FIG. 2, and thus redundant descriptions will be omitted. Figure 12 and Figure 13 The display device of FIG. 1 has substantially the same components as the display device of FIG. 2, and thus redundant descriptions will be omitted.

[0223] Referring to Figures 14 to 15B , a plurality of sub-pixels can share the side wall diffusion layer 317c. That is, the side wall diffusion layer 317c can be continuously disposed in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0224] For example, the side wall diffusion layer 317c can be continuously disposed between a plurality of micro-LEDs ED on the bank BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. Thus, when the banks BNK are spaced apart from each other in a row direction and extend in a column direction, the side wall diffusion layer 317c can extend in the row direction and be spaced apart from each other in the column direction.

[0225] That is, the side wall diffusion layer 317c can not only be disposed between a plurality of micro-LEDs ED on the bank BNK, but also extend onto the third insulating layer 115c on which the bank BNK is disposed. The plurality of banks BNK can extend in a first direction, and the side wall diffusion layer can extend onto a plurality of insulating layers to extend in a second direction and be disposed to be spaced apart in the first direction. Thus, the side wall diffusion layer 317c can be disposed to overlap the reflective plate RF, but is not limited thereto.

[0226] Meanwhile, in Figure 15B , it is shown that the passivation layer 116 is disposed on the third insulating layer 115c, such that the side wall diffusion layer 317c is disposed on the passivation layer 116. However, the disclosure is not limited thereto, and for example, when the passivation layer 116 is not disposed, the side wall diffusion layer 317c can be disposed on the third insulating layer 115c.

[0227] That is, in the display device according to still another exemplary embodiment of the disclosure, the side wall diffusion layer 317c can not be patterned in each sub-pixel, but a plurality of sub-pixels can share the side wall diffusion layer 317c. That is, the side wall diffusion layer 317c can be continuously disposed between the 1-1 micro-LED 130a and the 1-2 micro-LED 130b, between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b, and between the 3-1 micro-LED 150a and the 3-2 micro-LED 150b, but is not limited thereto.

[0228] Hereinafter, a process diagram of a manufacturing method of a display device according to still another exemplary embodiment of the disclosure will be described in detail with reference to Figures 16A to 17D

[0229] Figures 16A to 16D ​is a process diagram of a manufacturing method of a display apparatus according to yet another exemplary embodiment of the disclosure. Figures 17A to 17D is a process diagram of a manufacturing method of a display apparatus according to yet another exemplary embodiment of the disclosure. For example, Figures 16A to 16D is a process diagram taken along Figure 14 of A-A', and Figures 17A to 17D is a process diagram taken along Figure 14 of C-C'.

[0230] First, referring to Figure 16A and Figure 17A , two micro-LEDs emitting light of the same color, for example, a 2-1 micro-LED 140a and a 2-2 micro-LED 140b, can be disposed on the bank BNK.

[0231] An initial sidewall diffusion layer 317c' can be disposed between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b on the bank BNK. At this time, the initial sidewall diffusion layer 317c' can be commonly disposed in a plurality of sub-pixels. Therefore, referring to Figure 17A , the initial sidewall diffusion layer 317c' can extend on the passivation layer 116.

[0232] Meanwhile, in Figure 17A , the passivation layer 116 is shown to be disposed on the third insulating layer 115c, such that the initial sidewall diffusion layer 317c' is disposed on the passivation layer 116. However, the disclosure is not limited thereto, and for example, when the passivation layer 116 is not disposed, the initial sidewall diffusion layer 317c' can be disposed on the third insulating layer 115c. Meanwhile, in the process to be described below, a portion of the initial sidewall diffusion layer 317c' is removed to form a sidewall diffusion layer 317c.

[0233] Next, referring to Figure 16B and 17B , an initial diffusion layer 117a' can be disposed. The initial diffusion layer 117a' can be disposed to surround the second micro-LED 140, the initial sidewall diffusion layer 317c', and the bank BNK, to planarize a region where the second micro-LED 140 is disposed and a surrounding region.

[0234] Next, referring to Figure 16C and Figure 17C , a portion of the initial diffusion layer 117a' is removed to form a diffusion layer 117a including a plurality of recesses G. That is, the plurality of recesses G can be a recessed pattern obtained by partially removing the initial diffusion layer 117a' in a thickness direction, but are not limited thereto.

[0235] While the plurality of recesses G are formed, the initial diffusion layer 117a' is partially removed to form a contact hole. For example, a contact hole exposing the contact electrode CCE can be formed to connect the contact electrode CCE and the second electrode CE2, but is not limited thereto.

[0236] At this time, when comparing the recess G formed by partially removing the initial diffusion layer 117a' and the contact hole, the vertical width of the recess G can be smaller than the vertical width of the contact hole. The contact hole exposes the contact electrode CCE, so that the vertical width of the contact hole can be equal to the vertical width of the diffusion layer 117a. In contrast, the vertical width of the recess G can be equal to or smaller than the vertical width of the micro-LED ED.

[0237] For example, the height of the highest end of the recess G can be equal to or lower than the height of the top surface of the micro-LED ED. The height of the lowest end of the recess G can be higher than the height of the lowest end of the contact hole of the diffusion layer 117a, i.e., the top surface of the contact electrode CCE, but is not limited thereto.

[0238] Meanwhile, when the initial diffusion layer 117a' is partially removed, a portion of the initial sidewall diffusion layer 317c' is also removed to form the sidewall diffusion layer 317c.

[0239] To improve the light extraction efficiency of the second micro-LED 140, a plurality of reflection plates RF can be disposed on the plurality of recesses G of the diffusion layer 117a. The plurality of reflection plates RF can be disposed on the light path of the second micro-LED 140 to change the light path of the second micro-LED 140. Accordingly, the plurality of reflection plates RF can be spaced apart from the second micro-LED 140 at a predetermined interval. For example, the plurality of reflection plates RF can be disposed in the recesses G farther from the second micro-LED 140 among the plurality of recesses G, but are not limited thereto.

[0240] In addition, with reference to Figure 17C , the sidewall diffusion layer 317c not only extends on the bank BNK but also extends on the passivation layer 116 to overlap the plurality of reflection plates RF, but is not limited thereto.

[0241] Finally, with reference to Figure 16D and Figure 17D , a member including the second electrode CE2 is disposed on the second micro-LED 140 and the diffusion layer 117a to complete the manufacturing process of the display apparatus.

[0242] For example, the second electrode CE2 can be disposed along the shape of the plurality of recesses G on the diffusion layer 117a. Accordingly, the second electrode CE2 can contact the plurality of reflection plates RF disposed on the plurality of recesses G, but is not limited thereto.

[0243] In the display apparatus according to another exemplary embodiment of the disclosure, a plurality of recesses G can be formed to surround a plurality of micro-LEDs ED, and a plurality of reflection plates RF can be disposed in each of the plurality of recesses G. At this time, the plurality of recesses G are disposed along the boundaries of the banks BNK, so that the plurality of reflection plates RF disposed on the plurality of recesses G can also be disposed along the boundaries of the banks BNK. That is, each of the plurality of reflection plates RF can be disposed to surround two micro-LEDs ED disposed on the same bank BNK and emitting the same color of light. That is, two micro-LEDs disposed on the same bank BNK and emitting the same color of light can share the plurality of reflection plates RF.

[0244] That is, in the display apparatus according to another exemplary embodiment of the disclosure, the plurality of reflection plates RF are disposed to surround at least two micro-LEDs ED along the boundaries of the banks BNK. Accordingly, unnecessary space required to apply the reflection plate RF in each of the micro-LEDs ED between the banks BNK can be minimized. Accordingly, an increase in the area of the banks BNK is not necessary, so that the integration of the pixels is improved to achieve high resolution.

[0245] In the display apparatus according to another exemplary embodiment of the disclosure, a side wall diffusion layer 217c including micro-particles can be disposed between the plurality of micro-LEDs ED. For example, the side wall diffusion layer 217c can be disposed to be spaced apart from each other in each of the plurality of sub-pixels. For example, the side wall diffusion layer 217c can be disposed between the 1-1 micro-LED 130a and the 1-2 micro-LED 130b, between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b, and between the 3-1 micro-LED 150a and the 3-2 micro-LED 150b. That is, the side wall diffusion layer 217c is disposed only in a minimum area required to alleviate processing difficulty due to micro-particles and improve light extraction efficiency. Accordingly, processing optimization can be implemented and a display apparatus having high brightness can be improved.

[0246] Specifically, in a display apparatus according to still another exemplary embodiment of the disclosure, a plurality of sub-pixels can share a sidewall diffusion layer 317c including micro-particles. For example, the sidewall diffusion layer 317c can be disposed between the 1-1 micro-LED 130a and the 1-2 micro-LED 130b, between the 2-1 micro-LED 140a and the 2-2 micro-LED 140b, and between the 3-1 micro-LED 150a and the 3-2 micro-LED 150b in the plurality of sub-pixels at the same time. That is, a process of patterning the sidewall diffusion layer 317c disposed in each sub-pixel can be omitted. Therefore, since the micro-particles of the sidewall diffusion layer 317c, precise control required for the patterning process is not necessary, so that deepening of the process difficulty can be suppressed. In addition, the process cost and time of the patterning process of the sidewall diffusion layer 317c can be saved.

[0247] Figures 18 to 21 FIG. 1 is a diagram illustrating a device to which a display apparatus according to an exemplary embodiment of the disclosure is applied.

[0248] Referring to Figures 18 to 21 , a display apparatus 1000 according to an exemplary embodiment of the disclosure can be included in various devices or electronic devices. For example, referring to Figures 18 to 21 , various electronic devices can include a wearable device 1100, a mobile device 1200, a laptop computer 1300, and a monitor or TV 1400, but exemplary embodiments of the disclosure are not limited thereto.

[0249] According to Figures 1 to 1 exemplary embodiments of the disclosure described in FIG. 7d, each of the wearable device 1100, the mobile device 1200, the laptop computer 1300, and the monitor or TV 1400 can include a housing portion 1005, 1010, 1015, and 1020 and a display panel 100, 200, 300, and a display apparatus 1000.

[0250] For example, a display apparatus according to exemplary embodiments of the disclosure can be applied to a mobile device, a video phone, a smart watch, a watch phone, a wearable device, a foldable device, a rollable device, a bendable device, a flexible device, a curved device, a sliding device, a variable device, an electronic notebook, an electronic book, a portable multimedia player (PMP), a personal digital assistant (PDA), an MP3 player, a mobile medical device, a desktop PC, a laptop PC, a netbook computer, a workstation, a navigation system, a vehicle display apparatus, a theater display apparatus, a television, a wallpaper device, a signage device, a game console, a laptop computer, a monitor, a camera, a camcorder, a home appliance, etc.

[0251] Exemplary embodiments of the disclosure can also be described as follows:

[0252] According to an aspect of the disclosure, a display apparatus is provided. The display apparatus includes a substrate; a pixel driving circuit disposed on the substrate; a plurality of insulating layers disposed on the pixel driving circuit; a bank disposed on the plurality of insulating layers; a plurality of micro-LEDs disposed on the bank and electrically connected to the pixel driving circuit; a diffusion layer disposed on the plurality of insulating layers and disposed to surround the bank and the plurality of micro-LEDs, and including a recess disposed along a boundary of the bank; and a reflection plate disposed on the recess.

[0253] The reflection plate can be disposed on a side surface of the recess facing away from the plurality of micro-LEDs.

[0254] The reflection plate can be disposed to extend to a top surface of the diffusion layer.

[0255] The plurality of micro-LEDs can include two micro-LEDs disposed on the bank and emitting the same color, and the reflection plate can be disposed to surround the two micro-LEDs.

[0256] The two micro-LEDs can share the reflection plate.

[0257] The display apparatus can further include a sidewall diffusion layer disposed between the two micro-LEDs on the bank and including an organic insulating material in which micro-particles are dispersed.

[0258] The sidewall diffusion layer can be disposed only between the two micro-LEDs.

[0259] The reflection plate can be disposed to surround the sidewall diffusion layer.

[0260] The sidewall diffusion layer can extend onto the plurality of insulating layers to overlap the reflection plate.

[0261] The display apparatus can further include a plurality of first electrodes disposed on the bank and respectively electrically connected to the plurality of micro-LEDs; and a plurality of second electrodes disposed on the diffusion layer and the plurality of micro-LEDs and respectively connected to the plurality of micro-LEDs, wherein the plurality of second electrodes are disposed on the diffusion layer along a shape of the recess.

[0262] The plurality of second electrodes can be in contact with the reflection plate.

[0263] The display apparatus can further include an upper diffusion layer disposed on the plurality of second electrodes and including an organic insulating material in which micro-particles are dispersed.

[0264] Each of the plurality of micro-LEDs can include an anode electrode, a first semiconductor layer disposed on the anode electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode electrode disposed on the second semiconductor layer.

[0265] The display apparatus can further include a first electrode disposed under the plurality of micro-LEDs to electrically connect the pixel driving circuit and anode electrodes of the plurality of micro-LEDs, and a solder pattern disposed between the first electrode and the anode electrodes, wherein the first electrode and the anode electrodes can be electrically connected by using a eutectic bonding of the solder pattern.

[0266] According to another aspect of the disclosure, a display apparatus is provided. The display apparatus includes a substrate including an active area and an inactive area, the active area including a plurality of sub-pixels, the inactive area surrounding the active area; a pixel driving circuit disposed on the substrate; a plurality of insulating layers disposed on the pixel driving circuit; a plurality of banks disposed on the plurality of insulating layers; a plurality of micro-LEDs disposed on the plurality of banks and disposed in each of the plurality of sub-pixels; a diffusion layer disposed on the plurality of insulating layers and the banks and disposed to surround the plurality of micro-LEDs; and a plurality of reflection plates disposed on the diffusion layer, wherein the diffusion layer includes a plurality of recesses disposed to correspond to an outer contour of each of the plurality of banks on a plane, and the plurality of reflection plates are respectively disposed in the plurality of recesses.

[0267] The plurality of micro-LEDs can include a 1-1 micro-LED and a 1-2 micro-LED disposed on the same bank of the plurality of banks and emitting the same color of light, a 2-1 micro-LED and a 2-2 micro-LED disposed on the same bank of the plurality of banks and emitting the same color of light, and a 3-1 micro-LED and a 3-2 micro-LED disposed on the same bank of the plurality of banks and emitting the same color of light, and each of the plurality of reflection plates is disposed to surround two micro-LEDs emitting the same color of light.

[0268] The plurality of reflection plates can include a first reflection plate surrounding the 1-1 micro-LED and the 1-2 micro-LED, a second reflection plate surrounding the 2-1 micro-LED and the 2-2 micro-LED, and a third reflection plate surrounding the 3-1 micro-LED and the 3-2 micro-LED.

[0269] The first reflection plate, the second reflection plate, and the third reflection plate can be disposed to be spaced apart from each other.

[0270] The plurality of banks can extend in a first direction, and the plurality of reflection plates can extend in the first direction and be spaced apart from each other in a second direction.

[0271] The display apparatus can further include a sidewall diffusion layer disposed between the 1-1 micro-LED and the 1-2 micro-LED, between the 2-1 micro-LED and the 2-2 micro-LED, and between the 3-1 micro-LED and the 3-2 micro-LED on the plurality of banks, and include micro-particles.

[0272] The sidewall diffusion layer can be disposed to be spaced apart between the 1-1 micro-LED and the 1-2 micro-LED, between the 2-1 micro-LED and the 2-2 micro-LED, and between the 3-1 micro-LED and the 3-2 micro-LED.

[0273] The plurality of banks can extend in a first direction, and the sidewall diffusion layer can extend onto the plurality of insulating layers to extend in a second direction and be disposed to be spaced apart in the first direction.

[0274] Each of the plurality of micro-LEDs can include an anode electrode, a first semiconductor layer disposed on the anode electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode electrode disposed on the second semiconductor layer and having a vertical type structure.

[0275] The display apparatus can further include a first electrode disposed under the plurality of micro-LEDs, and a solder pattern disposed between the first electrode and the anode electrode. The anode electrode can be bonded to the first electrode by using the solder pattern for eutectic bonding.

[0276] Although the exemplary embodiments of the disclosure have been described in detail with reference to the accompanying drawings, the disclosure is not limited thereto and can be embodied in many different forms. Therefore, the exemplary embodiments of the disclosure are provided only for illustrative purposes, and are not intended to limit the technical concept of the disclosure. The scope of the technical concept of the disclosure is not limited thereto. Therefore, it should be understood that the above-described exemplary embodiments are illustrative in all aspects and do not limit the disclosure. All technical concepts within the equivalent scope of the disclosure should be interpreted to fall within the scope of the disclosure.

Claims

1. A display apparatus comprising: a substrate; a pixel driving circuit disposed on the substrate; a plurality of insulating layers disposed on the pixel driving circuit; a bank disposed on the plurality of insulating layers; a plurality of micro-LEDs disposed on the bank and electrically connected to the pixel driving circuit; a diffusion layer disposed on the plurality of insulating layers and disposed to surround the bank and the plurality of micro-LEDs, and comprising a recess disposed along a boundary of the bank; and a reflective plate disposed on the recess. 2.The display apparatus of claim 1, wherein the reflective plate is disposed on a side surface of the recess away from the plurality of micro-LEDs. 3.The display apparatus of claim 2, wherein the reflective plate is disposed to extend to a top surface of the diffusion layer. 4.The display apparatus of claim 1, wherein the plurality of micro-LEDs comprises two micro-LEDs disposed on the bank and emitting a same color, and the reflective plate is disposed to surround the two micro-LEDs. 5.The display apparatus of claim 4, wherein the two micro-LEDs share the reflective plate. 6.The display apparatus of claim 4, further comprising: a sidewall diffusion layer disposed between the two micro-LEDs on the bank and comprising an organic insulating material having micro-particles dispersed therein. 7.The display apparatus of claim 6, wherein the sidewall diffusion layer is disposed only between the two micro-LEDs. 8.The display apparatus of claim 7, wherein the reflective plate is disposed to surround the sidewall diffusion layer. 9.The display apparatus of claim 6, wherein the sidewall diffusion layer extends onto the plurality of insulating layers to overlap the reflective plate. 10.The display apparatus of claim 1, further comprising: a plurality of first electrodes disposed on the bank and respectively electrically connected to the plurality of micro-LEDs; and a plurality of second electrodes disposed on the diffusion layer and the plurality of micro-LEDs and respectively connected to the plurality of micro-LEDs, wherein the plurality of second electrodes are disposed on the diffusion layer along a shape of the recess. 11.The display apparatus of claim 10, wherein the plurality of second electrodes are in contact with the reflective plate. 12.The display apparatus of claim 10, further comprising: an upper diffusion layer disposed on the plurality of second electrodes and comprising an organic insulating material having micro-particles dispersed therein. 13.The display apparatus of claim 1, wherein each of the plurality of micro-LEDs comprises: an anode electrode; a first semiconductor layer disposed on the anode electrode; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a cathode electrode disposed on the second semiconductor layer. 14.The display apparatus of claim 13, further comprising: ​ ​ ​ a first electrode disposed under the plurality of micro-LEDs to electrically connect the pixel driving circuit and the anode electrodes of the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anode electrodes, wherein the first electrode and the anode electrodes are electrically connected by eutectic bonding using the solder pattern.

15. A display apparatus comprising: a substrate including an active area and a non-active area, the active area including a plurality of sub-pixels, the non-active area surrounding the active area; a pixel driving circuit disposed on the substrate; a plurality of insulating layers disposed on the pixel driving circuit; a plurality of banks disposed on the plurality of insulating layers; a plurality of micro-LEDs disposed on the plurality of banks and in each of the plurality of sub-pixels; a diffusion layer disposed on the plurality of insulating layers and the banks and disposed to surround the plurality of micro-LEDs; and a plurality of reflective plates disposed on the diffusion layer, wherein the diffusion layer includes a plurality of recesses disposed to correspond to an outer contour of each of the plurality of banks on a plane, and the plurality of reflective plates are respectively disposed in the plurality of recesses.

16. The display apparatus of claim 15, wherein the plurality of micro-LEDs includes: a 1-1 micro-LED and a 1-2 micro-LED disposed on a same bank of the plurality of banks and emitting a same color of light; a 2-1 micro-LED and a 2-2 micro-LED disposed on a same bank of the plurality of banks and emitting a same color of light; and a 3-1 micro-LED and a 3-2 micro-LED disposed on a same bank of the plurality of banks and emitting a same color of light, and each of the plurality of reflective plates is disposed to surround two micro-LEDs emitting a same color of light.

17. The display apparatus of claim 16, wherein the plurality of reflective plates includes: a first reflective plate surrounding the 1-1 micro-LED and the 1-2 micro-LED; a second reflective plate surrounding the 2-1 micro-LED and the 2-2 micro-LED; and a third reflective plate surrounding the 3-1 micro-LED and the 3-2 micro-LED.

18. The display apparatus of claim 17, wherein the first reflective plate, the second reflective plate, and the third reflective plate are disposed to be spaced apart from each other.

19. The display apparatus of claim 16, wherein the plurality of banks extend in a first direction, and the plurality of reflective plates extend in the first direction and are spaced apart from each other in a second direction.

20. The display apparatus of claim 16, further comprising: ​ a sidewall diffusion layer disposed between the 1-1 micro-LED and the 1-2 micro-LED, between the 2-1 micro-LED and the 2-2 micro-LED, and between the 3-1 micro-LED and the 3-2 micro-LED on the plurality of banks, and including micro-particles. 21.The display apparatus of claim 20, wherein the sidewall diffusion layer is disposed to be spaced apart between the 1-1 micro-LED and the 1-2 micro-LED, between the 2-1 micro-LED and the 2-2 micro-LED, and between the 3-1 micro-LED and the 3-2 micro-LED. 22.The display apparatus of claim 20, wherein the plurality of banks extend in a first direction, and the sidewall diffusion layer extends onto the plurality of insulating layers to extend in a second direction and is disposed to be spaced apart in the first direction. 23.The display apparatus of claim 15, wherein each of the plurality of micro-LEDs includes an anode electrode, a first semiconductor layer disposed on the anode electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode electrode disposed on the second semiconductor layer and having a vertical type structure. 24.The display apparatus of claim 23, further comprising: a first electrode disposed under the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anode electrode, wherein the anode electrode is bonded to the first electrode by eutectic bonding using the solder pattern. ​

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